| /trunk/kernel/doc/AUTHORS |
|---|
| 1,12 → 1,12 |
| Jakub Jermar |
| Martin Decky |
| Ondrej Palkovsky |
| Jiri Svoboda |
| Jakub Vana |
| Josef Cejka |
| Michal Kebrt |
| Sergey Bondari |
| Pavel Jancik |
| Petr Stepan |
| Michal Konopa |
| Jakub Jermar <jermar@helenos.eu> |
| Martin Decky <decky@helenos.eu> |
| Ondrej Palkovsky <palkovsky@helenos.eu> |
| Jakub Vana <vana@helenos.eu> |
| Josef Cejka <cejka@helenos.eu> |
| Michal Kebrt <michalek.k@seznam.cz> |
| Sergey Bondari <bondari@helenos.eu> |
| Pavel Jancik <alfik.009@seznam.cz> |
| Petr Stepan <stepan.petr@volny.cz> |
| Michal Konopa <mkonopa@seznam.cz> |
| Vojtech Mencl |
| /trunk/kernel/doc/arch/mips32 |
|---|
| 3,9 → 3,11 |
| mips32 is the second port of SPARTAN kernel originally written by Jakub Jermar. |
| It was first developed to run on MIPS R4000 32-bit simulator. |
| Now it can run on real hardware as well. |
| It can be compiled and run either as little- or big-endian. |
| HARDWARE REQUIREMENTS |
| o SGI Indy R4600 |
| o emulated MIPS 4K CPU |
| CPU |
| /trunk/kernel/doc/mm |
|---|
| 5,10 → 5,10 |
| 1.1 Hierarchical 4-level per address space page tables |
| SPARTAN kernel deploys generic interface for 4-level page tables for these |
| architectures: amd64, arm32, ia32, mips32 and ppc32. In this setting, page |
| tables are hierarchical and are not shared by address spaces (i.e. one set of |
| page tables per address space). |
| SPARTAN kernel deploys generic interface for 4-level page tables |
| for these architectures: amd64, ia32, mips32 and ppc32. In this |
| setting, page tables are hierarchical and are not shared by |
| address spaces (i.e. one set of page tables per address space). |
| VADDR |
| /trunk/kernel/doc/BUGS_FOUND |
|---|
| 0,0 → 1,23 |
| During development of this operating system, there were found bugs in: |
| Simics |
| ====== |
| - ia32 BIOS rewrites memory during AP start in SMP environment (#3351) |
| - ia32 Simics does not report #GP when EFER.NXE is 0 and finds NX page (#4214) |
| - incorrect MIPS instructions MSUB, MSUBU |
| Bochs |
| ===== |
| - FXSAVE/FXRSTOR not working correctly with XMM registers (patch #1282033) |
| Msim |
| ==== |
| - Incorrect interpretation of lwl/lwr/swl/swr instructions |
| - Omitted excMod case in write_proc_mem() |
| - Incorrect signed multiplication |
| Gcc |
| === |
| - Incorrect generation of unaligned data access instructions |
| (lwl/lwr/swl/swr) when using mipsel- target and -EB(big endian) |
| compilation, -O2 (#23824) |