/branches/network/kernel/arch/sparc64/include/byteorder.h |
---|
File deleted |
/branches/network/kernel/arch/sparc64/include/types.h |
---|
46,8 → 46,6 |
typedef unsigned long uint64_t; |
typedef uint64_t size_t; |
typedef uint64_t count_t; |
typedef uint64_t index_t; |
typedef uint64_t uintptr_t; |
typedef uint64_t pfn_t; |
60,11 → 58,9 |
typedef struct { |
} fncptr_t; |
/**< Formats for uintptr_t, size_t, count_t and index_t */ |
/**< Formats for uintptr_t, size_t */ |
#define PRIp "llx" |
#define PRIs "llu" |
#define PRIc "llu" |
#define PRIi "llu" |
/**< Formats for (u)int8_t, (u)int16_t, (u)int32_t, (u)int64_t and (u)native_t */ |
#define PRId8 "d" |
/branches/network/kernel/arch/sparc64/include/mm/tlb.h |
---|
322,7 → 322,7 |
* @return Current value of specified IMMU TLB Data Access |
* Register. |
*/ |
static inline uint64_t itlb_data_access_read(index_t entry) |
static inline uint64_t itlb_data_access_read(size_t entry) |
{ |
itlb_data_access_addr_t reg; |
336,7 → 336,7 |
* @param entry TLB Entry index. |
* @param value Value to be written. |
*/ |
static inline void itlb_data_access_write(index_t entry, uint64_t value) |
static inline void itlb_data_access_write(size_t entry, uint64_t value) |
{ |
itlb_data_access_addr_t reg; |
353,7 → 353,7 |
* @return Current value of specified DMMU TLB Data Access |
* Register. |
*/ |
static inline uint64_t dtlb_data_access_read(index_t entry) |
static inline uint64_t dtlb_data_access_read(size_t entry) |
{ |
dtlb_data_access_addr_t reg; |
367,7 → 367,7 |
* @param entry TLB Entry index. |
* @param value Value to be written. |
*/ |
static inline void dtlb_data_access_write(index_t entry, uint64_t value) |
static inline void dtlb_data_access_write(size_t entry, uint64_t value) |
{ |
dtlb_data_access_addr_t reg; |
383,7 → 383,7 |
* |
* @return Current value of specified IMMU TLB Tag Read Register. |
*/ |
static inline uint64_t itlb_tag_read_read(index_t entry) |
static inline uint64_t itlb_tag_read_read(size_t entry) |
{ |
itlb_tag_read_addr_t tag; |
398,7 → 398,7 |
* |
* @return Current value of specified DMMU TLB Tag Read Register. |
*/ |
static inline uint64_t dtlb_tag_read_read(index_t entry) |
static inline uint64_t dtlb_tag_read_read(size_t entry) |
{ |
dtlb_tag_read_addr_t tag; |
418,7 → 418,7 |
* @return Current value of specified IMMU TLB Data Access |
* Register. |
*/ |
static inline uint64_t itlb_data_access_read(int tlb, index_t entry) |
static inline uint64_t itlb_data_access_read(int tlb, size_t entry) |
{ |
itlb_data_access_addr_t reg; |
433,7 → 433,7 |
* @param entry TLB Entry index. |
* @param value Value to be written. |
*/ |
static inline void itlb_data_access_write(int tlb, index_t entry, |
static inline void itlb_data_access_write(int tlb, size_t entry, |
uint64_t value) |
{ |
itlb_data_access_addr_t reg; |
453,7 → 453,7 |
* @return Current value of specified DMMU TLB Data Access |
* Register. |
*/ |
static inline uint64_t dtlb_data_access_read(int tlb, index_t entry) |
static inline uint64_t dtlb_data_access_read(int tlb, size_t entry) |
{ |
dtlb_data_access_addr_t reg; |
469,7 → 469,7 |
* @param entry TLB Entry index. |
* @param value Value to be written. |
*/ |
static inline void dtlb_data_access_write(int tlb, index_t entry, |
static inline void dtlb_data_access_write(int tlb, size_t entry, |
uint64_t value) |
{ |
dtlb_data_access_addr_t reg; |
488,7 → 488,7 |
* |
* @return Current value of specified IMMU TLB Tag Read Register. |
*/ |
static inline uint64_t itlb_tag_read_read(int tlb, index_t entry) |
static inline uint64_t itlb_tag_read_read(int tlb, size_t entry) |
{ |
itlb_tag_read_addr_t tag; |
505,7 → 505,7 |
* |
* @return Current value of specified DMMU TLB Tag Read Register. |
*/ |
static inline uint64_t dtlb_tag_read_read(int tlb, index_t entry) |
static inline uint64_t dtlb_tag_read_read(int tlb, size_t entry) |
{ |
dtlb_tag_read_addr_t tag; |
/branches/network/kernel/arch/sparc64/include/mm/tsb.h |
---|
160,9 → 160,9 |
struct as; |
struct pte; |
extern void tsb_invalidate(struct as *as, uintptr_t page, count_t pages); |
extern void itsb_pte_copy(struct pte *t, index_t index); |
extern void dtsb_pte_copy(struct pte *t, index_t index, bool ro); |
extern void tsb_invalidate(struct as *as, uintptr_t page, size_t pages); |
extern void itsb_pte_copy(struct pte *t, size_t index); |
extern void dtsb_pte_copy(struct pte *t, size_t index, bool ro); |
#endif /* !def __ASM__ */ |
/branches/network/kernel/arch/sparc64/Makefile.inc |
---|
40,7 → 40,8 |
LFLAGS += -no-check-sections -N |
DEFS += -D__64_BITS__ |
BITS = 64 |
ENDIANESS = BE |
ifeq ($(PROCESSOR),us) |
DEFS += -DUS |
/branches/network/kernel/arch/sparc64/src/smp/smp.c |
---|
61,7 → 61,7 |
void smp_init(void) |
{ |
ofw_tree_node_t *node; |
count_t cnt = 0; |
size_t cnt = 0; |
if (is_us() || is_us_iii()) { |
node = ofw_tree_find_child_by_device_type(cpus_parent(), "cpu"); |
/branches/network/kernel/arch/sparc64/src/mm/tlb.c |
---|
54,8 → 54,8 |
#include <arch/mm/tsb.h> |
#endif |
static void dtlb_pte_copy(pte_t *, index_t, bool); |
static void itlb_pte_copy(pte_t *, index_t); |
static void dtlb_pte_copy(pte_t *, size_t, bool); |
static void itlb_pte_copy(pte_t *, size_t); |
static void do_fast_instruction_access_mmu_miss_fault(istate_t *, const char *); |
static void do_fast_data_access_mmu_miss_fault(istate_t *, tlb_tag_access_reg_t, |
const char *); |
130,7 → 130,7 |
* @param ro If true, the entry will be created read-only, regardless |
* of its w field. |
*/ |
void dtlb_pte_copy(pte_t *t, index_t index, bool ro) |
void dtlb_pte_copy(pte_t *t, size_t index, bool ro) |
{ |
tlb_tag_access_reg_t tag; |
tlb_data_t data; |
167,7 → 167,7 |
* @param t Page Table Entry to be copied. |
* @param index Zero if lower 8K-subpage, one if higher 8K-subpage. |
*/ |
void itlb_pte_copy(pte_t *t, index_t index) |
void itlb_pte_copy(pte_t *t, size_t index) |
{ |
tlb_tag_access_reg_t tag; |
tlb_data_t data; |
200,7 → 200,7 |
void fast_instruction_access_mmu_miss(unative_t unused, istate_t *istate) |
{ |
uintptr_t page_16k = ALIGN_DOWN(istate->tpc, PAGE_SIZE); |
index_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE; |
size_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE; |
pte_t *t; |
page_table_lock(AS, true); |
245,7 → 245,7 |
{ |
uintptr_t page_8k; |
uintptr_t page_16k; |
index_t index; |
size_t index; |
pte_t *t; |
page_8k = (uint64_t) tag.vpn << MMU_PAGE_WIDTH; |
309,7 → 309,7 |
void fast_data_access_protection(tlb_tag_access_reg_t tag, istate_t *istate) |
{ |
uintptr_t page_16k; |
index_t index; |
size_t index; |
pte_t *t; |
page_16k = ALIGN_DOWN((uint64_t) tag.vpn << MMU_PAGE_WIDTH, PAGE_SIZE); |
497,38 → 497,7 |
dtlb_sfsr_write(0); |
} |
#if defined (US3) |
/** Invalidates given TLB entry if and only if it is non-locked or global. |
* |
* @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1, |
* TLB_ISMALL, TLB_IBIG). |
* @param entry Entry index within the given TLB. |
*/ |
static void tlb_invalidate_entry(int tlb, index_t entry) |
{ |
tlb_data_t d; |
tlb_tag_read_reg_t t; |
if (tlb == TLB_DSMALL || tlb == TLB_DBIG_0 || tlb == TLB_DBIG_1) { |
d.value = dtlb_data_access_read(tlb, entry); |
if (!d.l || d.g) { |
t.value = dtlb_tag_read_read(tlb, entry); |
d.v = false; |
dtlb_tag_access_write(t.value); |
dtlb_data_access_write(tlb, entry, d.value); |
} |
} else if (tlb == TLB_ISMALL || tlb == TLB_IBIG) { |
d.value = itlb_data_access_read(tlb, entry); |
if (!d.l || d.g) { |
t.value = itlb_tag_read_read(tlb, entry); |
d.v = false; |
itlb_tag_access_write(t.value); |
itlb_data_access_write(tlb, entry, d.value); |
} |
} |
} |
#endif |
#if defined (US) |
/** Invalidate all unlocked ITLB and DTLB entries. */ |
void tlb_invalidate_all(void) |
{ |
543,7 → 512,6 |
* be safe to invalidate them as late as now. |
*/ |
#if defined (US) |
tlb_data_t d; |
tlb_tag_read_reg_t t; |
567,22 → 535,19 |
} |
} |
} |
#elif defined (US3) |
for (i = 0; i < tlb_ismall_size(); i++) |
tlb_invalidate_entry(TLB_ISMALL, i); |
for (i = 0; i < tlb_ibig_size(); i++) |
tlb_invalidate_entry(TLB_IBIG, i); |
for (i = 0; i < tlb_dsmall_size(); i++) |
tlb_invalidate_entry(TLB_DSMALL, i); |
for (i = 0; i < tlb_dbig_size(); i++) |
tlb_invalidate_entry(TLB_DBIG_0, i); |
for (i = 0; i < tlb_dbig_size(); i++) |
tlb_invalidate_entry(TLB_DBIG_1, i); |
/** Invalidate all unlocked ITLB and DTLB entries. */ |
void tlb_invalidate_all(void) |
{ |
itlb_demap(TLB_DEMAP_ALL, 0, 0); |
dtlb_demap(TLB_DEMAP_ALL, 0, 0); |
} |
#endif |
} |
/** Invalidate all ITLB and DTLB entries that belong to specified ASID |
* (Context). |
* |
614,7 → 579,7 |
* @param page First page which to sweep out from ITLB and DTLB. |
* @param cnt Number of ITLB and DTLB entries to invalidate. |
*/ |
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
void tlb_invalidate_pages(asid_t asid, uintptr_t page, size_t cnt) |
{ |
unsigned int i; |
tlb_context_reg_t pc_save, ctx; |
/branches/network/kernel/arch/sparc64/src/mm/as.c |
---|
89,7 → 89,7 |
* The count must be calculated with respect to the emualted 16K page |
* size. |
*/ |
count_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * |
size_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * |
sizeof(tsb_entry_t)) >> FRAME_WIDTH; |
frame_free(KA2PA((uintptr_t) as->arch.itsb)); |
return cnt; |
101,7 → 101,7 |
int as_create_arch(as_t *as, int flags) |
{ |
#ifdef CONFIG_TSB |
tsb_invalidate(as, 0, (count_t) -1); |
tsb_invalidate(as, 0, (size_t) -1); |
#endif |
return 0; |
} |
/branches/network/kernel/arch/sparc64/src/mm/tsb.c |
---|
50,13 → 50,14 |
* |
* @param as Address space. |
* @param page First page to invalidate in TSB. |
* @param pages Number of pages to invalidate. Value of (count_t) -1 means the |
* @param pages Number of pages to invalidate. Value of (size_t) -1 means the |
* whole TSB. |
*/ |
void tsb_invalidate(as_t *as, uintptr_t page, count_t pages) |
void tsb_invalidate(as_t *as, uintptr_t page, size_t pages) |
{ |
index_t i0, i; |
count_t cnt; |
size_t i0; |
size_t i; |
size_t cnt; |
ASSERT(as->arch.itsb && as->arch.dtsb); |
63,7 → 64,7 |
i0 = (page >> MMU_PAGE_WIDTH) & TSB_INDEX_MASK; |
ASSERT(i0 < ITSB_ENTRY_COUNT && i0 < DTSB_ENTRY_COUNT); |
if (pages == (count_t) -1 || (pages * 2) > ITSB_ENTRY_COUNT) |
if (pages == (size_t) -1 || (pages * 2) > ITSB_ENTRY_COUNT) |
cnt = ITSB_ENTRY_COUNT; |
else |
cnt = pages * 2; |
81,11 → 82,11 |
* @param t Software PTE. |
* @param index Zero if lower 8K-subpage, one if higher 8K subpage. |
*/ |
void itsb_pte_copy(pte_t *t, index_t index) |
void itsb_pte_copy(pte_t *t, size_t index) |
{ |
as_t *as; |
tsb_entry_t *tsb; |
index_t entry; |
size_t entry; |
ASSERT(index <= 1); |
127,11 → 128,11 |
* @param index Zero if lower 8K-subpage, one if higher 8K-subpage. |
* @param ro If true, the mapping is copied read-only. |
*/ |
void dtsb_pte_copy(pte_t *t, index_t index, bool ro) |
void dtsb_pte_copy(pte_t *t, size_t index, bool ro) |
{ |
as_t *as; |
tsb_entry_t *tsb; |
index_t entry; |
size_t entry; |
ASSERT(index <= 1); |
/branches/network/kernel/arch/sparc64/src/drivers/fhc.c |
---|
71,7 → 71,7 |
if (!prop || !prop->value) |
return NULL; |
count_t regs = prop->size / sizeof(ofw_central_reg_t); |
size_t regs = prop->size / sizeof(ofw_central_reg_t); |
if (regs + 1 < UART_IMAP_REG) |
return NULL; |
/branches/network/kernel/arch/sparc64/src/drivers/sgcn.c |
---|
279,7 → 279,7 |
*/ |
void sgcn_grab(void) |
{ |
kbd_disabled = true; |
kbd_disabled = false; |
} |
/** |
341,18 → 341,19 |
sgcn_instance_t *sgcnin_init(void) |
{ |
sgcn_buffer_begin_init(); |
sgcn_instance_t *instance = |
malloc(sizeof(sgcn_instance_t), FRAME_ATOMIC); |
if (!instance) |
return NULL; |
instance->srlnin = NULL; |
instance->thread = thread_create(ksgcnpoll, instance, TASK, 0, |
"ksgcnpoll", true); |
if (!instance->thread) { |
free(instance); |
return NULL; |
if (instance) { |
instance->srlnin = NULL; |
instance->thread = thread_create(ksgcnpoll, instance, TASK, 0, |
"ksgcnpoll", true); |
if (!instance->thread) { |
free(instance); |
return NULL; |
} |
} |
return instance; |
/branches/network/kernel/arch/sparc64/src/drivers/pci.c |
---|
91,7 → 91,7 |
return NULL; |
ofw_upa_reg_t *reg = prop->value; |
count_t regs = prop->size / sizeof(ofw_upa_reg_t); |
size_t regs = prop->size / sizeof(ofw_upa_reg_t); |
if (regs < SABRE_INTERNAL_REG + 1) |
return NULL; |
138,7 → 138,7 |
return NULL; |
ofw_upa_reg_t *reg = prop->value; |
count_t regs = prop->size / sizeof(ofw_upa_reg_t); |
size_t regs = prop->size / sizeof(ofw_upa_reg_t); |
if (regs < PSYCHO_INTERNAL_REG + 1) |
return NULL; |