| /branches/network/kernel/arch/mips32/include/boot.h |
|---|
| File deleted |
| /branches/network/kernel/arch/mips32/include/context_offset.h |
|---|
| 76,26 → 76,17 |
| #define EOFFSET_T5 0x30 |
| #define EOFFSET_T6 0x34 |
| #define EOFFSET_T7 0x38 |
| #define EOFFSET_S0 0x3c |
| #define EOFFSET_S1 0x40 |
| #define EOFFSET_S2 0x44 |
| #define EOFFSET_S3 0x48 |
| #define EOFFSET_S4 0x4c |
| #define EOFFSET_S5 0x50 |
| #define EOFFSET_S6 0x54 |
| #define EOFFSET_S7 0x58 |
| #define EOFFSET_T8 0x5c |
| #define EOFFSET_T9 0x60 |
| #define EOFFSET_GP 0x64 |
| #define EOFFSET_SP 0x68 |
| #define EOFFSET_S8 0x6c |
| #define EOFFSET_RA 0x70 |
| #define EOFFSET_LO 0x74 |
| #define EOFFSET_HI 0x78 |
| #define EOFFSET_STATUS 0x7c |
| #define EOFFSET_EPC 0x80 |
| #define EOFFSET_K1 0x84 |
| #define REGISTER_SPACE 136 |
| #define EOFFSET_T8 0x3c |
| #define EOFFSET_T9 0x40 |
| #define EOFFSET_GP 0x44 |
| #define EOFFSET_SP 0x48 |
| #define EOFFSET_RA 0x4c |
| #define EOFFSET_LO 0x50 |
| #define EOFFSET_HI 0x54 |
| #define EOFFSET_STATUS 0x58 |
| #define EOFFSET_EPC 0x5c |
| #define EOFFSET_K1 0x60 |
| #define REGISTER_SPACE 100 |
| #ifdef __ASM__ |
| 117,7 → 108,7 |
| #ifndef KERNEL |
| sw $k1,OFFSET_TLS(\ctx) |
| # ifdef CONFIG_MIPS_FPU |
| #ifdef CONFIG_FPU |
| mfc1 $t0,$20 |
| sw $t0, OFFSET_F20(\ctx) |
| 150,7 → 141,7 |
| mfc1 $t0,$30 |
| sw $t0, OFFSET_F30(\ctx) |
| # endif /* CONFIG_MIPS_FPU */ |
| #endif /* CONFIG_FPU */ |
| #endif /* KERNEL */ |
| sw $ra,OFFSET_PC(\ctx) |
| 172,7 → 163,7 |
| #ifndef KERNEL |
| lw $k1,OFFSET_TLS(\ctx) |
| # ifdef CONFIG_MIPS_FPU |
| #ifdef CONFIG_FPU |
| lw $t0, OFFSET_F20(\ctx) |
| mtc1 $t0,$20 |
| 205,9 → 196,9 |
| lw $t0, OFFSET_F30(\ctx) |
| mtc1 $t0,$30 |
| # endif /* CONFIG_MIPS_FPU */ |
| #endif /* CONFIG_FPU */ |
| #endif /* KERNEL */ |
| #endif /* KERNEL */ |
| lw $ra,OFFSET_PC(\ctx) |
| lw $sp,OFFSET_SP(\ctx) |
| .endm |
| /branches/network/kernel/arch/mips32/include/interrupt.h |
|---|
| 41,6 → 41,8 |
| #define IVT_ITEMS 32 |
| #define IVT_FIRST 0 |
| #define VECTOR_TLB_SHOOTDOWN_IPI EXC_Int |
| extern function virtual_timer_fnc; |
| extern uint32_t count_hi; |
| /branches/network/kernel/arch/mips32/include/exception.h |
|---|
| 73,19 → 73,10 |
| uint32_t t5; |
| uint32_t t6; |
| uint32_t t7; |
| uint32_t s0; |
| uint32_t s1; |
| uint32_t s2; |
| uint32_t s3; |
| uint32_t s4; |
| uint32_t s5; |
| uint32_t s6; |
| uint32_t s7; |
| uint32_t t8; |
| uint32_t t9; |
| uint32_t gp; |
| uint32_t sp; |
| uint32_t s8; |
| uint32_t ra; |
| uint32_t lo; |
| /branches/network/kernel/arch/mips32/include/console.h |
|---|
| 35,8 → 35,6 |
| #ifndef KERN_mips32_CONSOLE_H_ |
| #define KERN_mips32_CONSOLE_H_ |
| extern void console_init(devno_t devno); |
| #endif |
| /** @} |
| /branches/network/kernel/arch/mips32/include/types.h |
|---|
| 57,6 → 57,9 |
| typedef uint32_t unative_t; |
| typedef int32_t native_t; |
| typedef struct { |
| } fncptr_t; |
| #define PRIp "x" /**< Format for uintptr_t. */ |
| #define PRIs "u" /**< Format for size_t. */ |
| #define PRIc "u" /**< Format for count_t. */ |
| /branches/network/kernel/arch/mips32/include/smp/order.h |
|---|
| File deleted |
| /branches/network/kernel/arch/mips32/include/smp/dorder.h |
|---|
| 0,0 → 1,34 |
| /* |
| * Copyright (c) 2007 Martin Decky |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef KERN_mips32_DORDER_H_ |
| #define KERN_mips32_DORDER_H_ |
| extern void ipi_broadcast_arch(int ipi); |
| #endif |
| /branches/network/kernel/arch/mips32/include/atomic.h |
|---|
| 70,6 → 70,24 |
| return v; |
| } |
| static inline uint32_t test_and_set(atomic_t *val) { |
| uint32_t tmp, v; |
| asm volatile ( |
| "1:\n" |
| " ll %2, %1\n" |
| " bnez %2, 2f\n" |
| " li %0, %3\n" |
| " sc %0, %1\n" |
| " beqz %0, 1b\n" |
| "2:\n" |
| : "=&r" (tmp), "+m" (val->count), "=&r" (v) |
| : "i" (1) |
| ); |
| return v; |
| } |
| #endif |
| /** @} |
| /branches/network/kernel/arch/mips32/include/arch.h |
|---|
| 35,6 → 35,29 |
| #ifndef KERN_mips32_ARCH_H_ |
| #define KERN_mips32_ARCH_H_ |
| #define TASKMAP_MAX_RECORDS 32 |
| #define CPUMAP_MAX_RECORDS 32 |
| #define BOOTINFO_TASK_NAME_BUFLEN 32 |
| #include <typedefs.h> |
| extern count_t cpu_count; |
| typedef struct { |
| uintptr_t addr; |
| uint32_t size; |
| char name[BOOTINFO_TASK_NAME_BUFLEN]; |
| } utask_t; |
| typedef struct { |
| uint32_t cpumap; |
| uint32_t cnt; |
| utask_t tasks[TASKMAP_MAX_RECORDS]; |
| } bootinfo_t; |
| extern void arch_pre_main(void *entry, bootinfo_t *bootinfo); |
| #endif |
| /** @} |
| /branches/network/kernel/arch/mips32/include/asm.h |
|---|
| 36,6 → 36,7 |
| #define KERN_mips32_ASM_H_ |
| #include <arch/types.h> |
| #include <typedefs.h> |
| #include <config.h> |
| 55,7 → 56,11 |
| { |
| uintptr_t v; |
| asm volatile ("and %0, $29, %1\n" : "=r" (v) : "r" (~(STACK_SIZE-1))); |
| asm volatile ( |
| "and %0, $29, %1\n" |
| : "=r" (v) |
| : "r" (~(STACK_SIZE-1)) |
| ); |
| return v; |
| } |
| 69,7 → 74,38 |
| extern ipl_t interrupts_enable(void); |
| extern void interrupts_restore(ipl_t ipl); |
| extern ipl_t interrupts_read(void); |
| extern void asm_delay_loop(uint32_t t); |
| static inline void pio_write_8(ioport8_t *port, uint8_t v) |
| { |
| *port = v; |
| } |
| static inline void pio_write_16(ioport16_t *port, uint16_t v) |
| { |
| *port = v; |
| } |
| static inline void pio_write_32(ioport32_t *port, uint32_t v) |
| { |
| *port = v; |
| } |
| static inline uint8_t pio_read_8(ioport8_t *port) |
| { |
| return *port; |
| } |
| static inline uint16_t pio_read_16(ioport16_t *port) |
| { |
| return *port; |
| } |
| static inline uint32_t pio_read_32(ioport32_t *port) |
| { |
| return *port; |
| } |
| #endif |
| /** @} |
| /branches/network/kernel/arch/mips32/include/mm/frame.h |
|---|
| 41,6 → 41,8 |
| #ifdef KERNEL |
| #ifndef __ASM__ |
| #include <typedefs.h> |
| extern void frame_arch_init(void); |
| extern void physmem_print(void); |
| /branches/network/kernel/arch/mips32/include/mm/tlb.h |
|---|
| 40,11 → 40,7 |
| #include <arch/mm/asid.h> |
| #include <arch/exception.h> |
| #ifdef TLBCNT |
| # define TLB_ENTRY_COUNT TLBCNT |
| #else |
| # define TLB_ENTRY_COUNT 48 |
| #endif |
| #define TLB_WIRED 1 |
| #define TLB_KSTACK_WIRED_INDEX 0 |
| /branches/network/kernel/arch/mips32/include/drivers/serial.h |
|---|
| File deleted |
| /branches/network/kernel/arch/mips32/include/drivers/msim.h |
|---|
| 40,12 → 40,6 |
| #define MSIM_KBD_ADDRESS 0x90000000 |
| #define MSIM_KBD_IRQ 2 |
| #include <console/chardev.h> |
| void msim_console(devno_t devno); |
| void msim_kbd_release(void); |
| void msim_kbd_grab(void); |
| #endif |
| /** @} |