/branches/network/kernel/arch/ia32/include/byteorder.h |
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File deleted |
/branches/network/kernel/arch/ia32/include/types.h |
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46,8 → 46,6 |
typedef unsigned long long uint64_t; |
typedef uint32_t size_t; |
typedef uint32_t count_t; |
typedef uint32_t index_t; |
typedef uint32_t uintptr_t; |
typedef uint32_t pfn_t; |
62,8 → 60,6 |
#define PRIp "x" /**< Format for uintptr_t. */ |
#define PRIs "u" /**< Format for size_t. */ |
#define PRIc "u" /**< Format for count_t. */ |
#define PRIi "u" /**< Format for index_t. */ |
#define PRId8 "d" /**< Format for int8_t. */ |
#define PRId16 "d" /**< Format for int16_t. */ |
/branches/network/kernel/arch/ia32/include/smp/smp.h |
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39,10 → 39,10 |
/** SMP config opertaions interface. */ |
struct smp_config_operations { |
count_t (* cpu_count)(void); /**< Return number of detected processors. */ |
bool (* cpu_enabled)(index_t i); /**< Check whether the processor of index i is enabled. */ |
bool (*cpu_bootstrap)(index_t i); /**< Check whether the processor of index i is BSP. */ |
uint8_t (*cpu_apic_id)(index_t i); /**< Return APIC ID of the processor of index i. */ |
size_t (* cpu_count)(void); /**< Return number of detected processors. */ |
bool (* cpu_enabled)(size_t i); /**< Check whether the processor of index i is enabled. */ |
bool (*cpu_bootstrap)(size_t i); /**< Check whether the processor of index i is BSP. */ |
uint8_t (*cpu_apic_id)(size_t i); /**< Return APIC ID of the processor of index i. */ |
int (*irq_to_pin)(unsigned int irq); /**< Return mapping between irq and APIC pin. */ |
}; |
/branches/network/kernel/arch/ia32/include/atomic.h |
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114,9 → 114,7 |
preemption_disable(); |
asm volatile ( |
"0:\n" |
#ifdef CONFIG_HT |
"pause\n" /* Pentium 4's HT love this instruction */ |
#endif |
"mov %[count], %[tmp]\n" |
"testl %[tmp], %[tmp]\n" |
"jnz 0b\n" /* lightweight looping on locked spinlock */ |
/branches/network/kernel/arch/ia32/include/proc/task.h |
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40,7 → 40,7 |
typedef struct { |
/** I/O Permission bitmap Generation counter. */ |
count_t iomapver; |
size_t iomapver; |
/** I/O Permission bitmap. */ |
bitmap_t iomap; |
} task_arch_t; |
/branches/network/kernel/arch/ia32/include/mm/page.h |
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95,21 → 95,21 |
/* Get PTE flags accessors for each level. */ |
#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ |
get_pt_flags((pte_t *) (ptl0), (index_t) (i)) |
get_pt_flags((pte_t *) (ptl0), (size_t) (i)) |
#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ |
PAGE_PRESENT |
#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ |
PAGE_PRESENT |
#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ |
get_pt_flags((pte_t *) (ptl3), (index_t) (i)) |
get_pt_flags((pte_t *) (ptl3), (size_t) (i)) |
/* Set PTE flags accessors for each level. */ |
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ |
set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x)) |
set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) |
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ |
set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x)) |
set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) |
/* Macros for querying the last level entries. */ |
#define PTE_VALID_ARCH(p) \ |
145,7 → 145,7 |
/** When bit on this position is 1, a reserved bit was set in page directory. */ |
#define PFERR_CODE_RSVD (1 << 3) |
static inline int get_pt_flags(pte_t *pt, index_t i) |
static inline int get_pt_flags(pte_t *pt, size_t i) |
{ |
pte_t *p = &pt[i]; |
158,7 → 158,7 |
p->global << PAGE_GLOBAL_SHIFT); |
} |
static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
static inline void set_pt_flags(pte_t *pt, size_t i, int flags) |
{ |
pte_t *p = &pt[i]; |
/branches/network/kernel/arch/ia32/include/cpu.h |
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57,7 → 57,7 |
unsigned int stepping; |
tss_t *tss; |
count_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */ |
size_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */ |
} cpu_arch_t; |
#endif |
/branches/network/kernel/arch/ia32/Makefile.inc |
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35,7 → 35,8 |
TARGET = i686-pc-linux-gnu |
TOOLCHAIN_DIR = $(CROSS_PREFIX)/i686 |
DEFS += -D__32_BITS__ |
BITS = 32 |
ENDIANESS = LE |
CMN1 = -m32 |
GCC_CFLAGS += $(CMN1) |
/branches/network/kernel/arch/ia32/src/smp/mps.c |
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86,10 → 86,10 |
/* |
* Implementation of IA-32 SMP configuration interface. |
*/ |
static count_t get_cpu_count(void); |
static bool is_cpu_enabled(index_t i); |
static bool is_bsp(index_t i); |
static uint8_t get_cpu_apic_id(index_t i); |
static size_t get_cpu_count(void); |
static bool is_cpu_enabled(size_t i); |
static bool is_bsp(size_t i); |
static uint8_t get_cpu_apic_id(size_t i); |
static int mps_irq_to_pin(unsigned int irq); |
struct smp_config_operations mps_config_operations = { |
100,24 → 100,24 |
.irq_to_pin = mps_irq_to_pin |
}; |
count_t get_cpu_count(void) |
size_t get_cpu_count(void) |
{ |
return processor_entry_cnt; |
} |
bool is_cpu_enabled(index_t i) |
bool is_cpu_enabled(size_t i) |
{ |
ASSERT(i < processor_entry_cnt); |
return (bool) ((processor_entries[i].cpu_flags & 0x01) == 0x01); |
} |
bool is_bsp(index_t i) |
bool is_bsp(size_t i) |
{ |
ASSERT(i < processor_entry_cnt); |
return (bool) ((processor_entries[i].cpu_flags & 0x02) == 0x02); |
} |
uint8_t get_cpu_apic_id(index_t i) |
uint8_t get_cpu_apic_id(size_t i) |
{ |
ASSERT(i < processor_entry_cnt); |
return processor_entries[i].l_apic_id; |
/branches/network/kernel/arch/ia32/src/ddi/ddi.c |
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57,7 → 57,7 |
*/ |
int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size) |
{ |
count_t bits; |
size_t bits; |
bits = ioaddr + size; |
if (bits > IO_PORTS) |
99,7 → 99,7 |
/* |
* Enable the range and we are done. |
*/ |
bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size); |
bitmap_clear_range(&task->arch.iomap, (size_t) ioaddr, (size_t) size); |
/* |
* Increment I/O Permission bitmap generation counter. |
118,10 → 118,10 |
*/ |
void io_perm_bitmap_install(void) |
{ |
count_t bits; |
size_t bits; |
ptr_16_32_t cpugdtr; |
descriptor_t *gdt_p; |
count_t ver; |
size_t ver; |
/* First, copy the I/O Permission Bitmap. */ |
spinlock_lock(&TASK->lock); |
/branches/network/kernel/arch/ia32/src/mm/tlb.c |
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59,7 → 59,7 |
* @param page Address of the first page whose entry is to be invalidated. |
* @param cnt Number of entries to invalidate. |
*/ |
void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, count_t cnt) |
void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, size_t cnt) |
{ |
unsigned int i; |
/branches/network/kernel/arch/ia32/src/mm/frame.c |
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70,7 → 70,7 |
#endif |
pfn_t pfn; |
count_t count; |
size_t count; |
if (e820table[i].type == MEMMAP_MEMORY_AVAILABLE) { |
/* To be safe, make available zone possibly smaller */ |
/branches/network/kernel/arch/ia32/src/interrupt.c |
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101,7 → 101,7 |
static void gp_fault(int n __attribute__((unused)), istate_t *istate) |
{ |
if (TASK) { |
count_t ver; |
size_t ver; |
spinlock_lock(&TASK->lock); |
ver = TASK->arch.iomapver; |
/branches/network/kernel/arch/ia32/src/atomic.S |
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42,9 → 42,7 |
movl 12(%esp),%ebx |
0: |
#ifdef CONFIG_HT |
pause # Pentium 4's with HT love this instruction |
#endif |
movl (%ebx),%eax |
testl %eax,%eax |
jnz 0b # lightweight looping while it is locked |