Subversion Repositories HelenOS

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Ignore whitespace Rev 3369 → Rev 3386

/branches/network/kernel/arch/arm32/Makefile.inc
29,17 → 29,21
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
BFD_NAME = elf32-littlearm
BFD_ARCH = arm
BFD = binary
TARGET = arm-linux-gnu
TOOLCHAIN_DIR = /usr/local/arm
TOOLCHAIN_DIR = $(CROSS_PREFIX)/arm
 
KERNEL_LOAD_ADDRESS = 0x80200000
 
ifeq ($(MACHINE), gxemul_testarm)
# ifeq ($(MACHINE), gxemul_testarm)
DMACHINE = MACHINE_GXEMUL_TESTARM
endif
# endif
 
ATSIGN = %
 
90,7 → 94,7
arch/$(ARCH)/src/mm/tlb.c \
arch/$(ARCH)/src/mm/page_fault.c
 
ifeq ($(MACHINE), gxemul_testarm)
# ifeq ($(MACHINE), gxemul_testarm)
ARCH_SOURCES += arch/$(ARCH)/src/drivers/gxemul.c
endif
# endif
 
/branches/network/kernel/arch/arm32/src/asm.S
45,7 → 45,8
add r3, r1, #3
bic r3, r3, #3
cmp r1, r3
stmdb sp!, {r4, lr}
stmdb sp!, {r4, r5, lr}
mov r5, r0 /* save dst */
beq 4f
1:
cmp r2, #0
58,8 → 59,8
cmp ip, r2
bne 2b
3:
mov r0, r1
ldmia sp!, {r4, pc}
mov r0, r5
ldmia sp!, {r4, r5, pc}
4:
add r3, r0, #3
bic r3, r3, #3
94,5 → 95,5
 
memcpy_from_uspace_failover_address:
memcpy_to_uspace_failover_address:
mov r0, #0
ldmia sp!, {r4, pc}
mov r0, #0
ldmia sp!, {r4, r5, pc}
/branches/network/kernel/arch/arm32/src/userspace.c
70,8 → 70,11
/* set first parameter */
ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg;
 
/* %r1 is defined to hold pcb_ptr - set it to 0 */
ustate.r1 = 0;
 
/* clear other registers */
ustate.r1 = ustate.r2 = ustate.r3 = ustate.r4 = ustate.r5 =
ustate.r2 = ustate.r3 = ustate.r4 = ustate.r5 =
ustate.r6 = ustate.r7 = ustate.r8 = ustate.r9 = ustate.r10 =
ustate.r11 = ustate.r12 = ustate.lr = 0;
 
/branches/network/kernel/arch/arm32/src/exception.c
40,6 → 40,7
#include <interrupt.h>
#include <arch/machine.h>
#include <arch/mm/page_fault.h>
#include <arch/barrier.h>
#include <print.h>
#include <syscall/syscall.h>
 
209,7 → 210,7
*
* Addresses of handlers are stored in memory following exception vectors.
*/
static void install_handler (unsigned handler_addr, unsigned* vector)
static void install_handler(unsigned handler_addr, unsigned *vector)
{
/* relative address (related to exc. vector) of the word
* where handler's address is stored
219,6 → 220,7
/* make it LDR instruction and store at exception vector */
*vector = handler_address_ptr | LDR_OPCODE;
smc_coherence(*vector);
/* store handler's address */
*(vector + EXC_VECTORS) = handler_addr;
226,31 → 228,31
}
 
/** Low-level Reset Exception handler. */
static void reset_exception_entry()
static void reset_exception_entry(void)
{
PROCESS_EXCEPTION(EXC_RESET);
}
 
/** Low-level Software Interrupt Exception handler. */
static void swi_exception_entry()
static void swi_exception_entry(void)
{
PROCESS_EXCEPTION(EXC_SWI);
}
 
/** Low-level Undefined Instruction Exception handler. */
static void undef_instr_exception_entry()
static void undef_instr_exception_entry(void)
{
PROCESS_EXCEPTION(EXC_UNDEF_INSTR);
}
 
/** Low-level Fast Interrupt Exception handler. */
static void fiq_exception_entry()
static void fiq_exception_entry(void)
{
PROCESS_EXCEPTION(EXC_FIQ);
}
 
/** Low-level Prefetch Abort Exception handler. */
static void prefetch_abort_exception_entry()
static void prefetch_abort_exception_entry(void)
{
asm("sub lr, lr, #4");
PROCESS_EXCEPTION(EXC_PREFETCH_ABORT);
257,7 → 259,7
}
 
/** Low-level Data Abort Exception handler. */
static void data_abort_exception_entry()
static void data_abort_exception_entry(void)
{
asm("sub lr, lr, #8");
PROCESS_EXCEPTION(EXC_DATA_ABORT);
269,7 → 271,7
* because of possible occurence of nested interrupt exception, which
* would overwrite (and thus spoil) stack pointer.
*/
static void irq_exception_entry()
static void irq_exception_entry(void)
{
asm("sub lr, lr, #4");
setup_stack_and_save_regs();
/branches/network/kernel/arch/arm32/src/mm/page_fault.c
40,6 → 40,7
#include <genarch/mm/page_pt.h>
#include <arch.h>
#include <interrupt.h>
#include <print.h>
 
/** Returns value stored in fault status register.
*
173,7 → 174,8
*/
void data_abort(int exc_no, istate_t *istate)
{
fault_status_t fsr = read_fault_status_register();
fault_status_t fsr __attribute__ ((unused)) =
read_fault_status_register();
uintptr_t badvaddr = read_fault_address_register();
 
pf_access_t access = get_memory_access_type(istate->pc, badvaddr);
/branches/network/kernel/arch/arm32/src/arm32.c
55,7 → 55,7
/** Performs arm32 specific initialization before main_bsp() is called. */
void arch_pre_main(void)
{
int i;
unsigned int i;
 
init.cnt = bootinfo.cnt;
 
/branches/network/kernel/arch/arm32/src/debug/print.c
56,10 → 56,10
*/
static int debug_write(const char *str, size_t count, void *unused)
{
int i;
for (i = 0; i < count; ++i) {
unsigned int i;
for (i = 0; i < count; ++i)
putc(str[i]);
}
return i;
}
 
/branches/network/kernel/arch/arm32/src/cpu/cpu.c
56,7 → 56,7
};
 
/** Length of the #imp_data array */
static int imp_data_length = sizeof(imp_data) / sizeof(char *);
static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *);
 
/** Architecture names */
static char *arch_data[] = {
71,7 → 71,7
};
 
/** Length of the #arch_data array */
static int arch_data_length = sizeof(arch_data) / sizeof(char *);
static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *);
 
 
/** Retrieves processor identification from CP15 register 0.
/branches/network/kernel/arch/arm32/include/mm/page.h
43,8 → 43,6
#define PAGE_WIDTH FRAME_WIDTH
#define PAGE_SIZE FRAME_SIZE
 
#define PAGE_COLOR_BITS 0 /* dummy */
 
#ifndef __ASM__
# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
/branches/network/kernel/arch/arm32/include/barrier.h
46,6 → 46,9
#define read_barrier() asm volatile ("" ::: "memory")
#define write_barrier() asm volatile ("" ::: "memory")
 
#define smc_coherence(a)
#define smc_coherence_block(a, l)
 
#endif
 
/** @}
/branches/network/kernel/arch/arm32/include/memstr.h
38,10 → 38,10
 
#define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt))
 
extern void memsetw(uintptr_t dst, size_t cnt, uint16_t x);
extern void memsetb(uintptr_t dst, size_t cnt, uint8_t x);
extern void memsetw(void *dst, size_t cnt, uint16_t x);
extern void memsetb(void *dst, size_t cnt, uint8_t x);
 
extern int memcmp(uintptr_t src, uintptr_t dst, int cnt);
extern int memcmp(const void *a, const void *b, size_t cnt);
 
#endif
 
/branches/network/kernel/arch/arm32/include/types.h
42,10 → 42,6
# define ATTRIBUTE_PACKED
#endif
 
#define NULL 0
#define false 0
#define true 1
 
typedef signed char int8_t;
typedef signed short int16_t;
typedef signed long int32_t;
68,15 → 64,29
typedef uint32_t unative_t;
typedef int32_t native_t;
 
typedef uint8_t bool;
typedef uint64_t thread_id_t;
typedef uint64_t task_id_t;
typedef uint32_t context_id_t;
#define PRIp "x" /**< Format for uintptr_t. */
#define PRIs "u" /**< Format for size_t. */
#define PRIc "u" /**< Format for count_t. */
#define PRIi "u" /**< Format for index_t. */
 
typedef int32_t inr_t;
typedef int32_t devno_t;
#define PRId8 "d" /**< Format for int8_t. */
#define PRId16 "d" /**< Format for int16_t. */
#define PRId32 "d" /**< Format for int32_t. */
#define PRId64 "lld" /**< Format for int64_t. */
#define PRIdn "d" /**< Format for native_t. */
 
#define PRIu8 "u" /**< Format for uint8_t. */
#define PRIu16 "u" /**< Format for uint16_t. */
#define PRIu32 "u" /**< Format for uint32_t. */
#define PRIu64 "llu" /**< Format for uint64_t. */
#define PRIun "u" /**< Format for unative_t. */
 
#define PRIx8 "x" /**< Format for hexadecimal (u)int8_t. */
#define PRIx16 "x" /**< Format for hexadecimal (u)int16_t. */
#define PRIx32 "x" /**< Format for hexadecimal (u)uint32_t. */
#define PRIx64 "llx" /**< Format for hexadecimal (u)int64_t. */
#define PRIxn "x" /**< Format for hexadecimal (u)native_t. */
 
/** Page table entry.
*
* We have different structs for level 0 and level 1 page table entries.
/branches/network/kernel/arch/arm32/include/byteorder.h
36,24 → 36,10
#ifndef KERN_arm32_BYTEORDER_H_
#define KERN_arm32_BYTEORDER_H_
 
#include <byteorder.h>
 
#ifdef BIG_ENDIAN
 
#define uint32_t_le2host(n) uint32_t_byteorder_swap(n)
#define uint64_t_le2host(n) uint64_t_byteorder_swap(n)
 
#define uint32_t_be2host(n) (n)
#define uint64_t_be2host(n) (n)
 
#define ARCH_IS_BIG_ENDIAN
#else
 
#define uint32_t_le2host(n) (n)
#define uint64_t_le2host(n) (n)
 
#define uint32_t_be2host(n) uint32_t_byteorder_swap(n)
#define uint64_t_be2host(n) uint64_t_byteorder_swap(n)
 
#define ARCH_IS_LITTLE_ENDIAN
#endif
 
#endif