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/branches/network/defaults/sparc64/us3/Makefile.config
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/branches/network/defaults/sparc64/Makefile.config
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/branches/network/defaults/sparc64/serengeti/Makefile.config
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/branches/network/defaults/sparc64/us/Makefile.config
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/branches/network/defaults/ia64/i460GX/Makefile.config
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/branches/network/defaults/ia64/Makefile.config
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/branches/network/defaults/mips32/Makefile.config
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/branches/network/defaults/ia32/Makefile.config
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/branches/network/uspace/srv/fhc/Makefile
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/branches/network/uspace/srv/fhc/fhc.c
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/branches/network/uspace/srv/obio/Makefile
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/branches/network/uspace/srv/obio/obio.c
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Property changes:
Deleted: svn:mergeinfo
/branches/network/uspace/srv/obio
Property changes:
Deleted: svn:mergeinfo
/branches/network/uspace/srv/net/nil/eth/eth.c
123,8 → 123,8
int eth_send_message( device_id_t device_id, packet_t packet, services_t sender );
int eth_message( ipc_callid_t callid, ipc_call_t * call, ipc_call_t * answer, int * answer_count );
void eth_receiver( ipc_callid_t iid, ipc_call_t * icall );
eth_proto_ref eth_proccess_packet( int dummy, packet_t packet );
int eth_prepare_packet( int dummy, packet_t packet, uint8_t * src_addr, int ethertype );
eth_proto_ref eth_proccess_packet( packet_t packet );
int eth_prepare_packet( packet_t packet, uint8_t * src_addr, int ethertype );
 
int eth_initialize( void ){
ERROR_DECLARE;
173,8 → 173,6
device->device_id = device_id;
device->service = service;
device->mtu = mtu;
// TODO get dummy setting
device->dummy = 0;
// bind the device driver
device->phone = bind_service( device->service, device->device_id, SERVICE_ETHERNET, 0, eth_receiver );
// get hardware address
206,7 → 204,7
return EOK;
}
 
eth_proto_ref eth_proccess_packet( int dummy, packet_t packet ){
eth_proto_ref eth_proccess_packet( packet_t packet ){
ERROR_DECLARE;
 
eth_header_ex_ref header;
217,9 → 215,6
eth_fcs_ref fcs;
 
length = packet_get_data_length( packet );
if( dummy ){
packet_trim( packet, sizeof( eth_preamble_t ), 0 );
}
if( length <= sizeof( eth_header_t ) + ETH_MIN_CONTENT + ETH_SUFFIX ) return NULL;
header = ( eth_header_ex_ref ) packet_get_data( packet );
type = ntohs( header->header.ethertype );
251,10 → 246,9
// invalid length/type, should not occurr
return NULL;
}
if( dummy ){
if(( ~ compute_crc32( ~ 0, & header->header.dest, ((( void * ) fcs ) - (( void * ) & header->header.dest )) * 8 )) != ntohl( * fcs )){
return NULL;
}
// TODO compute crc with fcs to erase?
if(( ~ compute_crc32( ~ 0, & header->header.dest, ((( void * ) fcs ) - (( void * ) & header->header.dest )) * 8 )) != ntohl( * fcs )){
return NULL;
}
if( ERROR_OCCURRED( packet_set_addr( packet, header->header.src, header->header.dest, ETH_ADDR ))
|| ERROR_OCCURRED( packet_trim( packet, prefix, suffix ))){
266,21 → 260,11
int eth_receive_message( device_id_t device_id, packet_t packet ){
eth_proto_ref proto;
packet_t next;
eth_device_ref device;
int dummy;
 
rwlock_read_lock( & eth_globals.devices_lock );
device = eth_devices_find( & eth_globals.devices, device_id );
if( ! device ){
rwlock_read_unlock( & eth_globals.devices_lock );
return ENOENT;
}
dummy = device->dummy;
rwlock_read_unlock( & eth_globals.devices_lock );
rwlock_read_lock( & eth_globals.protos_lock );
do{
next = pq_detach( packet );
proto = eth_proccess_packet( dummy, packet );
proto = eth_proccess_packet( packet );
if( proto ){
async_msg_2( proto->phone, NET_IL_RECEIVED, device_id, packet_get_id( packet ));
}else{
363,7 → 347,7
return EOK;
}
 
int eth_prepare_packet( int dummy, packet_t packet, uint8_t * src_addr, int ethertype ){
int eth_prepare_packet( packet_t packet, uint8_t * src_addr, int ethertype ){
eth_header_ex_ref header;
eth_fcs_ref fcs;
uint8_t * src;
371,16 → 355,11
int length;
int i;
void * padding;
eth_preamble_ref preamble;
 
if( dummy ){
preamble = PACKET_PREFIX( packet, eth_preamble_t );
if( ! preamble ) return ENOMEM;
for( i = 0; i < 7; ++ i ) preamble->preamble[ i ] = ETH_PREAMBLE;
preamble->sfd = ETH_SFD;
}
header = PACKET_PREFIX( packet, eth_header_ex_t );
if( ! header ) return ENOMEM;
for( i = 0; i < 7; ++ i ) header->header.preamble[ i ] = ETH_PREAMBLE;
header->header.sfd = ETH_SFD;
length = packet_get_addr( packet, & src, & dest );
if( length < 0 ) return length;
if( length < ETH_ADDR ) return EINVAL;
399,11 → 378,9
header->lsap.ctrl = 0;
for( i = 0; i < 3; ++ i ) header->snap.proto[ i ] = 0;
header->snap.ethertype = ethertype;
if( dummy ){
fcs = PACKET_SUFFIX( packet, eth_fcs_t );
if( ! fcs ) return ENOMEM;
* fcs = htonl( ~ compute_crc32( ~ 0, & header->header.dest, ((( void * ) fcs ) - (( void * ) & header->header.dest )) * 8 ));
}
fcs = PACKET_SUFFIX( packet, eth_fcs_t );
if( ! fcs ) return ENOMEM;
* fcs = htonl( ~ compute_crc32( ~ 0, & header->header.dest, ((( void * ) fcs ) - (( void * ) & header->header.dest )) * 8 ));
return EOK;
}
 
429,7 → 406,7
// proccess packet queue
next = packet;
do{
if( ERROR_OCCURRED( eth_prepare_packet( device->dummy, next, ( uint8_t * ) device->addr->value, ethertype ))){
if( ERROR_OCCURRED( eth_prepare_packet( next, ( uint8_t * ) device->addr->value, ethertype ))){
// release invalid packet
tmp = pq_detach( next );
packet_release( eth_globals.networking_phone, packet_get_id( next ));
/branches/network/uspace/srv/net/nil/eth/eth_header.h
76,16 → 76,6
*/
typedef eth_header_snap_t * eth_header_snap_ref;
 
/** Type definition of the Ethernet header preamble.
* @see preamble
*/
typedef struct eth_preamble eth_preamble_t;
 
/** Type definition of the Ethernet header preamble pointer.
* @see eth_preamble
*/
typedef eth_preamble_t * eth_preamble_ref;
 
/** Type definition of the Ethernet header.
* @see eth_header
*/
125,10 → 115,9
uint16_t ethertype;
};
 
/** Ethernet header preamble.
* Used for dummy devices.
/** Ethernet header.
*/
struct eth_preamble{
struct eth_header{
/** Controlling preamble used for the frame transmission synchronization.
* All should be set to ETH_PREAMBLE.
*/
137,11 → 126,6
* Should be set to ETH_SFD.
*/
uint8_t sfd;
};
 
/** Ethernet header.
*/
struct eth_header{
/** Destination host Ethernet address (MAC address).
*/
uint8_t dest[ ETH_ADDR ];
/branches/network/uspace/srv/net/nil/eth/eth.h
97,10 → 97,6
/** Maximal transmission unit.
*/
size_t mtu;
/** Dummy device.
* Preamble and FCS are mandatory part of the packets.
*/
int dummy;
/** Actual device hardware address.
*/
measured_string_ref addr;
/branches/network/uspace/srv/net/Makefile
30,7 → 30,6
 
DIRS = \
netif/lo \
netif/dp8390 \
networking \
networking/startup
 
/branches/network/uspace/srv/fs/tmpfs/tmpfs_ops.c
64,8 → 64,6
*/
static tmpfs_dentry_t *root;
 
#define TMPFS_DEV 0 /**< Dummy device handle for TMPFS */
 
/*
* Implementation of the libfs interface.
*/
74,8 → 72,8
static void *tmpfs_match(void *, const char *);
static void *tmpfs_node_get(dev_handle_t, fs_index_t);
static void tmpfs_node_put(void *);
static void *tmpfs_create_node(dev_handle_t, int);
static int tmpfs_link_node(void *, void *, const char *);
static void *tmpfs_create_node(int);
static bool tmpfs_link_node(void *, void *, const char *);
static int tmpfs_unlink_node(void *, void *);
static int tmpfs_destroy_node(void *);
 
230,7 → 228,7
{
if (!hash_table_create(&dentries, DENTRIES_BUCKETS, 1, &dentries_ops))
return false;
root = (tmpfs_dentry_t *) tmpfs_create_node(TMPFS_DEV, L_DIRECTORY);
root = (tmpfs_dentry_t *) tmpfs_create_node(L_DIRECTORY);
if (!root) {
hash_table_destroy(&dentries);
return false;
284,7 → 282,7
/* nothing to do */
}
 
void *tmpfs_create_node(dev_handle_t dev_handle, int lflag)
void *tmpfs_create_node(int lflag)
{
assert((lflag & L_FILE) ^ (lflag & L_DIRECTORY));
 
308,7 → 306,7
return (void *) node;
}
 
int tmpfs_link_node(void *prnt, void *chld, const char *nm)
bool tmpfs_link_node(void *prnt, void *chld, const char *nm)
{
tmpfs_dentry_t *parentp = (tmpfs_dentry_t *) prnt;
tmpfs_dentry_t *childp = (tmpfs_dentry_t *) chld;
317,13 → 315,13
 
tmpfs_name_t *namep = malloc(sizeof(tmpfs_name_t));
if (!namep)
return ENOMEM;
return false;
tmpfs_name_initialize(namep);
size_t len = strlen(nm);
namep->name = malloc(len + 1);
if (!namep->name) {
free(namep);
return ENOMEM;
return false;
}
strcpy(namep->name, nm);
namep->parent = parentp;
343,7 → 341,7
parentp->child = childp;
}
 
return EOK;
return true;
}
 
int tmpfs_unlink_node(void *prnt, void *chld)
/branches/network/uspace/srv/fs/tmpfs/tmpfs_dump.c
38,12 → 38,17
 
#include "tmpfs.h"
#include "../../vfs/vfs.h"
#include <ipc/ipc.h>
#include <async.h>
#include <errno.h>
#include <stdlib.h>
#include <string.h>
#include <sys/types.h>
#include <as.h>
#include <libblock.h>
#include <libfs.h>
#include <ipc/services.h>
#include <ipc/devmap.h>
#include <sys/mman.h>
#include <byteorder.h>
 
#define TMPFS_BLOCK_SIZE 1024
54,12 → 59,11
} __attribute__((packed));
 
static bool
tmpfs_restore_recursion(int dev, off_t *bufpos, size_t *buflen, off_t *pos,
tmpfs_dentry_t *parent)
tmpfs_restore_recursion(int phone, void *block, off_t *bufpos, size_t *buflen,
off_t *pos, tmpfs_dentry_t *parent)
{
struct rdentry entry;
libfs_ops_t *ops = &tmpfs_libfs_ops;
int rc;
do {
char *fname;
66,8 → 70,8
tmpfs_dentry_t *node;
uint32_t size;
if (block_read(dev, bufpos, buflen, pos, &entry, sizeof(entry),
TMPFS_BLOCK_SIZE) != EOK)
if (!libfs_blockread(phone, block, bufpos, buflen, pos, &entry,
sizeof(entry), TMPFS_BLOCK_SIZE))
return false;
entry.len = uint32_t_le2host(entry.len);
80,14 → 84,14
if (fname == NULL)
return false;
node = (tmpfs_dentry_t *) ops->create(dev, L_FILE);
node = (tmpfs_dentry_t *) ops->create(L_FILE);
if (node == NULL) {
free(fname);
return false;
}
if (block_read(dev, bufpos, buflen, pos, fname,
entry.len, TMPFS_BLOCK_SIZE) != EOK) {
if (!libfs_blockread(phone, block, bufpos, buflen, pos,
fname, entry.len, TMPFS_BLOCK_SIZE)) {
ops->destroy((void *) node);
free(fname);
return false;
94,8 → 98,7
}
fname[entry.len] = 0;
rc = ops->link((void *) parent, (void *) node, fname);
if (rc != EOK) {
if (!ops->link((void *) parent, (void *) node, fname)) {
ops->destroy((void *) node);
free(fname);
return false;
102,8 → 105,8
}
free(fname);
if (block_read(dev, bufpos, buflen, pos, &size,
sizeof(size), TMPFS_BLOCK_SIZE) != EOK)
if (!libfs_blockread(phone, block, bufpos, buflen, pos,
&size, sizeof(size), TMPFS_BLOCK_SIZE))
return false;
size = uint32_t_le2host(size);
113,8 → 116,8
return false;
node->size = size;
if (block_read(dev, bufpos, buflen, pos, node->data,
size, TMPFS_BLOCK_SIZE) != EOK)
if (!libfs_blockread(phone, block, bufpos, buflen, pos,
node->data, size, TMPFS_BLOCK_SIZE))
return false;
break;
123,22 → 126,21
if (fname == NULL)
return false;
node = (tmpfs_dentry_t *) ops->create(dev, L_DIRECTORY);
node = (tmpfs_dentry_t *) ops->create(L_DIRECTORY);
if (node == NULL) {
free(fname);
return false;
}
if (block_read(dev, bufpos, buflen, pos, fname,
entry.len, TMPFS_BLOCK_SIZE) != EOK) {
if (!libfs_blockread(phone, block, bufpos, buflen, pos,
fname, entry.len, TMPFS_BLOCK_SIZE)) {
ops->destroy((void *) node);
free(fname);
return false;
}
fname[entry.len] = 0;
 
rc = ops->link((void *) parent, (void *) node, fname);
if (rc != EOK) {
if (!ops->link((void *) parent, (void *) node, fname)) {
ops->destroy((void *) node);
free(fname);
return false;
145,8 → 147,8
}
free(fname);
if (!tmpfs_restore_recursion(dev, bufpos, buflen, pos,
node))
if (!tmpfs_restore_recursion(phone, block, bufpos,
buflen, pos, node))
return false;
break;
161,19 → 163,32
bool tmpfs_restore(dev_handle_t dev)
{
libfs_ops_t *ops = &tmpfs_libfs_ops;
int rc;
 
rc = block_init(dev, TMPFS_BLOCK_SIZE);
if (rc != EOK)
return false;
void *block = mmap(NULL, TMPFS_BLOCK_SIZE,
PROTO_READ | PROTO_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, 0, 0);
if (block == NULL)
return false;
int phone = ipc_connect_me_to(PHONE_NS, SERVICE_DEVMAP,
DEVMAP_CONNECT_TO_DEVICE, dev);
 
if (phone < 0) {
munmap(block, TMPFS_BLOCK_SIZE);
return false;
}
if (ipc_share_out_start(phone, block, AS_AREA_READ | AS_AREA_WRITE) !=
EOK)
goto error;
off_t bufpos = 0;
size_t buflen = 0;
off_t pos = 0;
char tag[6];
if (block_read(dev, &bufpos, &buflen, &pos, tag, 5,
TMPFS_BLOCK_SIZE) != EOK)
if (!libfs_blockread(phone, block, &bufpos, &buflen, &pos, tag, 5,
TMPFS_BLOCK_SIZE))
goto error;
tag[5] = 0;
180,15 → 195,17
if (strcmp(tag, "TMPFS") != 0)
goto error;
if (!tmpfs_restore_recursion(dev, &bufpos, &buflen, &pos,
if (!tmpfs_restore_recursion(phone, block, &bufpos, &buflen, &pos,
ops->root_get(dev)))
goto error;
block_fini(dev);
ipc_hangup(phone);
munmap(block, TMPFS_BLOCK_SIZE);
return true;
error:
block_fini(dev);
ipc_hangup(phone);
munmap(block, TMPFS_BLOCK_SIZE);
return false;
}
 
/branches/network/uspace/srv/fs/tmpfs/Makefile
31,17 → 31,12
 
LIBC_PREFIX = ../../../lib/libc
LIBFS_PREFIX = ../../../lib/libfs
LIBBLOCK_PREFIX = ../../../lib/libblock
SOFTINT_PREFIX = ../../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
CFLAGS += -I $(LIBFS_PREFIX) -I $(LIBBLOCK_PREFIX)
CFLAGS += -I $(LIBFS_PREFIX)
 
LIBS = \
$(LIBFS_PREFIX)/libfs.a \
$(LIBBLOCK_PREFIX)/libblock.a \
$(LIBC_PREFIX)/libc.a
LIBS = $(LIBC_PREFIX)/libc.a $(LIBFS_PREFIX)/libfs.a
 
## Sources
#
61,13 → 56,13
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend $(OBJECTS)
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm: $(OUTPUT).disasm
 
/branches/network/uspace/srv/fs/tmpfs/tmpfs.c
55,6 → 55,16
 
vfs_info_t tmpfs_vfs_info = {
.name = "tmpfs",
.ops = {
[IPC_METHOD_TO_VFS_OP(VFS_LOOKUP)] = VFS_OP_DEFINED,
[IPC_METHOD_TO_VFS_OP(VFS_READ)] = VFS_OP_DEFINED,
[IPC_METHOD_TO_VFS_OP(VFS_WRITE)] = VFS_OP_DEFINED,
[IPC_METHOD_TO_VFS_OP(VFS_TRUNCATE)] = VFS_OP_DEFINED,
[IPC_METHOD_TO_VFS_OP(VFS_MOUNT)] = VFS_OP_DEFINED,
[IPC_METHOD_TO_VFS_OP(VFS_MOUNTED)] = VFS_OP_DEFINED,
[IPC_METHOD_TO_VFS_OP(VFS_UNMOUNT)] = VFS_OP_NULL,
[IPC_METHOD_TO_VFS_OP(VFS_DESTROY)] = VFS_OP_DEFINED,
}
};
 
fs_reg_t tmpfs_reg;
126,15 → 136,18
 
int main(int argc, char **argv)
{
int vfs_phone;
 
printf(NAME ": HelenOS TMPFS file system server\n");
int vfs_phone = ipc_connect_me_to_blocking(PHONE_NS, SERVICE_VFS, 0, 0);
if (vfs_phone < EOK) {
printf(NAME ": Unable to connect to VFS\n");
return -1;
 
vfs_phone = ipc_connect_me_to(PHONE_NS, SERVICE_VFS, 0, 0);
while (vfs_phone < EOK) {
usleep(10000);
vfs_phone = ipc_connect_me_to(PHONE_NS, SERVICE_VFS, 0, 0);
}
int rc = fs_register(vfs_phone, &tmpfs_reg, &tmpfs_vfs_info,
int rc;
rc = fs_register(vfs_phone, &tmpfs_reg, &tmpfs_vfs_info,
tmpfs_connection);
if (rc != EOK) {
printf(NAME ": Failed to register file system (%d)\n", rc);
/branches/network/uspace/srv/fs/fat/fat_fat.c
File deleted
/branches/network/uspace/srv/fs/fat/fat_dentry.c
File deleted
/branches/network/uspace/srv/fs/fat/fat_dentry.h
File deleted
/branches/network/uspace/srv/fs/fat/fat_fat.h
File deleted
/branches/network/uspace/srv/fs/fat/fat_ops.c
36,11 → 36,8
*/
 
#include "fat.h"
#include "fat_dentry.h"
#include "fat_fat.h"
#include "../../vfs/vfs.h"
#include <libfs.h>
#include <libblock.h>
#include <ipc/ipc.h>
#include <ipc/services.h>
#include <ipc/devmap.h>
53,8 → 50,10
#include <assert.h>
#include <futex.h>
#include <sys/mman.h>
#include <align.h>
 
#define BS_BLOCK 0
#define BS_SIZE 512
 
/** Futex protecting the list of cached free FAT nodes. */
static futex_t ffn_futex = FUTEX_INITIALIZER;
 
61,6 → 60,216
/** List of cached free FAT nodes. */
static LIST_INITIALIZE(ffn_head);
 
#define FAT_NAME_LEN 8
#define FAT_EXT_LEN 3
 
#define FAT_PAD ' '
 
#define FAT_DENTRY_UNUSED 0x00
#define FAT_DENTRY_E5_ESC 0x05
#define FAT_DENTRY_DOT 0x2e
#define FAT_DENTRY_ERASED 0xe5
 
#define min(a, b) ((a) < (b) ? (a) : (b))
 
static void dentry_name_canonify(fat_dentry_t *d, char *buf)
{
int i;
 
for (i = 0; i < FAT_NAME_LEN; i++) {
if (d->name[i] == FAT_PAD)
break;
if (d->name[i] == FAT_DENTRY_E5_ESC)
*buf++ = 0xe5;
else
*buf++ = d->name[i];
}
if (d->ext[0] != FAT_PAD)
*buf++ = '.';
for (i = 0; i < FAT_EXT_LEN; i++) {
if (d->ext[i] == FAT_PAD) {
*buf = '\0';
return;
}
if (d->ext[i] == FAT_DENTRY_E5_ESC)
*buf++ = 0xe5;
else
*buf++ = d->ext[i];
}
*buf = '\0';
}
 
static int dev_phone = -1; /* FIXME */
static void *dev_buffer = NULL; /* FIXME */
 
/* TODO move somewhere else */
typedef struct {
void *data;
size_t size;
} block_t;
 
static block_t *block_get(dev_handle_t dev_handle, off_t offset, size_t bs)
{
/* FIXME */
block_t *b;
off_t bufpos = 0;
size_t buflen = 0;
off_t pos = offset * bs;
 
assert(dev_phone != -1);
assert(dev_buffer);
 
b = malloc(sizeof(block_t));
if (!b)
return NULL;
b->data = malloc(bs);
if (!b->data) {
free(b);
return NULL;
}
b->size = bs;
 
if (!libfs_blockread(dev_phone, dev_buffer, &bufpos, &buflen, &pos,
b->data, bs, bs)) {
free(b->data);
free(b);
return NULL;
}
 
return b;
}
 
static void block_put(block_t *block)
{
/* FIXME */
free(block->data);
free(block);
}
 
#define FAT_BS(b) ((fat_bs_t *)((b)->data))
 
#define FAT_CLST_RES0 0x0000
#define FAT_CLST_RES1 0x0001
#define FAT_CLST_FIRST 0x0002
#define FAT_CLST_BAD 0xfff7
#define FAT_CLST_LAST1 0xfff8
#define FAT_CLST_LAST8 0xffff
 
/* internally used to mark root directory's parent */
#define FAT_CLST_ROOTPAR FAT_CLST_RES0
/* internally used to mark root directory */
#define FAT_CLST_ROOT FAT_CLST_RES1
 
#define fat_block_get(np, off) \
_fat_block_get((np)->idx->dev_handle, (np)->firstc, (off))
 
static block_t *
_fat_block_get(dev_handle_t dev_handle, fat_cluster_t firstc, off_t offset)
{
block_t *bb;
block_t *b;
unsigned bps;
unsigned spc;
unsigned rscnt; /* block address of the first FAT */
unsigned fatcnt;
unsigned rde;
unsigned rds; /* root directory size */
unsigned sf;
unsigned ssa; /* size of the system area */
unsigned clusters;
fat_cluster_t clst = firstc;
unsigned i;
 
bb = block_get(dev_handle, BS_BLOCK, BS_SIZE);
bps = uint16_t_le2host(FAT_BS(bb)->bps);
spc = FAT_BS(bb)->spc;
rscnt = uint16_t_le2host(FAT_BS(bb)->rscnt);
fatcnt = FAT_BS(bb)->fatcnt;
rde = uint16_t_le2host(FAT_BS(bb)->root_ent_max);
sf = uint16_t_le2host(FAT_BS(bb)->sec_per_fat);
block_put(bb);
 
rds = (sizeof(fat_dentry_t) * rde) / bps;
rds += ((sizeof(fat_dentry_t) * rde) % bps != 0);
ssa = rscnt + fatcnt * sf + rds;
 
if (firstc == FAT_CLST_ROOT) {
/* root directory special case */
assert(offset < rds);
b = block_get(dev_handle, rscnt + fatcnt * sf + offset, bps);
return b;
}
 
clusters = offset / spc;
for (i = 0; i < clusters; i++) {
unsigned fsec; /* sector offset relative to FAT1 */
unsigned fidx; /* FAT1 entry index */
 
assert(clst >= FAT_CLST_FIRST && clst < FAT_CLST_BAD);
fsec = (clst * sizeof(fat_cluster_t)) / bps;
fidx = clst % (bps / sizeof(fat_cluster_t));
/* read FAT1 */
b = block_get(dev_handle, rscnt + fsec, bps);
clst = uint16_t_le2host(((fat_cluster_t *)b->data)[fidx]);
assert(clst != FAT_CLST_BAD);
assert(clst < FAT_CLST_LAST1);
block_put(b);
}
 
b = block_get(dev_handle, ssa + (clst - FAT_CLST_FIRST) * spc +
offset % spc, bps);
 
return b;
}
 
/** Return number of blocks allocated to a file.
*
* @param dev_handle Device handle of the device with the file.
* @param firstc First cluster of the file.
*
* @return Number of blocks allocated to the file.
*/
static uint16_t
_fat_blcks_get(dev_handle_t dev_handle, fat_cluster_t firstc)
{
block_t *bb;
block_t *b;
unsigned bps;
unsigned spc;
unsigned rscnt; /* block address of the first FAT */
unsigned clusters = 0;
fat_cluster_t clst = firstc;
 
bb = block_get(dev_handle, BS_BLOCK, BS_SIZE);
bps = uint16_t_le2host(FAT_BS(bb)->bps);
spc = FAT_BS(bb)->spc;
rscnt = uint16_t_le2host(FAT_BS(bb)->rscnt);
block_put(bb);
 
if (firstc == FAT_CLST_RES0) {
/* No space allocated to the file. */
return 0;
}
 
while (clst < FAT_CLST_LAST1) {
unsigned fsec; /* sector offset relative to FAT1 */
unsigned fidx; /* FAT1 entry index */
 
assert(clst >= FAT_CLST_FIRST);
fsec = (clst * sizeof(fat_cluster_t)) / bps;
fidx = clst % (bps / sizeof(fat_cluster_t));
/* read FAT1 */
b = block_get(dev_handle, rscnt + fsec, bps);
clst = uint16_t_le2host(((fat_cluster_t *)b->data)[fidx]);
assert(clst != FAT_CLST_BAD);
block_put(b);
clusters++;
}
 
return clusters * spc;
}
 
static void fat_node_initialize(fat_node_t *node)
{
futex_initialize(&node->lock, 1);
73,73 → 282,52
node->dirty = false;
}
 
static void fat_node_sync(fat_node_t *node)
static uint16_t fat_bps_get(dev_handle_t dev_handle)
{
block_t *b;
fat_bs_t *bs;
fat_dentry_t *d;
block_t *bb;
uint16_t bps;
unsigned dps;
assert(node->dirty);
bb = block_get(dev_handle, BS_BLOCK, BS_SIZE);
assert(bb != NULL);
bps = uint16_t_le2host(FAT_BS(bb)->bps);
block_put(bb);
 
bs = block_bb_get(node->idx->dev_handle);
bps = uint16_t_le2host(bs->bps);
dps = bps / sizeof(fat_dentry_t);
/* Read the block that contains the dentry of interest. */
b = _fat_block_get(bs, node->idx->dev_handle, node->idx->pfc,
(node->idx->pdi * sizeof(fat_dentry_t)) / bps, BLOCK_FLAGS_NONE);
return bps;
}
 
d = ((fat_dentry_t *)b->data) + (node->idx->pdi % dps);
typedef enum {
FAT_DENTRY_SKIP,
FAT_DENTRY_LAST,
FAT_DENTRY_VALID
} fat_dentry_clsf_t;
 
d->firstc = host2uint16_t_le(node->firstc);
if (node->type == FAT_FILE) {
d->size = host2uint32_t_le(node->size);
} else if (node->type == FAT_DIRECTORY) {
d->attr = FAT_ATTR_SUBDIR;
static fat_dentry_clsf_t fat_classify_dentry(fat_dentry_t *d)
{
if (d->attr & FAT_ATTR_VOLLABEL) {
/* volume label entry */
return FAT_DENTRY_SKIP;
}
/* TODO: update other fields? (e.g time fields) */
b->dirty = true; /* need to sync block */
block_put(b);
if (d->name[0] == FAT_DENTRY_ERASED) {
/* not-currently-used entry */
return FAT_DENTRY_SKIP;
}
if (d->name[0] == FAT_DENTRY_UNUSED) {
/* never used entry */
return FAT_DENTRY_LAST;
}
if (d->name[0] == FAT_DENTRY_DOT) {
/*
* Most likely '.' or '..'.
* It cannot occur in a regular file name.
*/
return FAT_DENTRY_SKIP;
}
return FAT_DENTRY_VALID;
}
 
static fat_node_t *fat_node_get_new(void)
static void fat_node_sync(fat_node_t *node)
{
fat_node_t *nodep;
 
futex_down(&ffn_futex);
if (!list_empty(&ffn_head)) {
/* Try to use a cached free node structure. */
fat_idx_t *idxp_tmp;
nodep = list_get_instance(ffn_head.next, fat_node_t, ffn_link);
if (futex_trydown(&nodep->lock) == ESYNCH_WOULD_BLOCK)
goto skip_cache;
idxp_tmp = nodep->idx;
if (futex_trydown(&idxp_tmp->lock) == ESYNCH_WOULD_BLOCK) {
futex_up(&nodep->lock);
goto skip_cache;
}
list_remove(&nodep->ffn_link);
futex_up(&ffn_futex);
if (nodep->dirty)
fat_node_sync(nodep);
idxp_tmp->nodep = NULL;
futex_up(&nodep->lock);
futex_up(&idxp_tmp->lock);
} else {
skip_cache:
/* Try to allocate a new node structure. */
futex_up(&ffn_futex);
nodep = (fat_node_t *)malloc(sizeof(fat_node_t));
if (!nodep)
return NULL;
}
fat_node_initialize(nodep);
return nodep;
/* TODO */
}
 
/** Internal version of fat_node_get().
149,11 → 337,9
static void *fat_node_get_core(fat_idx_t *idxp)
{
block_t *b;
fat_bs_t *bs;
fat_dentry_t *d;
fat_node_t *nodep = NULL;
unsigned bps;
unsigned spc;
unsigned dps;
 
if (idxp->nodep) {
174,18 → 360,41
assert(idxp->pfc);
 
nodep = fat_node_get_new();
if (!nodep)
return NULL;
futex_down(&ffn_futex);
if (!list_empty(&ffn_head)) {
/* Try to use a cached free node structure. */
fat_idx_t *idxp_tmp;
nodep = list_get_instance(ffn_head.next, fat_node_t, ffn_link);
if (futex_trydown(&nodep->lock) == ESYNCH_WOULD_BLOCK)
goto skip_cache;
idxp_tmp = nodep->idx;
if (futex_trydown(&idxp_tmp->lock) == ESYNCH_WOULD_BLOCK) {
futex_up(&nodep->lock);
goto skip_cache;
}
list_remove(&nodep->ffn_link);
futex_up(&ffn_futex);
if (nodep->dirty)
fat_node_sync(nodep);
idxp_tmp->nodep = NULL;
futex_up(&nodep->lock);
futex_up(&idxp_tmp->lock);
} else {
skip_cache:
/* Try to allocate a new node structure. */
futex_up(&ffn_futex);
nodep = (fat_node_t *)malloc(sizeof(fat_node_t));
if (!nodep)
return NULL;
}
fat_node_initialize(nodep);
 
bs = block_bb_get(idxp->dev_handle);
bps = uint16_t_le2host(bs->bps);
spc = bs->spc;
bps = fat_bps_get(idxp->dev_handle);
dps = bps / sizeof(fat_dentry_t);
 
/* Read the block that contains the dentry of interest. */
b = _fat_block_get(bs, idxp->dev_handle, idxp->pfc,
(idxp->pdi * sizeof(fat_dentry_t)) / bps, BLOCK_FLAGS_NONE);
b = _fat_block_get(idxp->dev_handle, idxp->pfc,
(idxp->pdi * sizeof(fat_dentry_t)) / bps);
assert(b);
 
d = ((fat_dentry_t *)b->data) + (idxp->pdi % dps);
201,7 → 410,7
* defined for the directory entry type. We must determine the
* size of the directory by walking the FAT.
*/
nodep->size = bps * spc * fat_clusters_get(bs, idxp->dev_handle,
nodep->size = bps * _fat_blcks_get(idxp->dev_handle,
uint16_t_le2host(d->firstc));
} else {
nodep->type = FAT_FILE;
220,31 → 429,8
return nodep;
}
 
/*
* Forward declarations of FAT libfs operations.
*/
static void *fat_node_get(dev_handle_t, fs_index_t);
static void fat_node_put(void *);
static void *fat_create_node(dev_handle_t, int);
static int fat_destroy_node(void *);
static int fat_link(void *, void *, const char *);
static int fat_unlink(void *, void *);
static void *fat_match(void *, const char *);
static fs_index_t fat_index_get(void *);
static size_t fat_size_get(void *);
static unsigned fat_lnkcnt_get(void *);
static bool fat_has_children(void *);
static void *fat_root_get(dev_handle_t);
static char fat_plb_get_char(unsigned);
static bool fat_is_directory(void *);
static bool fat_is_file(void *node);
 
/*
* FAT libfs operations.
*/
 
/** Instantiate a FAT in-core node. */
void *fat_node_get(dev_handle_t dev_handle, fs_index_t index)
static void *fat_node_get(dev_handle_t dev_handle, fs_index_t index)
{
void *node;
fat_idx_t *idxp;
258,318 → 444,41
return node;
}
 
void fat_node_put(void *node)
static void fat_node_put(void *node)
{
fat_node_t *nodep = (fat_node_t *)node;
bool destroy = false;
 
futex_down(&nodep->lock);
if (!--nodep->refcnt) {
if (nodep->idx) {
futex_down(&ffn_futex);
list_append(&nodep->ffn_link, &ffn_head);
futex_up(&ffn_futex);
} else {
/*
* The node does not have any index structure associated
* with itself. This can only mean that we are releasing
* the node after a failed attempt to allocate the index
* structure for it.
*/
destroy = true;
}
futex_down(&ffn_futex);
list_append(&nodep->ffn_link, &ffn_head);
futex_up(&ffn_futex);
}
futex_up(&nodep->lock);
if (destroy)
free(node);
}
 
void *fat_create_node(dev_handle_t dev_handle, int flags)
static void *fat_create(int flags)
{
fat_idx_t *idxp;
fat_node_t *nodep;
fat_bs_t *bs;
fat_cluster_t mcl, lcl;
uint16_t bps;
int rc;
 
bs = block_bb_get(dev_handle);
bps = uint16_t_le2host(bs->bps);
if (flags & L_DIRECTORY) {
/* allocate a cluster */
rc = fat_alloc_clusters(bs, dev_handle, 1, &mcl, &lcl);
if (rc != EOK)
return NULL;
}
 
nodep = fat_node_get_new();
if (!nodep) {
fat_free_clusters(bs, dev_handle, mcl);
return NULL;
}
idxp = fat_idx_get_new(dev_handle);
if (!idxp) {
fat_free_clusters(bs, dev_handle, mcl);
fat_node_put(nodep);
return NULL;
}
/* idxp->lock held */
if (flags & L_DIRECTORY) {
int i;
block_t *b;
 
/*
* Populate the new cluster with unused dentries.
*/
for (i = 0; i < bs->spc; i++) {
b = _fat_block_get(bs, dev_handle, mcl, i,
BLOCK_FLAGS_NOREAD);
/* mark all dentries as never-used */
memset(b->data, 0, bps);
b->dirty = false;
block_put(b);
}
nodep->type = FAT_DIRECTORY;
nodep->firstc = mcl;
nodep->size = bps * bs->spc;
} else {
nodep->type = FAT_FILE;
nodep->firstc = FAT_CLST_RES0;
nodep->size = 0;
}
nodep->lnkcnt = 0; /* not linked anywhere */
nodep->refcnt = 1;
nodep->dirty = true;
 
nodep->idx = idxp;
idxp->nodep = nodep;
 
futex_up(&idxp->lock);
return nodep;
return NULL; /* not supported at the moment */
}
 
int fat_destroy_node(void *node)
static int fat_destroy(void *node)
{
fat_node_t *nodep = (fat_node_t *)node;
fat_bs_t *bs;
 
/*
* The node is not reachable from the file system. This means that the
* link count should be zero and that the index structure cannot be
* found in the position hash. Obviously, we don't need to lock the node
* nor its index structure.
*/
assert(nodep->lnkcnt == 0);
 
/*
* The node may not have any children.
*/
assert(fat_has_children(node) == false);
 
bs = block_bb_get(nodep->idx->dev_handle);
if (nodep->firstc != FAT_CLST_RES0) {
assert(nodep->size);
/* Free all clusters allocated to the node. */
fat_free_clusters(bs, nodep->idx->dev_handle, nodep->firstc);
}
 
fat_idx_destroy(nodep->idx);
free(nodep);
return EOK;
return ENOTSUP; /* not supported at the moment */
}
 
int fat_link(void *prnt, void *chld, const char *name)
static bool fat_link(void *prnt, void *chld, const char *name)
{
fat_node_t *parentp = (fat_node_t *)prnt;
fat_node_t *childp = (fat_node_t *)chld;
fat_dentry_t *d;
fat_bs_t *bs;
block_t *b;
int i, j;
uint16_t bps;
unsigned dps;
unsigned blocks;
fat_cluster_t mcl, lcl;
int rc;
 
futex_down(&childp->lock);
if (childp->lnkcnt == 1) {
/*
* On FAT, we don't support multiple hard links.
*/
futex_up(&childp->lock);
return EMLINK;
}
assert(childp->lnkcnt == 0);
futex_up(&childp->lock);
 
if (!fat_dentry_name_verify(name)) {
/*
* Attempt to create unsupported name.
*/
return ENOTSUP;
}
 
/*
* Get us an unused parent node's dentry or grow the parent and allocate
* a new one.
*/
futex_down(&parentp->idx->lock);
bs = block_bb_get(parentp->idx->dev_handle);
bps = uint16_t_le2host(bs->bps);
dps = bps / sizeof(fat_dentry_t);
 
blocks = parentp->size / bps;
 
for (i = 0; i < blocks; i++) {
b = fat_block_get(bs, parentp, i, BLOCK_FLAGS_NONE);
for (j = 0; j < dps; j++) {
d = ((fat_dentry_t *)b->data) + j;
switch (fat_classify_dentry(d)) {
case FAT_DENTRY_SKIP:
case FAT_DENTRY_VALID:
/* skipping used and meta entries */
continue;
case FAT_DENTRY_FREE:
case FAT_DENTRY_LAST:
/* found an empty slot */
goto hit;
}
}
block_put(b);
}
j = 0;
/*
* We need to grow the parent in order to create a new unused dentry.
*/
if (parentp->idx->pfc == FAT_CLST_ROOT) {
/* Can't grow the root directory. */
futex_up(&parentp->idx->lock);
return ENOSPC;
}
rc = fat_alloc_clusters(bs, parentp->idx->dev_handle, 1, &mcl, &lcl);
if (rc != EOK) {
futex_up(&parentp->idx->lock);
return rc;
}
fat_append_clusters(bs, parentp, mcl);
b = fat_block_get(bs, parentp, i, BLOCK_FLAGS_NOREAD);
d = (fat_dentry_t *)b->data;
/*
* Clear all dentries in the block except for the first one (the first
* dentry will be cleared in the next step).
*/
memset(d + 1, 0, bps - sizeof(fat_dentry_t));
 
hit:
/*
* At this point we only establish the link between the parent and the
* child. The dentry, except of the name and the extension, will remain
* uninitialized until the corresponding node is synced. Thus the valid
* dentry data is kept in the child node structure.
*/
memset(d, 0, sizeof(fat_dentry_t));
fat_dentry_name_set(d, name);
b->dirty = true; /* need to sync block */
block_put(b);
futex_up(&parentp->idx->lock);
 
futex_down(&childp->idx->lock);
/*
* If possible, create the Sub-directory Identifier Entry and the
* Sub-directory Parent Pointer Entry (i.e. "." and ".."). These entries
* are not mandatory according to Standard ECMA-107 and HelenOS VFS does
* not use them anyway, so this is rather a sign of our good will.
*/
b = fat_block_get(bs, childp, 0, BLOCK_FLAGS_NONE);
d = (fat_dentry_t *)b->data;
if (fat_classify_dentry(d) == FAT_DENTRY_LAST ||
strcmp(d->name, FAT_NAME_DOT) == 0) {
memset(d, 0, sizeof(fat_dentry_t));
strcpy(d->name, FAT_NAME_DOT);
strcpy(d->ext, FAT_EXT_PAD);
d->attr = FAT_ATTR_SUBDIR;
d->firstc = host2uint16_t_le(childp->firstc);
/* TODO: initialize also the date/time members. */
}
d++;
if (fat_classify_dentry(d) == FAT_DENTRY_LAST ||
strcmp(d->name, FAT_NAME_DOT_DOT) == 0) {
memset(d, 0, sizeof(fat_dentry_t));
strcpy(d->name, FAT_NAME_DOT_DOT);
strcpy(d->ext, FAT_EXT_PAD);
d->attr = FAT_ATTR_SUBDIR;
d->firstc = (parentp->firstc == FAT_CLST_ROOT) ?
host2uint16_t_le(FAT_CLST_RES0) :
host2uint16_t_le(parentp->firstc);
/* TODO: initialize also the date/time members. */
}
b->dirty = true; /* need to sync block */
block_put(b);
 
childp->idx->pfc = parentp->firstc;
childp->idx->pdi = i * dps + j;
futex_up(&childp->idx->lock);
 
futex_down(&childp->lock);
childp->lnkcnt = 1;
childp->dirty = true; /* need to sync node */
futex_up(&childp->lock);
 
/*
* Hash in the index structure into the position hash.
*/
fat_idx_hashin(childp->idx);
 
return EOK;
return false; /* not supported at the moment */
}
 
int fat_unlink(void *prnt, void *chld)
static int fat_unlink(void *prnt, void *chld)
{
fat_node_t *parentp = (fat_node_t *)prnt;
fat_node_t *childp = (fat_node_t *)chld;
fat_bs_t *bs;
fat_dentry_t *d;
uint16_t bps;
block_t *b;
 
futex_down(&parentp->lock);
futex_down(&childp->lock);
assert(childp->lnkcnt == 1);
futex_down(&childp->idx->lock);
bs = block_bb_get(childp->idx->dev_handle);
bps = uint16_t_le2host(bs->bps);
 
b = _fat_block_get(bs, childp->idx->dev_handle, childp->idx->pfc,
(childp->idx->pdi * sizeof(fat_dentry_t)) / bps,
BLOCK_FLAGS_NONE);
d = (fat_dentry_t *)b->data +
(childp->idx->pdi % (bps / sizeof(fat_dentry_t)));
/* mark the dentry as not-currently-used */
d->name[0] = FAT_DENTRY_ERASED;
b->dirty = true; /* need to sync block */
block_put(b);
 
/* remove the index structure from the position hash */
fat_idx_hashout(childp->idx);
/* clear position information */
childp->idx->pfc = FAT_CLST_RES0;
childp->idx->pdi = 0;
futex_up(&childp->idx->lock);
childp->lnkcnt = 0;
childp->dirty = true;
futex_up(&childp->lock);
futex_up(&parentp->lock);
 
return EOK;
return ENOTSUP; /* not supported at the moment */
}
 
void *fat_match(void *prnt, const char *component)
static void *fat_match(void *prnt, const char *component)
{
fat_bs_t *bs;
fat_node_t *parentp = (fat_node_t *)prnt;
char name[FAT_NAME_LEN + 1 + FAT_EXT_LEN + 1];
unsigned i, j;
580,17 → 489,20
block_t *b;
 
futex_down(&parentp->idx->lock);
bs = block_bb_get(parentp->idx->dev_handle);
bps = uint16_t_le2host(bs->bps);
bps = fat_bps_get(parentp->idx->dev_handle);
dps = bps / sizeof(fat_dentry_t);
blocks = parentp->size / bps;
blocks = parentp->size / bps + (parentp->size % bps != 0);
for (i = 0; i < blocks; i++) {
b = fat_block_get(bs, parentp, i, BLOCK_FLAGS_NONE);
for (j = 0; j < dps; j++) {
unsigned dentries;
b = fat_block_get(parentp, i);
dentries = (i == blocks - 1) ?
parentp->size % sizeof(fat_dentry_t) :
dps;
for (j = 0; j < dentries; j++) {
d = ((fat_dentry_t *)b->data) + j;
switch (fat_classify_dentry(d)) {
case FAT_DENTRY_SKIP:
case FAT_DENTRY_FREE:
continue;
case FAT_DENTRY_LAST:
block_put(b);
598,10 → 510,10
return NULL;
default:
case FAT_DENTRY_VALID:
fat_dentry_name_get(d, name);
dentry_name_canonify(d, name);
break;
}
if (fat_dentry_namecmp(name, component) == 0) {
if (stricmp(name, component) == 0) {
/* hit */
void *node;
/*
630,12 → 542,11
}
block_put(b);
}
 
futex_up(&parentp->idx->lock);
return NULL;
}
 
fs_index_t fat_index_get(void *node)
static fs_index_t fat_index_get(void *node)
{
fat_node_t *fnodep = (fat_node_t *)node;
if (!fnodep)
643,19 → 554,18
return fnodep->idx->index;
}
 
size_t fat_size_get(void *node)
static size_t fat_size_get(void *node)
{
return ((fat_node_t *)node)->size;
}
 
unsigned fat_lnkcnt_get(void *node)
static unsigned fat_lnkcnt_get(void *node)
{
return ((fat_node_t *)node)->lnkcnt;
}
 
bool fat_has_children(void *node)
static bool fat_has_children(void *node)
{
fat_bs_t *bs;
fat_node_t *nodep = (fat_node_t *)node;
unsigned bps;
unsigned dps;
665,23 → 575,25
 
if (nodep->type != FAT_DIRECTORY)
return false;
 
futex_down(&nodep->idx->lock);
bs = block_bb_get(nodep->idx->dev_handle);
bps = uint16_t_le2host(bs->bps);
bps = fat_bps_get(nodep->idx->dev_handle);
dps = bps / sizeof(fat_dentry_t);
 
blocks = nodep->size / bps;
blocks = nodep->size / bps + (nodep->size % bps != 0);
 
for (i = 0; i < blocks; i++) {
unsigned dentries;
fat_dentry_t *d;
b = fat_block_get(bs, nodep, i, BLOCK_FLAGS_NONE);
for (j = 0; j < dps; j++) {
b = fat_block_get(nodep, i);
dentries = (i == blocks - 1) ?
nodep->size % sizeof(fat_dentry_t) :
dps;
for (j = 0; j < dentries; j++) {
d = ((fat_dentry_t *)b->data) + j;
switch (fat_classify_dentry(d)) {
case FAT_DENTRY_SKIP:
case FAT_DENTRY_FREE:
continue;
case FAT_DENTRY_LAST:
block_put(b);
704,22 → 616,22
return false;
}
 
void *fat_root_get(dev_handle_t dev_handle)
static void *fat_root_get(dev_handle_t dev_handle)
{
return fat_node_get(dev_handle, 0);
}
 
char fat_plb_get_char(unsigned pos)
static char fat_plb_get_char(unsigned pos)
{
return fat_reg.plb_ro[pos % PLB_SIZE];
}
 
bool fat_is_directory(void *node)
static bool fat_is_directory(void *node)
{
return ((fat_node_t *)node)->type == FAT_DIRECTORY;
}
 
bool fat_is_file(void *node)
static bool fat_is_file(void *node)
{
return ((fat_node_t *)node)->type == FAT_FILE;
}
729,8 → 641,8
.match = fat_match,
.node_get = fat_node_get,
.node_put = fat_node_put,
.create = fat_create_node,
.destroy = fat_destroy_node,
.create = fat_create,
.destroy = fat_destroy,
.link = fat_link,
.unlink = fat_unlink,
.index_get = fat_index_get,
743,57 → 655,60
.is_file = fat_is_file
};
 
/*
* VFS operations.
*/
 
void fat_mounted(ipc_callid_t rid, ipc_call_t *request)
{
dev_handle_t dev_handle = (dev_handle_t) IPC_GET_ARG1(*request);
fat_bs_t *bs;
block_t *bb;
uint16_t bps;
uint16_t rde;
int rc;
 
/* initialize libblock */
rc = block_init(dev_handle, BS_SIZE);
if (rc != EOK) {
ipc_answer_0(rid, rc);
/*
* For now, we don't bother to remember dev_handle, dev_phone or
* dev_buffer in some data structure. We use global variables because we
* know there will be at most one mount on this file system.
* Of course, this is a huge TODO item.
*/
dev_buffer = mmap(NULL, BS_SIZE, PROTO_READ | PROTO_WRITE,
MAP_ANONYMOUS | MAP_PRIVATE, 0, 0);
if (!dev_buffer) {
ipc_answer_0(rid, ENOMEM);
return;
}
 
/* prepare the boot block */
rc = block_bb_read(dev_handle, BS_BLOCK * BS_SIZE, BS_SIZE);
dev_phone = ipc_connect_me_to(PHONE_NS, SERVICE_DEVMAP,
DEVMAP_CONNECT_TO_DEVICE, dev_handle);
 
if (dev_phone < 0) {
munmap(dev_buffer, BS_SIZE);
ipc_answer_0(rid, dev_phone);
return;
}
 
rc = ipc_share_out_start(dev_phone, dev_buffer,
AS_AREA_READ | AS_AREA_WRITE);
if (rc != EOK) {
block_fini(dev_handle);
munmap(dev_buffer, BS_SIZE);
ipc_answer_0(rid, rc);
return;
}
 
/* get the buffer with the boot sector */
bs = block_bb_get(dev_handle);
/* Read the number of root directory entries. */
bps = uint16_t_le2host(bs->bps);
rde = uint16_t_le2host(bs->root_ent_max);
bb = block_get(dev_handle, BS_BLOCK, BS_SIZE);
bps = uint16_t_le2host(FAT_BS(bb)->bps);
rde = uint16_t_le2host(FAT_BS(bb)->root_ent_max);
block_put(bb);
 
if (bps != BS_SIZE) {
block_fini(dev_handle);
munmap(dev_buffer, BS_SIZE);
ipc_answer_0(rid, ENOTSUP);
return;
}
 
/* Initialize the block cache */
rc = block_cache_init(dev_handle, bps, 0 /* XXX */);
if (rc != EOK) {
block_fini(dev_handle);
ipc_answer_0(rid, rc);
return;
}
 
rc = fat_idx_init_by_dev_handle(dev_handle);
if (rc != EOK) {
block_fini(dev_handle);
munmap(dev_buffer, BS_SIZE);
ipc_answer_0(rid, rc);
return;
}
801,7 → 716,7
/* Initialize the root node. */
fat_node_t *rootp = (fat_node_t *)malloc(sizeof(fat_node_t));
if (!rootp) {
block_fini(dev_handle);
munmap(dev_buffer, BS_SIZE);
fat_idx_fini_by_dev_handle(dev_handle);
ipc_answer_0(rid, ENOMEM);
return;
810,7 → 725,7
 
fat_idx_t *ridxp = fat_idx_get_by_pos(dev_handle, FAT_CLST_ROOTPAR, 0);
if (!ridxp) {
block_fini(dev_handle);
munmap(dev_buffer, BS_SIZE);
free(rootp);
fat_idx_fini_by_dev_handle(dev_handle);
ipc_answer_0(rid, ENOMEM);
848,8 → 763,7
fs_index_t index = (fs_index_t)IPC_GET_ARG2(*request);
off_t pos = (off_t)IPC_GET_ARG3(*request);
fat_node_t *nodep = (fat_node_t *)fat_node_get(dev_handle, index);
fat_bs_t *bs;
uint16_t bps;
uint16_t bps = fat_bps_get(dev_handle);
size_t bytes;
block_t *b;
 
867,9 → 781,6
return;
}
 
bs = block_bb_get(dev_handle);
bps = uint16_t_le2host(bs->bps);
 
if (nodep->type == FAT_FILE) {
/*
* Our strategy for regular file reads is to read one block at
876,19 → 787,11
* most and make use of the possibility to return less data than
* requested. This keeps the code very simple.
*/
if (pos >= nodep->size) {
/* reading beyond the EOF */
bytes = 0;
(void) ipc_data_read_finalize(callid, NULL, 0);
} else {
bytes = min(len, bps - pos % bps);
bytes = min(bytes, nodep->size - pos);
b = fat_block_get(bs, nodep, pos / bps,
BLOCK_FLAGS_NONE);
(void) ipc_data_read_finalize(callid, b->data + pos % bps,
bytes);
block_put(b);
}
bytes = min(len, bps - pos % bps);
b = fat_block_get(nodep, pos / bps);
(void) ipc_data_read_finalize(callid, b->data + pos % bps,
bytes);
block_put(b);
} else {
unsigned bnum;
off_t spos = pos;
909,7 → 812,7
while (bnum < nodep->size / bps) {
off_t o;
 
b = fat_block_get(bs, nodep, bnum, BLOCK_FLAGS_NONE);
b = fat_block_get(nodep, bnum);
for (o = pos % (bps / sizeof(fat_dentry_t));
o < bps / sizeof(fat_dentry_t);
o++, pos++) {
916,7 → 819,6
d = ((fat_dentry_t *)b->data) + o;
switch (fat_classify_dentry(d)) {
case FAT_DENTRY_SKIP:
case FAT_DENTRY_FREE:
continue;
case FAT_DENTRY_LAST:
block_put(b);
923,7 → 825,7
goto miss;
default:
case FAT_DENTRY_VALID:
fat_dentry_name_get(d, name);
dentry_name_canonify(d, name);
block_put(b);
goto hit;
}
945,186 → 847,6
ipc_answer_1(rid, EOK, (ipcarg_t)bytes);
}
 
void fat_write(ipc_callid_t rid, ipc_call_t *request)
{
dev_handle_t dev_handle = (dev_handle_t)IPC_GET_ARG1(*request);
fs_index_t index = (fs_index_t)IPC_GET_ARG2(*request);
off_t pos = (off_t)IPC_GET_ARG3(*request);
fat_node_t *nodep = (fat_node_t *)fat_node_get(dev_handle, index);
fat_bs_t *bs;
size_t bytes;
block_t *b;
uint16_t bps;
unsigned spc;
unsigned bpc; /* bytes per cluster */
off_t boundary;
int flags = BLOCK_FLAGS_NONE;
if (!nodep) {
ipc_answer_0(rid, ENOENT);
return;
}
ipc_callid_t callid;
size_t len;
if (!ipc_data_write_receive(&callid, &len)) {
fat_node_put(nodep);
ipc_answer_0(callid, EINVAL);
ipc_answer_0(rid, EINVAL);
return;
}
 
bs = block_bb_get(dev_handle);
bps = uint16_t_le2host(bs->bps);
spc = bs->spc;
bpc = bps * spc;
 
/*
* In all scenarios, we will attempt to write out only one block worth
* of data at maximum. There might be some more efficient approaches,
* but this one greatly simplifies fat_write(). Note that we can afford
* to do this because the client must be ready to handle the return
* value signalizing a smaller number of bytes written.
*/
bytes = min(len, bps - pos % bps);
if (bytes == bps)
flags |= BLOCK_FLAGS_NOREAD;
boundary = ROUND_UP(nodep->size, bpc);
if (pos < boundary) {
/*
* This is the easier case - we are either overwriting already
* existing contents or writing behind the EOF, but still within
* the limits of the last cluster. The node size may grow to the
* next block size boundary.
*/
fat_fill_gap(bs, nodep, FAT_CLST_RES0, pos);
b = fat_block_get(bs, nodep, pos / bps, flags);
(void) ipc_data_write_finalize(callid, b->data + pos % bps,
bytes);
b->dirty = true; /* need to sync block */
block_put(b);
if (pos + bytes > nodep->size) {
nodep->size = pos + bytes;
nodep->dirty = true; /* need to sync node */
}
ipc_answer_2(rid, EOK, bytes, nodep->size);
fat_node_put(nodep);
return;
} else {
/*
* This is the more difficult case. We must allocate new
* clusters for the node and zero them out.
*/
int status;
unsigned nclsts;
fat_cluster_t mcl, lcl;
nclsts = (ROUND_UP(pos + bytes, bpc) - boundary) / bpc;
/* create an independent chain of nclsts clusters in all FATs */
status = fat_alloc_clusters(bs, dev_handle, nclsts, &mcl, &lcl);
if (status != EOK) {
/* could not allocate a chain of nclsts clusters */
fat_node_put(nodep);
ipc_answer_0(callid, status);
ipc_answer_0(rid, status);
return;
}
/* zero fill any gaps */
fat_fill_gap(bs, nodep, mcl, pos);
b = _fat_block_get(bs, dev_handle, lcl, (pos / bps) % spc,
flags);
(void) ipc_data_write_finalize(callid, b->data + pos % bps,
bytes);
b->dirty = true; /* need to sync block */
block_put(b);
/*
* Append the cluster chain starting in mcl to the end of the
* node's cluster chain.
*/
fat_append_clusters(bs, nodep, mcl);
nodep->size = pos + bytes;
nodep->dirty = true; /* need to sync node */
ipc_answer_2(rid, EOK, bytes, nodep->size);
fat_node_put(nodep);
return;
}
}
 
void fat_truncate(ipc_callid_t rid, ipc_call_t *request)
{
dev_handle_t dev_handle = (dev_handle_t)IPC_GET_ARG1(*request);
fs_index_t index = (fs_index_t)IPC_GET_ARG2(*request);
size_t size = (off_t)IPC_GET_ARG3(*request);
fat_node_t *nodep = (fat_node_t *)fat_node_get(dev_handle, index);
fat_bs_t *bs;
uint16_t bps;
uint8_t spc;
unsigned bpc; /* bytes per cluster */
int rc;
 
if (!nodep) {
ipc_answer_0(rid, ENOENT);
return;
}
 
bs = block_bb_get(dev_handle);
bps = uint16_t_le2host(bs->bps);
spc = bs->spc;
bpc = bps * spc;
 
if (nodep->size == size) {
rc = EOK;
} else if (nodep->size < size) {
/*
* The standard says we have the freedom to grow the node.
* For now, we simply return an error.
*/
rc = EINVAL;
} else if (ROUND_UP(nodep->size, bpc) == ROUND_UP(size, bpc)) {
/*
* The node will be shrunk, but no clusters will be deallocated.
*/
nodep->size = size;
nodep->dirty = true; /* need to sync node */
rc = EOK;
} else {
/*
* The node will be shrunk, clusters will be deallocated.
*/
if (size == 0) {
fat_chop_clusters(bs, nodep, FAT_CLST_RES0);
} else {
fat_cluster_t lastc;
(void) fat_cluster_walk(bs, dev_handle, nodep->firstc,
&lastc, (size - 1) / bpc);
fat_chop_clusters(bs, nodep, lastc);
}
nodep->size = size;
nodep->dirty = true; /* need to sync node */
rc = EOK;
}
fat_node_put(nodep);
ipc_answer_0(rid, rc);
return;
}
 
void fat_destroy(ipc_callid_t rid, ipc_call_t *request)
{
dev_handle_t dev_handle = (dev_handle_t)IPC_GET_ARG1(*request);
fs_index_t index = (fs_index_t)IPC_GET_ARG2(*request);
int rc;
 
fat_node_t *nodep = fat_node_get(dev_handle, index);
if (!nodep) {
ipc_answer_0(rid, ENOENT);
return;
}
 
rc = fat_destroy_node(nodep);
ipc_answer_0(rid, rc);
}
 
/**
* @}
*/
/branches/network/uspace/srv/fs/fat/fat.h
33,7 → 33,6
#ifndef FAT_FAT_H_
#define FAT_FAT_H_
 
#include "fat_fat.h"
#include <ipc/ipc.h>
#include <libfs.h>
#include <atomic.h>
45,12 → 44,7
#define dprintf(...) printf(__VA_ARGS__)
#endif
 
#define min(a, b) ((a) < (b) ? (a) : (b))
 
#define BS_BLOCK 0
#define BS_SIZE 512
 
typedef struct fat_bs {
typedef struct {
uint8_t ji[3]; /**< Jump instruction. */
uint8_t oem_name[8];
/* BIOS Parameter Block */
121,6 → 115,34
};
} __attribute__ ((packed)) fat_bs_t;
 
#define FAT_ATTR_RDONLY (1 << 0)
#define FAT_ATTR_VOLLABEL (1 << 3)
#define FAT_ATTR_SUBDIR (1 << 4)
 
typedef struct {
uint8_t name[8];
uint8_t ext[3];
uint8_t attr;
uint8_t reserved;
uint8_t ctime_fine;
uint16_t ctime;
uint16_t cdate;
uint16_t adate;
union {
uint16_t eaidx; /* FAT12/FAT16 */
uint16_t firstc_hi; /* FAT32 */
};
uint16_t mtime;
uint16_t mdate;
union {
uint16_t firstc; /* FAT12/FAT16 */
uint16_t firstc_lo; /* FAT32 */
};
uint32_t size;
} __attribute__ ((packed)) fat_dentry_t;
 
typedef uint16_t fat_cluster_t;
 
typedef enum {
FAT_INVALID,
FAT_DIRECTORY,
201,16 → 223,9
extern void fat_mount(ipc_callid_t, ipc_call_t *);
extern void fat_lookup(ipc_callid_t, ipc_call_t *);
extern void fat_read(ipc_callid_t, ipc_call_t *);
extern void fat_write(ipc_callid_t, ipc_call_t *);
extern void fat_truncate(ipc_callid_t, ipc_call_t *);
extern void fat_destroy(ipc_callid_t, ipc_call_t *);
 
extern fat_idx_t *fat_idx_get_new(dev_handle_t);
extern fat_idx_t *fat_idx_get_by_pos(dev_handle_t, fat_cluster_t, unsigned);
extern fat_idx_t *fat_idx_get_by_index(dev_handle_t, fs_index_t);
extern void fat_idx_destroy(fat_idx_t *);
extern void fat_idx_hashin(fat_idx_t *);
extern void fat_idx_hashout(fat_idx_t *);
 
extern int fat_idx_init(void);
extern void fat_idx_fini(void);
/branches/network/uspace/srv/fs/fat/fat.c
49,6 → 49,15
 
vfs_info_t fat_vfs_info = {
.name = "fat",
.ops = {
[IPC_METHOD_TO_VFS_OP(VFS_LOOKUP)] = VFS_OP_DEFINED,
[IPC_METHOD_TO_VFS_OP(VFS_READ)] = VFS_OP_DEFINED,
[IPC_METHOD_TO_VFS_OP(VFS_WRITE)] = VFS_OP_NULL,
[IPC_METHOD_TO_VFS_OP(VFS_TRUNCATE)] = VFS_OP_NULL,
[IPC_METHOD_TO_VFS_OP(VFS_MOUNT)] = VFS_OP_NULL,
[IPC_METHOD_TO_VFS_OP(VFS_MOUNTED)] = VFS_OP_DEFINED,
[IPC_METHOD_TO_VFS_OP(VFS_UNMOUNT)] = VFS_OP_NULL,
}
};
 
fs_reg_t fat_reg;
101,15 → 110,6
case VFS_READ:
fat_read(callid, &call);
break;
case VFS_WRITE:
fat_write(callid, &call);
break;
case VFS_TRUNCATE:
fat_truncate(callid, &call);
break;
case VFS_DESTROY:
fat_destroy(callid, &call);
break;
default:
ipc_answer_0(callid, ENOTSUP);
break;
122,16 → 122,16
int vfs_phone;
int rc;
 
printf("fat: HelenOS FAT file system server.\n");
printf("FAT: HelenOS FAT file system server.\n");
 
rc = fat_idx_init();
if (rc != EOK)
goto err;
 
vfs_phone = ipc_connect_me_to_blocking(PHONE_NS, SERVICE_VFS, 0, 0);
if (vfs_phone < EOK) {
printf("fat: failed to connect to VFS\n");
return -1;
vfs_phone = ipc_connect_me_to(PHONE_NS, SERVICE_VFS, 0, 0);
while (vfs_phone < EOK) {
usleep(10000);
vfs_phone = ipc_connect_me_to(PHONE_NS, SERVICE_VFS, 0, 0);
}
rc = fs_register(vfs_phone, &fat_reg, &fat_vfs_info, fat_connection);
/branches/network/uspace/srv/fs/fat/Makefile
31,17 → 31,12
 
LIBC_PREFIX = ../../../lib/libc
LIBFS_PREFIX = ../../../lib/libfs
LIBBLOCK_PREFIX = ../../../lib/libblock
SOFTINT_PREFIX = ../../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
CFLAGS += -I $(LIBFS_PREFIX) -I $(LIBBLOCK_PREFIX)
CFLAGS += -I $(LIBFS_PREFIX)
 
LIBS = \
$(LIBFS_PREFIX)/libfs.a \
$(LIBBLOCK_PREFIX)/libblock.a \
$(LIBC_PREFIX)/libc.a
LIBS = $(LIBC_PREFIX)/libc.a $(LIBFS_PREFIX)/libfs.a
 
## Sources
#
50,9 → 45,7
SOURCES = \
fat.c \
fat_ops.c \
fat_idx.c \
fat_dentry.c \
fat_fat.c
fat_idx.c
 
OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
 
63,13 → 56,13
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend $(OBJECTS)
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm: $(OUTPUT).disasm
 
/branches/network/uspace/srv/fs/fat/fat_idx.c
214,7 → 214,7
};
 
/** Allocate a VFS index which is not currently in use. */
static bool fat_index_alloc(dev_handle_t dev_handle, fs_index_t *index)
static bool fat_idx_alloc(dev_handle_t dev_handle, fs_index_t *index)
{
unused_t *u;
276,7 → 276,7
}
 
/** Free a VFS index, which is no longer in use. */
static void fat_index_free(dev_handle_t dev_handle, fs_index_t index)
static void fat_idx_free(dev_handle_t dev_handle, fs_index_t index)
{
unused_t *u;
 
338,52 → 338,6
futex_up(&unused_futex);
}
 
static fat_idx_t *fat_idx_create(dev_handle_t dev_handle)
{
fat_idx_t *fidx;
 
fidx = (fat_idx_t *) malloc(sizeof(fat_idx_t));
if (!fidx)
return NULL;
if (!fat_index_alloc(dev_handle, &fidx->index)) {
free(fidx);
return NULL;
}
link_initialize(&fidx->uph_link);
link_initialize(&fidx->uih_link);
futex_initialize(&fidx->lock, 1);
fidx->dev_handle = dev_handle;
fidx->pfc = FAT_CLST_RES0; /* no parent yet */
fidx->pdi = 0;
fidx->nodep = NULL;
 
return fidx;
}
 
fat_idx_t *fat_idx_get_new(dev_handle_t dev_handle)
{
fat_idx_t *fidx;
 
futex_down(&used_futex);
fidx = fat_idx_create(dev_handle);
if (!fidx) {
futex_up(&used_futex);
return NULL;
}
unsigned long ikey[] = {
[UIH_DH_KEY] = dev_handle,
[UIH_INDEX_KEY] = fidx->index,
};
hash_table_insert(&ui_hash, ikey, &fidx->uih_link);
futex_down(&fidx->lock);
futex_up(&used_futex);
 
return fidx;
}
 
fat_idx_t *
fat_idx_get_by_pos(dev_handle_t dev_handle, fat_cluster_t pfc, unsigned pdi)
{
400,11 → 354,16
if (l) {
fidx = hash_table_get_instance(l, fat_idx_t, uph_link);
} else {
fidx = fat_idx_create(dev_handle);
fidx = (fat_idx_t *) malloc(sizeof(fat_idx_t));
if (!fidx) {
futex_up(&used_futex);
return NULL;
}
if (!fat_idx_alloc(dev_handle, &fidx->index)) {
free(fidx);
futex_up(&used_futex);
return NULL;
}
unsigned long ikey[] = {
[UIH_DH_KEY] = dev_handle,
411,8 → 370,13
[UIH_INDEX_KEY] = fidx->index,
};
link_initialize(&fidx->uph_link);
link_initialize(&fidx->uih_link);
futex_initialize(&fidx->lock, 1);
fidx->dev_handle = dev_handle;
fidx->pfc = pfc;
fidx->pdi = pdi;
fidx->nodep = NULL;
 
hash_table_insert(&up_hash, pkey, &fidx->uph_link);
hash_table_insert(&ui_hash, ikey, &fidx->uih_link);
423,32 → 387,6
return fidx;
}
 
void fat_idx_hashin(fat_idx_t *idx)
{
unsigned long pkey[] = {
[UPH_DH_KEY] = idx->dev_handle,
[UPH_PFC_KEY] = idx->pfc,
[UPH_PDI_KEY] = idx->pdi,
};
 
futex_down(&used_futex);
hash_table_insert(&up_hash, pkey, &idx->uph_link);
futex_up(&used_futex);
}
 
void fat_idx_hashout(fat_idx_t *idx)
{
unsigned long pkey[] = {
[UPH_DH_KEY] = idx->dev_handle,
[UPH_PFC_KEY] = idx->pfc,
[UPH_PDI_KEY] = idx->pdi,
};
 
futex_down(&used_futex);
hash_table_remove(&up_hash, pkey, 3);
futex_up(&used_futex);
}
 
fat_idx_t *
fat_idx_get_by_index(dev_handle_t dev_handle, fs_index_t index)
{
470,33 → 408,6
return fidx;
}
 
/** Destroy the index structure.
*
* @param idx The index structure to be destroyed.
*/
void fat_idx_destroy(fat_idx_t *idx)
{
unsigned long ikey[] = {
[UIH_DH_KEY] = idx->dev_handle,
[UIH_INDEX_KEY] = idx->index,
};
 
assert(idx->pfc == FAT_CLST_RES0);
 
futex_down(&used_futex);
/*
* Since we can only free unlinked nodes, the index structure is not
* present in the position hash (uph). We therefore hash it out from
* the index hash only.
*/
hash_table_remove(&ui_hash, ikey, 2);
futex_up(&used_futex);
/* Release the VFS index. */
fat_index_free(idx->dev_handle, idx->index);
/* Deallocate the structure. */
free(idx);
}
 
int fat_idx_init(void)
{
if (!hash_table_create(&up_hash, UPH_BUCKETS, 3, &uph_ops))
/branches/network/uspace/srv/vfs/vfs_ops.c
28,11 → 28,11
 
/** @addtogroup fs
* @{
*/
*/
 
/**
* @file vfs_ops.c
* @brief Operations that VFS offers to its clients.
* @file vfs_ops.c
* @brief Operations that VFS offers to its clients.
*/
 
#include "vfs.h"
55,18 → 55,6
/* Forward declarations of static functions. */
static int vfs_truncate_internal(fs_handle_t, dev_handle_t, fs_index_t, size_t);
 
/** Pending mount structure. */
typedef struct {
link_t link;
char *fs_name; /**< File system name */
char *mp; /**< Mount point */
ipc_callid_t callid; /**< Call ID waiting for the mount */
ipc_callid_t rid; /**< Request ID */
dev_handle_t dev_handle; /**< Device handle */
} pending_req_t;
 
LIST_INITIALIZE(pending_req);
 
/**
* This rwlock prevents the race between a triplet-to-VFS-node resolution and a
* concurrent VFS operation which modifies the file system namespace.
79,43 → 67,135
.dev_handle = 0
};
 
static void vfs_mount_internal(ipc_callid_t rid, dev_handle_t dev_handle,
fs_handle_t fs_handle, char *mp)
void vfs_mount(ipc_callid_t rid, ipc_call_t *request)
{
/* Resolve the path to the mountpoint. */
vfs_lookup_res_t mp_res;
dev_handle_t dev_handle;
vfs_node_t *mp_node = NULL;
ipc_callid_t callid;
ipc_call_t data;
int rc;
int phone;
size_t size;
 
/*
* We expect the library to do the device-name to device-handle
* translation for us, thus the device handle will arrive as ARG1
* in the request.
*/
dev_handle = (dev_handle_t)IPC_GET_ARG1(*request);
 
/*
* For now, don't make use of ARG2 and ARG3, but they can be used to
* carry mount options in the future.
*/
 
/*
* Now, we expect the client to send us data with the name of the file
* system.
*/
if (!ipc_data_write_receive(&callid, &size)) {
ipc_answer_0(callid, EINVAL);
ipc_answer_0(rid, EINVAL);
return;
}
 
/*
* Don't receive more than is necessary for storing a full file system
* name.
*/
if (size < 1 || size > FS_NAME_MAXLEN) {
ipc_answer_0(callid, EINVAL);
ipc_answer_0(rid, EINVAL);
return;
}
 
/* Deliver the file system name. */
char fs_name[FS_NAME_MAXLEN + 1];
(void) ipc_data_write_finalize(callid, fs_name, size);
fs_name[size] = '\0';
/*
* Wait for IPC_M_PING so that we can return an error if we don't know
* fs_name.
*/
callid = async_get_call(&data);
if (IPC_GET_METHOD(data) != IPC_M_PING) {
ipc_answer_0(callid, ENOTSUP);
ipc_answer_0(rid, ENOTSUP);
return;
}
 
/*
* Check if we know a file system with the same name as is in fs_name.
* This will also give us its file system handle.
*/
fs_handle_t fs_handle = fs_name_to_handle(fs_name, true);
if (!fs_handle) {
ipc_answer_0(callid, ENOENT);
ipc_answer_0(rid, ENOENT);
return;
}
 
/* Acknowledge that we know fs_name. */
ipc_answer_0(callid, EOK);
 
/* Now, we want the client to send us the mount point. */
if (!ipc_data_write_receive(&callid, &size)) {
ipc_answer_0(callid, EINVAL);
ipc_answer_0(rid, EINVAL);
return;
}
 
/* Check whether size is reasonable wrt. the mount point. */
if (size < 1 || size > MAX_PATH_LEN) {
ipc_answer_0(callid, EINVAL);
ipc_answer_0(rid, EINVAL);
return;
}
/* Allocate buffer for the mount point data being received. */
uint8_t *buf;
buf = malloc(size + 1);
if (!buf) {
ipc_answer_0(callid, ENOMEM);
ipc_answer_0(rid, ENOMEM);
return;
}
 
/* Deliver the mount point. */
(void) ipc_data_write_finalize(callid, buf, size);
buf[size] = '\0';
 
/* Resolve the path to the mountpoint. */
vfs_lookup_res_t mp_res;
futex_down(&rootfs_futex);
if (rootfs.fs_handle) {
/* We already have the root FS. */
rwlock_write_lock(&namespace_rwlock);
if ((strlen(mp) == 1) && (mp[0] == '/')) {
if ((size == 1) && (buf[0] == '/')) {
/* Trying to mount root FS over root FS */
rwlock_write_unlock(&namespace_rwlock);
futex_up(&rootfs_futex);
free(buf);
ipc_answer_0(rid, EBUSY);
return;
}
rc = vfs_lookup_internal(mp, L_DIRECTORY, &mp_res, NULL);
rc = vfs_lookup_internal(buf, L_DIRECTORY, &mp_res, NULL);
if (rc != EOK) {
/* The lookup failed for some reason. */
rwlock_write_unlock(&namespace_rwlock);
futex_up(&rootfs_futex);
free(buf);
ipc_answer_0(rid, rc);
return;
}
mp_node = vfs_node_get(&mp_res);
if (!mp_node) {
rwlock_write_unlock(&namespace_rwlock);
futex_up(&rootfs_futex);
free(buf);
ipc_answer_0(rid, ENOMEM);
return;
}
/*
* Now we hold a reference to mp_node.
* It will be dropped upon the corresponding VFS_UNMOUNT.
124,17 → 204,18
rwlock_write_unlock(&namespace_rwlock);
} else {
/* We still don't have the root file system mounted. */
if ((strlen(mp) == 1) && (mp[0] == '/')) {
if ((size == 1) && (buf[0] == '/')) {
vfs_lookup_res_t mr_res;
vfs_node_t *mr_node;
ipcarg_t rindex;
ipcarg_t rsize;
ipcarg_t rlnkcnt;
/*
* For this simple, but important case,
* we are almost done.
*/
free(buf);
/* Tell the mountee that it is being mounted. */
phone = vfs_grab_phone(fs_handle);
147,22 → 228,21
ipc_answer_0(rid, rc);
return;
}
 
mr_res.triplet.fs_handle = fs_handle;
mr_res.triplet.dev_handle = dev_handle;
mr_res.triplet.index = (fs_index_t) rindex;
mr_res.size = (size_t) rsize;
mr_res.lnkcnt = (unsigned) rlnkcnt;
mr_res.type = VFS_NODE_DIRECTORY;
 
rootfs.fs_handle = fs_handle;
rootfs.dev_handle = dev_handle;
futex_up(&rootfs_futex);
 
/* Add reference to the mounted root. */
mr_node = vfs_node_get(&mr_res);
assert(mr_node);
 
ipc_answer_0(rid, rc);
return;
} else {
171,6 → 251,7
* being mounted first.
*/
futex_up(&rootfs_futex);
free(buf);
ipc_answer_0(rid, ENOENT);
return;
}
177,11 → 258,13
}
futex_up(&rootfs_futex);
free(buf); /* The buffer is not needed anymore. */
/*
* At this point, we have all necessary pieces: file system and device
* handles, and we know the mount point VFS node.
*/
 
phone = vfs_grab_phone(mp_res.triplet.fs_handle);
rc = async_req_4_0(phone, VFS_MOUNT,
(ipcarg_t) mp_res.triplet.dev_handle,
189,7 → 272,7
(ipcarg_t) fs_handle,
(ipcarg_t) dev_handle);
vfs_release_phone(phone);
 
if (rc != EOK) {
/* Mount failed, drop reference to mp_node. */
if (mp_node)
199,170 → 282,6
ipc_answer_0(rid, rc);
}
 
/** Process pending mount requests */
void vfs_process_pending_mount()
{
link_t *cur;
loop:
for (cur = pending_req.next; cur != &pending_req; cur = cur->next) {
pending_req_t *pr = list_get_instance(cur, pending_req_t, link);
fs_handle_t fs_handle = fs_name_to_handle(pr->fs_name, true);
if (!fs_handle)
continue;
/* Acknowledge that we know fs_name. */
ipc_answer_0(pr->callid, EOK);
/* Do the mount */
vfs_mount_internal(pr->rid, pr->dev_handle, fs_handle, pr->mp);
free(pr->fs_name);
free(pr->mp);
list_remove(cur);
free(pr);
goto loop;
}
}
 
void vfs_mount(ipc_callid_t rid, ipc_call_t *request)
{
/*
* We expect the library to do the device-name to device-handle
* translation for us, thus the device handle will arrive as ARG1
* in the request.
*/
dev_handle_t dev_handle = (dev_handle_t) IPC_GET_ARG1(*request);
/*
* Mount flags are passed as ARG2.
*/
unsigned int flags = (unsigned int) IPC_GET_ARG2(*request);
/*
* For now, don't make use of ARG3, but it can be used to
* carry mount options in the future.
*/
/* We want the client to send us the mount point. */
ipc_callid_t callid;
size_t size;
if (!ipc_data_write_receive(&callid, &size)) {
ipc_answer_0(callid, EINVAL);
ipc_answer_0(rid, EINVAL);
return;
}
/* Check whether size is reasonable wrt. the mount point. */
if ((size < 1) || (size > MAX_PATH_LEN)) {
ipc_answer_0(callid, EINVAL);
ipc_answer_0(rid, EINVAL);
return;
}
/* Allocate buffer for the mount point data being received. */
char *mp = malloc(size + 1);
if (!mp) {
ipc_answer_0(callid, ENOMEM);
ipc_answer_0(rid, ENOMEM);
return;
}
/* Deliver the mount point. */
ipcarg_t retval = ipc_data_write_finalize(callid, mp, size);
if (retval != EOK) {
ipc_answer_0(rid, EREFUSED);
free(mp);
return;
}
mp[size] = '\0';
/*
* Now, we expect the client to send us data with the name of the file
* system.
*/
if (!ipc_data_write_receive(&callid, &size)) {
ipc_answer_0(callid, EINVAL);
ipc_answer_0(rid, EINVAL);
free(mp);
return;
}
/*
* Don't receive more than is necessary for storing a full file system
* name.
*/
if ((size < 1) || (size > FS_NAME_MAXLEN)) {
ipc_answer_0(callid, EINVAL);
ipc_answer_0(rid, EINVAL);
free(mp);
return;
}
/*
* Allocate buffer for file system name.
*/
char *fs_name = (char *) malloc(size + 1);
if (fs_name == NULL) {
ipc_answer_0(callid, ENOMEM);
ipc_answer_0(rid, EREFUSED);
free(mp);
return;
}
/* Deliver the file system name. */
retval = ipc_data_write_finalize(callid, fs_name, size);
if (retval != EOK) {
ipc_answer_0(rid, EREFUSED);
free(mp);
free(fs_name);
return;
}
fs_name[size] = '\0';
/*
* Check if we know a file system with the same name as is in fs_name.
* This will also give us its file system handle.
*/
fs_handle_t fs_handle = fs_name_to_handle(fs_name, true);
if (!fs_handle) {
if (flags & IPC_FLAG_BLOCKING) {
/* Blocking mount, add to pending list */
pending_req_t *pr = (pending_req_t *) malloc(sizeof(pending_req_t));
if (!pr) {
ipc_answer_0(callid, ENOMEM);
ipc_answer_0(rid, ENOMEM);
free(mp);
free(fs_name);
return;
}
pr->fs_name = fs_name;
pr->mp = mp;
pr->callid = callid;
pr->rid = rid;
pr->dev_handle = dev_handle;
list_append(&pr->link, &pending_req);
return;
}
ipc_answer_0(callid, ENOENT);
ipc_answer_0(rid, ENOENT);
free(mp);
free(fs_name);
return;
}
/* Acknowledge that we know fs_name. */
ipc_answer_0(callid, EOK);
/* Do the mount */
vfs_mount_internal(rid, dev_handle, fs_handle, mp);
free(mp);
free(fs_name);
}
 
void vfs_open(ipc_callid_t rid, ipc_call_t *request)
{
if (!vfs_files_init()) {
383,16 → 302,6
int mode = IPC_GET_ARG3(*request);
size_t len;
 
/*
* Make sure that we are called with exactly one of L_FILE and
* L_DIRECTORY.
*/
if ((lflag & (L_FILE | L_DIRECTORY)) == 0 ||
(lflag & (L_FILE | L_DIRECTORY)) == (L_FILE | L_DIRECTORY)) {
ipc_answer_0(rid, EINVAL);
return;
}
 
if (oflag & O_CREAT)
lflag |= L_CREATE;
if (oflag & O_EXCL)
547,7 → 456,7
* the same open file at a time.
*/
futex_down(&file->lock);
 
/*
* Lock the file's node so that no other client can read/write to it at
* the same time.
556,15 → 465,6
rwlock_read_lock(&file->node->contents_rwlock);
else
rwlock_write_lock(&file->node->contents_rwlock);
 
if (file->node->type == VFS_NODE_DIRECTORY) {
/*
* Make sure that no one is modifying the namespace
* while we are in readdir().
*/
assert(read);
rwlock_read_lock(&namespace_rwlock);
}
int fs_phone = vfs_grab_phone(file->node->fs_handle);
590,9 → 490,6
ipcarg_t rc;
async_wait_for(msg, &rc);
size_t bytes = IPC_GET_ARG1(answer);
 
if (file->node->type == VFS_NODE_DIRECTORY)
rwlock_read_unlock(&namespace_rwlock);
/* Unlock the VFS node. */
if (read)
/branches/network/uspace/srv/vfs/vfs.h
47,6 → 47,8
 
#define VFS_FIRST IPC_FIRST_USER_METHOD
 
#define IPC_METHOD_TO_VFS_OP(m) ((m) - VFS_FIRST)
 
/* Basic types. */
typedef int16_t fs_handle_t;
typedef int16_t dev_handle_t;
79,16 → 81,32
VFS_LAST_SRV, /* keep this the last member of this enum */
} vfs_request_srv_t;
 
 
/**
* An instance of this structure is associated with a particular FS operation.
* It tells VFS if the FS supports the operation or maybe if a default one
* should be used.
*/
typedef enum {
VFS_OP_NULL = 0,
VFS_OP_DEFAULT,
VFS_OP_DEFINED
} vfs_op_t;
 
#define FS_NAME_MAXLEN 20
 
/**
* A structure like this is passed to VFS by each individual FS upon its
* registration. It assosiates a human-readable identifier with each
* registered FS.
* registered FS. More importantly, through this structure, the FS announces
* what operations it supports.
*/
typedef struct {
/** Unique identifier of the fs. */
char name[FS_NAME_MAXLEN + 1];
/** Operations. */
vfs_op_t ops[VFS_LAST_CLNT - VFS_FIRST];
} vfs_info_t;
 
/**
172,15 → 190,8
*/
#define L_PARENT 64
 
typedef enum vfs_node_type {
VFS_NODE_UNKNOWN,
VFS_NODE_FILE,
VFS_NODE_DIRECTORY,
} vfs_node_type_t;
 
typedef struct {
vfs_triplet_t triplet;
vfs_node_type_t type;
size_t size;
unsigned lnkcnt;
} vfs_lookup_res_t;
202,9 → 213,6
unsigned lnkcnt;
 
link_t nh_link; /**< Node hash-table link. */
 
vfs_node_type_t type; /**< Partial info about the node type. */
 
size_t size; /**< Cached size if the node is a file. */
 
/**
282,7 → 290,6
extern void vfs_node_addref(vfs_node_t *);
extern void vfs_node_delref(vfs_node_t *);
 
extern void vfs_process_pending_mount(void);
extern void vfs_register(ipc_callid_t, ipc_call_t *);
extern void vfs_mount(ipc_callid_t, ipc_call_t *);
extern void vfs_open(ipc_callid_t, ipc_call_t *);
/branches/network/uspace/srv/vfs/Makefile
32,7 → 32,6
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
LIBS = $(LIBC_PREFIX)/libc.a
58,13 → 57,13
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend $(OBJECTS)
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm: $(OUTPUT).disasm
 
/branches/network/uspace/srv/vfs/vfs_lookup.c
182,12 → 182,6
result->triplet.index = (fs_index_t) IPC_GET_ARG3(answer);
result->size = (size_t) IPC_GET_ARG4(answer);
result->lnkcnt = (unsigned) IPC_GET_ARG5(answer);
if (lflag & L_FILE)
result->type = VFS_NODE_FILE;
else if (lflag & L_DIRECTORY)
result->type = VFS_NODE_DIRECTORY;
else
result->type = VFS_NODE_UNKNOWN;
}
 
return rc;
/branches/network/uspace/srv/vfs/vfs.c
28,11 → 28,11
 
/** @addtogroup fs
* @{
*/
*/
 
/**
* @file vfs.c
* @brief VFS service for HelenOS.
* @file vfs.c
* @brief VFS service for HelenOS.
*/
 
#include <ipc/ipc.h>
49,16 → 49,18
 
#define NAME "vfs"
 
#define dprintf(...) printf(__VA_ARGS__)
 
static void vfs_connection(ipc_callid_t iid, ipc_call_t *icall)
{
bool keep_on_going = true;
bool keep_on_going = 1;
 
/*
* The connection was opened via the IPC_CONNECT_ME_TO call.
* This call needs to be answered.
*/
ipc_answer_0(iid, EOK);
 
/*
* Here we enter the main connection fibril loop.
* The logic behind this loop and the protocol is that we'd like to keep
70,38 → 72,18
* connection later.
*/
while (keep_on_going) {
ipc_callid_t callid;
ipc_call_t call;
ipc_callid_t callid = async_get_call(&call);
fs_handle_t fs_handle;
int phone;
 
callid = async_get_call(&call);
 
switch (IPC_GET_METHOD(call)) {
case IPC_M_PHONE_HUNGUP:
keep_on_going = false;
break;
case IPC_M_CONNECT_ME_TO:
/*
* Connect the client file system to another one.
*/
/* FIXME:
* Prevent ordinary clients from connecting to file
* system servers directly. This should be solved by
* applying some security mechanisms.
*/
fs_handle = IPC_GET_ARG1(call);
phone = vfs_grab_phone(fs_handle);
(void) ipc_forward_fast(callid, phone, 0, 0, 0,
IPC_FF_NONE);
vfs_release_phone(phone);
break;
case VFS_REGISTER:
vfs_register(callid, &call);
/*
* Keep the connection open so that a file system can
* later ask us to connect it to another file system.
* This is necessary to support non-root mounts.
*/
keep_on_going = false;
break;
case VFS_MOUNT:
vfs_mount(callid, &call);
138,19 → 120,22
break;
}
}
 
/* TODO: cleanup after the client */
/* TODO: cleanup after the client */
}
 
int main(int argc, char **argv)
{
ipcarg_t phonead;
 
printf(NAME ": HelenOS VFS server\n");
 
/*
* Initialize the list of registered file systems.
*/
list_initialize(&fs_head);
 
/*
* Initialize VFS node hash table.
*/
158,7 → 143,7
printf(NAME ": Failed to initialize VFS node hash table\n");
return ENOMEM;
}
 
/*
* Allocate and initialize the Path Lookup Buffer.
*/
168,7 → 153,6
printf(NAME ": Cannot allocate a mappable piece of address space\n");
return ENOMEM;
}
if (as_area_create(plb, PLB_SIZE, AS_AREA_READ | AS_AREA_WRITE |
AS_AREA_CACHEABLE) != plb) {
printf(NAME ": Cannot create address space area\n");
180,13 → 164,12
* Set a connectio handling function/fibril.
*/
async_set_client_connection(vfs_connection);
 
/*
* Register at the naming service.
*/
ipcarg_t phonead;
ipc_connect_to_me(PHONE_NS, SERVICE_VFS, 0, 0, &phonead);
 
/*
* Start accepting connections.
*/
197,4 → 180,4
 
/**
* @}
*/
*/
/branches/network/uspace/srv/vfs/vfs_register.c
28,10 → 28,10
 
/** @addtogroup fs
* @{
*/
*/
 
/**
* @file vfs_register.c
* @file vfs_register.c
* @brief
*/
 
98,6 → 98,30
return false;
}
 
/*
* Check if the FS implements mandatory VFS operations.
*/
if (info->ops[IPC_METHOD_TO_VFS_OP(VFS_LOOKUP)] != VFS_OP_DEFINED) {
dprintf("Operation VFS_LOOKUP not defined by the client.\n");
return false;
}
if (info->ops[IPC_METHOD_TO_VFS_OP(VFS_READ)] != VFS_OP_DEFINED) {
dprintf("Operation VFS_READ not defined by the client.\n");
return false;
}
/*
* Check if each operation is either not defined, defined or default.
*/
for (i = VFS_FIRST; i < VFS_LAST_CLNT; i++) {
if ((info->ops[IPC_METHOD_TO_VFS_OP(i)] != VFS_OP_NULL) &&
(info->ops[IPC_METHOD_TO_VFS_OP(i)] != VFS_OP_DEFAULT) &&
(info->ops[IPC_METHOD_TO_VFS_OP(i)] != VFS_OP_DEFINED)) {
dprintf("Operation info not understood.\n");
return false;
}
}
return true;
}
 
278,11 → 302,6
dprintf("\"%.*s\" filesystem successfully registered, handle=%d.\n",
FS_NAME_MAXLEN, fs_info->vfs_info.name, fs_info->fs_handle);
/* Process pending mount requests possibly waiting
* for this filesystem implementation.
*/
vfs_process_pending_mount();
}
 
/** For a given file system handle, implement policy for allocating a phone.
/branches/network/uspace/srv/vfs/vfs_node.c
175,22 → 175,15
node->index = result->triplet.index;
node->size = result->size;
node->lnkcnt = result->lnkcnt;
node->type = result->type;
link_initialize(&node->nh_link);
rwlock_initialize(&node->contents_rwlock);
hash_table_insert(&nodes, key, &node->nh_link);
} else {
node = hash_table_get_instance(tmp, vfs_node_t, nh_link);
if (node->type == VFS_NODE_UNKNOWN &&
result->type != VFS_NODE_UNKNOWN) {
/* Upgrade the node type. */
node->type = result->type;
}
}
 
assert(node->size == result->size);
assert(node->lnkcnt == result->lnkcnt);
assert(node->type == result->type || result->type == VFS_NODE_UNKNOWN);
 
_vfs_node_addref(node);
futex_up(&nodes_futex);
/branches/network/uspace/srv/loader/elf_load.c
57,8 → 57,6
#include "elf_load.h"
#include "arch.h"
 
#define DPRINTF(...)
 
static char *error_codes[] = {
"no error",
"invalid image",
108,9 → 106,11
int fd;
int rc;
 
// printf("open and read '%s'...\n", file_name);
 
fd = open(file_name, O_RDONLY);
if (fd < 0) {
DPRINTF("failed opening file\n");
printf("failed opening file\n");
return -1;
}
 
171,18 → 171,19
 
rc = my_read(elf->fd, header, sizeof(elf_header_t));
if (rc < 0) {
DPRINTF("Read error.\n");
printf("read error\n");
return EE_INVALID;
}
 
elf->header = header;
 
// printf("ELF-load:");
/* Identify ELF */
if (header->e_ident[EI_MAG0] != ELFMAG0 ||
header->e_ident[EI_MAG1] != ELFMAG1 ||
header->e_ident[EI_MAG2] != ELFMAG2 ||
header->e_ident[EI_MAG3] != ELFMAG3) {
DPRINTF("Invalid header.\n");
printf("invalid header\n");
return EE_INVALID;
}
192,18 → 193,18
header->e_ident[EI_VERSION] != EV_CURRENT ||
header->e_version != EV_CURRENT ||
header->e_ident[EI_CLASS] != ELF_CLASS) {
DPRINTF("Incompatible data/version/class.\n");
printf("incompatible data/version/class\n");
return EE_INCOMPATIBLE;
}
 
if (header->e_phentsize != sizeof(elf_segment_header_t)) {
DPRINTF("e_phentsize:%d != %d\n", header->e_phentsize,
printf("e_phentsize:%d != %d\n", header->e_phentsize,
sizeof(elf_segment_header_t));
return EE_INCOMPATIBLE;
}
 
if (header->e_shentsize != sizeof(elf_section_header_t)) {
DPRINTF("e_shentsize:%d != %d\n", header->e_shentsize,
printf("e_shentsize:%d != %d\n", header->e_shentsize,
sizeof(elf_section_header_t));
return EE_INCOMPATIBLE;
}
210,19 → 211,23
 
/* Check if the object type is supported. */
if (header->e_type != ET_EXEC && header->e_type != ET_DYN) {
DPRINTF("Object type %d is not supported\n", header->e_type);
printf("Object type %d is not supported\n", header->e_type);
return EE_UNSUPPORTED;
}
 
/* Shared objects can be loaded with a bias */
// printf("Object type: %d\n", header->e_type);
if (header->e_type == ET_DYN)
elf->bias = so_bias;
else
elf->bias = 0;
 
// printf("Bias set to 0x%x\n", elf->bias);
elf->info->interp = NULL;
elf->info->dynamic = NULL;
 
// printf("parse segments\n");
 
/* Walk through all segment headers and process them. */
for (i = 0; i < header->e_phnum; i++) {
elf_segment_header_t segment_hdr;
234,7 → 239,7
rc = my_read(elf->fd, &segment_hdr,
sizeof(elf_segment_header_t));
if (rc < 0) {
DPRINTF("Read error.\n");
printf("read error\n");
return EE_INVALID;
}
 
243,7 → 248,7
return rc;
}
 
DPRINTF("Parse sections.\n");
// printf("parse sections\n");
 
/* Inspect all section headers and proccess them. */
for (i = 0; i < header->e_shnum; i++) {
256,7 → 261,7
rc = my_read(elf->fd, &section_hdr,
sizeof(elf_section_header_t));
if (rc < 0) {
DPRINTF("Read error.\n");
printf("read error\n");
return EE_INVALID;
}
 
268,7 → 273,7
elf->info->entry =
(entry_point_t)((uint8_t *)header->e_entry + elf->bias);
 
DPRINTF("Done.\n");
// printf("done\n");
 
return EE_OK;
}
311,7 → 316,7
case PT_LOPROC:
case PT_HIPROC:
default:
DPRINTF("Segment p_type %d unknown.\n", entry->p_type);
printf("segment p_type %d unknown\n", entry->p_type);
return EE_UNSUPPORTED;
break;
}
334,8 → 339,8
size_t mem_sz;
int rc;
 
DPRINTF("Load segment at addr 0x%x, size 0x%x\n", entry->p_vaddr,
entry->p_memsz);
// printf("load segment at addr 0x%x, size 0x%x\n", entry->p_vaddr,
// entry->p_memsz);
bias = elf->bias;
 
342,7 → 347,7
if (entry->p_align > 1) {
if ((entry->p_offset % entry->p_align) !=
(entry->p_vaddr % entry->p_align)) {
DPRINTF("Align check 1 failed offset%%align=%d, "
printf("align check 1 failed offset%%align=%d, "
"vaddr%%align=%d\n",
entry->p_offset % entry->p_align,
entry->p_vaddr % entry->p_align
364,8 → 369,8
base = ALIGN_DOWN(entry->p_vaddr, PAGE_SIZE);
mem_sz = entry->p_memsz + (entry->p_vaddr - base);
 
DPRINTF("Map to p_vaddr=0x%x-0x%x.\n", entry->p_vaddr + bias,
entry->p_vaddr + bias + ALIGN_UP(entry->p_memsz, PAGE_SIZE));
// printf("map to p_vaddr=0x%x-0x%x...\n", entry->p_vaddr + bias,
// entry->p_vaddr + bias + ALIGN_UP(entry->p_memsz, PAGE_SIZE));
 
/*
* For the course of loading, the area needs to be readable
374,16 → 379,17
a = as_area_create((uint8_t *)base + bias, mem_sz,
AS_AREA_READ | AS_AREA_WRITE | AS_AREA_CACHEABLE);
if (a == (void *)(-1)) {
DPRINTF("Memory mapping failed.\n");
printf("memory mapping failed\n");
return EE_MEMORY;
}
 
DPRINTF("as_area_create(0x%lx, 0x%x, %d) -> 0x%lx\n",
entry->p_vaddr+bias, entry->p_memsz, flags, (uintptr_t)a);
// printf("as_area_create(0x%lx, 0x%x, %d) -> 0x%lx\n",
// entry->p_vaddr+bias, entry->p_memsz, flags, (uintptr_t)a);
 
/*
* Load segment data
*/
// printf("seek to %d\n", entry->p_offset);
rc = lseek(elf->fd, entry->p_offset, SEEK_SET);
if (rc < 0) {
printf("seek error\n");
390,10 → 396,11
return EE_INVALID;
}
 
// printf("read 0x%x bytes to address 0x%x\n", entry->p_filesz, entry->p_vaddr+bias);
/* rc = read(fd, (void *)(entry->p_vaddr + bias), entry->p_filesz);
if (rc < 0) { printf("read error\n"); return EE_INVALID; }*/
 
/* Long reads are not possible yet. Load segment piecewise. */
/* Long reads are not possible yet. Load segment picewise */
 
unsigned left, now;
uint8_t *dp;
405,10 → 412,12
now = 16384;
if (now > left) now = left;
 
// printf("read %d...", now);
rc = my_read(elf->fd, dp, now);
// printf("->%d\n", rc);
 
if (rc < 0) {
DPRINTF("Read error.\n");
printf("read error\n");
return EE_INVALID;
}
 
416,9 → 425,10
dp += now;
}
 
// printf("set area flags to %d\n", flags);
rc = as_area_change_flags((uint8_t *)entry->p_vaddr + bias, flags);
if (rc != 0) {
DPRINTF("Failed to set memory area flags.\n");
printf("failed to set memory area flags\n");
return EE_MEMORY;
}
 
455,7 → 465,7
/* Record pointer to dynamic section into info structure */
elf->info->dynamic =
(void *)((uint8_t *)entry->sh_addr + elf->bias);
DPRINTF("Dynamic section found at 0x%x.\n",
printf("dynamic section found at 0x%x\n",
(uintptr_t)elf->info->dynamic);
break;
default:
/branches/network/uspace/srv/loader/main.c
27,12 → 27,12
*/
 
/** @addtogroup loader
* @brief Loads and runs programs from VFS.
* @brief Loads and runs programs from VFS.
* @{
*/
*/
/**
* @file
* @brief Loads and runs programs from VFS.
* @brief Loads and runs programs from VFS.
*
* The program loader is a special init binary. Its image is used
* to create a new task upon a @c task_spawn syscall. The syscall
46,11 → 46,9
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <bool.h>
#include <fcntl.h>
#include <sys/types.h>
#include <ipc/ipc.h>
#include <ipc/services.h>
#include <ipc/loader.h>
#include <loader/pcb.h>
#include <errno.h>
60,7 → 58,11
#include <elf.h>
#include <elf_load.h>
 
#define DPRINTF(...)
/**
* Bias used for loading the dynamic linker. This will be soon replaced
* by automatic placement.
*/
#define RTLD_BIAS 0x80000
 
/** Pathname of the file that will be loaded */
static char *pathname = NULL;
75,36 → 77,6
/** Buffer holding all arguments */
static char *arg_buf = NULL;
 
static elf_info_t prog_info;
static elf_info_t interp_info;
 
static bool is_dyn_linked;
 
/** Used to limit number of connections to one. */
static bool connected;
 
static void loader_get_taskid(ipc_callid_t rid, ipc_call_t *request)
{
ipc_callid_t callid;
task_id_t task_id;
size_t len;
task_id = task_get_id();
if (!ipc_data_read_receive(&callid, &len)) {
ipc_answer_0(callid, EINVAL);
ipc_answer_0(rid, EINVAL);
return;
}
if (len > sizeof(task_id))
len = sizeof(task_id);
ipc_data_read_finalize(callid, &task_id, len);
ipc_answer_0(rid, EOK);
}
 
 
/** Receive a call setting pathname of the program to execute.
*
* @param rid
115,13 → 87,13
ipc_callid_t callid;
size_t len;
char *name_buf;
 
if (!ipc_data_write_receive(&callid, &len)) {
ipc_answer_0(callid, EINVAL);
ipc_answer_0(rid, EINVAL);
return;
}
 
name_buf = malloc(len + 1);
if (!name_buf) {
ipc_answer_0(callid, ENOMEM);
128,15 → 100,15
ipc_answer_0(rid, ENOMEM);
return;
}
 
ipc_data_write_finalize(callid, name_buf, len);
ipc_answer_0(rid, EOK);
 
if (pathname != NULL) {
free(pathname);
pathname = NULL;
}
 
name_buf[len] = '\0';
pathname = name_buf;
}
152,23 → 124,23
size_t buf_len, arg_len;
char *p;
int n;
 
if (!ipc_data_write_receive(&callid, &buf_len)) {
ipc_answer_0(callid, EINVAL);
ipc_answer_0(rid, EINVAL);
return;
}
 
if (arg_buf != NULL) {
free(arg_buf);
arg_buf = NULL;
}
 
if (argv != NULL) {
free(argv);
argv = NULL;
}
 
arg_buf = malloc(buf_len + 1);
if (!arg_buf) {
ipc_answer_0(callid, ENOMEM);
175,12 → 147,12
ipc_answer_0(rid, ENOMEM);
return;
}
 
ipc_data_write_finalize(callid, arg_buf, buf_len);
ipc_answer_0(rid, EOK);
 
arg_buf[buf_len] = '\0';
 
/*
* Count number of arguments
*/
191,10 → 163,10
p = p + arg_len + 1;
++n;
}
 
/* Allocate argv */
argv = malloc((n + 1) * sizeof(char *));
 
if (argv == NULL) {
free(arg_buf);
ipc_answer_0(callid, ENOMEM);
201,7 → 173,7
ipc_answer_0(rid, ENOMEM);
return;
}
 
/*
* Fill argv with argument pointers
*/
209,91 → 181,78
n = 0;
while (p < arg_buf + buf_len) {
argv[n] = p;
 
arg_len = strlen(p);
p = p + arg_len + 1;
++n;
}
 
argc = n;
argv[n] = NULL;
}
 
/** Load the previously selected program.
 
/** Load and run the previously selected program.
*
* @param rid
* @param request
* @return 0 on success, !0 on error.
*/
static int loader_load(ipc_callid_t rid, ipc_call_t *request)
static int loader_run(ipc_callid_t rid, ipc_call_t *request)
{
int rc;
 
elf_info_t prog_info;
elf_info_t interp_info;
 
// printf("Load program '%s'\n", pathname);
 
rc = elf_load_file(pathname, 0, &prog_info);
if (rc < 0) {
DPRINTF("Failed to load executable '%s'.\n", pathname);
printf("failed to load program\n");
ipc_answer_0(rid, EINVAL);
return 1;
}
 
// printf("Create PCB\n");
elf_create_pcb(&prog_info, &pcb);
 
pcb.argc = argc;
pcb.argv = argv;
 
if (prog_info.interp == NULL) {
/* Statically linked program */
is_dyn_linked = false;
// printf("Run statically linked program\n");
// printf("entry point: 0x%llx\n", prog_info.entry);
ipc_answer_0(rid, EOK);
close_console();
elf_run(&prog_info, &pcb);
return 0;
}
rc = elf_load_file(prog_info.interp, 0, &interp_info);
 
printf("Load dynamic linker '%s'\n", prog_info.interp);
rc = elf_load_file("/rtld.so", RTLD_BIAS, &interp_info);
if (rc < 0) {
DPRINTF("Failed to load interpreter '%s.'\n",
prog_info.interp);
printf("failed to load dynamic linker\n");
ipc_answer_0(rid, EINVAL);
return 1;
}
is_dyn_linked = true;
ipc_answer_0(rid, EOK);
return 0;
}
 
/*
* Provide dynamic linker with some useful data
*/
pcb.rtld_dynamic = interp_info.dynamic;
pcb.rtld_bias = RTLD_BIAS;
 
/** Run the previously loaded program.
*
* @param rid
* @param request
* @return 0 on success, !0 on error.
*/
static void loader_run(ipc_callid_t rid, ipc_call_t *request)
{
const char *cp;
/* Set the task name. */
cp = strrchr(pathname, '/');
cp = (cp == NULL) ? pathname : (cp + 1);
task_set_name(cp);
if (is_dyn_linked == true) {
/* Dynamically linked program */
DPRINTF("Run ELF interpreter.\n");
DPRINTF("Entry point: 0x%lx\n", interp_info.entry);
close_console();
ipc_answer_0(rid, EOK);
elf_run(&interp_info, &pcb);
} else {
/* Statically linked program */
close_console();
ipc_answer_0(rid, EOK);
elf_run(&prog_info, &pcb);
}
printf("run dynamic linker\n");
printf("entry point: 0x%llx\n", interp_info.entry);
close_console();
 
ipc_answer_0(rid, EOK);
elf_run(&interp_info, &pcb);
 
/* Not reached */
return 0;
}
 
/** Handle loader connection.
306,43 → 265,24
ipc_callid_t callid;
ipc_call_t call;
int retval;
/* Already have a connection? */
if (connected) {
ipc_answer_0(iid, ELIMIT);
return;
}
connected = true;
/* Accept the connection */
ipc_answer_0(iid, EOK);
 
/* Ignore parameters, the connection is already open */
(void) iid;
(void) icall;
(void)iid; (void)icall;
 
while (1) {
callid = async_get_call(&call);
// printf("received call from phone %d, method=%d\n",
// call.in_phone_hash, IPC_GET_METHOD(call));
switch (IPC_GET_METHOD(call)) {
case IPC_M_PHONE_HUNGUP:
exit(0);
case LOADER_GET_TASKID:
loader_get_taskid(callid, &call);
continue;
case LOADER_SET_PATHNAME:
loader_set_pathname(callid, &call);
continue;
case LOADER_SET_ARGS:
loader_set_args(callid, &call);
continue;
case LOADER_LOAD:
loader_load(callid, &call);
continue;
case LOADER_RUN:
loader_run(callid, &call);
/* Not reached */
exit(0);
continue;
default:
retval = ENOENT;
break;
349,7 → 289,7
}
if ((callid & IPC_CALLID_NOTIFICATION) == 0 &&
IPC_GET_METHOD(call) != IPC_M_PHONE_HUNGUP) {
DPRINTF("Responding EINVAL to method %d.\n",
printf("responding EINVAL to method %d\n",
IPC_GET_METHOD(call));
ipc_answer_0(callid, EINVAL);
}
360,20 → 300,31
*/
int main(int argc, char *argv[])
{
ipcarg_t phonead;
connected = false;
/* Set a handler of incomming connections. */
async_set_client_connection(loader_connection);
/* Register at naming service. */
if (ipc_connect_to_me(PHONE_NS, SERVICE_LOAD, 0, 0, &phonead) != 0)
return -1;
ipc_callid_t callid;
ipc_call_t call;
ipcarg_t phone_hash;
 
/* The first call only communicates the incoming phone hash */
callid = ipc_wait_for_call(&call);
 
if (IPC_GET_METHOD(call) != LOADER_HELLO) {
if (IPC_GET_METHOD(call) != IPC_M_PHONE_HUNGUP)
ipc_answer_0(callid, EINVAL);
return 1;
}
 
ipc_answer_0(callid, EOK);
phone_hash = call.in_phone_hash;
 
/*
* Up until now async must not be used as it couldn't
* handle incoming requests. (Which means e.g. printf()
* cannot be used)
*/
async_new_connection(phone_hash, 0, NULL, loader_connection);
async_manager();
/* Never reached */
 
/* not reached */
return 0;
}
 
/branches/network/uspace/srv/loader/Makefile
27,19 → 27,30
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
include ../../../version
include ../../Makefile.config
 
## Setup toolchain
#
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
include arch/$(UARCH)/Makefile.inc
include arch/$(ARCH)/Makefile.inc
 
CFLAGS += -Iinclude
 
LIBS = $(LIBC_PREFIX)/libc.a $(SOFTINT_PREFIX)/libsoftint.a
DEFS += -DRELEASE=\"$(RELEASE)\"
 
ifdef REVISION
DEFS += "-DREVISION=\"$(REVISION)\""
endif
 
ifdef TIMESTAMP
DEFS += "-DTIMESTAMP=\"$(TIMESTAMP)\""
endif
 
## Sources
#
 
59,18 → 70,18
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OBJECTS) $(OUTPUT).map $(OUTPUT).disasm arch/$(UARCH)/_link.ld Makefile.depend
-rm -f $(OUTPUT) $(OBJECTS) $(OUTPUT).map $(OUTPUT).disasm arch/$(ARCH)/_link.ld Makefile.depend
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS) arch/$(UARCH)/_link.ld
$(LD) -T arch/$(UARCH)/_link.ld $(LFLAGS) $(OBJECTS) $(LIBS) -o $@ -Map $(OUTPUT).map
$(OUTPUT): $(OBJECTS) $(LIBS) arch/$(ARCH)/_link.ld
$(LD) -T arch/$(ARCH)/_link.ld $(LFLAGS) $(OBJECTS) $(LIBS) -o $@ -Map $(OUTPUT).map
 
disasm:
$(OBJDUMP) -d $(OUTPUT) >$(OUTPUT).disasm
 
arch/$(UARCH)/_link.ld: arch/$(UARCH)/_link.ld.in
arch/$(ARCH)/_link.ld: arch/$(ARCH)/_link.ld.in
$(CC) $(DEFS) $(CFLAGS) -DLIBC_PREFIX=$(LIBC_PREFIX) -E -x c $< | grep -v "^\#" > $@
 
%.o: %.S
/branches/network/uspace/srv/loader/arch/mips32eb
File deleted
\ No newline at end of file
Property changes:
Deleted: svn:special
-*
\ No newline at end of property
/branches/network/uspace/srv/loader/arch/sparc64/_link.ld.in
1,4 → 1,4
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
/branches/network/uspace/srv/loader/arch/sparc64/Makefile.inc
27,4 → 27,4
#
 
CFLAGS += -D__64_BITS__
ARCH_SOURCES := arch/$(UARCH)/sparc64.s
ARCH_SOURCES := arch/$(ARCH)/sparc64.s
/branches/network/uspace/srv/loader/arch/ia64/_link.ld.in
1,4 → 1,4
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
12,10 → 12,15
*(.interp);
} :interp
 
/* On Itanium code sections must be aligned to 16 bytes. */
. = ALIGN(0x800000000 + SIZEOF_HEADERS, 16);
. = 0x00084000 + SIZEOF_HEADERS;
 
.init : {
LONG(0);
LONG(0);
LONG(0);
LONG(0);
LONG(0);
LONG(0);
*(.init);
} : text
.text : {
/branches/network/uspace/srv/loader/arch/ia64/Makefile.inc
27,5 → 27,5
#
 
CFLAGS += -D__64_BITS__
ARCH_SOURCES := arch/$(UARCH)/ia64.s
ARCH_SOURCES := arch/$(ARCH)/ia64.s
AFLAGS += -xexplicit
/branches/network/uspace/srv/loader/arch/arm32/_link.ld.in
1,8 → 1,8
/*
/*
* The only difference from _link.ld.in for regular statically-linked apps
* is the base address.
*/
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
/branches/network/uspace/srv/loader/arch/arm32/Makefile.inc
27,4 → 27,4
#
 
CFLAGS += -D__32_BITS__
ARCH_SOURCES := arch/$(UARCH)/arm32.s
ARCH_SOURCES := arch/$(ARCH)/arm32.s
/branches/network/uspace/srv/loader/arch/ppc32/_link.ld.in
1,8 → 1,8
/*
/*
* The only difference from _link.ld.in for regular statically-linked apps
* is the base address.
*/
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
/branches/network/uspace/srv/loader/arch/ppc32/Makefile.inc
27,4 → 27,4
#
 
CFLAGS += -D__32_BITS__
ARCH_SOURCES := arch/$(UARCH)/ppc32.s
ARCH_SOURCES := arch/$(ARCH)/ppc32.s
/branches/network/uspace/srv/loader/arch/ppc32/ppc32.s
36,5 → 36,5
# Jump to a program entry point
program_run:
mtctr %r3
mr %r6, %r4 # Pass pcb to the entry point in %r6
mr %r3, %r4 # Pass pcb to the entry point in %r3
bctr
/branches/network/uspace/srv/loader/arch/amd64/_link.ld.in
1,4 → 1,4
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
/branches/network/uspace/srv/loader/arch/amd64/Makefile.inc
27,4 → 27,4
#
 
CFLAGS += -D__64_BITS__
ARCH_SOURCES := arch/$(UARCH)/amd64.s
ARCH_SOURCES := arch/$(ARCH)/amd64.s
/branches/network/uspace/srv/loader/arch/mips32/_link.ld.in
1,8 → 1,8
/*
/*
* The only difference from _link.ld.in for regular statically-linked apps
* is the base address.
*/
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
/branches/network/uspace/srv/loader/arch/mips32/Makefile.inc
27,4 → 27,4
#
 
CFLAGS += -D__32_BITS__
ARCH_SOURCES := arch/$(UARCH)/mips32.s
ARCH_SOURCES := arch/$(ARCH)/mips32.s
/branches/network/uspace/srv/loader/arch/ia32/_link.ld.in
1,8 → 1,8
/*
/*
* The difference from _link.ld.in for regular statically-linked apps
* is the base address and the special interp section.
*/
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
/branches/network/uspace/srv/loader/arch/ia32/Makefile.inc
27,4 → 27,4
#
 
CFLAGS += -D__32_BITS__
ARCH_SOURCES := arch/$(UARCH)/ia32.s
ARCH_SOURCES := arch/$(ARCH)/ia32.s
/branches/network/uspace/srv/rd/rd.c
188,10 → 188,12
int phone;
ipcarg_t callback_phonehash;
 
phone = ipc_connect_me_to_blocking(PHONE_NS, SERVICE_DEVMAP, DEVMAP_DRIVER, 0);
if (phone < 0) {
printf(NAME ": Failed to connect to device mapper\n");
return -1;
phone = ipc_connect_me_to(PHONE_NS, SERVICE_DEVMAP, DEVMAP_DRIVER, 0);
 
while (phone < 0) {
usleep(10000);
phone = ipc_connect_me_to(PHONE_NS, SERVICE_DEVMAP,
DEVMAP_DRIVER, 0);
}
req = async_send_2(phone, DEVMAP_DRIVER_REGISTER, 0, 0, &answer);
255,7 → 257,7
int flags = AS_AREA_READ | AS_AREA_WRITE | AS_AREA_CACHEABLE;
int retval = physmem_map(rd_ph_addr, rd_addr,
ALIGN_UP(rd_size, PAGE_SIZE) >> PAGE_WIDTH, flags);
 
if (retval < 0) {
printf(NAME ": Error mapping RAM disk\n");
return false;
/branches/network/uspace/srv/rd/Makefile
29,10 → 29,8
## Setup toolchain
#
 
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
LIBS = $(LIBC_PREFIX)/libc.a
53,13 → 51,13
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend $(OBJECTS)
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm: $(OUTPUT).disasm
 
/branches/network/uspace/srv/fb/serial_console.c
File deleted
/branches/network/uspace/srv/fb/serial_console.h
File deleted
/branches/network/uspace/srv/fb/ski.c
File deleted
/branches/network/uspace/srv/fb/ski.h
File deleted
/branches/network/uspace/srv/fb/sgcn.c
File deleted
/branches/network/uspace/srv/fb/sgcn.h
File deleted
\ No newline at end of file
/branches/network/uspace/srv/fb/msim.c
36,17 → 36,29
*/
 
#include <async.h>
#include <ipc/fb.h>
#include <ipc/ipc.h>
#include <libc.h>
#include <errno.h>
#include <string.h>
#include <libc.h>
#include <stdio.h>
#include <ipc/fb.h>
#include <sysinfo.h>
#include <as.h>
#include <align.h>
#include <ddi.h>
 
#include "serial_console.h"
#include "msim.h"
 
#define WIDTH 80
#define HEIGHT 25
 
#define MAX_CONTROL 20
 
/* Allow only 1 connection */
static int client_connected = 0;
 
static char *virt_addr;
 
static void msim_putc(const char c)
54,17 → 66,159
*virt_addr = c;
}
 
static void msim_puts(char *str)
{
while (*str)
*virt_addr = *(str++);
}
 
static void msim_clrscr(void)
{
msim_puts("\033[2J");
}
 
static void msim_goto(const unsigned int row, const unsigned int col)
{
if ((row > HEIGHT) || (col > WIDTH))
return;
char control[MAX_CONTROL];
snprintf(control, MAX_CONTROL, "\033[%u;%uf", row + 1, col + 1);
msim_puts(control);
}
 
static void msim_set_style(const unsigned int mode)
{
char control[MAX_CONTROL];
snprintf(control, MAX_CONTROL, "\033[%um", mode);
msim_puts(control);
}
 
static void msim_cursor_disable(void)
{
msim_puts("\033[?25l");
}
 
static void msim_cursor_enable(void)
{
msim_puts("\033[?25h");
}
 
static void msim_scroll(int i)
{
if (i > 0) {
msim_goto(HEIGHT - 1, 0);
while (i--)
msim_puts("\033D");
} else if (i < 0) {
msim_goto(0, 0);
while (i++)
msim_puts("\033M");
}
}
 
static void msim_client_connection(ipc_callid_t iid, ipc_call_t *icall)
{
int retval;
ipc_callid_t callid;
ipc_call_t call;
char c;
int lastcol = 0;
int lastrow = 0;
int newcol;
int newrow;
int fgcolor;
int bgcolor;
int i;
 
if (client_connected) {
ipc_answer_0(iid, ELIMIT);
return;
}
client_connected = 1;
ipc_answer_0(iid, EOK);
/* Clear the terminal, set scrolling region
to 0 - 25 lines */
msim_clrscr();
msim_goto(0, 0);
msim_puts("\033[0;25r");
while (true) {
callid = async_get_call(&call);
switch (IPC_GET_METHOD(call)) {
case IPC_M_PHONE_HUNGUP:
client_connected = 0;
ipc_answer_0(callid, EOK);
return;
case FB_PUTCHAR:
c = IPC_GET_ARG1(call);
newrow = IPC_GET_ARG2(call);
newcol = IPC_GET_ARG3(call);
if ((lastcol != newcol) || (lastrow != newrow))
msim_goto(newrow, newcol);
lastcol = newcol + 1;
lastrow = newrow;
msim_putc(c);
retval = 0;
break;
case FB_CURSOR_GOTO:
newrow = IPC_GET_ARG1(call);
newcol = IPC_GET_ARG2(call);
msim_goto(newrow, newcol);
lastrow = newrow;
lastcol = newcol;
retval = 0;
break;
case FB_GET_CSIZE:
ipc_answer_2(callid, EOK, HEIGHT, WIDTH);
continue;
case FB_CLEAR:
msim_clrscr();
retval = 0;
break;
case FB_SET_STYLE:
fgcolor = IPC_GET_ARG1(call);
bgcolor = IPC_GET_ARG2(call);
if (fgcolor < bgcolor)
msim_set_style(0);
else
msim_set_style(7);
retval = 0;
break;
case FB_SCROLL:
i = IPC_GET_ARG1(call);
if ((i > HEIGHT) || (i < -HEIGHT)) {
retval = EINVAL;
break;
}
msim_scroll(i);
msim_goto(lastrow, lastcol);
retval = 0;
break;
case FB_CURSOR_VISIBILITY:
if(IPC_GET_ARG1(call))
msim_cursor_enable();
else
msim_cursor_disable();
retval = 0;
break;
default:
retval = ENOENT;
}
ipc_answer_0(callid, retval);
}
}
 
int msim_init(void)
{
void *phys_addr = (void *) sysinfo_value("fb.address.physical");
virt_addr = (char *) as_get_mappable_page(1);
if (physmem_map(phys_addr, virt_addr, 1, AS_AREA_READ | AS_AREA_WRITE) != 0)
return -1;
physmem_map(phys_addr, virt_addr, 1, AS_AREA_READ | AS_AREA_WRITE);
serial_console_init(msim_putc, WIDTH, HEIGHT);
async_set_client_connection(serial_client_connection);
async_set_client_connection(msim_client_connection);
return 0;
}
 
/branches/network/uspace/srv/fb/main.c
38,8 → 38,6
#include "fb.h"
#include "ega.h"
#include "msim.h"
#include "ski.h"
#include "sgcn.h"
#include "main.h"
 
#define NAME "fb"
47,7 → 45,7
void receive_comm_area(ipc_callid_t callid, ipc_call_t *call, void **area)
{
void *dest;
 
dest = as_get_mappable_page(IPC_GET_ARG2(*call));
if (ipc_answer_1(callid, EOK, (sysarg_t) dest) == 0) {
if (*area)
62,12 → 60,12
ipcarg_t phonead;
bool initialized = false;
 
#ifdef FB_ENABLED
if (sysinfo_value("fb.kind") == 1) {
if (fb_init() == 0)
initialized = true;
}
}
#endif
#ifdef EGA_ENABLED
if ((!initialized) && (sysinfo_value("fb.kind") == 2)) {
81,28 → 79,15
initialized = true;
}
#endif
#ifdef SGCN_ENABLED
if ((!initialized) && (sysinfo_value("fb.kind") == 4)) {
if (sgcn_init() == 0)
initialized = true;
}
#endif
#ifdef SKI_ENABLED
if ((!initialized) && (sysinfo_value("fb") != true)) {
if (ski_init() == 0)
initialized = true;
}
#endif
 
if (!initialized)
return -1;
 
if (ipc_connect_to_me(PHONE_NS, SERVICE_VIDEO, 0, 0, &phonead) != 0)
return -1;
printf(NAME ": Accepting connections\n");
async_manager();
/* Never reached */
return 0;
}
/branches/network/uspace/srv/fb/Makefile
31,7 → 31,6
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
CFLAGS += -I../libipc/include
46,45 → 45,27
main.c \
ppm.c
 
ifneq ($(UARCH),ia64)
ifneq ($(ARCH), ia64)
SOURCES += fb.c \
font-8x16.c
CFLAGS += -DFB_ENABLED
endif
 
ifeq ($(UARCH),ia32)
ifeq ($(ARCH), ia32)
SOURCES += ega.c
CFLAGS += -DEGA_ENABLED
endif
 
ifeq ($(UARCH),ia64)
SOURCES += ega.c \
ski.c \
serial_console.c
CFLAGS += -DSKI_ENABLED
CFLAGS += -DEGA_ENABLED
endif
 
ifeq ($(UARCH),amd64)
ifeq ($(ARCH), amd64)
SOURCES += ega.c
CFLAGS += -DEGA_ENABLED
endif
 
ifeq ($(UARCH),mips32)
SOURCES += msim.c \
serial_console.c
CFLAGS += -DMSIM_ENABLED
ifeq ($(ARCH), mips32)
SOURCES += msim.c
CFLAGS += -DMSIM_ENABLED -DFB_INVERT_ENDIAN
endif
 
ifeq ($(UARCH),sparc64)
SOURCES += sgcn.c \
serial_console.c
CFLAGS += -DSGCN_ENABLED
endif
CFLAGS += -D$(ARCH)
 
CFLAGS += -D$(UARCH)
 
 
OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
 
.PHONY: all clean depend disasm
94,13 → 75,13
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend $(OBJECTS)
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm: $(OUTPUT).disasm
 
/branches/network/uspace/srv/fb/fb.c
1,5 → 1,4
/*
* Copyright (c) 2008 Martin Decky
* Copyright (c) 2006 Jakub Vana
* Copyright (c) 2006 Ondrej Palkovsky
* All rights reserved.
33,7 → 32,7
* @brief HelenOS graphical framebuffer.
* @ingroup fbs
* @{
*/
*/
 
/** @file
*/
51,8 → 50,6
#include <ipc/services.h>
#include <kernel/errno.h>
#include <kernel/genarch/fb/visuals.h>
#include <console/color.h>
#include <console/style.h>
#include <async.h>
#include <bool.h>
 
65,433 → 62,427
#include "pointer.xbm"
#include "pointer_mask.xbm"
 
#define DEFAULT_BGCOLOR 0xf0f0f0
#define DEFAULT_FGCOLOR 0x000000
#define DEFAULT_BGCOLOR 0xf0f0f0
#define DEFAULT_FGCOLOR 0x0
 
#define MAX_ANIM_LEN 8
#define MAX_ANIMATIONS 4
#define MAX_PIXMAPS 256 /**< Maximum number of saved pixmaps */
#define MAX_VIEWPORTS 128 /**< Viewport is a rectangular area on the screen */
/***************************************************************/
/* Pixel specific fuctions */
 
/** Function to render a pixel from a RGB value. */
typedef void (*rgb_conv_t)(void *, uint32_t);
typedef void (*conv2scr_fn_t)(void *, int);
typedef int (*conv2rgb_fn_t)(void *);
 
/** Function to draw a glyph. */
typedef void (*dg_t)(unsigned int x, unsigned int y, bool cursor,
uint8_t *glyphs, uint8_t glyph, uint32_t fg_color, uint32_t bg_color);
struct {
uint8_t *fbaddress;
 
struct {
uint8_t *fb_addr;
unsigned int xres;
unsigned int yres;
unsigned int scanline;
unsigned int glyphscanline;
unsigned int pixelbytes;
unsigned int glyphbytes;
rgb_conv_t rgb_conv;
unsigned int invert_colors;
 
conv2scr_fn_t rgb2scr;
conv2rgb_fn_t scr2rgb;
} screen;
 
/** Backbuffer character cell. */
typedef struct {
uint8_t glyph;
uint32_t fg_color;
uint32_t bg_color;
} bb_cell_t;
int initialized;
unsigned int x, y;
unsigned int width, height;
 
typedef struct {
bool initialized;
unsigned int x;
unsigned int y;
unsigned int width;
unsigned int height;
/* Text support in window */
unsigned int cols;
unsigned int rows;
/*
* Style and glyphs for text printing
*/
 
/** Current attributes. */
attr_rgb_t attr;
 
/** Pre-rendered mask for rendering glyphs. Different viewports
* might use different drawing functions depending on whether their
* scanlines are aligned on a word boundary.*/
uint8_t *glyphs;
 
uint8_t *bgpixel;
 
/** Glyph drawing function for this viewport. */
dg_t dglyph;
unsigned int rows, cols;
/* Style for text printing */
style_t style;
/* Auto-cursor position */
bool cursor_active;
unsigned int cur_col;
unsigned int cur_row;
bool cursor_shown;
/* Back buffer */
bb_cell_t *backbuf;
unsigned int bbsize;
int cursor_active, cur_col, cur_row;
int cursor_shown;
/* Double buffering */
uint8_t *dbdata;
unsigned int dboffset;
unsigned int paused;
} viewport_t;
 
#define MAX_ANIM_LEN 8
#define MAX_ANIMATIONS 4
typedef struct {
bool initialized;
bool enabled;
int initialized;
int enabled;
unsigned int vp;
 
unsigned int pos;
unsigned int animlen;
unsigned int pixmaps[MAX_ANIM_LEN];
} animation_t;
 
static animation_t animations[MAX_ANIMATIONS];
static bool anims_enabled;
static int anims_enabled;
 
/** Maximum number of saved pixmaps
* Pixmap is a saved rectangle
*/
#define MAX_PIXMAPS 256
typedef struct {
unsigned int width;
unsigned int height;
uint8_t *data;
} pixmap_t;
static pixmap_t pixmaps[MAX_PIXMAPS];
 
static pixmap_t pixmaps[MAX_PIXMAPS];
/* Viewport is a rectangular area on the screen */
#define MAX_VIEWPORTS 128
static viewport_t viewports[128];
 
static bool client_connected = false; /**< Allow only 1 connection */
/* Allow only 1 connection */
static int client_connected = 0;
 
static uint32_t color_table[16] = {
[COLOR_BLACK] = 0x000000,
[COLOR_BLUE] = 0x0000f0,
[COLOR_GREEN] = 0x00f000,
[COLOR_CYAN] = 0x00f0f0,
[COLOR_RED] = 0xf00000,
[COLOR_MAGENTA] = 0xf000f0,
[COLOR_YELLOW] = 0xf0f000,
[COLOR_WHITE] = 0xf0f0f0,
#define RED(x, bits) ((x >> (16 + 8 - bits)) & ((1 << bits) - 1))
#define GREEN(x, bits) ((x >> (8 + 8 - bits)) & ((1 << bits) - 1))
#define BLUE(x, bits) ((x >> (8 - bits)) & ((1 << bits) - 1))
 
[8 + COLOR_BLACK] = 0x000000,
[8 + COLOR_BLUE] = 0x0000ff,
[8 + COLOR_GREEN] = 0x00ff00,
[8 + COLOR_CYAN] = 0x00ffff,
[8 + COLOR_RED] = 0xff0000,
[8 + COLOR_MAGENTA] = 0xff00ff,
[8 + COLOR_YELLOW] = 0xffff00,
[8 + COLOR_WHITE] = 0xffffff,
};
#define COL_WIDTH 8
#define ROW_BYTES (screen.scanline * FONT_SCANLINES)
 
static int rgb_from_attr(attr_rgb_t *rgb, const attrs_t *a);
static int rgb_from_style(attr_rgb_t *rgb, int style);
static int rgb_from_idx(attr_rgb_t *rgb, ipcarg_t fg_color,
ipcarg_t bg_color, ipcarg_t flags);
#define POINTPOS(x, y) ((y) * screen.scanline + (x) * screen.pixelbytes)
 
static int fb_set_color(viewport_t *vport, ipcarg_t fg_color,
ipcarg_t bg_color, ipcarg_t attr);
static inline int COLOR(int color)
{
return screen.invert_colors ? ~color : color;
}
 
static void draw_glyph_aligned(unsigned int x, unsigned int y, bool cursor,
uint8_t *glyphs, uint8_t glyph, uint32_t fg_color, uint32_t bg_color);
static void draw_glyph_fallback(unsigned int x, unsigned int y, bool cursor,
uint8_t *glyphs, uint8_t glyph, uint32_t fg_color, uint32_t bg_color);
/* Conversion routines between different color representations */
static void
rgb_byte0888(void *dst, int rgb)
{
*(int *)dst = rgb;
}
 
static void draw_vp_glyph(viewport_t *vport, bool cursor, unsigned int col,
unsigned int row);
static int
byte0888_rgb(void *src)
{
return (*(int *)src) & 0xffffff;
}
 
static void
bgr_byte0888(void *dst, int rgb)
{
*((uint32_t *) dst) = BLUE(rgb, 8) << 16 | GREEN(rgb, 8) << 8 |
RED(rgb, 8);
}
 
#define RED(x, bits) ((x >> (8 + 8 + 8 - bits)) & ((1 << bits) - 1))
#define GREEN(x, bits) ((x >> (8 + 8 - bits)) & ((1 << bits) - 1))
#define BLUE(x, bits) ((x >> (8 - bits)) & ((1 << bits) - 1))
static int
byte0888_bgr(void *src)
{
int color = *(uint32_t *)(src);
return ((color & 0xff) << 16) | (((color >> 8) & 0xff) << 8) |
((color >> 16) & 0xff);
}
 
#define COL2X(col) ((col) * FONT_WIDTH)
#define ROW2Y(row) ((row) * FONT_SCANLINES)
static void
rgb_byte888(void *dst, int rgb)
{
uint8_t *scr = dst;
#if defined(FB_INVERT_ENDIAN)
scr[0] = RED(rgb, 8);
scr[1] = GREEN(rgb, 8);
scr[2] = BLUE(rgb, 8);
#else
scr[2] = RED(rgb, 8);
scr[1] = GREEN(rgb, 8);
scr[0] = BLUE(rgb, 8);
#endif
}
 
#define X2COL(x) ((x) / FONT_WIDTH)
#define Y2ROW(y) ((y) / FONT_SCANLINES)
static int
byte888_rgb(void *src)
{
uint8_t *scr = src;
#if defined(FB_INVERT_ENDIAN)
return scr[0] << 16 | scr[1] << 8 | scr[2];
#else
return scr[2] << 16 | scr[1] << 8 | scr[0];
#endif
}
 
#define FB_POS(x, y) ((y) * screen.scanline + (x) * screen.pixelbytes)
#define BB_POS(vport, col, row) ((row) * vport->cols + (col))
#define GLYPH_POS(glyph, y, cursor) (((glyph) + (cursor) * FONT_GLYPHS) * screen.glyphbytes + (y) * screen.glyphscanline)
/** 16-bit depth (5:5:5) */
static void
rgb_byte555(void *dst, int rgb)
{
/* 5-bit, 5-bits, 5-bits */
*((uint16_t *)(dst)) = RED(rgb, 5) << 10 | GREEN(rgb, 5) << 5 |
BLUE(rgb, 5);
}
 
/** 16-bit depth (5:5:5) */
static int
byte555_rgb(void *src)
{
int color = *(uint16_t *)(src);
return (((color >> 10) & 0x1f) << (16 + 3)) |
(((color >> 5) & 0x1f) << (8 + 3)) | ((color & 0x1f) << 3);
}
 
/** ARGB 8:8:8:8 conversion
*
*/
static void rgb_0888(void *dst, uint32_t rgb)
/** 16-bit depth (5:6:5) */
static void
rgb_byte565(void *dst, int rgb)
{
*((uint32_t *) dst) = rgb & 0xffffff;
/* 5-bit, 6-bits, 5-bits */
*((uint16_t *)(dst)) = RED(rgb, 5) << 11 | GREEN(rgb, 6) << 5 |
BLUE(rgb, 5);
}
 
/** 16-bit depth (5:6:5) */
static int
byte565_rgb(void *src)
{
int color = *(uint16_t *)(src);
return (((color >> 11) & 0x1f) << (16 + 3)) |
(((color >> 5) & 0x3f) << (8 + 2)) | ((color & 0x1f) << 3);
}
 
/** ABGR 8:8:8:8 conversion
*
*/
static void bgr_0888(void *dst, uint32_t rgb)
/** Put pixel - 8-bit depth (3:2:3) */
static void
rgb_byte8(void *dst, int rgb)
{
*((uint32_t *) dst)
= (BLUE(rgb, 8) << 16) | (GREEN(rgb, 8) << 8) | RED(rgb, 8);
*(uint8_t *)dst = RED(rgb, 3) << 5 | GREEN(rgb, 2) << 3 | BLUE(rgb, 3);
}
 
 
/** RGB 8:8:8 conversion
*
*/
static void rgb_888(void *dst, uint32_t rgb)
/** Return pixel color - 8-bit depth (3:2:3) */
static int
byte8_rgb(void *src)
{
((uint8_t *) dst)[0] = BLUE(rgb, 8);
((uint8_t *) dst)[1] = GREEN(rgb, 8);
((uint8_t *) dst)[2] = RED(rgb, 8);
int color = *(uint8_t *)src;
return (((color >> 5) & 0x7) << (16 + 5)) |
(((color >> 3) & 0x3) << (8 + 6)) | ((color & 0x7) << 5);
}
 
 
/** BGR 8:8:8 conversion
/** Put pixel into viewport
*
* @param vport Viewport identification
* @param x X coord relative to viewport
* @param y Y coord relative to viewport
* @param color RGB color
*/
static void bgr_888(void *dst, uint32_t rgb)
static void
putpixel(viewport_t *vport, unsigned int x, unsigned int y, int color)
{
((uint8_t *) dst)[0] = RED(rgb, 8);
((uint8_t *) dst)[1] = GREEN(rgb, 8);
((uint8_t *) dst)[2] = BLUE(rgb, 8);
}
int dx = vport->x + x;
int dy = vport->y + y;
 
if (! (vport->paused && vport->dbdata))
(*screen.rgb2scr)(&screen.fbaddress[POINTPOS(dx,dy)],
COLOR(color));
 
/** RGB 5:5:5 conversion
*
*/
static void rgb_555(void *dst, uint32_t rgb)
{
*((uint16_t *) dst)
= (RED(rgb, 5) << 10) | (GREEN(rgb, 5) << 5) | BLUE(rgb, 5);
if (vport->dbdata) {
int dline = (y + vport->dboffset) % vport->height;
int doffset = screen.pixelbytes * (dline * vport->width + x);
(*screen.rgb2scr)(&vport->dbdata[doffset], COLOR(color));
}
}
 
/** Get pixel from viewport */
static int
getpixel(viewport_t *vport, unsigned int x, unsigned int y)
{
int dx = vport->x + x;
int dy = vport->y + y;
 
/** RGB 5:6:5 conversion
*
*/
static void rgb_565(void *dst, uint32_t rgb)
{
*((uint16_t *) dst)
= (RED(rgb, 5) << 11) | (GREEN(rgb, 6) << 5) | BLUE(rgb, 5);
return COLOR((*screen.scr2rgb)(&screen.fbaddress[POINTPOS(dx, dy)]));
}
 
 
/** RGB 3:2:3
*
*/
static void rgb_323(void *dst, uint32_t rgb)
static inline void
putpixel_mem(char *mem, unsigned int x, unsigned int y, int color)
{
*((uint8_t *) dst)
= ~((RED(rgb, 3) << 5) | (GREEN(rgb, 2) << 3) | BLUE(rgb, 3));
(*screen.rgb2scr)(&mem[POINTPOS(x, y)], COLOR(color));
}
 
/** Draw a filled rectangle.
*
* @note Need real implementation that does not access VRAM twice.
*/
static void draw_filled_rect(unsigned int x0, unsigned int y0, unsigned int x1,
unsigned int y1, uint32_t color)
static void
draw_rectangle(viewport_t *vport, unsigned int sx, unsigned int sy,
unsigned int width, unsigned int height, int color)
{
unsigned int x, y;
unsigned int copy_bytes;
static void *tmpline;
 
uint8_t *sp, *dp;
uint8_t cbuf[4];
if (!tmpline)
tmpline = malloc(screen.scanline * screen.pixelbytes);
 
if (y0 >= y1 || x0 >= x1) return;
screen.rgb_conv(cbuf, color);
/* Clear first line */
for (x = 0; x < width; x++)
putpixel_mem(tmpline, x, 0, color);
 
sp = &screen.fb_addr[FB_POS(x0, y0)];
dp = sp;
 
/* Draw the first line. */
for (x = x0; x < x1; x++) {
memcpy(dp, cbuf, screen.pixelbytes);
dp += screen.pixelbytes;
if (!vport->paused) {
/* Recompute to screen coords */
sx += vport->x;
sy += vport->y;
/* Copy the rest */
for (y = sy;y < sy+height; y++)
memcpy(&screen.fbaddress[POINTPOS(sx,y)], tmpline,
screen.pixelbytes * width);
}
if (vport->dbdata) {
for (y = sy; y < sy + height; y++) {
int rline = (y + vport->dboffset) % vport->height;
int rpos = (rline * vport->width + sx) *
screen.pixelbytes;
memcpy(&vport->dbdata[rpos], tmpline,
screen.pixelbytes * width);
}
}
 
dp = sp + screen.scanline;
copy_bytes = (x1 - x0) * screen.pixelbytes;
}
 
/* Draw the remaining lines by copying. */
for (y = y0 + 1; y < y1; y++) {
memcpy(dp, sp, copy_bytes);
dp += screen.scanline;
}
/** Fill viewport with background color */
static void
clear_port(viewport_t *vport)
{
draw_rectangle(vport, 0, 0, vport->width, vport->height,
vport->style.bg_color);
}
 
/** Redraw viewport.
/** Scroll unbuffered viewport up/down
*
* @param vport Viewport to redraw
*
* @param vport Viewport to scroll
* @param lines Positive number - scroll up, negative - scroll down
*/
static void vport_redraw(viewport_t *vport)
static void
scroll_port_nodb(viewport_t *vport, int lines)
{
unsigned int row, col;
int y;
 
for (row = 0; row < vport->rows; row++) {
for (col = 0; col < vport->cols; col++) {
draw_vp_glyph(vport, false, col, row);
}
if (lines > 0) {
for (y = vport->y; y < vport->y+vport->height - lines; y++)
memcpy(&screen.fbaddress[POINTPOS(vport->x,y)],
&screen.fbaddress[POINTPOS(vport->x,y + lines)],
screen.pixelbytes * vport->width);
draw_rectangle(vport, 0, vport->height - lines, vport->width,
lines, vport->style.bg_color);
} else if (lines < 0) {
lines = -lines;
for (y = vport->y + vport->height-1; y >= vport->y + lines; y--)
memcpy(&screen.fbaddress[POINTPOS(vport->x,y)],
&screen.fbaddress[POINTPOS(vport->x,y - lines)],
screen.pixelbytes * vport->width);
draw_rectangle(vport, 0, 0, vport->width, lines,
vport->style.bg_color);
}
}
 
if (COL2X(vport->cols) < vport->width) {
draw_filled_rect(
vport->x + COL2X(vport->cols), vport->y,
vport->x + vport->width, vport->y + vport->height,
vport->attr.bg_color);
}
/** Refresh given viewport from double buffer */
static void
refresh_viewport_db(viewport_t *vport)
{
unsigned int y, srcy, srcoff, dsty, dstx;
 
if (ROW2Y(vport->rows) < vport->height) {
draw_filled_rect(
vport->x, vport->y + ROW2Y(vport->rows),
vport->x + vport->width, vport->y + vport->height,
vport->attr.bg_color);
for (y = 0; y < vport->height; y++) {
srcy = (y + vport->dboffset) % vport->height;
srcoff = (vport->width * srcy) * screen.pixelbytes;
 
dstx = vport->x;
dsty = vport->y + y;
 
memcpy(&screen.fbaddress[POINTPOS(dstx,dsty)],
&vport->dbdata[srcoff], vport->width * screen.pixelbytes);
}
}
 
static void backbuf_clear(bb_cell_t *backbuf, size_t len, uint32_t fg_color,
uint32_t bg_color)
/** Scroll viewport that has double buffering enabled */
static void
scroll_port_db(viewport_t *vport, int lines)
{
unsigned i;
++vport->paused;
if (lines > 0) {
draw_rectangle(vport, 0, 0, vport->width, lines,
vport->style.bg_color);
vport->dboffset += lines;
vport->dboffset %= vport->height;
} else if (lines < 0) {
lines = -lines;
draw_rectangle(vport, 0, vport->height-lines, vport->width,
lines, vport->style.bg_color);
 
for (i = 0; i < len; i++) {
backbuf[i].glyph = 0;
backbuf[i].fg_color = fg_color;
backbuf[i].bg_color = bg_color;
if (vport->dboffset < lines)
vport->dboffset += vport->height;
vport->dboffset -= lines;
}
--vport->paused;
refresh_viewport_db(vport);
}
 
/** Clear viewport.
*
* @param vport Viewport to clear
*
*/
static void vport_clear(viewport_t *vport)
/** Scrolls viewport given number of lines */
static void
scroll_port(viewport_t *vport, int lines)
{
backbuf_clear(vport->backbuf, vport->cols * vport->rows,
vport->attr.fg_color, vport->attr.bg_color);
vport_redraw(vport);
if (vport->dbdata)
scroll_port_db(vport, lines);
else
scroll_port_nodb(vport, lines);
}
 
/** Scroll viewport by the specified number of lines.
*
* @param vport Viewport to scroll
* @param lines Number of lines to scroll
*
*/
static void vport_scroll(viewport_t *vport, int lines)
static void
invert_pixel(viewport_t *vport, unsigned int x, unsigned int y)
{
unsigned int row, col;
unsigned int x, y;
uint8_t glyph;
uint32_t fg_color;
uint32_t bg_color;
bb_cell_t *bbp, *xbp;
putpixel(vport, x, y, ~getpixel(vport, x, y));
}
 
/*
* Redraw.
*/
 
y = vport->y;
for (row = 0; row < vport->rows; row++) {
x = vport->x;
for (col = 0; col < vport->cols; col++) {
if ((row + lines >= 0) && (row + lines < vport->rows)) {
xbp = &vport->backbuf[BB_POS(vport, col, row + lines)];
bbp = &vport->backbuf[BB_POS(vport, col, row)];
/***************************************************************/
/* Character-console functions */
 
glyph = xbp->glyph;
fg_color = xbp->fg_color;
bg_color = xbp->bg_color;
/** Draw character at given position
*
* @param vport Viewport where the character is printed
* @param sx Coordinates of top-left of the character
* @param sy Coordinates of top-left of the character
* @param style Color of the character
* @param transparent If false, print background color
*/
static void
draw_glyph(viewport_t *vport,uint8_t glyph, unsigned int sx, unsigned int sy,
style_t style, int transparent)
{
int i;
unsigned int y;
unsigned int glline;
 
if (bbp->glyph == glyph &&
bbp->fg_color == xbp->fg_color &&
bbp->bg_color == xbp->bg_color) {
x += FONT_WIDTH;
continue;
}
} else {
glyph = 0;
fg_color = vport->attr.fg_color;
bg_color = vport->attr.bg_color;
}
 
(*vport->dglyph)(x, y, false, vport->glyphs, glyph,
fg_color, bg_color);
x += FONT_WIDTH;
for (y = 0; y < FONT_SCANLINES; y++) {
glline = fb_font[glyph * FONT_SCANLINES + y];
for (i = 0; i < 8; i++) {
if (glline & (1 << (7 - i)))
putpixel(vport, sx + i, sy + y, style.fg_color);
else if (!transparent)
putpixel(vport, sx + i, sy + y, style.bg_color);
}
y += FONT_SCANLINES;
}
 
/*
* Scroll backbuffer.
*/
 
if (lines > 0) {
memmove(vport->backbuf, vport->backbuf + vport->cols * lines,
vport->cols * (vport->rows - lines) * sizeof(bb_cell_t));
backbuf_clear(&vport->backbuf[BB_POS(vport, 0, vport->rows - lines)],
vport->cols * lines, vport->attr.fg_color, vport->attr.bg_color);
} else {
memmove(vport->backbuf - vport->cols * lines, vport->backbuf,
vport->cols * (vport->rows + lines) * sizeof(bb_cell_t));
backbuf_clear(vport->backbuf, - vport->cols * lines,
vport->attr.fg_color, vport->attr.bg_color);
}
}
 
/** Render glyphs
*
* Convert glyphs from device independent font
* description to current visual representation.
*
* @param vport Viewport
*
*/
static void render_glyphs(viewport_t* vport)
/** Invert character at given position */
static void
invert_char(viewport_t *vport,unsigned int row, unsigned int col)
{
unsigned int glyph;
for (glyph = 0; glyph < FONT_GLYPHS; glyph++) {
unsigned int y;
for (y = 0; y < FONT_SCANLINES; y++) {
unsigned int x;
for (x = 0; x < FONT_WIDTH; x++) {
screen.rgb_conv(&vport->glyphs[GLYPH_POS(glyph, y, false) + x * screen.pixelbytes],
(fb_font[glyph * FONT_SCANLINES + y] & (1 << (7 - x)))
? 0xffffff : 0x000000);
screen.rgb_conv(&vport->glyphs[GLYPH_POS(glyph, y, true) + x * screen.pixelbytes],
(fb_font[glyph * FONT_SCANLINES + y] & (1 << (7 - x)))
? 0x000000 : 0xffffff);
}
}
}
screen.rgb_conv(vport->bgpixel, vport->attr.bg_color);
unsigned int x;
unsigned int y;
 
for (x = 0; x < COL_WIDTH; x++)
for (y = 0; y < FONT_SCANLINES; y++)
invert_pixel(vport, col * COL_WIDTH + x, row *
FONT_SCANLINES + y);
}
 
/***************************************************************/
/* Stdout specific functions */
 
 
/** Create new viewport
*
* @param x Origin of the viewport (x).
* @param y Origin of the viewport (y).
* @param width Width of the viewport.
* @param height Height of the viewport.
*
* @return New viewport number.
*
* @return New viewport number
*/
static int vport_create(unsigned int x, unsigned int y,
unsigned int width, unsigned int height)
static int
viewport_create(unsigned int x, unsigned int y,unsigned int width,
unsigned int height)
{
unsigned int i;
int i;
 
for (i = 0; i < MAX_VIEWPORTS; i++) {
if (!viewports[i].initialized)
break;
498,124 → 489,75
}
if (i == MAX_VIEWPORTS)
return ELIMIT;
unsigned int cols = width / FONT_WIDTH;
unsigned int rows = height / FONT_SCANLINES;
unsigned int bbsize = cols * rows * sizeof(bb_cell_t);
unsigned int glyphsize = 2 * FONT_GLYPHS * screen.glyphbytes;
unsigned int word_size = sizeof(unsigned long);
bb_cell_t *backbuf = (bb_cell_t *) malloc(bbsize);
if (!backbuf)
return ENOMEM;
uint8_t *glyphs = (uint8_t *) malloc(glyphsize);
if (!glyphs) {
free(backbuf);
return ENOMEM;
}
uint8_t *bgpixel = (uint8_t *) malloc(screen.pixelbytes);
if (!bgpixel) {
free(glyphs);
free(backbuf);
return ENOMEM;
}
 
backbuf_clear(backbuf, cols * rows, DEFAULT_FGCOLOR, DEFAULT_BGCOLOR);
memset(glyphs, 0, glyphsize);
memset(bgpixel, 0, screen.pixelbytes);
viewports[i].x = x;
viewports[i].y = y;
viewports[i].width = width;
viewports[i].height = height;
viewports[i].cols = cols;
viewports[i].rows = rows;
viewports[i].rows = height / FONT_SCANLINES;
viewports[i].cols = width / COL_WIDTH;
 
viewports[i].style.bg_color = DEFAULT_BGCOLOR;
viewports[i].style.fg_color = DEFAULT_FGCOLOR;
viewports[i].attr.bg_color = DEFAULT_BGCOLOR;
viewports[i].attr.fg_color = DEFAULT_FGCOLOR;
viewports[i].glyphs = glyphs;
viewports[i].bgpixel = bgpixel;
viewports[i].cur_col = 0;
viewports[i].cur_row = 0;
viewports[i].cursor_active = 0;
 
/*
* Conditions necessary to select aligned version:
*
* - word size is divisible by pixelbytes
* - cell scanline size is divisible by word size
* - cell scanlines are word-aligned
*/
if ((word_size % screen.pixelbytes) == 0 &&
(FONT_WIDTH * screen.pixelbytes) % word_size == 0 &&
(x * screen.pixelbytes) % word_size == 0 &&
screen.scanline % word_size == 0) {
viewports[i].initialized = 1;
 
viewports[i].dglyph = draw_glyph_aligned;
} else {
viewports[i].dglyph = draw_glyph_fallback;
}
 
viewports[i].cur_col = 0;
viewports[i].cur_row = 0;
viewports[i].cursor_active = false;
viewports[i].cursor_shown = false;
viewports[i].bbsize = bbsize;
viewports[i].backbuf = backbuf;
viewports[i].initialized = true;
render_glyphs(&viewports[i]);
return i;
}
 
 
/** Initialize framebuffer as a chardev output device
*
* @param addr Address of the framebuffer
* @param xres Screen width in pixels
* @param yres Screen height in pixels
* @param visual Bits per pixel (8, 16, 24, 32)
* @param scan Bytes per one scanline
* @param addr Address of theframebuffer
* @param xres Screen width in pixels
* @param yres Screen height in pixels
* @param visual Bits per pixel (8, 16, 24, 32)
* @param scan Bytes per one scanline
* @param invert_colors Inverted colors.
*
*/
static bool screen_init(void *addr, unsigned int xres, unsigned int yres,
unsigned int scan, unsigned int visual)
static bool
screen_init(void *addr, unsigned int xres, unsigned int yres,
unsigned int scan, unsigned int visual, bool invert_colors)
{
switch (visual) {
case VISUAL_INDIRECT_8:
screen.rgb_conv = rgb_323;
screen.rgb2scr = rgb_byte8;
screen.scr2rgb = byte8_rgb;
screen.pixelbytes = 1;
break;
case VISUAL_RGB_5_5_5:
screen.rgb_conv = rgb_555;
screen.rgb2scr = rgb_byte555;
screen.scr2rgb = byte555_rgb;
screen.pixelbytes = 2;
break;
case VISUAL_RGB_5_6_5:
screen.rgb_conv = rgb_565;
screen.rgb2scr = rgb_byte565;
screen.scr2rgb = byte565_rgb;
screen.pixelbytes = 2;
break;
case VISUAL_RGB_8_8_8:
screen.rgb_conv = rgb_888;
screen.rgb2scr = rgb_byte888;
screen.scr2rgb = byte888_rgb;
screen.pixelbytes = 3;
break;
case VISUAL_BGR_8_8_8:
screen.rgb_conv = bgr_888;
screen.pixelbytes = 3;
break;
case VISUAL_RGB_8_8_8_0:
screen.rgb_conv = rgb_888;
screen.rgb2scr = rgb_byte888;
screen.scr2rgb = byte888_rgb;
screen.pixelbytes = 4;
break;
case VISUAL_RGB_0_8_8_8:
screen.rgb_conv = rgb_0888;
screen.rgb2scr = rgb_byte0888;
screen.scr2rgb = byte0888_rgb;
screen.pixelbytes = 4;
break;
case VISUAL_BGR_0_8_8_8:
screen.rgb_conv = bgr_0888;
screen.rgb2scr = bgr_byte0888;
screen.scr2rgb = byte0888_bgr;
screen.pixelbytes = 4;
break;
default:
622,239 → 564,72
return false;
}
 
screen.fb_addr = (unsigned char *) addr;
screen.fbaddress = (unsigned char *) addr;
screen.xres = xres;
screen.yres = yres;
screen.scanline = scan;
screen.invert_colors = invert_colors;
screen.glyphscanline = FONT_WIDTH * screen.pixelbytes;
screen.glyphbytes = screen.glyphscanline * FONT_SCANLINES;
/* Create first viewport */
vport_create(0, 0, xres, yres);
viewport_create(0, 0, xres, yres);
return true;
}
 
 
/** Draw a glyph, takes advantage of alignment.
*
* This version can only be used if the following conditions are met:
*
* - word size is divisible by pixelbytes
* - cell scanline size is divisible by word size
* - cell scanlines are word-aligned
*
* It makes use of the pre-rendered mask to process (possibly) several
* pixels at once (word size / pixelbytes pixels at a time are processed)
* making it very fast. Most notably this version is not applicable at 24 bits
* per pixel.
*
* @param x x coordinate of top-left corner on screen.
* @param y y coordinate of top-left corner on screen.
* @param cursor Draw glyph with cursor
* @param glyphs Pointer to font bitmap.
* @param glyph Code of the glyph to draw.
* @param fg_color Foreground color.
* @param bg_color Backgroudn color.
*/
static void draw_glyph_aligned(unsigned int x, unsigned int y, bool cursor,
uint8_t *glyphs, uint8_t glyph, uint32_t fg_color, uint32_t bg_color)
/** Hide cursor if it is shown */
static void
cursor_hide(viewport_t *vport)
{
unsigned int i, yd;
unsigned long fg_buf, bg_buf;
unsigned long *maskp, *dp;
unsigned long mask;
unsigned int ww, d_add;
 
/*
* Prepare a pair of words, one filled with foreground-color
* pattern and the other filled with background-color pattern.
*/
for (i = 0; i < sizeof(unsigned long) / screen.pixelbytes; i++) {
screen.rgb_conv(&((uint8_t *)&fg_buf)[i * screen.pixelbytes],
fg_color);
screen.rgb_conv(&((uint8_t *)&bg_buf)[i * screen.pixelbytes],
bg_color);
if (vport->cursor_active && vport->cursor_shown) {
invert_char(vport, vport->cur_row, vport->cur_col);
vport->cursor_shown = 0;
}
 
 
/* Pointer to the current position in the mask. */
maskp = (unsigned long *) &glyphs[GLYPH_POS(glyph, 0, cursor)];
 
/* Pointer to the current position on the screen. */
dp = (unsigned long *) &screen.fb_addr[FB_POS(x, y)];
 
/* Width of the character cell in words. */
ww = FONT_WIDTH * screen.pixelbytes / sizeof(unsigned long);
 
/* Offset to add when moving to another screen scanline. */
d_add = screen.scanline - FONT_WIDTH * screen.pixelbytes;
 
for (yd = 0; yd < FONT_SCANLINES; yd++) {
/*
* Now process the cell scanline, combining foreground
* and background color patters using the pre-rendered mask.
*/
for (i = 0; i < ww; i++) {
mask = *maskp++;
*dp++ = (fg_buf & mask) | (bg_buf & ~mask);
}
 
/* Move to the beginning of the next scanline of the cell. */
dp = (unsigned long *) ((uint8_t *) dp + d_add);
}
}
 
/** Draw a glyph, fallback version.
*
* This version does not make use of the pre-rendered mask, it uses
* the font bitmap directly. It works always, but it is slower.
*
* @param x x coordinate of top-left corner on screen.
* @param y y coordinate of top-left corner on screen.
* @param cursor Draw glyph with cursor
* @param glyphs Pointer to font bitmap.
* @param glyph Code of the glyph to draw.
* @param fg_color Foreground color.
* @param bg_color Backgroudn color.
*/
void draw_glyph_fallback(unsigned int x, unsigned int y, bool cursor,
uint8_t *glyphs, uint8_t glyph, uint32_t fg_color, uint32_t bg_color)
/** Show cursor if cursor showing is enabled */
static void
cursor_print(viewport_t *vport)
{
unsigned int i, j, yd;
uint8_t fg_buf[4], bg_buf[4];
uint8_t *dp, *sp;
unsigned int d_add;
uint8_t b;
 
/* Pre-render 1x the foreground and background color pixels. */
if (cursor) {
screen.rgb_conv(fg_buf, bg_color);
screen.rgb_conv(bg_buf, fg_color);
} else {
screen.rgb_conv(fg_buf, fg_color);
screen.rgb_conv(bg_buf, bg_color);
}
 
/* Pointer to the current position on the screen. */
dp = (uint8_t *) &screen.fb_addr[FB_POS(x, y)];
 
/* Offset to add when moving to another screen scanline. */
d_add = screen.scanline - FONT_WIDTH * screen.pixelbytes;
 
for (yd = 0; yd < FONT_SCANLINES; yd++) {
/* Byte containing bits of the glyph scanline. */
b = fb_font[glyph * FONT_SCANLINES + yd];
 
for (i = 0; i < FONT_WIDTH; i++) {
/* Choose color based on the current bit. */
sp = (b & 0x80) ? fg_buf : bg_buf;
 
/* Copy the pixel. */
for (j = 0; j < screen.pixelbytes; j++) {
*dp++ = *sp++;
}
 
/* Move to the next bit. */
b = b << 1;
}
/* Move to the beginning of the next scanline of the cell. */
dp += d_add;
}
}
 
/** Draw glyph at specified position in viewport.
*
* @param vport Viewport identification
* @param cursor Draw glyph with cursor
* @param col Screen position relative to viewport
* @param row Screen position relative to viewport
*
*/
static void draw_vp_glyph(viewport_t *vport, bool cursor, unsigned int col,
unsigned int row)
{
unsigned int x = vport->x + COL2X(col);
unsigned int y = vport->y + ROW2Y(row);
 
uint8_t glyph;
uint32_t fg_color;
uint32_t bg_color;
glyph = vport->backbuf[BB_POS(vport, col, row)].glyph;
fg_color = vport->backbuf[BB_POS(vport, col, row)].fg_color;
bg_color = vport->backbuf[BB_POS(vport, col, row)].bg_color;
 
(*vport->dglyph)(x, y, cursor, vport->glyphs, glyph,
fg_color, bg_color);
}
 
/** Hide cursor if it is shown
*
*/
static void cursor_hide(viewport_t *vport)
{
if ((vport->cursor_active) && (vport->cursor_shown)) {
draw_vp_glyph(vport, false, vport->cur_col, vport->cur_row);
vport->cursor_shown = false;
}
}
 
 
/** Show cursor if cursor showing is enabled
*
*/
static void cursor_show(viewport_t *vport)
{
/* Do not check for cursor_shown */
if (vport->cursor_active) {
draw_vp_glyph(vport, true, vport->cur_col, vport->cur_row);
vport->cursor_shown = true;
invert_char(vport, vport->cur_row, vport->cur_col);
vport->cursor_shown = 1;
}
}
 
 
/** Invert cursor, if it is enabled
*
*/
static void cursor_blink(viewport_t *vport)
/** Invert cursor, if it is enabled */
static void
cursor_blink(viewport_t *vport)
{
if (vport->cursor_shown)
cursor_hide(vport);
else
cursor_show(vport);
cursor_print(vport);
}
 
 
/** Draw character at given position relative to viewport
*
* @param vport Viewport identification
* @param c Character to draw
* @param col Screen position relative to viewport
* @param row Screen position relative to viewport
*
/** Draw character at given position relative to viewport
*
* @param vport Viewport identification
* @param c Character to print
* @param row Screen position relative to viewport
* @param col Screen position relative to viewport
* @param transparent If false, print background color with character
*/
static void draw_char(viewport_t *vport, uint8_t c, unsigned int col, unsigned int row)
static void
draw_char(viewport_t *vport, char c, unsigned int row, unsigned int col,
style_t style, int transparent)
{
bb_cell_t *bbp;
/* Optimize - do not hide cursor if we are going to overwrite it */
if (vport->cursor_active && vport->cursor_shown &&
(vport->cur_col != col || vport->cur_row != row))
invert_char(vport, vport->cur_row, vport->cur_col);
draw_glyph(vport, c, col * COL_WIDTH, row * FONT_SCANLINES, style,
transparent);
 
/* Do not hide cursor if we are going to overwrite it */
if ((vport->cursor_active) && (vport->cursor_shown) &&
((vport->cur_col != col) || (vport->cur_row != row)))
cursor_hide(vport);
 
bbp = &vport->backbuf[BB_POS(vport, col, row)];
bbp->glyph = c;
bbp->fg_color = vport->attr.fg_color;
bbp->bg_color = vport->attr.bg_color;
 
draw_vp_glyph(vport, false, col, row);
vport->cur_col = col;
vport->cur_row = row;
 
vport->cur_col++;
if (vport->cur_col >= vport->cols) {
vport->cur_col = 0;
862,91 → 637,65
if (vport->cur_row >= vport->rows)
vport->cur_row--;
}
cursor_show(vport);
cursor_print(vport);
}
 
 
/** Draw text data to viewport
*
* @param vport Viewport id
* @param data Text data fitting exactly into viewport
*
* @param data Text data fitting exactly into viewport
*/
static void draw_text_data(viewport_t *vport, keyfield_t *data)
static void
draw_text_data(viewport_t *vport, keyfield_t *data)
{
unsigned int i;
bb_cell_t *bbp;
attrs_t *a;
attr_rgb_t rgb;
int i;
int col,row;
 
clear_port(vport);
for (i = 0; i < vport->cols * vport->rows; i++) {
unsigned int col = i % vport->cols;
unsigned int row = i / vport->cols;
bbp = &vport->backbuf[BB_POS(vport, col, row)];
uint8_t glyph = bbp->glyph;
 
a = &data[i].attrs;
rgb_from_attr(&rgb, a);
 
bbp->glyph = data[i].character;
bbp->fg_color = rgb.fg_color;
bbp->bg_color = rgb.bg_color;
 
draw_vp_glyph(vport, false, col, row);
if (data[i].character == ' ' && style_same(data[i].style,
vport->style))
continue;
col = i % vport->cols;
row = i / vport->cols;
draw_glyph(vport, data[i].character, col * COL_WIDTH, row *
FONT_SCANLINES, data[i].style, style_same(data[i].style,
vport->style));
}
cursor_show(vport);
cursor_print(vport);
}
 
 
static void putpixel_pixmap(void *data, unsigned int x, unsigned int y, uint32_t color)
/** Return first free pixmap */
static int
find_free_pixmap(void)
{
int pm = *((int *) data);
pixmap_t *pmap = &pixmaps[pm];
unsigned int pos = (y * pmap->width + x) * screen.pixelbytes;
int i;
screen.rgb_conv(&pmap->data[pos], color);
for (i = 0;i < MAX_PIXMAPS;i++)
if (!pixmaps[i].data)
return i;
return -1;
}
 
 
static void putpixel(void *data, unsigned int x, unsigned int y, uint32_t color)
static void
putpixel_pixmap(int pm, unsigned int x, unsigned int y, int color)
{
viewport_t *vport = (viewport_t *) data;
unsigned int dx = vport->x + x;
unsigned int dy = vport->y + y;
screen.rgb_conv(&screen.fb_addr[FB_POS(dx, dy)], color);
}
pixmap_t *pmap = &pixmaps[pm];
int pos = (y * pmap->width + x) * screen.pixelbytes;
 
 
/** Return first free pixmap
*
*/
static int find_free_pixmap(void)
{
unsigned int i;
for (i = 0; i < MAX_PIXMAPS; i++)
if (!pixmaps[i].data)
return i;
return -1;
(*screen.rgb2scr)(&pmap->data[pos],COLOR(color));
}
 
 
/** Create a new pixmap and return appropriate ID
*
*/
static int shm2pixmap(unsigned char *shm, size_t size)
/** Create a new pixmap and return appropriate ID */
static int
shm2pixmap(unsigned char *shm, size_t size)
{
int pm;
pixmap_t *pmap;
 
pm = find_free_pixmap();
if (pm == -1)
return ELIMIT;
pmap = &pixmaps[pm];
if (ppm_get_data(shm, size, &pmap->width, &pmap->height))
955,19 → 704,19
pmap->data = malloc(pmap->width * pmap->height * screen.pixelbytes);
if (!pmap->data)
return ENOMEM;
ppm_draw(shm, size, 0, 0, pmap->width, pmap->height, putpixel_pixmap, (void *) &pm);
 
ppm_draw(shm, size, 0, 0, pmap->width, pmap->height,
(putpixel_cb_t)putpixel_pixmap, (void *)pm);
 
return pm;
}
 
 
/** Handle shared memory communication calls
*
* Protocol for drawing pixmaps:
* - FB_PREPARE_SHM(client shm identification)
* - IPC_M_AS_AREA_SEND
* - FB_DRAW_PPM(startx, starty)
* - FB_DRAW_PPM(startx,starty)
* - FB_DROP_SHM
*
* Protocol for text drawing
975,30 → 724,28
* - FB_DRAW_TEXT_DATA
*
* @param callid Callid of the current call
* @param call Current call data
* @param vp Active viewport
* @param call Current call data
* @param vp Active viewport
* @return 0 if the call was not handled byt this function, 1 otherwise
*
* @return false if the call was not handled byt this function, true otherwise
*
* Note: this function is not threads safe, you would have
* note: this function is not threads safe, you would have
* to redefine static variables with __thread
*
*/
static bool shm_handle(ipc_callid_t callid, ipc_call_t *call, int vp)
static int
shm_handle(ipc_callid_t callid, ipc_call_t *call, int vp)
{
static keyfield_t *interbuffer = NULL;
static size_t intersize = 0;
 
static unsigned char *shm = NULL;
static ipcarg_t shm_id = 0;
static size_t shm_size;
bool handled = true;
int retval = EOK;
 
int handled = 1;
int retval = 0;
viewport_t *vport = &viewports[vp];
unsigned int x;
unsigned int y;
unsigned int x, y;
 
switch (IPC_GET_METHOD(*call)) {
case IPC_M_SHARE_OUT:
/* We accept one area for data interchange */
1005,20 → 752,19
if (IPC_GET_ARG1(*call) == shm_id) {
void *dest = as_get_mappable_page(IPC_GET_ARG2(*call));
shm_size = IPC_GET_ARG2(*call);
if (!ipc_answer_1(callid, EOK, (sysarg_t) dest))
if (!ipc_answer_1(callid, EOK, (sysarg_t) dest))
shm = dest;
else
shm_id = 0;
if (shm[0] != 'P')
return false;
return true;
while (1)
;
return 1;
} else {
intersize = IPC_GET_ARG2(*call);
receive_comm_area(callid, call, (void *) &interbuffer);
}
return true;
return 1;
case FB_PREPARE_SHM:
if (shm_id)
retval = EBUSY;
1033,7 → 779,7
}
shm_id = 0;
break;
 
case FB_SHM2PIXMAP:
if (!shm) {
retval = EINVAL;
1048,14 → 794,14
}
x = IPC_GET_ARG1(*call);
y = IPC_GET_ARG2(*call);
if ((x > vport->width) || (y > vport->height)) {
if (x > vport->width || y > vport->height) {
retval = EINVAL;
break;
}
ppm_draw(shm, shm_size, IPC_GET_ARG1(*call),
IPC_GET_ARG2(*call), vport->width - x, vport->height - y, putpixel, (void *) vport);
IPC_GET_ARG2(*call), vport->width - x, vport->height - y,
(putpixel_cb_t)putpixel, vport);
break;
case FB_DRAW_TEXT_DATA:
if (!interbuffer) {
1062,7 → 808,8
retval = EINVAL;
break;
}
if (intersize < vport->cols * vport->rows * sizeof(*interbuffer)) {
if (intersize < vport->cols * vport->rows *
sizeof(*interbuffer)) {
retval = EINVAL;
break;
}
1069,7 → 816,7
draw_text_data(vport, interbuffer);
break;
default:
handled = false;
handled = 0;
}
if (handled)
1077,39 → 824,41
return handled;
}
 
static void
copy_vp_to_pixmap(viewport_t *vport, pixmap_t *pmap)
{
int y;
int tmp, srcrowsize;
int realwidth, realheight, realrowsize;
int width = vport->width;
int height = vport->height;
 
static void copy_vp_to_pixmap(viewport_t *vport, pixmap_t *pmap)
{
unsigned int width = vport->width;
unsigned int height = vport->height;
if (width + vport->x > screen.xres)
width = screen.xres - vport->x;
if (height + vport->y > screen.yres)
height = screen.yres - vport->y;
unsigned int realwidth = pmap->width <= width ? pmap->width : width;
unsigned int realheight = pmap->height <= height ? pmap->height : height;
realwidth = pmap->width <= width ? pmap->width : width;
realheight = pmap->height <= height ? pmap->height : height;
 
srcrowsize = vport->width * screen.pixelbytes;
realrowsize = realwidth * screen.pixelbytes;
unsigned int srcrowsize = vport->width * screen.pixelbytes;
unsigned int realrowsize = realwidth * screen.pixelbytes;
unsigned int y;
for (y = 0; y < realheight; y++) {
unsigned int tmp = (vport->y + y) * screen.scanline + vport->x * screen.pixelbytes;
memcpy(pmap->data + srcrowsize * y, screen.fb_addr + tmp, realrowsize);
tmp = (vport->y + y) * screen.scanline +
vport->x * screen.pixelbytes;
memcpy(pmap->data + srcrowsize * y, screen.fbaddress + tmp,
realrowsize);
}
}
 
 
/** Save viewport to pixmap
*
*/
static int save_vp_to_pixmap(viewport_t *vport)
/** Save viewport to pixmap */
static int
save_vp_to_pixmap(viewport_t *vport)
{
int pm;
pixmap_t *pmap;
 
pm = find_free_pixmap();
if (pm == -1)
return ELIMIT;
1118,60 → 867,58
pmap->data = malloc(screen.pixelbytes * vport->width * vport->height);
if (!pmap->data)
return ENOMEM;
 
pmap->width = vport->width;
pmap->height = vport->height;
 
copy_vp_to_pixmap(vport, pmap);
return pm;
}
 
 
/** Draw pixmap on screen
*
* @param vp Viewport to draw on
* @param pm Pixmap identifier
*
*/
static int draw_pixmap(int vp, int pm)
{
pixmap_t *pmap = &pixmaps[pm];
viewport_t *vport = &viewports[vp];
unsigned int width = vport->width;
unsigned int height = vport->height;
int y;
int tmp, srcrowsize;
int realwidth, realheight, realrowsize;
int width = vport->width;
int height = vport->height;
 
if (width + vport->x > screen.xres)
width = screen.xres - vport->x;
if (height + vport->y > screen.yres)
height = screen.yres - vport->y;
 
if (!pmap->data)
return EINVAL;
unsigned int realwidth = pmap->width <= width ? pmap->width : width;
unsigned int realheight = pmap->height <= height ? pmap->height : height;
unsigned int srcrowsize = vport->width * screen.pixelbytes;
unsigned int realrowsize = realwidth * screen.pixelbytes;
unsigned int y;
 
realwidth = pmap->width <= width ? pmap->width : width;
realheight = pmap->height <= height ? pmap->height : height;
 
srcrowsize = vport->width * screen.pixelbytes;
realrowsize = realwidth * screen.pixelbytes;
 
for (y = 0; y < realheight; y++) {
unsigned int tmp = (vport->y + y) * screen.scanline + vport->x * screen.pixelbytes;
memcpy(screen.fb_addr + tmp, pmap->data + y * srcrowsize, realrowsize);
tmp = (vport->y + y) * screen.scanline +
vport->x * screen.pixelbytes;
memcpy(screen.fbaddress + tmp, pmap->data + y * srcrowsize,
realrowsize);
}
return EOK;
return 0;
}
 
 
/** Tick animation one step forward
*
*/
static void anims_tick(void)
/** Tick animation one step forward */
static void
anims_tick(void)
{
unsigned int i;
int i;
static int counts = 0;
/* Limit redrawing */
1180,36 → 927,37
return;
 
for (i = 0; i < MAX_ANIMATIONS; i++) {
if ((!animations[i].animlen) || (!animations[i].initialized) ||
(!animations[i].enabled))
if (!animations[i].animlen || !animations[i].initialized ||
!animations[i].enabled)
continue;
draw_pixmap(animations[i].vp, animations[i].pixmaps[animations[i].pos]);
animations[i].pos = (animations[i].pos + 1) % animations[i].animlen;
draw_pixmap(animations[i].vp,
animations[i].pixmaps[animations[i].pos]);
animations[i].pos = (animations[i].pos + 1) %
animations[i].animlen;
}
}
 
 
static unsigned int pointer_x;
static unsigned int pointer_y;
static bool pointer_shown, pointer_enabled;
static int pointer_x, pointer_y;
static int pointer_shown, pointer_enabled;
static int pointer_vport = -1;
static int pointer_pixmap = -1;
 
 
static void mouse_show(void)
static void
mouse_show(void)
{
int i, j;
int visibility;
int color;
int bytepos;
if ((pointer_shown) || (!pointer_enabled))
 
if (pointer_shown || !pointer_enabled)
return;
/* Save image under the pointer. */
 
/* Save image under the cursor */
if (pointer_vport == -1) {
pointer_vport = vport_create(pointer_x, pointer_y, pointer_width, pointer_height);
pointer_vport = viewport_create(pointer_x, pointer_y,
pointer_width, pointer_height);
if (pointer_vport < 0)
return;
} else {
1216,13 → 964,14
viewports[pointer_vport].x = pointer_x;
viewports[pointer_vport].y = pointer_y;
}
 
if (pointer_pixmap == -1)
pointer_pixmap = save_vp_to_pixmap(&viewports[pointer_vport]);
else
copy_vp_to_pixmap(&viewports[pointer_vport], &pixmaps[pointer_pixmap]);
/* Draw mouse pointer. */
copy_vp_to_pixmap(&viewports[pointer_vport],
&pixmaps[pointer_pixmap]);
 
/* Draw cursor */
for (i = 0; i < pointer_height; i++)
for (j = 0; j < pointer_width; j++) {
bytepos = i * ((pointer_width - 1) / 8 + 1) + j / 8;
1240,10 → 989,10
pointer_shown = 1;
}
 
 
static void mouse_hide(void)
static void
mouse_hide(void)
{
/* Restore image under the pointer. */
/* Restore image under the cursor */
if (pointer_shown) {
draw_pixmap(pointer_vport, pointer_pixmap);
pointer_shown = 0;
1250,8 → 999,8
}
}
 
 
static void mouse_move(unsigned int x, unsigned int y)
static void
mouse_move(unsigned int x, unsigned int y)
{
mouse_hide();
pointer_x = x;
1259,14 → 1008,14
mouse_show();
}
 
 
static int anim_handle(ipc_callid_t callid, ipc_call_t *call, int vp)
static int
anim_handle(ipc_callid_t callid, ipc_call_t *call, int vp)
{
bool handled = true;
int retval = EOK;
int i, nvp;
int handled = 1;
int retval = 0;
int i,nvp;
int newval;
 
switch (IPC_GET_METHOD(*call)) {
case FB_ANIM_CREATE:
nvp = IPC_GET_ARG1(*call);
1356,16 → 1105,14
return handled;
}
 
/** Handler for messages concerning pixmap handling */
static int
pixmap_handle(ipc_callid_t callid, ipc_call_t *call, int vp)
{
int handled = 1;
int retval = 0;
int i,nvp;
 
/** Handler for messages concerning pixmap handling
*
*/
static int pixmap_handle(ipc_callid_t callid, ipc_call_t *call, int vp)
{
bool handled = true;
int retval = EOK;
int i, nvp;
switch (IPC_GET_METHOD(*call)) {
case FB_VP_DRAW_PIXMAP:
nvp = IPC_GET_ARG1(*call);
1403,7 → 1150,7
default:
handled = 0;
}
 
if (handled)
ipc_answer_0(callid, retval);
return handled;
1410,99 → 1157,35
}
 
static int rgb_from_style(attr_rgb_t *rgb, int style)
{
switch (style) {
case STYLE_NORMAL:
rgb->fg_color = color_table[COLOR_BLACK];
rgb->bg_color = color_table[COLOR_WHITE];
break;
case STYLE_EMPHASIS:
rgb->fg_color = color_table[COLOR_RED];
rgb->bg_color = color_table[COLOR_WHITE];
break;
default:
return EINVAL;
}
 
return EOK;
}
 
static int rgb_from_idx(attr_rgb_t *rgb, ipcarg_t fg_color,
ipcarg_t bg_color, ipcarg_t flags)
{
fg_color = (fg_color & 7) | ((flags & CATTR_BRIGHT) ? 8 : 0);
bg_color = (bg_color & 7) | ((flags & CATTR_BRIGHT) ? 8 : 0);
 
rgb->fg_color = color_table[fg_color];
rgb->bg_color = color_table[bg_color];
 
return EOK;
}
 
static int rgb_from_attr(attr_rgb_t *rgb, const attrs_t *a)
{
int rc;
 
switch (a->t) {
case at_style:
rc = rgb_from_style(rgb, a->a.s.style);
break;
case at_idx:
rc = rgb_from_idx(rgb, a->a.i.fg_color,
a->a.i.bg_color, a->a.i.flags);
break;
case at_rgb:
*rgb = a->a.r;
rc = EOK;
break;
}
 
return rc;
}
 
static int fb_set_style(viewport_t *vport, ipcarg_t style)
{
return rgb_from_style(&vport->attr, (int) style);
}
 
static int fb_set_color(viewport_t *vport, ipcarg_t fg_color,
ipcarg_t bg_color, ipcarg_t flags)
{
return rgb_from_idx(&vport->attr, fg_color, bg_color, flags);
}
 
/** Function for handling connections to FB
*
*/
static void fb_client_connection(ipc_callid_t iid, ipc_call_t *icall)
static void
fb_client_connection(ipc_callid_t iid, ipc_call_t *icall)
{
unsigned int vp = 0;
viewport_t *vport = &viewports[vp];
ipc_callid_t callid;
ipc_call_t call;
int retval;
int i;
unsigned int row,col;
char c;
 
int vp = 0;
viewport_t *vport = &viewports[0];
 
if (client_connected) {
ipc_answer_0(iid, ELIMIT);
return;
}
/* Accept connection */
client_connected = true;
ipc_answer_0(iid, EOK);
while (true) {
ipc_callid_t callid;
ipc_call_t call;
int retval;
unsigned int i;
int scroll;
uint8_t glyph;
unsigned int row, col;
if ((vport->cursor_active) || (anims_enabled))
client_connected = 1;
ipc_answer_0(iid, EOK); /* Accept connection */
 
while (1) {
if (vport->cursor_active || anims_enabled)
callid = async_get_call_timeout(&call, 250000);
else
callid = async_get_call(&call);
 
mouse_hide();
if (!callid) {
cursor_blink(vport);
1510,89 → 1193,105
mouse_show();
continue;
}
if (shm_handle(callid, &call, vp))
continue;
if (pixmap_handle(callid, &call, vp))
continue;
if (anim_handle(callid, &call, vp))
continue;
switch (IPC_GET_METHOD(call)) {
 
switch (IPC_GET_METHOD(call)) {
case IPC_M_PHONE_HUNGUP:
client_connected = false;
/* Cleanup other viewports */
client_connected = 0;
/* cleanup other viewports */
for (i = 1; i < MAX_VIEWPORTS; i++)
vport->initialized = false;
/* Exit thread */
return;
vport->initialized = 0;
return; /* Exit thread */
 
case FB_PUTCHAR:
glyph = IPC_GET_ARG1(call);
case FB_TRANS_PUTCHAR:
c = IPC_GET_ARG1(call);
row = IPC_GET_ARG2(call);
col = IPC_GET_ARG3(call);
if ((col >= vport->cols) || (row >= vport->rows)) {
if (row >= vport->rows || col >= vport->cols) {
retval = EINVAL;
break;
}
ipc_answer_0(callid, EOK);
draw_char(vport, glyph, col, row);
/* Message already answered */
continue;
 
draw_char(vport, c, row, col, vport->style,
IPC_GET_METHOD(call) == FB_TRANS_PUTCHAR);
continue; /* msg already answered */
case FB_CLEAR:
vport_clear(vport);
cursor_show(vport);
retval = EOK;
clear_port(vport);
cursor_print(vport);
retval = 0;
break;
case FB_CURSOR_GOTO:
case FB_CURSOR_GOTO:
row = IPC_GET_ARG1(call);
col = IPC_GET_ARG2(call);
if ((col >= vport->cols) || (row >= vport->rows)) {
if (row >= vport->rows || col >= vport->cols) {
retval = EINVAL;
break;
}
retval = EOK;
retval = 0;
cursor_hide(vport);
vport->cur_col = col;
vport->cur_row = row;
cursor_show(vport);
break;
cursor_print(vport);
break;
case FB_CURSOR_VISIBILITY:
cursor_hide(vport);
vport->cursor_active = IPC_GET_ARG1(call);
cursor_show(vport);
retval = EOK;
cursor_print(vport);
retval = 0;
break;
case FB_GET_CSIZE:
ipc_answer_2(callid, EOK, vport->rows, vport->cols);
continue;
case FB_SCROLL:
scroll = IPC_GET_ARG1(call);
if ((scroll > (int) vport->rows) || (scroll < (-(int) vport->rows))) {
i = IPC_GET_ARG1(call);
if (i > vport->rows || i < (- (int)vport->rows)) {
retval = EINVAL;
break;
}
cursor_hide(vport);
vport_scroll(vport, scroll);
cursor_show(vport);
retval = EOK;
scroll_port(vport, i*FONT_SCANLINES);
cursor_print(vport);
retval = 0;
break;
case FB_VIEWPORT_DB:
/* Enable double buffering */
i = IPC_GET_ARG1(call);
if (i == -1)
i = vp;
if (i < 0 || i >= MAX_VIEWPORTS) {
retval = EINVAL;
break;
}
if (!viewports[i].initialized ) {
retval = EADDRNOTAVAIL;
break;
}
viewports[i].dboffset = 0;
if (IPC_GET_ARG2(call) == 1 && !viewports[i].dbdata)
viewports[i].dbdata =
malloc(screen.pixelbytes *
viewports[i].width * viewports[i].height);
else if (IPC_GET_ARG2(call) == 0 &&
viewports[i].dbdata) {
free(viewports[i].dbdata);
viewports[i].dbdata = NULL;
}
retval = 0;
break;
case FB_VIEWPORT_SWITCH:
i = IPC_GET_ARG1(call);
if (i >= MAX_VIEWPORTS) {
if (i < 0 || i >= MAX_VIEWPORTS) {
retval = EINVAL;
break;
}
if (!viewports[i].initialized) {
if (! viewports[i].initialized ) {
retval = EADDRNOTAVAIL;
break;
}
1599,11 → 1298,11
cursor_hide(vport);
vp = i;
vport = &viewports[vp];
cursor_show(vport);
retval = EOK;
cursor_print(vport);
retval = 0;
break;
case FB_VIEWPORT_CREATE:
retval = vport_create(IPC_GET_ARG1(call) >> 16,
retval = viewport_create(IPC_GET_ARG1(call) >> 16,
IPC_GET_ARG1(call) & 0xffff,
IPC_GET_ARG2(call) >> 16,
IPC_GET_ARG2(call) & 0xffff);
1610,42 → 1309,33
break;
case FB_VIEWPORT_DELETE:
i = IPC_GET_ARG1(call);
if (i >= MAX_VIEWPORTS) {
if (i < 0 || i >= MAX_VIEWPORTS) {
retval = EINVAL;
break;
}
if (!viewports[i].initialized) {
if (! viewports[i].initialized ) {
retval = EADDRNOTAVAIL;
break;
}
viewports[i].initialized = false;
if (viewports[i].glyphs)
free(viewports[i].glyphs);
if (viewports[i].bgpixel)
free(viewports[i].bgpixel);
if (viewports[i].backbuf)
free(viewports[i].backbuf);
retval = EOK;
viewports[i].initialized = 0;
if (viewports[i].dbdata) {
free(viewports[i].dbdata);
viewports[i].dbdata = NULL;
}
retval = 0;
break;
case FB_SET_STYLE:
retval = fb_set_style(vport, IPC_GET_ARG1(call));
vport->style.fg_color = IPC_GET_ARG1(call);
vport->style.bg_color = IPC_GET_ARG2(call);
retval = 0;
break;
case FB_SET_COLOR:
retval = fb_set_color(vport, IPC_GET_ARG1(call),
IPC_GET_ARG2(call), IPC_GET_ARG3(call));
break;
case FB_SET_RGB_COLOR:
vport->attr.fg_color = IPC_GET_ARG1(call);
vport->attr.bg_color = IPC_GET_ARG2(call);
retval = EOK;
break;
case FB_GET_RESOLUTION:
ipc_answer_2(callid, EOK, screen.xres, screen.yres);
continue;
case FB_POINTER_MOVE:
pointer_enabled = true;
pointer_enabled = 1;
mouse_move(IPC_GET_ARG1(call), IPC_GET_ARG2(call));
retval = EOK;
retval = 0;
break;
default:
retval = ENOENT;
1654,33 → 1344,41
}
}
 
/** Initialization of framebuffer
*
*/
int fb_init(void)
/** Initialization of framebuffer */
int
fb_init(void)
{
void *fb_ph_addr;
unsigned int fb_width;
unsigned int fb_height;
unsigned int fb_scanline;
unsigned int fb_visual;
bool fb_invert_colors;
void *fb_addr;
size_t asz;
 
async_set_client_connection(fb_client_connection);
 
fb_ph_addr = (void *) sysinfo_value("fb.address.physical");
fb_width = sysinfo_value("fb.width");
fb_height = sysinfo_value("fb.height");
fb_scanline = sysinfo_value("fb.scanline");
fb_visual = sysinfo_value("fb.visual");
fb_invert_colors = sysinfo_value("fb.invert-colors");
 
asz = fb_scanline * fb_height;
fb_addr = as_get_mappable_page(asz);
void *fb_ph_addr = (void *) sysinfo_value("fb.address.physical");
unsigned int fb_offset = sysinfo_value("fb.offset");
unsigned int fb_width = sysinfo_value("fb.width");
unsigned int fb_height = sysinfo_value("fb.height");
unsigned int fb_scanline = sysinfo_value("fb.scanline");
unsigned int fb_visual = sysinfo_value("fb.visual");
unsigned int fbsize = fb_scanline * fb_height;
void *fb_addr = as_get_mappable_page(fbsize);
if (physmem_map(fb_ph_addr + fb_offset, fb_addr,
ALIGN_UP(fbsize, PAGE_SIZE) >> PAGE_WIDTH, AS_AREA_READ | AS_AREA_WRITE) != 0)
return -1;
if (screen_init(fb_addr, fb_width, fb_height, fb_scanline, fb_visual))
physmem_map(fb_ph_addr, fb_addr, ALIGN_UP(asz, PAGE_SIZE) >>
PAGE_WIDTH, AS_AREA_READ | AS_AREA_WRITE);
 
if (screen_init(fb_addr, fb_width, fb_height, fb_scanline, fb_visual,
fb_invert_colors))
return 0;
return -1;
}
 
/**
/**
* @}
*/
/branches/network/uspace/srv/fb/ega.c
49,9 → 49,6
#include <ipc/ns.h>
#include <ipc/services.h>
#include <libarch/ddi.h>
#include <console/style.h>
#include <console/color.h>
#include <sys/types.h>
 
#include "ega.h"
#include "../console/screenbuffer.h"
64,14 → 61,13
 
saved_screen saved_screens[MAX_SAVED_SCREENS];
 
#define EGA_IO_BASE ((ioport8_t *) 0x3d4)
#define EGA_IO_ADDRESS 0x3d4
#define EGA_IO_SIZE 2
 
int ega_normal_color = 0x0f;
int ega_inverted_color = 0xf0;
#define NORMAL_COLOR 0x0f
#define INVERTED_COLOR 0xf0
 
#define NORMAL_COLOR ega_normal_color
#define INVERTED_COLOR ega_inverted_color
#define EGA_STYLE(fg,bg) ((fg) > (bg) ? NORMAL_COLOR : INVERTED_COLOR)
 
/* Allow only 1 connection */
static int client_connected = 0;
80,10 → 76,8
static unsigned int scr_height;
static char *scr_addr;
 
static unsigned int style;
static unsigned int style = NORMAL_COLOR;
 
static unsigned attr_to_ega_style(const attrs_t *a);
 
static void clrscr(void)
{
int i;
100,10 → 94,10
 
ega_cursor = col + scr_width * row;
pio_write_8(EGA_IO_BASE, 0xe);
pio_write_8(EGA_IO_BASE + 1, (ega_cursor >> 8) & 0xff);
pio_write_8(EGA_IO_BASE, 0xf);
pio_write_8(EGA_IO_BASE + 1, ega_cursor & 0xff);
outb(EGA_IO_ADDRESS, 0xe);
outb(EGA_IO_ADDRESS + 1, (ega_cursor >> 8) & 0xff);
outb(EGA_IO_ADDRESS, 0xf);
outb(EGA_IO_ADDRESS + 1, ega_cursor & 0xff);
}
 
static void cursor_disable(void)
110,10 → 104,10
{
uint8_t stat;
 
pio_write_8(EGA_IO_BASE, 0xa);
stat = pio_read_8(EGA_IO_BASE + 1);
pio_write_8(EGA_IO_BASE, 0xa);
pio_write_8(EGA_IO_BASE + 1, stat | (1 << 5));
outb(EGA_IO_ADDRESS, 0xa);
stat=inb(EGA_IO_ADDRESS + 1);
outb(EGA_IO_ADDRESS, 0xa);
outb(EGA_IO_ADDRESS + 1, stat | (1 << 5));
}
 
static void cursor_enable(void)
120,10 → 114,10
{
uint8_t stat;
 
pio_write_8(EGA_IO_BASE, 0xa);
stat = pio_read_8(EGA_IO_BASE + 1);
pio_write_8(EGA_IO_BASE, 0xa);
pio_write_8(EGA_IO_BASE + 1, stat & (~(1 << 5)));
outb(EGA_IO_ADDRESS, 0xa);
stat=inb(EGA_IO_ADDRESS + 1);
outb(EGA_IO_ADDRESS, 0xa);
outb(EGA_IO_ADDRESS + 1, stat & (~(1 << 5)));
}
 
static void scroll(int rows)
130,13 → 124,13
{
int i;
if (rows > 0) {
memmove(scr_addr, ((char *) scr_addr) + rows * scr_width * 2,
memcpy(scr_addr, ((char *) scr_addr) + rows * scr_width * 2,
scr_width * scr_height * 2 - rows * scr_width * 2);
for (i = 0; i < rows * scr_width; i++)
(((short *) scr_addr) + scr_width * scr_height - rows *
scr_width)[i] = ((style << 8) + ' ');
} else if (rows < 0) {
memmove(((char *)scr_addr) - rows * scr_width * 2, scr_addr,
memcpy(((char *)scr_addr) - rows * scr_width * 2, scr_addr,
scr_width * scr_height * 2 + rows * scr_width * 2);
for (i = 0; i < -rows * scr_width; i++)
((short *)scr_addr)[i] = ((style << 8 ) + ' ');
157,7 → 151,8
 
for (i = 0; i < scr_width * scr_height; i++) {
scr_addr[i * 2] = data[i].character;
scr_addr[i * 2 + 1] = attr_to_ega_style(&data[i].attrs);
scr_addr[i * 2 + 1] = EGA_STYLE(data[i].style.fg_color,
data[i].style.bg_color);
}
}
 
186,51 → 181,7
return i;
}
 
static int style_to_ega_style(int style)
{
unsigned int ega_style;
 
switch (style) {
case STYLE_NORMAL:
ega_style = INVERTED_COLOR;
break;
case STYLE_EMPHASIS:
ega_style = INVERTED_COLOR | 4;
break;
default:
return INVERTED_COLOR;
}
 
return ega_style;
}
 
static unsigned int color_to_ega_style(int fg_color, int bg_color, int attr)
{
unsigned int style;
 
style = (fg_color & 7) | ((bg_color & 7) << 4);
if (attr & CATTR_BRIGHT)
style = style | 0x08;
 
return style;
}
 
static unsigned int rgb_to_ega_style(uint32_t fg, uint32_t bg)
{
return (fg > bg) ? NORMAL_COLOR : INVERTED_COLOR;
}
 
static unsigned attr_to_ega_style(const attrs_t *a)
{
switch (a->t) {
case at_style: return style_to_ega_style(a->a.s.style);
case at_rgb: return rgb_to_ega_style(a->a.r.fg_color, a->a.r.bg_color);
case at_idx: return color_to_ega_style(a->a.i.fg_color,
a->a.i.bg_color, a->a.i.flags);
default: return INVERTED_COLOR;
}
}
 
static void ega_client_connection(ipc_callid_t iid, ipc_call_t *icall)
{
int retval;
238,8 → 189,7
ipc_call_t call;
char c;
unsigned int row, col;
int bg_color, fg_color, attr;
uint32_t bg_rgb, fg_rgb;
int bgcolor,fgcolor;
keyfield_t *interbuf = NULL;
size_t intersize = 0;
int i;
315,7 → 265,7
retval = 0;
break;
case FB_CURSOR_VISIBILITY:
if (IPC_GET_ARG1(call))
if(IPC_GET_ARG1(call))
cursor_enable();
else
cursor_disable();
322,22 → 272,11
retval = 0;
break;
case FB_SET_STYLE:
style = style_to_ega_style(IPC_GET_ARG1(call));
fgcolor = IPC_GET_ARG1(call);
bgcolor = IPC_GET_ARG2(call);
style = EGA_STYLE(fgcolor, bgcolor);
retval = 0;
break;
case FB_SET_COLOR:
fg_color = IPC_GET_ARG1(call);
bg_color = IPC_GET_ARG2(call);
attr = IPC_GET_ARG3(call);
style = color_to_ega_style(fg_color, bg_color, attr);
retval = 0;
break;
case FB_SET_RGB_COLOR:
fg_rgb = IPC_GET_ARG1(call);
bg_rgb = IPC_GET_ARG2(call);
style = rgb_to_ega_style(fg_rgb, bg_rgb);
retval = 0;
break;
case FB_VP_DRAW_PIXMAP:
i = IPC_GET_ARG2(call);
retval = print_screen(i);
373,22 → 312,13
ega_ph_addr = (void *) sysinfo_value("fb.address.physical");
scr_width = sysinfo_value("fb.width");
scr_height = sysinfo_value("fb.height");
iospace_enable(task_get_id(), (void *) EGA_IO_ADDRESS, 2);
 
if (sysinfo_value("fb.blinking")) {
ega_normal_color &= 0x77;
ega_inverted_color &= 0x77;
}
 
style = NORMAL_COLOR;
 
iospace_enable(task_get_id(), (void *) EGA_IO_BASE, 2);
 
sz = scr_width * scr_height * 2;
scr_addr = as_get_mappable_page(sz);
 
if (physmem_map(ega_ph_addr, scr_addr, ALIGN_UP(sz, PAGE_SIZE) >>
PAGE_WIDTH, AS_AREA_READ | AS_AREA_WRITE) != 0)
return -1;
physmem_map(ega_ph_addr, scr_addr, ALIGN_UP(sz, PAGE_SIZE) >>
PAGE_WIDTH, AS_AREA_READ | AS_AREA_WRITE);
 
async_set_client_connection(ega_client_connection);
 
396,6 → 326,6
}
 
 
/**
/**
* @}
*/
/branches/network/uspace/srv/fb/ppm.c
92,23 → 92,23
int i;
unsigned int color;
unsigned int coef;
 
/* Read magic */
if ((data[0] != 'P') || (data[1] != '6'))
if (data[0] != 'P' || data[1] != '6')
return EINVAL;
data += 2;
 
data+=2;
skip_whitespace(&data);
read_num(&data, &width);
skip_whitespace(&data);
read_num(&data, &height);
read_num(&data,&height);
skip_whitespace(&data);
read_num(&data, &maxcolor);
read_num(&data,&maxcolor);
data++;
if ((maxcolor == 0) || (maxcolor > 255) || (width * height > datasz))
 
if (maxcolor == 0 || maxcolor > 255 || width * height > datasz) {
return EINVAL;
}
coef = 255 / maxcolor;
if (coef * maxcolor > 255)
coef -= 1;
125,6 → 125,6
(*putpixel)(vport, sx + (i % width), sy + (i / width), color);
data += 3;
}
 
return 0;
}
/branches/network/uspace/srv/fb/font-8x16.h
29,11 → 29,9
#ifndef FB_FONT_8X16_H_
#define FB_FONT_8X16_H_
 
#define FONT_GLYPHS 256
#define FONT_WIDTH 8
#define FONT_SCANLINES 16
#define FONT_GLIPHS 256
#define FONT_SCANLINES 16
 
extern unsigned char fb_font[FONT_GLIPHS * FONT_SCANLINES];
 
extern unsigned char fb_font[FONT_GLYPHS * FONT_SCANLINES];
 
#endif
/branches/network/uspace/srv/fb/fb.h
29,7 → 29,7
/** @addtogroup fb
* @ingroup fbs
* @{
*/
*/
/** @file
*/
 
36,10 → 36,8
#ifndef FB_FB_H_
#define FB_FB_H_
 
#include <stdint.h>
typedef void (* putpixel_cb_t)(void *, unsigned int, unsigned int, int);
 
typedef void (* putpixel_cb_t)(void *, unsigned int, unsigned int, uint32_t);
 
extern int fb_init(void);
 
#endif
/branches/network/uspace/srv/fb/font-8x16.c
28,7 → 28,7
 
#include "font-8x16.h"
 
unsigned char fb_font[FONT_GLYPHS * FONT_SCANLINES] = {
unsigned char fb_font[FONT_GLIPHS * FONT_SCANLINES] = {
 
/* 0 0x00 '^@' */
0x00, /* 00000000 */
/branches/network/uspace/srv/kbd/layout/us_dvorak.c
File deleted
/branches/network/uspace/srv/kbd/layout/us_qwerty.c
File deleted
/branches/network/uspace/srv/kbd/ctl/gxe_fb.c
File deleted
/branches/network/uspace/srv/kbd/ctl/pc.c
File deleted
/branches/network/uspace/srv/kbd/ctl/stty.c
File deleted
/branches/network/uspace/srv/kbd/ctl/sun.c
File deleted
/branches/network/uspace/srv/kbd/port/gxemul.c
File deleted
/branches/network/uspace/srv/kbd/port/ns16550.c
File deleted
/branches/network/uspace/srv/kbd/port/msim.c
File deleted
/branches/network/uspace/srv/kbd/port/i8042.c
File deleted
/branches/network/uspace/srv/kbd/port/ski.c
File deleted
/branches/network/uspace/srv/kbd/port/z8530.c
File deleted
/branches/network/uspace/srv/kbd/port/sgcn.c
File deleted
/branches/network/uspace/srv/kbd/port/dummy.c
File deleted
/branches/network/uspace/srv/kbd/port/i8042.h
File deleted
/branches/network/uspace/srv/kbd/Makefile
31,9 → 31,9
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
include $(LIBC_PREFIX)/Makefile.toolchain
include ../../../Makefile.config
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
CFLAGS += -Iinclude -I../libadt/include
 
LIBS = $(LIBC_PREFIX)/libc.a
44,109 → 44,61
OUTPUT = kbd
GENERIC_SOURCES = \
generic/kbd.c \
genarch/gsp.c \
genarch/stroke.c \
generic/key_buffer.c
 
ARCH_SOURCES =
GENARCH_SOURCES =
ARCH_SOURCES = \
arch/$(ARCH)/src/kbd.c
 
ifeq ($(KBD_LAYOUT), us_qwerty)
GENARCH_SOURCES += layout/us_qwerty.c
ifeq ($(ARCH), ia32)
ARCH_SOURCES += \
arch/$(ARCH)/src/mouse.c \
arch/$(ARCH)/src/scanc.c
GENARCH_SOURCES = \
genarch/src/kbd.c
CFLAGS += -DMOUSE_ENABLED
endif
ifeq ($(KBD_LAYOUT), us_dvorak)
GENARCH_SOURCES += layout/us_dvorak.c
ifeq ($(ARCH), amd64)
ARCH_SOURCES += \
arch/$(ARCH)/src/mouse.c \
arch/$(ARCH)/src/scanc.c
GENARCH_SOURCES = \
genarch/src/kbd.c
CFLAGS += -DMOUSE_ENABLED
endif
 
ifeq ($(UARCH), amd64)
GENARCH_SOURCES += \
port/i8042.c \
ctl/pc.c
ifeq ($(ARCH), sparc64)
ARCH_SOURCES += \
arch/$(ARCH)/src/scanc.c
GENARCH_SOURCES = \
genarch/src/kbd.c
endif
ifeq ($(UARCH), arm32)
GENARCH_SOURCES += \
port/gxemul.c
ifeq ($(CONFIG_FB), y)
GENARCH_SOURCES += \
ctl/gxe_fb.c
else
GENARCH_SOURCES += \
ctl/stty.c
endif
ifeq ($(ARCH), arm32)
ARCH_SOURCES += \
arch/$(ARCH)/src/kbd_gxemul.c
endif
ifeq ($(UARCH), ia32)
GENARCH_SOURCES += \
port/i8042.c \
ctl/pc.c
endif
ifeq ($(MACHINE), i460GX)
GENARCH_SOURCES += \
port/i8042.c \
ctl/pc.c
endif
ifeq ($(MACHINE), ski)
GENARCH_SOURCES += \
port/ski.c \
ctl/stty.c
endif
ifeq ($(MACHINE), msim)
GENARCH_SOURCES += \
port/msim.c \
ctl/stty.c
endif
ifeq ($(MACHINE), lgxemul)
GENARCH_SOURCES += \
port/gxemul.c
ifeq ($(CONFIG_FB), y)
GENARCH_SOURCES += \
ctl/gxe_fb.c
else
GENARCH_SOURCES += \
ctl/stty.c
endif
endif
ifeq ($(MACHINE), bgxemul)
GENARCH_SOURCES += \
port/gxemul.c \
ctl/stty.c
endif
ifeq ($(UARCH), ppc32)
GENARCH_SOURCES += \
port/dummy.c \
ctl/stty.c
endif
ifeq ($(UARCH), sparc64)
ifeq ($(MACHINE),serengeti)
GENARCH_SOURCES += \
port/sgcn.c \
ctl/stty.c
else
GENARCH_SOURCES += \
port/z8530.c \
ctl/sun.c
endif
endif
 
 
GENERIC_OBJECTS := $(addsuffix .o,$(basename $(GENERIC_SOURCES)))
ARCH_OBJECTS := $(addsuffix .o,$(basename $(ARCH_SOURCES)))
GENARCH_OBJECTS := $(addsuffix .o,$(basename $(GENARCH_SOURCES)))
 
OBJECTS := $(ARCH_OBJECTS) $(GENERIC_OBJECTS) $(GENARCH_OBJECTS)
 
.PHONY: all clean depend disasm links
 
all: $(OUTPUT) $(OUTPUT).disasm
all: links $(OUTPUT) $(OUTPUT).disasm
 
-include Makefile.depend
 
links:
ln -sfn ../arch/$(ARCH)/include include/arch
ln -sfn ../genarch/include include/genarch
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend $(OBJECTS)
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend include/arch include/genarch
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(OUTPUT): $(ARCH_OBJECTS) $(GENERIC_OBJECTS) $(GENARCH_OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(GENERIC_OBJECTS) $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm: $(OUTPUT).disasm
 
/branches/network/uspace/srv/kbd/generic/kbd.c
37,99 → 37,48
 
#include <ipc/ipc.h>
#include <ipc/services.h>
#include <sysinfo.h>
#include <stdio.h>
#include <unistd.h>
#include <stdlib.h>
#include <stdio.h>
#include <ipc/ns.h>
#include <async.h>
#include <errno.h>
#include <arch/kbd.h>
#include <kbd.h>
#include <libadt/fifo.h>
#include <kbd/kbd.h>
#include <kbd/keycode.h>
 
#include <kbd.h>
#include <key_buffer.h>
#include <kbd_port.h>
#include <kbd_ctl.h>
#include <layout.h>
#include <async.h>
#include <keys.h>
 
#define NAME "kbd"
 
int cons_connected = 0;
int phone2cons = -1;
keybuffer_t keybuffer;
keybuffer_t keybuffer;
 
/** Currently active modifiers. */
static unsigned mods = KM_NUM_LOCK;
 
/** Currently pressed lock keys. We track these to tackle autorepeat. */
static unsigned lock_keys;
 
int cir_service = 0;
int cir_phone = -1;
 
void kbd_push_scancode(int scancode)
static void irq_handler(ipc_callid_t iid, ipc_call_t *call)
{
/* printf("scancode: 0x%x\n", scancode);*/
kbd_ctl_parse_scancode(scancode);
}
int chr;
 
void kbd_push_ev(int type, unsigned int key)
{
kbd_event_t ev;
unsigned mod_mask;
#ifdef MOUSE_ENABLED
if (mouse_arch_process(phone2cons, call))
return;
#endif
kbd_arch_process(&keybuffer, call);
 
switch (key) {
case KC_LCTRL: mod_mask = KM_LCTRL; break;
case KC_RCTRL: mod_mask = KM_RCTRL; break;
case KC_LSHIFT: mod_mask = KM_LSHIFT; break;
case KC_RSHIFT: mod_mask = KM_RSHIFT; break;
case KC_LALT: mod_mask = KM_LALT; break;
case KC_RALT: mod_mask = KM_RALT; break;
default: mod_mask = 0; break;
}
if (cons_connected && phone2cons != -1) {
/*
* recode to ASCII - one interrupt can produce more than one
* code so result is stored in fifo
*/
while (!keybuffer_empty(&keybuffer)) {
if (!keybuffer_pop(&keybuffer, (int *)&chr))
break;
 
if (mod_mask != 0) {
if (type == KE_PRESS)
mods = mods | mod_mask;
else
mods = mods & ~mod_mask;
}
 
switch (key) {
case KC_CAPS_LOCK: mod_mask = KM_CAPS_LOCK; break;
case KC_NUM_LOCK: mod_mask = KM_NUM_LOCK; break;
case KC_SCROLL_LOCK: mod_mask = KM_SCROLL_LOCK; break;
default: mod_mask = 0; break;
}
 
if (mod_mask != 0) {
if (type == KE_PRESS) {
/*
* Only change lock state on transition from released
* to pressed. This prevents autorepeat from messing
* up the lock state.
*/
mods = mods ^ (mod_mask & ~lock_keys);
lock_keys = lock_keys | mod_mask;
} else {
lock_keys = lock_keys & ~mod_mask;
async_msg_1(phone2cons, KBD_PUSHCHAR, chr);
}
}
/*
printf("type: %d\n", type);
printf("mods: 0x%x\n", mods);
printf("keycode: %u\n", key);
*/
ev.type = type;
ev.key = key;
ev.mods = mods;
 
ev.c = layout_parse_ev(&ev);
 
async_msg_4(phone2cons, KBD_EVENT, ev.type, ev.key, ev.mods, ev.c);
}
 
static void console_connection(ipc_callid_t iid, ipc_call_t *icall)
176,32 → 125,16
ipcarg_t phonead;
if (sysinfo_value("kbd.cir.fhc") == 1)
cir_service = SERVICE_FHC;
else if (sysinfo_value("kbd.cir.obio") == 1)
cir_service = SERVICE_OBIO;
if (cir_service) {
while (cir_phone < 0) {
cir_phone = ipc_connect_me_to_blocking(PHONE_NS, cir_service,
0, 0);
}
}
/* Initialize port driver. */
if (kbd_port_init() != 0)
/* Initialize arch dependent parts */
if (kbd_arch_init())
return -1;
 
/* Initialize controller driver. */
if (kbd_ctl_init() != 0)
return -1;
/* Initialize key buffer */
keybuffer_init(&keybuffer);
async_set_client_connection(console_connection);
 
/* Register service at nameserver. */
async_set_interrupt_received(irq_handler);
/* Register service at nameserver */
if (ipc_connect_to_me(PHONE_NS, SERVICE_KEYBOARD, 0, 0, &phonead) != 0)
return -1;
208,7 → 141,7
printf(NAME ": Accepting connections\n");
async_manager();
 
/* Not reached. */
/* Never reached */
return 0;
}
 
/branches/network/uspace/srv/kbd/generic/key_buffer.c
40,7 → 40,7
 
/** Clear key buffer.
*/
void keybuffer_free(keybuffer_t *keybuffer)
void keybuffer_free(keybuffer_t *keybuffer)
{
futex_down(&keybuffer_futex);
keybuffer->head = 0;
75,18 → 75,15
return (keybuffer->items == 0);
}
 
/** Push key event to key buffer.
*
* If the buffer is full, the event is ignored.
*
* @param keybuffer The keybuffer.
* @param ev The event to push.
/** Push key to key buffer.
* If buffer is full, character is ignored.
* @param key code of stored key
*/
void keybuffer_push(keybuffer_t *keybuffer, const kbd_event_t *ev)
void keybuffer_push(keybuffer_t *keybuffer, int key)
{
futex_down(&keybuffer_futex);
if (keybuffer->items < KEYBUFFER_SIZE) {
keybuffer->fifo[keybuffer->tail] = *ev;
keybuffer->fifo[keybuffer->tail] = key;
keybuffer->tail = (keybuffer->tail + 1) % KEYBUFFER_SIZE;
keybuffer->items++;
}
93,25 → 90,16
futex_up(&keybuffer_futex);
}
 
void keybuffer_push0(keybuffer_t *keybuffer, int c)
{
kbd_event_t ev;
 
ev.key = c; ev.mods = 0; ev.c = c;
keybuffer_push(keybuffer, &ev);
}
 
/** Pop event from buffer.
*
* @param edst Pointer to where the event should be saved.
* @return Zero on empty buffer, nonzero otherwise.
/** Pop character from buffer.
* @param c pointer to space where to store character from buffer.
* @return zero on empty buffer, nonzero else
*/
int keybuffer_pop(keybuffer_t *keybuffer, kbd_event_t *edst)
int keybuffer_pop(keybuffer_t *keybuffer, int *c)
{
futex_down(&keybuffer_futex);
if (keybuffer->items > 0) {
keybuffer->items--;
*edst = (keybuffer->fifo[keybuffer->head]) ;
*c = (keybuffer->fifo[keybuffer->head]) ;
keybuffer->head = (keybuffer->head + 1) % KEYBUFFER_SIZE;
futex_up(&keybuffer_futex);
return 1;
/branches/network/uspace/srv/kbd/arch/ia32/src/mouse.c
0,0 → 1,117
/*
* Copyright (c) 2006 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#include <ipc/ipc.h>
#include <async.h>
#include <kbd.h>
#include <keys.h>
 
#define i8042_MOUSE_DATA 0x20
 
#define BUFSIZE 3
 
typedef struct {
union {
unsigned char data[BUFSIZE];
struct {
unsigned leftbtn : 1;
unsigned rightbtn : 1;
unsigned middlebtn : 1;
unsigned isone : 1; /* Always one */
unsigned xsign : 1;
unsigned ysign : 1;
unsigned xovfl : 1;
unsigned yovfl : 1;
unsigned char x;
unsigned char y;
} val;
}u;
}ps2packet_t;
 
static ps2packet_t buf;
static int bufpos = 0;
static int leftbtn = 0;
static int rightbtn = 0;
static int middlebtn = 0;
 
/** Convert 9-bit 2-complement signed number to integer */
static int bit9toint(int sign, unsigned char data)
{
int tmp;
 
if (!sign)
return data;
 
tmp = ((unsigned char)~data) + 1;
return -tmp;
}
 
/** Process mouse data
*
* @return True if mouse command was recognized and processed
*/
int mouse_arch_process(int phoneid, ipc_call_t *call)
{
int status = IPC_GET_ARG1(*call);
int data = IPC_GET_ARG2(*call);
int x,y;
 
if (!(status & i8042_MOUSE_DATA))
return 0;
 
/* Check that we have not lost synchronization */
if (bufpos == 0 && !(data & 0x8))
return 1; /* Synchro lost, ignore byte */
 
buf.u.data[bufpos++] = data;
if (bufpos == BUFSIZE) {
bufpos = 0;
if (phoneid != -1) {
if (buf.u.val.leftbtn ^ leftbtn) {
leftbtn = buf.u.val.leftbtn;
async_msg_1(phoneid, KBD_MS_LEFT, leftbtn);
}
if (buf.u.val.rightbtn & rightbtn) {
rightbtn = buf.u.val.middlebtn;
async_msg_1(phoneid, KBD_MS_RIGHT, rightbtn);
}
if (buf.u.val.rightbtn & rightbtn) {
middlebtn = buf.u.val.middlebtn;
async_msg_1(phoneid, KBD_MS_MIDDLE, middlebtn);
}
x = bit9toint(buf.u.val.xsign, buf.u.val.x);
y = bit9toint(buf.u.val.ysign, buf.u.val.y);
if (x || y)
async_msg_2(phoneid, KBD_MS_MOVE, (ipcarg_t)x,
(ipcarg_t)(-y));
}
}
 
return 1;
}
/branches/network/uspace/srv/kbd/arch/ia32/src/kbd.c
0,0 → 1,166
/*
* Copyright (c) 2001-2004 Jakub Jermar
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdia32 ia32
* @brief HelenOS ia32 / amd64 arch dependent parts of uspace keyboard handler.
* @ingroup kbd
* @{
*/
/** @file
* @ingroup kbdamd64
*/
 
#include <arch/kbd.h>
#include <ipc/ipc.h>
#include <unistd.h>
#include <kbd.h>
#include <keys.h>
#include <genarch/kbd.h>
#include <sysinfo.h>
 
/* Interesting bits for status register */
#define i8042_OUTPUT_FULL 0x1
#define i8042_INPUT_FULL 0x2
#define i8042_MOUSE_DATA 0x20
 
/* Command constants */
#define i8042_CMD_KBD 0x60
#define i8042_CMD_MOUSE 0xd4
 
/* Keyboard cmd byte */
#define i8042_KBD_IE 0x1
#define i8042_MOUSE_IE 0x2
#define i8042_KBD_DISABLE 0x10
#define i8042_MOUSE_DISABLE 0x20
#define i8042_KBD_TRANSLATE 0x40
 
/* Mouse constants */
#define MOUSE_OUT_INIT 0xf4
#define MOUSE_ACK 0xfa
 
#define KEY_RELEASE 0x80
 
static volatile int keyflags; /**< Tracking of multiple keypresses. */
static volatile int lockflags; /**< Tracking of multiple keys lockings. */
 
irq_cmd_t i8042_cmds[2] = {
{ CMD_PORT_READ_1, (void *) 0x64, 0, 1 },
{ CMD_PORT_READ_1, (void *) 0x60, 0, 2 }
};
 
irq_code_t i8042_kbd = {
2,
i8042_cmds
};
 
static void wait_ready(void) {
while (i8042_status_read() & i8042_INPUT_FULL)
;
}
 
/** Register uspace irq handler
* @return
*/
int kbd_arch_init(void)
{
int i;
int mouseenabled = 0;
 
iospace_enable(task_get_id(), (void *) i8042_DATA, 5);
/* Disable kbd, enable mouse */
i8042_command_write(i8042_CMD_KBD);
wait_ready();
i8042_command_write(i8042_CMD_KBD);
wait_ready();
i8042_data_write(i8042_KBD_DISABLE);
wait_ready();
 
/* Flush all current IO */
while (i8042_status_read() & i8042_OUTPUT_FULL)
i8042_data_read();
/* Initialize mouse */
i8042_command_write(i8042_CMD_MOUSE);
wait_ready();
i8042_data_write(MOUSE_OUT_INIT);
wait_ready();
int mouseanswer = 0;
for (i=0;i < 1000; i++) {
int status = i8042_status_read();
if (status & i8042_OUTPUT_FULL) {
int data = i8042_data_read();
if (status & i8042_MOUSE_DATA) {
mouseanswer = data;
break;
}
}
usleep(1000);
}
if (mouseanswer == MOUSE_ACK) {
/* enable mouse */
mouseenabled = 1;
ipc_register_irq(sysinfo_value("mouse.inr"), sysinfo_value("mouse.devno"), 0, &i8042_kbd);
}
/* Enable kbd */
ipc_register_irq(sysinfo_value("kbd.inr"), sysinfo_value("kbd.devno"), 0, &i8042_kbd);
 
int newcontrol = i8042_KBD_IE | i8042_KBD_TRANSLATE;
if (mouseenabled)
newcontrol |= i8042_MOUSE_IE;
i8042_command_write(i8042_CMD_KBD);
wait_ready();
i8042_data_write(newcontrol);
wait_ready();
return 0;
}
 
/** Process keyboard & mouse events */
int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
{
int status = IPC_GET_ARG1(*call);
 
if ((status & i8042_MOUSE_DATA))
return 0;
int scan_code = IPC_GET_ARG2(*call);
if (scan_code & KEY_RELEASE)
key_released(keybuffer, scan_code ^ KEY_RELEASE);
else
key_pressed(keybuffer, scan_code);
return 1;
}
 
/**
* @}
*/
/branches/network/uspace/srv/kbd/arch/ia32/src/scanc.c
0,0 → 1,202
/*
* Copyright (c) 2001-2004 Jakub Jermar
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdia32
* @brief Scancodes for PC keyboards.
* @{
*/
/** @file
* @ingroup kbdamd64
*/
 
#include <genarch/scanc.h>
 
/** Primary meaning of scancodes. */
int sc_primary_map[] = {
SPECIAL, /* 0x00 */
SPECIAL, /* 0x01 - Esc */
'1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=',
'\b', /* 0x0e - Backspace */
'\t', 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']', '\n',
SPECIAL, /* 0x1d - LCtrl */
'a', 's', 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', '\'',
'`',
SPECIAL, /* 0x2a - LShift */
'\\',
'z', 'x', 'c', 'v', 'b', 'n', 'm', ',', '.', '/',
SPECIAL, /* 0x36 - RShift */
'*',
SPECIAL, /* 0x38 - LAlt */
' ',
SPECIAL, /* 0x3a - CapsLock */
(FUNCTION_KEYS | 1), /* 0x3b - F1 */
(FUNCTION_KEYS | 2), /* 0x3c - F2 */
(FUNCTION_KEYS | 3), /* 0x3d - F3 */
(FUNCTION_KEYS | 4), /* 0x3e - F4 */
(FUNCTION_KEYS | 5), /* 0x3f - F5 */
(FUNCTION_KEYS | 6), /* 0x40 - F6 */
(FUNCTION_KEYS | 7), /* 0x41 - F7 */
(FUNCTION_KEYS | 8), /* 0x42 - F8 */
(FUNCTION_KEYS | 9), /* 0x43 - F9 */
(FUNCTION_KEYS | 10), /* 0x44 - F10 */
SPECIAL, /* 0x45 - NumLock */
SPECIAL, /* 0x46 - ScrollLock */
'7', '8', '9', '-',
'4', '5', '6', '+',
'1', '2', '3',
'0', '.',
SPECIAL, /* 0x54 - Alt-SysRq */
SPECIAL, /* 0x55 - F11/F12/PF1/FN */
SPECIAL, /* 0x56 - unlabelled key next to LAlt */
(FUNCTION_KEYS | 11), /* 0x57 - F11 */
(FUNCTION_KEYS | 12), /* 0x58 - F12 */
SPECIAL, /* 0x59 */
SPECIAL, /* 0x5a */
SPECIAL, /* 0x5b */
SPECIAL, /* 0x5c */
SPECIAL, /* 0x5d */
SPECIAL, /* 0x5e */
SPECIAL, /* 0x5f */
SPECIAL, /* 0x60 */
SPECIAL, /* 0x61 */
SPECIAL, /* 0x62 */
SPECIAL, /* 0x63 */
SPECIAL, /* 0x64 */
SPECIAL, /* 0x65 */
SPECIAL, /* 0x66 */
SPECIAL, /* 0x67 */
SPECIAL, /* 0x68 */
SPECIAL, /* 0x69 */
SPECIAL, /* 0x6a */
SPECIAL, /* 0x6b */
SPECIAL, /* 0x6c */
SPECIAL, /* 0x6d */
SPECIAL, /* 0x6e */
SPECIAL, /* 0x6f */
SPECIAL, /* 0x70 */
SPECIAL, /* 0x71 */
SPECIAL, /* 0x72 */
SPECIAL, /* 0x73 */
SPECIAL, /* 0x74 */
SPECIAL, /* 0x75 */
SPECIAL, /* 0x76 */
SPECIAL, /* 0x77 */
SPECIAL, /* 0x78 */
SPECIAL, /* 0x79 */
SPECIAL, /* 0x7a */
SPECIAL, /* 0x7b */
SPECIAL, /* 0x7c */
SPECIAL, /* 0x7d */
SPECIAL, /* 0x7e */
SPECIAL, /* 0x7f */
};
 
/** Secondary meaning of scancodes. */
int sc_secondary_map[] = {
SPECIAL, /* 0x00 */
0x1b, /* 0x01 - Esc */
'!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+',
SPECIAL, /* 0x0e - Backspace */
'\t', 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}', '\n',
SPECIAL, /* 0x1d - LCtrl */
'A', 'S', 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"',
'~',
SPECIAL, /* 0x2a - LShift */
'|',
'Z', 'X', 'C', 'V', 'B', 'N', 'M', '<', '>', '?',
SPECIAL, /* 0x36 - RShift */
'*',
SPECIAL, /* 0x38 - LAlt */
' ',
SPECIAL, /* 0x3a - CapsLock */
SPECIAL, /* 0x3b - F1 */
SPECIAL, /* 0x3c - F2 */
SPECIAL, /* 0x3d - F3 */
SPECIAL, /* 0x3e - F4 */
SPECIAL, /* 0x3f - F5 */
SPECIAL, /* 0x40 - F6 */
SPECIAL, /* 0x41 - F7 */
SPECIAL, /* 0x42 - F8 */
SPECIAL, /* 0x43 - F9 */
SPECIAL, /* 0x44 - F10 */
SPECIAL, /* 0x45 - NumLock */
SPECIAL, /* 0x46 - ScrollLock */
'7', '8', '9', '-',
'4', '5', '6', '+',
'1', '2', '3',
'0', '.',
SPECIAL, /* 0x54 - Alt-SysRq */
SPECIAL, /* 0x55 - F11/F12/PF1/FN */
SPECIAL, /* 0x56 - unlabelled key next to LAlt */
SPECIAL, /* 0x57 - F11 */
SPECIAL, /* 0x58 - F12 */
SPECIAL, /* 0x59 */
SPECIAL, /* 0x5a */
SPECIAL, /* 0x5b */
SPECIAL, /* 0x5c */
SPECIAL, /* 0x5d */
SPECIAL, /* 0x5e */
SPECIAL, /* 0x5f */
SPECIAL, /* 0x60 */
SPECIAL, /* 0x61 */
SPECIAL, /* 0x62 */
SPECIAL, /* 0x63 */
SPECIAL, /* 0x64 */
SPECIAL, /* 0x65 */
SPECIAL, /* 0x66 */
SPECIAL, /* 0x67 */
SPECIAL, /* 0x68 */
SPECIAL, /* 0x69 */
SPECIAL, /* 0x6a */
SPECIAL, /* 0x6b */
SPECIAL, /* 0x6c */
SPECIAL, /* 0x6d */
SPECIAL, /* 0x6e */
SPECIAL, /* 0x6f */
SPECIAL, /* 0x70 */
SPECIAL, /* 0x71 */
SPECIAL, /* 0x72 */
SPECIAL, /* 0x73 */
SPECIAL, /* 0x74 */
SPECIAL, /* 0x75 */
SPECIAL, /* 0x76 */
SPECIAL, /* 0x77 */
SPECIAL, /* 0x78 */
SPECIAL, /* 0x79 */
SPECIAL, /* 0x7a */
SPECIAL, /* 0x7b */
SPECIAL, /* 0x7c */
SPECIAL, /* 0x7d */
SPECIAL, /* 0x7e */
SPECIAL, /* 0x7f */
};
 
/**
* @}
*/
/branches/network/uspace/srv/kbd/arch/ia32/include/kbd.h
0,0 → 1,76
/*
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdamd64 amd64
* @brief HelenOS ia32 / amd64 arch dependent parts of uspace keyboard and mouse handler.
* @ingroup kbd
* @{
*/
 
/** @file
* @ingroup kbdia32
*/
 
#ifndef KBD_ia32_KBD_H_
#define KBD_ia32_KBD_H_
 
#include <ddi.h>
#include <libarch/ddi.h>
 
#define i8042_DATA 0x60
#define i8042_STATUS 0X64
 
 
typedef unsigned char u8;
typedef short u16;
 
static inline void i8042_data_write(u8 data)
{
outb(i8042_DATA, data);
}
 
static inline u8 i8042_data_read(void)
{
return inb(i8042_DATA);
}
 
static inline u8 i8042_status_read(void)
{
return inb(i8042_STATUS);
}
 
static inline void i8042_command_write(u8 command)
{
outb(i8042_STATUS, command);
}
 
#endif
 
/**
* @}
*/
/branches/network/uspace/srv/kbd/arch/ia32/include/scanc.h
0,0 → 1,59
/*
* Copyright (c) 2001-2004 Jakub Jermar
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdia32
* @{
*/
/** @file
* @ingroup kbdamd64
*/
 
#ifndef KBD_ia32_SCANC_H_
#define KBD_ia32_SCANC_H_
 
/** Scancodes. */
#define SC_ESC 0x01
#define SC_BACKSPACE 0x0e
#define SC_LSHIFT 0x2a
#define SC_RSHIFT 0x36
#define SC_CAPSLOCK 0x3a
#define SC_SPEC_ESCAPE 0xe0
#define SC_LEFTARR 0x4b
#define SC_RIGHTARR 0x4d
#define SC_UPARR 0x48
#define SC_DOWNARR 0x50
#define SC_DELETE 0x53
#define SC_HOME 0x47
#define SC_END 0x4f
 
#endif
 
/**
* @}
*/
/branches/network/uspace/srv/kbd/arch/sparc64/src/kbd.c
0,0 → 1,117
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdsparc64 sparc64
* @brief HelenOS sparc64 arch dependent parts of uspace keyboard handler.
* @ingroup kbd
* @{
*/
/** @file
*/
 
#include <arch/kbd.h>
#include <ipc/ipc.h>
#include <sysinfo.h>
#include <kbd.h>
#include <keys.h>
#include <stdio.h>
#include <sys/types.h>
#include <genarch/kbd.h>
 
#define KBD_KEY_RELEASE 0x80
#define KBD_ALL_KEYS_UP 0x7f
 
/** Top-half pseudocode for z8530. */
irq_cmd_t z8530_cmds[] = {
{
CMD_MEM_READ_1,
0, /**< Address. Will be patched in run-time. */
0, /**< Value. Not used. */
1 /**< Arg 1 will contain the result. */
}
};
irq_code_t z8530_kbd = {
1,
z8530_cmds
};
 
/** Top-half pseudocode for ns16550. */
irq_cmd_t ns16550_cmds[] = {
{
CMD_MEM_READ_1,
0, /**< Address. Will be patched in run-time. */
0, /**< Value. Not used. */
1 /**< Arg 1 will contain the result. */
}
};
irq_code_t ns16550_kbd = {
1,
ns16550_cmds
};
 
#define KBD_Z8530 1
#define KBD_NS16550 2
 
int kbd_arch_init(void)
{
int type = sysinfo_value("kbd.type");
switch (type) {
case KBD_Z8530:
z8530_cmds[0].addr = (void *) sysinfo_value("kbd.address.virtual") + 6;
ipc_register_irq(sysinfo_value("kbd.inr"), sysinfo_value("kbd.devno"), 0, &z8530_kbd);
break;
case KBD_NS16550:
ns16550_cmds[0].addr = (void *) sysinfo_value("kbd.address.virtual");
ipc_register_irq(sysinfo_value("kbd.inr"), sysinfo_value("kbd.devno"), 0, &ns16550_kbd);
break;
default:
break;
}
return 0;
}
 
/** Process keyboard events */
int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
{
int scan_code = IPC_GET_ARG1(*call);
 
if (scan_code == KBD_ALL_KEYS_UP)
return 1;
if (scan_code & KBD_KEY_RELEASE)
key_released(keybuffer, scan_code ^ KBD_KEY_RELEASE);
else
key_pressed(keybuffer, scan_code);
 
return 1;
}
 
/** @}
*/
/branches/network/uspace/srv/kbd/arch/sparc64/src/scanc.c
0,0 → 1,304
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
* @brief Scan codes for Sun keyboards.
*/
 
#include <genarch/scanc.h>
 
/** Primary meaning of scancodes. */
int sc_primary_map[] = {
[0x00] = SPECIAL,
[0x01] = SPECIAL,
[0x02] = SPECIAL,
[0x03] = SPECIAL,
[0x04] = SPECIAL,
[0x05] = FUNCTION_KEYS + 1, /* F1 */
[0x06] = FUNCTION_KEYS + 2, /* F2 */
[0x07] = FUNCTION_KEYS + 10, /* F10 */
[0x08] = FUNCTION_KEYS + 3, /* F3 */
[0x09] = FUNCTION_KEYS + 11, /* F11 */
[0x0a] = FUNCTION_KEYS + 4, /* F4 */
[0x0b] = FUNCTION_KEYS + 12, /* F12 */
[0x0c] = FUNCTION_KEYS + 5, /* F5 */
[0x0d] = SPECIAL, /* RAlt */
[0x0e] = FUNCTION_KEYS + 6, /* F6 */
[0x0f] = SPECIAL,
[0x10] = FUNCTION_KEYS + 7, /* F7 */
[0x11] = FUNCTION_KEYS + 8, /* F8 */
[0x12] = FUNCTION_KEYS + 9, /* F9 */
[0x13] = SPECIAL, /* LAlt */
[0x14] = SPECIAL, /* Up Arrow */
[0x15] = SPECIAL, /* Pause */
[0x16] = SPECIAL,
[0x17] = SPECIAL, /* Scroll Lock */
[0x18] = SPECIAL, /* Left Arrow */
[0x19] = SPECIAL,
[0x1a] = SPECIAL,
[0x1b] = SPECIAL, /* Down Arrow */
[0x1c] = SPECIAL, /* Right Arrow */
[0x1d] = SPECIAL, /* Esc */
[0x1e] = '1',
[0x1f] = '2',
[0x20] = '3',
[0x21] = '4',
[0x22] = '5',
[0x23] = '6',
[0x24] = '7',
[0x25] = '8',
[0x26] = '9',
[0x27] = '0',
[0x28] = '-',
[0x29] = '=',
[0x2a] = '`',
[0x2b] = '\b', /* Backspace */
[0x2c] = SPECIAL, /* Insert */
[0x2d] = SPECIAL,
[0x2e] = '/', /* numeric keypad */
[0x2f] = '*', /* numeric keypad */
[0x30] = SPECIAL,
[0x31] = SPECIAL,
[0x32] = '.', /* numeric keypad */
[0x33] = SPECIAL,
[0x34] = SPECIAL, /* Home */
[0x35] = '\t', /* Tab */
[0x36] = 'q',
[0x37] = 'w',
[0x38] = 'e',
[0x39] = 'r',
[0x3a] = 't',
[0x3b] = 'y',
[0x3c] = 'u',
[0x3d] = 'i',
[0x3e] = 'o',
[0x3f] = 'p',
[0x40] = '[',
[0x41] = ']',
[0x42] = SPECIAL, /* Del */
[0x43] = SPECIAL,
[0x44] = '7', /* numeric keypad */
[0x45] = '8', /* numeric keypad */
[0x46] = '9', /* numeric keypad */
[0x47] = '-', /* numeric keypad */
[0x48] = SPECIAL,
[0x49] = SPECIAL,
[0x4a] = SPECIAL, /* End */
[0x4b] = SPECIAL,
[0x4c] = SPECIAL, /* Control */
[0x4d] = 'a',
[0x4e] = 's',
[0x4f] = 'd',
[0x50] = 'f',
[0x51] = 'g',
[0x52] = 'h',
[0x53] = 'j',
[0x54] = 'k',
[0x55] = 'l',
[0x56] = ';',
[0x57] = '\'',
[0x58] = '\\',
[0x59] = '\n', /* Enter */
[0x5a] = '\n', /* Enter on numeric keypad */
[0x5b] = '4', /* numeric keypad */
[0x5c] = '5', /* numeric keypad */
[0x5d] = '6', /* numeric keypad */
[0x5e] = '0', /* numeric keypad */
[0x5f] = SPECIAL,
[0x60] = SPECIAL, /* Page Up */
[0x61] = SPECIAL,
[0x62] = SPECIAL, /* Num Lock */
[0x63] = SPECIAL, /* LShift */
[0x64] = 'z',
[0x65] = 'x',
[0x66] = 'c',
[0x67] = 'v',
[0x68] = 'b',
[0x69] = 'n',
[0x6a] = 'm',
[0x6b] = ',',
[0x6c] = '.',
[0x6d] = '/',
[0x6e] = SPECIAL, /* RShift */
[0x6f] = SPECIAL,
[0x70] = '1', /* numeric keypad */
[0x71] = '2', /* numeric keypad */
[0x72] = '3', /* numeric keypad */
[0x73] = SPECIAL,
[0x74] = SPECIAL,
[0x75] = SPECIAL,
[0x76] = SPECIAL,
[0x77] = SPECIAL, /* Caps Lock */
[0x78] = SPECIAL,
[0x79] = ' ',
[0x7a] = SPECIAL,
[0x7b] = SPECIAL, /* Page Down */
[0x7c] = SPECIAL,
[0x7d] = '+', /* numeric key pad */
[0x7e] = SPECIAL,
[0x7f] = SPECIAL
};
 
/** Secondary meaning of scancodes. */
int sc_secondary_map[] = {
[0x00] = SPECIAL,
[0x01] = SPECIAL,
[0x02] = SPECIAL,
[0x03] = SPECIAL,
[0x04] = SPECIAL,
[0x05] = SPECIAL, /* F1 */
[0x06] = SPECIAL, /* F2 */
[0x07] = SPECIAL, /* F10 */
[0x08] = SPECIAL, /* F3 */
[0x09] = SPECIAL, /* F11 */
[0x0a] = SPECIAL, /* F4 */
[0x0b] = SPECIAL, /* F12 */
[0x0c] = SPECIAL, /* F5 */
[0x0d] = SPECIAL, /* RAlt */
[0x0e] = SPECIAL, /* F6 */
[0x0f] = SPECIAL,
[0x10] = SPECIAL, /* F7 */
[0x11] = SPECIAL, /* F8 */
[0x12] = SPECIAL, /* F9 */
[0x13] = SPECIAL, /* LAlt */
[0x14] = SPECIAL, /* Up Arrow */
[0x15] = SPECIAL, /* Pause */
[0x16] = SPECIAL,
[0x17] = SPECIAL, /* Scroll Lock */
[0x18] = SPECIAL, /* Left Arrow */
[0x19] = SPECIAL,
[0x1a] = SPECIAL,
[0x1b] = SPECIAL, /* Down Arrow */
[0x1c] = SPECIAL, /* Right Arrow */
[0x1d] = SPECIAL, /* Esc */
[0x1e] = '!',
[0x1f] = '@',
[0x20] = '#',
[0x21] = '$',
[0x22] = '%',
[0x23] = '^',
[0x24] = '&',
[0x25] = '*',
[0x26] = '(',
[0x27] = ')',
[0x28] = '_',
[0x29] = '+',
[0x2a] = '~',
[0x2b] = SPECIAL, /* Backspace */
[0x2c] = SPECIAL, /* Insert */
[0x2d] = SPECIAL,
[0x2e] = '/', /* numeric keypad */
[0x2f] = '*', /* numeric keypad */
[0x30] = SPECIAL,
[0x31] = SPECIAL,
[0x32] = '.', /* numeric keypad */
[0x33] = SPECIAL,
[0x34] = SPECIAL, /* Home */
[0x35] = SPECIAL, /* Tab */
[0x36] = 'Q',
[0x37] = 'W',
[0x38] = 'E',
[0x39] = 'R',
[0x3a] = 'T',
[0x3b] = 'Y',
[0x3c] = 'U',
[0x3d] = 'I',
[0x3e] = 'O',
[0x3f] = 'P',
[0x40] = '{',
[0x41] = '}',
[0x42] = SPECIAL, /* Del */
[0x43] = SPECIAL,
[0x44] = '7', /* numeric keypad */
[0x45] = '8', /* numeric keypad */
[0x46] = '9', /* numeric keypad */
[0x47] = '-', /* numeric keypad */
[0x48] = SPECIAL,
[0x49] = SPECIAL,
[0x4a] = SPECIAL, /* End */
[0x4b] = SPECIAL,
[0x4c] = SPECIAL, /* Control */
[0x4d] = 'A',
[0x4e] = 'S',
[0x4f] = 'D',
[0x50] = 'F',
[0x51] = 'G',
[0x52] = 'H',
[0x53] = 'J',
[0x54] = 'K',
[0x55] = 'L',
[0x56] = ':',
[0x57] = '"',
[0x58] = '|',
[0x59] = SPECIAL, /* Enter */
[0x5a] = SPECIAL, /* Enter on numeric keypad */
[0x5b] = '4', /* numeric keypad */
[0x5c] = '5', /* numeric keypad */
[0x5d] = '6', /* numeric keypad */
[0x5e] = '0', /* numeric keypad */
[0x5f] = SPECIAL,
[0x60] = SPECIAL, /* Page Up */
[0x61] = SPECIAL,
[0x62] = SPECIAL, /* Num Lock */
[0x63] = SPECIAL, /* LShift */
[0x64] = 'Z',
[0x65] = 'X',
[0x66] = 'C',
[0x67] = 'V',
[0x68] = 'B',
[0x69] = 'N',
[0x6a] = 'M',
[0x6b] = '<',
[0x6c] = '>',
[0x6d] = '?',
[0x6e] = SPECIAL, /* RShift */
[0x6f] = SPECIAL,
[0x70] = '1', /* numeric keypad */
[0x71] = '2', /* numeric keypad */
[0x72] = '3', /* numeric keypad */
[0x73] = SPECIAL,
[0x74] = SPECIAL,
[0x75] = SPECIAL,
[0x76] = SPECIAL,
[0x77] = SPECIAL, /* Caps Lock */
[0x78] = SPECIAL,
[0x79] = ' ',
[0x7a] = SPECIAL,
[0x7b] = SPECIAL, /* Page Down */
[0x7c] = SPECIAL,
[0x7d] = '+', /* numeric key pad */
[0x7e] = SPECIAL,
[0x7f] = SPECIAL
};
 
/** @}
*/
/branches/network/uspace/srv/kbd/arch/sparc64/include/kbd.h
0,0 → 1,43
/*
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdsparc64 sparc64
* @brief HelenOS sparc64 arch dependent parts of uspace keyboard handler.
* @ingroup kbd
* @{
*/
/** @file
*/
 
#ifndef KBD_sparc64_KBD_H_
#define KBD_sparc64_KBD_H_
 
#endif
 
/** @}
*/
/branches/network/uspace/srv/kbd/arch/sparc64/include/scanc.h
0,0 → 1,57
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
* @brief Scan codes for sun keyboards.
*/
 
#ifndef KBD_SCANC_SUN_H_
#define KBD_SCANC_SUN_H_
 
#define SC_ESC 0x1d
#define SC_BACKSPACE 0x2b
#define SC_LSHIFT 0x63
#define SC_RSHIFT 0x6e
#define SC_CAPSLOCK 0x77
#define SC_SPEC_ESCAPE 0xe0 /* ??? */
#define SC_LEFTARR 0x18
#define SC_RIGHTARR 0x1c
#define SC_UPARR 0x14
#define SC_DOWNARR 0x1b
#define SC_DELETE 0x42
#define SC_HOME 0x34
#define SC_END 0x4a
 
#endif
 
/** @}
*/
/branches/network/uspace/srv/kbd/arch/arm32/include/kbd.h
0,0 → 1,42
/*
* Copyright (c) 2007 Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdarm32
* @{
*/
/** @file
* @brief Empty.
*/
 
#ifndef KBD_arm32_KBD_H_
#define KBD_arm32_KBD_H_
 
#endif
 
/** @}
*/
/branches/network/uspace/srv/kbd/arch/arm32/src/kbd.c
0,0 → 1,40
/*
* Copyright (c) 2007 Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdarm32 arm32
* @brief HelenOS arm32 arch dependent parts of uspace keyboard handler.
* @ingroup kbd
* @{
*/
/** @file
* @brief Empty, required by generic Makefile.
*/
 
 
/** @}
*/
/branches/network/uspace/srv/kbd/arch/arm32/src/kbd_gxemul.c
0,0 → 1,424
/*
* Copyright (c) 2007 Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdarm32gxemul GXemul
* @brief HelenOS arm32 GXEmul uspace keyboard handler.
* @ingroup kbdarm32
* @{
*/
/** @file
* @brief GXemul uspace keyboard handler.
*/
 
#include <ipc/ipc.h>
#include <sysinfo.h>
#include <kbd.h>
#include <keys.h>
#include <bool.h>
 
 
/* GXemul key codes in no-framebuffer mode. */
#define GXEMUL_KEY_F1 0x504f1bL
#define GXEMUL_KEY_F2 0x514f1bL
#define GXEMUL_KEY_F3 0x524f1bL
#define GXEMUL_KEY_F4 0x534f1bL
#define GXEMUL_KEY_F5 0x35315b1bL
#define GXEMUL_KEY_F6 0x37315b1bL
#define GXEMUL_KEY_F7 0x38315b1bL
#define GXEMUL_KEY_F8 0x39315b1bL
#define GXEMUL_KEY_F9 0x30325b1bL
#define GXEMUL_KEY_F10 0x31325b1bL
#define GXEMUL_KEY_F11 0x33325d1bL
#define GXEMUL_KEY_F12 0x34325b1bL
 
/** Start code of F5-F12 keys. */
#define GXEMUL_KEY_F5_F12_START_CODE 0x7e
 
/* GXemul key codes in framebuffer mode. */
#define GXEMUL_FB_KEY_F1 0x504f5b1bL
#define GXEMUL_FB_KEY_F2 0x514f5b1bL
#define GXEMUL_FB_KEY_F3 0x524f5b1bL
#define GXEMUL_FB_KEY_F4 0x534f5b1bL
#define GXEMUL_FB_KEY_F5 0x35315b1bL
#define GXEMUL_FB_KEY_F6 0x37315b1bL
#define GXEMUL_FB_KEY_F7 0x38315b1bL
#define GXEMUL_FB_KEY_F8 0x39315b1bL
#define GXEMUL_FB_KEY_F9 0x38325b1bL
#define GXEMUL_FB_KEY_F10 0x39325b1bL
#define GXEMUL_FB_KEY_F11 0x33325b1bL
#define GXEMUL_FB_KEY_F12 0x34325b1bL
 
 
/** Function keys start code (F1=0x101) */
#define FUNCTION_KEYS 0x100
 
static irq_cmd_t gxemul_cmds[] = {
{
CMD_MEM_READ_1,
(void *) 0,
0,
2
}
};
 
static irq_code_t gxemul_kbd = {
1,
gxemul_cmds
};
 
 
/** Framebuffer switched on. */
static bool fb;
 
 
/*
// Please preserve this code (it can be used to determine scancodes)
int to_hex(int v)
{
return "0123456789ABCDEF"[v];
}
*/
 
 
/** Process data sent when a key is pressed (in no-framebuffer mode).
*
* @param keybuffer Buffer of pressed key.
* @param scan_code Scan code.
*
* @return Always 1.
*/
static int gxemul_kbd_process_no_fb(keybuffer_t *keybuffer, int scan_code)
{
// holds at most 4 latest scan codes
static unsigned long buf = 0;
 
// number of scan codes in #buf
static int count = 0;
 
/*
// Preserve for detecting scan codes.
keybuffer_push(keybuffer, to_hex((scan_code>>4)&0xf));
keybuffer_push(keybuffer, to_hex(scan_code&0xf));
keybuffer_push(keybuffer, 'X');
keybuffer_push(keybuffer, 'Y');
return 1;
*/
 
if (scan_code == '\r') {
scan_code = '\n';
}
if (scan_code == GXEMUL_KEY_F5_F12_START_CODE) {
switch (buf) {
case GXEMUL_KEY_F5:
keybuffer_push(keybuffer,FUNCTION_KEYS | 5);
buf = count = 0;
return 1;
case GXEMUL_KEY_F6:
keybuffer_push(keybuffer,FUNCTION_KEYS | 6);
buf = count = 0;
return 1;
case GXEMUL_KEY_F7:
keybuffer_push(keybuffer,FUNCTION_KEYS | 7);
buf = count = 0;
return 1;
case GXEMUL_KEY_F8:
keybuffer_push(keybuffer,FUNCTION_KEYS | 8);
buf = count = 0;
return 1;
case GXEMUL_KEY_F9:
keybuffer_push(keybuffer,FUNCTION_KEYS | 9);
buf = count = 0;
return 1;
case GXEMUL_KEY_F10:
keybuffer_push(keybuffer,FUNCTION_KEYS | 10);
buf = count = 0;
return 1;
case GXEMUL_KEY_F11:
keybuffer_push(keybuffer,FUNCTION_KEYS | 11);
buf = count = 0;
return 1;
case GXEMUL_KEY_F12:
keybuffer_push(keybuffer,FUNCTION_KEYS | 12);
buf = count = 0;
return 1;
default:
keybuffer_push(keybuffer, buf & 0xff);
keybuffer_push(keybuffer, (buf >> 8) & 0xff);
keybuffer_push(keybuffer, (buf >> 16) & 0xff);
keybuffer_push(keybuffer, (buf >> 24) & 0xff);
keybuffer_push(keybuffer, scan_code);
buf = count = 0;
return 1;
}
}
 
// add to buffer
buf |= ((unsigned long) scan_code) << (8 * (count++));
if ((buf & 0xff) != (GXEMUL_KEY_F1 & 0xff)) {
keybuffer_push(keybuffer, buf);
buf = count = 0;
return 1;
}
 
if (count <= 1) {
return 1;
}
 
if ((buf & 0xffff) != (GXEMUL_KEY_F1 & 0xffff)
&& (buf & 0xffff) != (GXEMUL_KEY_F5 & 0xffff) ) {
 
keybuffer_push(keybuffer, buf & 0xff);
keybuffer_push(keybuffer, (buf >> 8) &0xff);
buf = count = 0;
return 1;
}
 
if (count <= 2) {
return 1;
}
 
switch (buf) {
case GXEMUL_KEY_F1:
keybuffer_push(keybuffer,FUNCTION_KEYS | 1);
buf = count = 0;
return 1;
case GXEMUL_KEY_F2:
keybuffer_push(keybuffer,FUNCTION_KEYS | 2);
buf = count = 0;
return 1;
case GXEMUL_KEY_F3:
keybuffer_push(keybuffer,FUNCTION_KEYS | 3);
buf = count = 0;
return 1;
case GXEMUL_KEY_F4:
keybuffer_push(keybuffer,FUNCTION_KEYS | 4);
buf = count = 0;
return 1;
}
 
 
if ((buf & 0xffffff) != (GXEMUL_KEY_F5 & 0xffffff)
&& (buf & 0xffffff) != (GXEMUL_KEY_F9 & 0xffffff)) {
 
keybuffer_push(keybuffer, buf & 0xff);
keybuffer_push(keybuffer, (buf >> 8) & 0xff);
keybuffer_push(keybuffer, (buf >> 16) & 0xff);
buf = count = 0;
return 1;
}
 
if (count <= 3) {
return 1;
}
switch (buf) {
case GXEMUL_KEY_F5:
case GXEMUL_KEY_F6:
case GXEMUL_KEY_F7:
case GXEMUL_KEY_F8:
case GXEMUL_KEY_F9:
case GXEMUL_KEY_F10:
case GXEMUL_KEY_F11:
case GXEMUL_KEY_F12:
return 1;
default:
keybuffer_push(keybuffer, buf & 0xff);
keybuffer_push(keybuffer, (buf >> 8) & 0xff);
keybuffer_push(keybuffer, (buf >> 16) & 0xff);
keybuffer_push(keybuffer, (buf >> 24) & 0xff);
buf = count = 0;
return 1;
}
 
return 1;
}
 
 
/** Process data sent when a key is pressed (in framebuffer mode).
*
* @param keybuffer Buffer of pressed keys.
* @param scan_code Scan code.
*
* @return Always 1.
*/
static int gxemul_kbd_process_fb(keybuffer_t *keybuffer, int scan_code)
{
// holds at most 4 latest scan codes
static unsigned long buf = 0;
 
// number of scan codes in #buf
static int count = 0;
 
/*
// Please preserve this code (it can be used to determine scancodes)
keybuffer_push(keybuffer, to_hex((scan_code>>4)&0xf));
keybuffer_push(keybuffer, to_hex(scan_code&0xf));
keybuffer_push(keybuffer, ' ');
keybuffer_push(keybuffer, ' ');
return 1;
*/
if (scan_code == '\r') {
scan_code = '\n';
}
// add to buffer
buf |= ((unsigned long) scan_code) << (8*(count++));
if ((buf & 0xff) != (GXEMUL_FB_KEY_F1 & 0xff)) {
keybuffer_push(keybuffer, buf);
buf = count = 0;
return 1;
}
 
if (count <= 1) {
return 1;
}
 
if ((buf & 0xffff) != (GXEMUL_FB_KEY_F1 & 0xffff)) {
keybuffer_push(keybuffer, buf & 0xff);
keybuffer_push(keybuffer, (buf >> 8) &0xff);
buf = count = 0;
return 1;
}
 
if (count <= 2) {
return 1;
}
 
if ((buf & 0xffffff) != (GXEMUL_FB_KEY_F1 & 0xffffff)
&& (buf & 0xffffff) != (GXEMUL_FB_KEY_F5 & 0xffffff)
&& (buf & 0xffffff) != (GXEMUL_FB_KEY_F9 & 0xffffff)) {
 
keybuffer_push(keybuffer, buf & 0xff);
keybuffer_push(keybuffer, (buf >> 8) & 0xff);
keybuffer_push(keybuffer, (buf >> 16) & 0xff);
buf = count = 0;
return 1;
}
 
if (count <= 3) {
return 1;
}
 
switch (buf) {
case GXEMUL_FB_KEY_F1:
keybuffer_push(keybuffer,FUNCTION_KEYS | 1 );
buf = count = 0;
return 1;
case GXEMUL_FB_KEY_F2:
keybuffer_push(keybuffer,FUNCTION_KEYS | 2 );
buf = count = 0;
return 1;
case GXEMUL_FB_KEY_F3:
keybuffer_push(keybuffer,FUNCTION_KEYS | 3 );
buf = count = 0;
return 1;
case GXEMUL_FB_KEY_F4:
keybuffer_push(keybuffer,FUNCTION_KEYS | 4 );
buf = count = 0;
return 1;
case GXEMUL_FB_KEY_F5:
keybuffer_push(keybuffer,FUNCTION_KEYS | 5 );
buf = count = 0;
return 1;
case GXEMUL_FB_KEY_F6:
keybuffer_push(keybuffer,FUNCTION_KEYS | 6 );
buf = count = 0;
return 1;
case GXEMUL_FB_KEY_F7:
keybuffer_push(keybuffer,FUNCTION_KEYS | 7 );
buf = count = 0;
return 1;
case GXEMUL_FB_KEY_F8:
keybuffer_push(keybuffer,FUNCTION_KEYS | 8 );
buf = count = 0;
return 1;
case GXEMUL_FB_KEY_F9:
keybuffer_push(keybuffer,FUNCTION_KEYS | 9 );
buf = count = 0;
return 1;
case GXEMUL_FB_KEY_F10:
keybuffer_push(keybuffer,FUNCTION_KEYS | 10 );
buf = count = 0;
return 1;
case GXEMUL_FB_KEY_F11:
keybuffer_push(keybuffer,FUNCTION_KEYS | 11 );
buf = count = 0;
return 1;
case GXEMUL_FB_KEY_F12:
keybuffer_push(keybuffer,FUNCTION_KEYS | 12 );
buf = count = 0;
return 1;
default:
keybuffer_push(keybuffer, buf & 0xff );
keybuffer_push(keybuffer, (buf >> 8) & 0xff);
keybuffer_push(keybuffer, (buf >> 16) & 0xff);
keybuffer_push(keybuffer, (buf >> 24) & 0xff);
buf = count = 0;
return 1;
}
 
return 1;
}
 
 
/** Initializes keyboard handler. */
int kbd_arch_init(void)
{
fb = (sysinfo_value("fb.kind") == 1);
gxemul_cmds[0].addr = (void *) sysinfo_value("kbd.address.virtual");
ipc_register_irq(sysinfo_value("kbd.inr"), sysinfo_value("kbd.devno"), 0, &gxemul_kbd);
return 0;
}
 
 
/** Process data sent when a key is pressed.
*
* @param keybuffer Buffer of pressed keys.
* @param call IPC call.
*
* @return Always 1.
*/
int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
{
int scan_code = IPC_GET_ARG2(*call);
 
if (fb) {
return gxemul_kbd_process_fb(keybuffer, scan_code);
} else {
return gxemul_kbd_process_no_fb(keybuffer, scan_code);
}
 
}
 
/** @}
*/
/branches/network/uspace/srv/kbd/arch/ia64/include/kbd.h
0,0 → 1,44
/*
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdia64 ia64
* @brief HelenOS ia64 arch dependent parts of uspace keyboard handler.
* @ingroup kbd
* @{
*/
/** @file
*/
 
#ifndef KBD_ia64_KBD_H_
#define KBD_ia64_KBD_H_
 
#endif
 
/**
* @}
*/
/branches/network/uspace/srv/kbd/arch/ia64/src/kbd.c
0,0 → 1,164
/*
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdia64 ia64
* @brief HelenOS ia64 arch dependent parts of uspace keyboard handler.
* @ingroup kbd
* @{
*/
/** @file
*/
 
#include <arch/kbd.h>
#include <ipc/ipc.h>
#include <sysinfo.h>
#include <kbd.h>
#include <keys.h>
 
#define KEY_F1 0x504f1b
#define KEY_F2 0x514f1b
#define KEY_F3 0x524f1b
#define KEY_F4 0x534f1b
#define KEY_F5 0x7e35315b1b
#define KEY_F6 0x7e37315b1b
#define KEY_F7 0x7e38315b1b
#define KEY_F8 0x7e39315b1b
#define KEY_F9 0x7e30325b1b
#define KEY_F10 0x7e31325b1b
#define KEY_F11 0x7e33325b1b
#define KEY_F12 0x7e34325b1b
 
#define FUNCTION_KEYS 0x100
 
irq_cmd_t ski_cmds[1] = {
{ CMD_IA64_GETCHAR, 0, 0, 2 }
};
 
irq_code_t ski_kbd = {
1,
ski_cmds
};
 
int kbd_arch_init(void)
{
if (sysinfo_value("kbd")) {
ipc_register_irq(sysinfo_value("kbd.inr"), sysinfo_value("kbd.devno"), 0, &ski_kbd);
return 0;
}
return 1;
}
 
/*
* Please preserve this code (it can be used to determine scancodes)
*
int to_hex(int v)
{
return "0123456789ABCDEF"[v];
}
*/
 
int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
{
static unsigned long long buf = 0;
static int count = 0;
static int esc_count = 0;
int scan_code = IPC_GET_ARG2(*call);
 
/*
* Please preserve this code (it can be used to determine scancodes)
*/
//keybuffer_push(keybuffer, to_hex((scan_code>>4)&0xf));
//keybuffer_push(keybuffer, to_hex(scan_code&0xf));
//keybuffer_push(keybuffer, ' ');
//keybuffer_push(keybuffer, ' ');
//*/
if (scan_code) {
buf |= (unsigned long long) scan_code<<(8*(count++));
} else {
if (buf == 0x1b) {
esc_count++;
if (esc_count == 3) {
__SYSCALL0(SYS_DEBUG_ENABLE_CONSOLE);
}
} else {
esc_count = 0;
}
if (!(buf & 0xff00)) {
keybuffer_push(keybuffer, buf);
} else {
switch (buf) {
case KEY_F1:
keybuffer_push(keybuffer, FUNCTION_KEYS | 1);
break;
case KEY_F2:
keybuffer_push(keybuffer, FUNCTION_KEYS | 2);
break;
case KEY_F3:
keybuffer_push(keybuffer, FUNCTION_KEYS | 3);
break;
case KEY_F4:
keybuffer_push(keybuffer, FUNCTION_KEYS | 4);
break;
case KEY_F5:
keybuffer_push(keybuffer, FUNCTION_KEYS | 5);
break;
case KEY_F6:
keybuffer_push(keybuffer, FUNCTION_KEYS | 6);
break;
case KEY_F7:
keybuffer_push(keybuffer, FUNCTION_KEYS | 7);
break;
case KEY_F8:
keybuffer_push(keybuffer, FUNCTION_KEYS | 8);
break;
case KEY_F9:
keybuffer_push(keybuffer, FUNCTION_KEYS | 9);
break;
case KEY_F10:
keybuffer_push(keybuffer, FUNCTION_KEYS | 10);
break;
case KEY_F11:
keybuffer_push(keybuffer, FUNCTION_KEYS | 11);
break;
case KEY_F12:
keybuffer_push(keybuffer, FUNCTION_KEYS | 12);
break;
}
}
buf = count = 0;
}
 
return 1;
}
 
/**
* @}
*/
/branches/network/uspace/srv/kbd/arch/ppc32/include/kbd.h
0,0 → 1,44
/*
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdppc32 ppc32
* @brief HelenOS ppc32 arch dependent parts of uspace keyboard handler.
* @ingroup kbd
* @{
*/
/** @file
*/
 
#ifndef KBD_ppc32_KBD_H_
#define KBD_ppc32_KBD_H_
 
#endif
 
/** @}
*/
 
/branches/network/uspace/srv/kbd/arch/ppc32/src/kbd.c
0,0 → 1,209
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdppc32 ppc32
* @brief HelenOS ppc32 arch dependent parts of uspace keyboard handler.
* @ingroup kbd
* @{
*/
/** @file
*/
 
#include <arch/kbd.h>
#include <ipc/ipc.h>
#include <sysinfo.h>
#include <kbd.h>
#include <keys.h>
 
irq_cmd_t cuda_cmds[1] = {
{ CMD_PPC32_GETCHAR, 0, 0, 2 }
};
 
irq_code_t cuda_kbd = {
1,
cuda_cmds
};
 
 
#define SPECIAL 255
#define FUNCTION_KEYS 0x100
 
 
static int lchars[0x80] = {
'a',
's',
'd',
'f',
'h',
'g',
'z',
'x',
'c',
'v',
SPECIAL,
'b',
'q',
'w',
'e',
'r',
'y',
't',
'1',
'2',
'3',
'4',
'6',
'5',
'=',
'9',
'7',
'-',
'8',
'0',
']',
'o',
'u',
'[',
'i',
'p',
'\n', /* Enter */
'l',
'j',
'\'',
'k',
';',
'\\',
',',
'/',
'n',
'm',
'.',
'\t', /* Tab */
' ',
'`',
'\b', /* Backspace */
SPECIAL,
SPECIAL, /* Escape */
SPECIAL, /* Ctrl */
SPECIAL, /* Alt */
SPECIAL, /* Shift */
SPECIAL, /* Caps-Lock */
SPECIAL, /* RAlt */
SPECIAL, /* Left */
SPECIAL, /* Right */
SPECIAL, /* Down */
SPECIAL, /* Up */
SPECIAL,
SPECIAL,
'.', /* Keypad . */
SPECIAL,
'*', /* Keypad * */
SPECIAL,
'+', /* Keypad + */
SPECIAL,
SPECIAL, /* NumLock */
SPECIAL,
SPECIAL,
SPECIAL,
'/', /* Keypad / */
'\n', /* Keypad Enter */
SPECIAL,
'-', /* Keypad - */
SPECIAL,
SPECIAL,
SPECIAL,
'0', /* Keypad 0 */
'1', /* Keypad 1 */
'2', /* Keypad 2 */
'3', /* Keypad 3 */
'4', /* Keypad 4 */
'5', /* Keypad 5 */
'6', /* Keypad 6 */
'7', /* Keypad 7 */
SPECIAL,
'8', /* Keypad 8 */
'9', /* Keypad 9 */
SPECIAL,
SPECIAL,
SPECIAL,
(FUNCTION_KEYS | 5), /* F5 */
(FUNCTION_KEYS | 6), /* F6 */
(FUNCTION_KEYS | 7), /* F7 */
(FUNCTION_KEYS | 3), /* F3 */
(FUNCTION_KEYS | 8), /* F8 */
(FUNCTION_KEYS | 9), /* F9 */
SPECIAL,
(FUNCTION_KEYS | 11), /* F11 */
SPECIAL,
(FUNCTION_KEYS | 13), /* F13 */
SPECIAL,
SPECIAL, /* ScrollLock */
SPECIAL,
(FUNCTION_KEYS | 10), /* F10 */
SPECIAL,
(FUNCTION_KEYS | 12), /* F12 */
SPECIAL,
SPECIAL, /* Pause */
SPECIAL, /* Insert */
SPECIAL, /* Home */
SPECIAL, /* PageUp */
SPECIAL, /* Delete */
(FUNCTION_KEYS | 4), /* F4 */
SPECIAL, /* End */
(FUNCTION_KEYS | 2), /* F2 */
SPECIAL, /* PageDown */
(FUNCTION_KEYS | 1) /* F1 */
};
 
 
int kbd_arch_init(void)
{
return ipc_register_irq(sysinfo_value("kbd.inr"), sysinfo_value("kbd.devno"), 0, &cuda_kbd);
}
 
 
int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
{
int param = IPC_GET_ARG2(*call);
 
if (param != -1) {
uint8_t scancode = (uint8_t) param;
if ((scancode & 0x80) != 0x80) {
int key = lchars[scancode & 0x7f];
if (key != SPECIAL)
keybuffer_push(keybuffer, key);
}
}
return 1;
}
 
/** @}
*/
/branches/network/uspace/srv/kbd/arch/ppc64/include/kbd.h
0,0 → 1,43
/*
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdppc64 ppc64
* @brief HelenOS ppc64 arch dependent parts of uspace keyboard handler.
* @ingroup kbd
* @{
*/
/** @file
*/
 
#ifndef KBD_ppc64_KBD_H_
#define KBD_ppc64_KBD_H_
 
#endif
 
/** @}
*/
/branches/network/uspace/srv/kbd/arch/ppc64/src/kbd.c
0,0 → 1,56
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdppc64 ppc64
* @brief HelenOS ppc64 arch dependent parts of uspace keyboard handler.
* @ingroup kbd
* @{
*/
/** @file
*/
 
#include <arch/kbd.h>
#include <ipc/ipc.h>
#include <sysinfo.h>
#include <kbd.h>
#include <keys.h>
 
 
int kbd_arch_init(void)
{
return 0;
}
 
 
int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
{
return 1;
}
 
/** @}
*/
/branches/network/uspace/srv/kbd/arch/mips32/include/kbd.h
0,0 → 1,44
/*
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdmips32 mips32
* @brief HelenOS mips32 arch dependent parts of uspace keyboard handler.
* @ingroup kbd
* @{
*/
/** @file
*/
 
#ifndef KBD_mips32_KBD_H_
#define KBD_mips32_KBD_H_
 
#endif
 
/**
* @}
*/
/branches/network/uspace/srv/kbd/arch/mips32/src/kbd.c
0,0 → 1,377
/*
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbdmips32 mips32
* @brief HelenOS mips32 arch dependent parts of uspace keyboard handler.
* @ingroup kbd
* @{
*/
/** @file
*/
#include <arch/kbd.h>
#include <ipc/ipc.h>
#include <sysinfo.h>
#include <kbd.h>
#include <keys.h>
 
#define MSIM_KEY_F1 0x504f1bL
#define MSIM_KEY_F2 0x514f1bL
#define MSIM_KEY_F3 0x524f1bL
#define MSIM_KEY_F4 0x534f1bL
#define MSIM_KEY_F5 0x35315b1bL
#define MSIM_KEY_F6 0x37315b1bL
#define MSIM_KEY_F7 0x38315b1bL
#define MSIM_KEY_F8 0x39315b1bL
#define MSIM_KEY_F9 0x30325b1bL
#define MSIM_KEY_F10 0x31325b1bL
#define MSIM_KEY_F11 0x33325b1bL
#define MSIM_KEY_F12 0x34325b1bL
 
#define GXEMUL_KEY_F1 0x504f5b1bL
#define GXEMUL_KEY_F2 0x514f5b1bL
#define GXEMUL_KEY_F3 0x524f5b1bL
#define GXEMUL_KEY_F4 0x534f5b1bL
#define GXEMUL_KEY_F5 0x35315b1bL
#define GXEMUL_KEY_F6 0x37315b1bL
#define GXEMUL_KEY_F7 0x38315b1bL
#define GXEMUL_KEY_F8 0x39315b1bL
#define GXEMUL_KEY_F9 0x38325b1bL
#define GXEMUL_KEY_F10 0x39325b1bL
#define GXEMUL_KEY_F11 0x33325b1bL
#define GXEMUL_KEY_F12 0x34325b1bL
 
#define FUNCTION_KEYS 0x100
 
irq_cmd_t msim_cmds[1] = {
{ CMD_MEM_READ_1, (void *) 0, 0, 2 }
};
 
irq_code_t msim_kbd = {
1,
msim_cmds
};
 
static int msim,gxemul;
static int fb_fb;
 
 
int kbd_arch_init(void)
{
fb_fb = (sysinfo_value("fb.kind") == 1);
msim_cmds[0].addr = sysinfo_value("kbd.address.virtual");
ipc_register_irq(sysinfo_value("kbd.inr"), sysinfo_value("kbd.devno"), 0, &msim_kbd);
return 0;
}
 
 
/*
//*
//* Please preserve this code (it can be used to determine scancodes)
//*
int to_hex(int v)
{
return "0123456789ABCDEF"[v];
}
*/
 
static int kbd_arch_process_no_fb(keybuffer_t *keybuffer, int scan_code)
{
 
static unsigned long buf = 0;
static int count = 0;
 
/* Please preserve this code (it can be used to determine scancodes)
keybuffer_push(keybuffer, to_hex((scan_code>>4)&0xf));
keybuffer_push(keybuffer, to_hex(scan_code&0xf));
keybuffer_push(keybuffer, ' ');
keybuffer_push(keybuffer, ' ');
return 1;
*/
if(scan_code == 0x7e) {
switch (buf) {
case MSIM_KEY_F5:
keybuffer_push(keybuffer,FUNCTION_KEYS | 5);
buf = count = 0;
return 1;
case MSIM_KEY_F6:
keybuffer_push(keybuffer,FUNCTION_KEYS | 6);
buf = count = 0;
return 1;
case MSIM_KEY_F7:
keybuffer_push(keybuffer,FUNCTION_KEYS | 7);
buf = count = 0;
return 1;
case MSIM_KEY_F8:
keybuffer_push(keybuffer,FUNCTION_KEYS | 8);
buf = count = 0;
return 1;
case MSIM_KEY_F9:
keybuffer_push(keybuffer,FUNCTION_KEYS | 9);
buf = count = 0;
return 1;
case MSIM_KEY_F10:
keybuffer_push(keybuffer,FUNCTION_KEYS | 10);
buf = count = 0;
return 1;
case MSIM_KEY_F11:
keybuffer_push(keybuffer,FUNCTION_KEYS | 11);
buf = count = 0;
return 1;
case MSIM_KEY_F12:
keybuffer_push(keybuffer,FUNCTION_KEYS | 12);
buf = count = 0;
return 1;
default:
keybuffer_push(keybuffer, buf & 0xff);
keybuffer_push(keybuffer, (buf >> 8) &0xff);
keybuffer_push(keybuffer, (buf >> 16) &0xff);
keybuffer_push(keybuffer, (buf >> 24) &0xff);
keybuffer_push(keybuffer, scan_code);
buf = count = 0;
return 1;
}
}
 
buf |= ((unsigned long) scan_code)<<(8*(count++));
if((buf & 0xff) != (MSIM_KEY_F1 & 0xff)) {
keybuffer_push(keybuffer, buf);
buf = count = 0;
return 1;
}
 
if (count <= 1)
return 1;
 
if ((buf & 0xffff) != (MSIM_KEY_F1 & 0xffff)
&& (buf & 0xffff) != (MSIM_KEY_F5 & 0xffff) ) {
 
keybuffer_push(keybuffer, buf & 0xff);
keybuffer_push(keybuffer, (buf >> 8) &0xff);
buf = count = 0;
return 1;
}
 
if (count <= 2)
return 1;
 
switch (buf) {
case MSIM_KEY_F1:
keybuffer_push(keybuffer,FUNCTION_KEYS | 1);
buf = count = 0;
return 1;
case MSIM_KEY_F2:
keybuffer_push(keybuffer,FUNCTION_KEYS | 2);
buf = count = 0;
return 1;
case MSIM_KEY_F3:
keybuffer_push(keybuffer,FUNCTION_KEYS | 3);
buf = count = 0;
return 1;
case MSIM_KEY_F4:
keybuffer_push(keybuffer,FUNCTION_KEYS | 4);
buf = count = 0;
return 1;
}
 
 
if((buf & 0xffffff) != (MSIM_KEY_F5 & 0xffffff)
&& (buf & 0xffffff) != (MSIM_KEY_F9 & 0xffffff)) {
 
keybuffer_push(keybuffer, buf & 0xff);
keybuffer_push(keybuffer, (buf >> 8) & 0xff);
keybuffer_push(keybuffer, (buf >> 16) & 0xff);
buf=count=0;
return 1;
}
 
if (count <= 3)
return 1;
switch (buf) {
case MSIM_KEY_F5:
case MSIM_KEY_F6:
case MSIM_KEY_F7:
case MSIM_KEY_F8:
case MSIM_KEY_F9:
case MSIM_KEY_F10:
case MSIM_KEY_F11:
case MSIM_KEY_F12:
return 1;
default:
keybuffer_push(keybuffer, buf & 0xff);
keybuffer_push(keybuffer, (buf >> 8) &0xff);
keybuffer_push(keybuffer, (buf >> 16) &0xff);
keybuffer_push(keybuffer, (buf >> 24) &0xff);
buf = count = 0;
return 1;
}
return 1;
}
 
 
 
static int kbd_arch_process_fb(keybuffer_t *keybuffer, int scan_code)
{
static unsigned long buf = 0;
static int count = 0;
 
/* Please preserve this code (it can be used to determine scancodes)
keybuffer_push(keybuffer, to_hex((scan_code>>4)&0xf));
keybuffer_push(keybuffer, to_hex(scan_code&0xf));
keybuffer_push(keybuffer, ' ');
keybuffer_push(keybuffer, ' ');
return 1;
*/
if (scan_code == '\r')
scan_code = '\n';
buf |= ((unsigned long) scan_code)<<(8*(count++));
if ((buf & 0xff) != (GXEMUL_KEY_F1 & 0xff)) {
keybuffer_push(keybuffer, buf);
buf = count = 0;
return 1;
}
 
if (count <= 1)
return 1;
 
if ((buf & 0xffff) != (GXEMUL_KEY_F1 & 0xffff)) {
keybuffer_push(keybuffer, buf & 0xff);
keybuffer_push(keybuffer, (buf >> 8) &0xff);
buf = count = 0;
return 1;
}
 
if (count <= 2)
return 1;
 
 
if ((buf & 0xffffff) != (GXEMUL_KEY_F1 & 0xffffff)
&& (buf & 0xffffff) != (GXEMUL_KEY_F5 & 0xffffff)
&& (buf & 0xffffff) != (GXEMUL_KEY_F9 & 0xffffff)) {
 
keybuffer_push(keybuffer, buf & 0xff);
keybuffer_push(keybuffer, (buf >> 8) & 0xff);
keybuffer_push(keybuffer, (buf >> 16) & 0xff);
buf = count = 0;
return 1;
}
 
if ( count <= 3 )
return 1;
 
switch (buf) {
case GXEMUL_KEY_F1:
keybuffer_push(keybuffer,FUNCTION_KEYS | 1 );
buf=count=0;
return 1;
case GXEMUL_KEY_F2:
keybuffer_push(keybuffer,FUNCTION_KEYS | 2 );
buf=count=0;
return 1;
case GXEMUL_KEY_F3:
keybuffer_push(keybuffer,FUNCTION_KEYS | 3 );
buf=count=0;
return 1;
case GXEMUL_KEY_F4:
keybuffer_push(keybuffer,FUNCTION_KEYS | 4 );
buf=count=0;
return 1;
case GXEMUL_KEY_F5:
keybuffer_push(keybuffer,FUNCTION_KEYS | 5 );
buf=count=0;
return 1;
case GXEMUL_KEY_F6:
keybuffer_push(keybuffer,FUNCTION_KEYS | 6 );
buf=count=0;
return 1;
case GXEMUL_KEY_F7:
keybuffer_push(keybuffer,FUNCTION_KEYS | 7 );
buf=count=0;
return 1;
case GXEMUL_KEY_F8:
keybuffer_push(keybuffer,FUNCTION_KEYS | 8 );
buf=count=0;
return 1;
case GXEMUL_KEY_F9:
keybuffer_push(keybuffer,FUNCTION_KEYS | 9 );
buf=count=0;
return 1;
case GXEMUL_KEY_F10:
keybuffer_push(keybuffer,FUNCTION_KEYS | 10 );
buf=count=0;
return 1;
case GXEMUL_KEY_F11:
keybuffer_push(keybuffer,FUNCTION_KEYS | 11 );
buf=count=0;
return 1;
case GXEMUL_KEY_F12:
keybuffer_push(keybuffer,FUNCTION_KEYS | 12 );
buf=count=0;
return 1;
default:
keybuffer_push(keybuffer, buf & 0xff );
keybuffer_push(keybuffer, (buf >> 8) &0xff );
keybuffer_push(keybuffer, (buf >> 16) &0xff );
keybuffer_push(keybuffer, (buf >> 24) &0xff );
buf=count=0;
return 1;
}
return 1;
}
 
int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
{
int scan_code = IPC_GET_ARG2(*call);
static int esc_count=0;
 
if (scan_code == 0x1b) {
esc_count++;
if (esc_count == 3)
__SYSCALL0(SYS_DEBUG_ENABLE_CONSOLE);
} else {
esc_count=0;
}
 
if (fb_fb)
return kbd_arch_process_fb(keybuffer, scan_code);
 
return kbd_arch_process_no_fb(keybuffer, scan_code);
}
/** @}
*/
/branches/network/uspace/srv/kbd/arch/amd64
0,0 → 1,0
link ia32
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/uspace/srv/kbd/arch/mips32eb
0,0 → 1,0
link mips32
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/uspace/srv/kbd/include/layout.h
File deleted
/branches/network/uspace/srv/kbd/include/gsp.h
File deleted
/branches/network/uspace/srv/kbd/include/kbd_port.h
File deleted
/branches/network/uspace/srv/kbd/include/kbd_ctl.h
File deleted
/branches/network/uspace/srv/kbd/include/stroke.h
File deleted
/branches/network/uspace/srv/kbd/include/key_buffer.h
38,25 → 38,23
#define __KEY_BUFFER_H__
 
#include <sys/types.h>
#include <kbd/kbd.h>
 
/** Size of buffer for pressed keys */
#define KEYBUFFER_SIZE 128
 
typedef struct {
kbd_event_t fifo[KEYBUFFER_SIZE];
int fifo[KEYBUFFER_SIZE];
unsigned long head;
unsigned long tail;
unsigned long items;
} keybuffer_t;
 
extern void keybuffer_free(keybuffer_t *);
extern void keybuffer_init(keybuffer_t *);
extern int keybuffer_available(keybuffer_t *);
extern int keybuffer_empty(keybuffer_t *);
extern void keybuffer_push(keybuffer_t *, const kbd_event_t *);
extern void keybuffer_push0(keybuffer_t *, int c);
extern int keybuffer_pop(keybuffer_t *, kbd_event_t *);
void keybuffer_free(keybuffer_t *keybuffer);
void keybuffer_init(keybuffer_t *keybuffer);
int keybuffer_available(keybuffer_t *keybuffer);
int keybuffer_empty(keybuffer_t *keybuffer);
void keybuffer_push(keybuffer_t *keybuffer, int key);
int keybuffer_pop(keybuffer_t *keybuffer, int *c);
 
#endif
 
/branches/network/uspace/srv/kbd/include/keys.h
0,0 → 1,62
/*
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/**
* @addtogroup kbdgen
* @{
*/
/**
* @file
*/
 
#ifndef _KBD_KEYS_H_
#define _KBD_KEYS_H_
 
#define KBD_PUSHCHAR 1024
#define KBD_MS_LEFT 1025
#define KBD_MS_RIGHT 1026
#define KBD_MS_MIDDLE 1027
#define KBD_MS_MOVE 1028
 
#define KBD_KEY_F1 0x3b
#define KBD_KEY_F2 0x3c
#define KBD_KEY_F3 0x3d
#define KBD_KEY_F4 0x3e
#define KBD_KEY_F5 0x3f
#define KBD_KEY_F6 0x40
#define KBD_KEY_F7 0x41
#define KBD_KEY_F8 0x42
#define KBD_KEY_F9 0x43
#define KBD_KEY_F10 0x44
#define KBD_KEY_F11 0x45
#define KBD_KEY_F12 0x46
 
#endif
 
/** @}
*/
/branches/network/uspace/srv/kbd/include/kbd.h
39,18 → 39,10
 
#include <key_buffer.h>
 
#define KBD_EVENT 1024
#define KBD_MS_LEFT 1025
#define KBD_MS_RIGHT 1026
#define KBD_MS_MIDDLE 1027
#define KBD_MS_MOVE 1028
extern int kbd_arch_init(void);
extern int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call);
extern int mouse_arch_process(int phoneid, ipc_call_t *call);
 
extern int cir_service;
extern int cir_phone;
 
extern void kbd_push_scancode(int);
extern void kbd_push_ev(int, unsigned int);
 
#endif
 
/**
/branches/network/uspace/srv/kbd/genarch/gsp.c
File deleted
/branches/network/uspace/srv/kbd/genarch/stroke.c
File deleted
/branches/network/uspace/srv/kbd/genarch/include/kbd.h
0,0 → 1,47
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbd
* @{
*/
/** @file
*/
 
#ifndef KBD_genarch_KBD_H_
#define KBD_genarch_KBD_H_
 
#include <key_buffer.h>
 
extern void key_released(keybuffer_t *keybuffer, unsigned char key);
extern void key_pressed(keybuffer_t *keybuffer, unsigned char key);
 
#endif
 
/**
* @}
*/
/branches/network/uspace/srv/kbd/genarch/include/scanc.h
0,0 → 1,50
/*
* Copyright (c) 2001-2004 Jakub Jermar
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbd
* @{
*/
/** @file
*/
 
#ifndef KBD_SCANC_H_
#define KBD_SCANC_H_
 
#define FUNCTION_KEYS 0x100
 
#define SPECIAL 255
 
extern int sc_primary_map[];
extern int sc_secondary_map[];
 
#endif
 
/**
* @}
*/
/branches/network/uspace/srv/kbd/genarch/src/kbd.c
0,0 → 1,113
/*
* Copyright (c) 2001-2004 Jakub Jermar
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup kbd
* @brief Handling of keyboard IRQ notifications for several architectures.
* @ingroup kbd
* @{
*/
/** @file
*/
 
#include <key_buffer.h>
#include <arch/scanc.h>
#include <genarch/scanc.h>
#include <genarch/kbd.h>
#include <libc.h>
 
#define PRESSED_SHIFT (1<<0)
#define PRESSED_CAPSLOCK (1<<1)
#define LOCKED_CAPSLOCK (1<<0)
 
static volatile int keyflags; /**< Tracking of multiple keypresses. */
static volatile int lockflags; /**< Tracking of multiple keys lockings. */
 
void key_released(keybuffer_t *keybuffer, unsigned char key)
{
switch (key) {
case SC_LSHIFT:
case SC_RSHIFT:
keyflags &= ~PRESSED_SHIFT;
break;
case SC_CAPSLOCK:
keyflags &= ~PRESSED_CAPSLOCK;
if (lockflags & LOCKED_CAPSLOCK)
lockflags &= ~LOCKED_CAPSLOCK;
else
lockflags |= LOCKED_CAPSLOCK;
break;
default:
break;
}
}
 
void key_pressed(keybuffer_t *keybuffer, unsigned char key)
{
int *map = sc_primary_map;
int ascii = sc_primary_map[key];
int shift, capslock;
int letter = 0;
 
static int esc_count = 0;
 
if (key == SC_ESC) {
esc_count++;
if (esc_count == 3)
__SYSCALL0(SYS_DEBUG_ENABLE_CONSOLE);
} else {
esc_count = 0;
}
switch (key) {
case SC_LSHIFT:
case SC_RSHIFT:
keyflags |= PRESSED_SHIFT;
break;
case SC_CAPSLOCK:
keyflags |= PRESSED_CAPSLOCK;
break;
case SC_SPEC_ESCAPE:
break;
default:
letter = ((ascii >= 'a') && (ascii <= 'z'));
capslock = (keyflags & PRESSED_CAPSLOCK) || (lockflags & LOCKED_CAPSLOCK);
shift = keyflags & PRESSED_SHIFT;
if (letter && capslock)
shift = !shift;
if (shift)
map = sc_secondary_map;
if (map[key] != SPECIAL)
keybuffer_push(keybuffer, map[key]);
break;
}
}
 
/**
* @}
*/
/branches/network/uspace/srv/ns/Makefile
31,7 → 31,6
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
LIBS = $(LIBC_PREFIX)/libc.a
52,13 → 51,13
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend $(OBJECTS)
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm: $(OUTPUT).disasm
 
/branches/network/uspace/srv/ns/ns.c
28,11 → 28,11
 
/** @addtogroup ns
* @{
*/
*/
 
/**
* @file ns.c
* @brief Naming service for HelenOS IPC.
* @file ns.c
* @brief Naming service for HelenOS IPC.
*/
 
 
40,7 → 40,6
#include <ipc/ns.h>
#include <ipc/services.h>
#include <stdio.h>
#include <bool.h>
#include <unistd.h>
#include <stdlib.h>
#include <errno.h>
48,24 → 47,17
#include <libadt/list.h>
#include <libadt/hash_table.h>
#include <sysinfo.h>
#include <loader/loader.h>
#include <ddi.h>
#include <as.h>
 
#define NAME "ns"
#define NAME "ns"
 
#define NS_HASH_TABLE_CHAINS 20
#define NS_HASH_TABLE_CHAINS 20
 
static int register_service(ipcarg_t service, ipcarg_t phone, ipc_call_t *call);
static void connect_to_service(ipcarg_t service, ipc_call_t *call,
static int connect_to_service(ipcarg_t service, ipc_call_t *call,
ipc_callid_t callid);
 
void register_clonable(ipcarg_t service, ipcarg_t phone, ipc_call_t *call,
ipc_callid_t callid);
void connect_to_clonable(ipcarg_t service, ipc_call_t *call,
ipc_callid_t callid);
 
 
/* Static functions implementing NS hash table operations. */
static hash_index_t ns_hash(unsigned long *key);
static int ns_compare(unsigned long *key, hash_count_t keys, link_t *item);
84,46 → 76,19
/** NS hash table item. */
typedef struct {
link_t link;
ipcarg_t service; /**< Number of the service. */
ipcarg_t phone; /**< Phone registered with the service. */
ipcarg_t in_phone_hash; /**< Incoming phone hash. */
ipcarg_t service; /**< Number of the service. */
ipcarg_t phone; /**< Phone registered with the service. */
ipcarg_t in_phone_hash; /**< Incoming phone hash. */
} hashed_service_t;
 
/** Pending connection structure. */
typedef struct {
link_t link;
ipcarg_t service; /**< Number of the service. */
ipc_callid_t callid; /**< Call ID waiting for the connection */
ipcarg_t arg2; /**< Second argument */
ipcarg_t arg3; /**< Third argument */
} pending_req_t;
 
static link_t pending_req;
 
/** Request for connection to a clonable service. */
typedef struct {
link_t link;
ipcarg_t service;
ipc_call_t call;
ipc_callid_t callid;
} cs_req_t;
 
/** List of clonable-service connection requests. */
static link_t cs_req;
 
static void *clockaddr = NULL;
static void *klogaddr = NULL;
 
/** Return true if @a service is clonable. */
static bool service_clonable(int service)
static void get_as_area(ipc_callid_t callid, ipc_call_t *call, char *name,
void **addr)
{
return (service == SERVICE_LOAD);
}
void *ph_addr;
 
static void get_as_area(ipc_callid_t callid, ipc_call_t *call, char *name, void **addr)
{
void *ph_addr;
if (!*addr) {
ph_addr = (void *) sysinfo_value(name);
if (!ph_addr) {
131,76 → 96,40
return;
}
*addr = as_get_mappable_page(PAGE_SIZE);
if (physmem_map(ph_addr, *addr, 1,
AS_AREA_READ | AS_AREA_CACHEABLE) != 0) {
ipc_answer_0(callid, ENOENT);
return;
}
physmem_map(ph_addr, *addr, 1,
AS_AREA_READ | AS_AREA_CACHEABLE);
}
ipc_answer_2(callid, EOK, (ipcarg_t) *addr, AS_AREA_READ);
}
 
/** Process pending connection requests */
static void process_pending_req()
{
link_t *cur;
loop:
for (cur = pending_req.next; cur != &pending_req; cur = cur->next) {
pending_req_t *pr = list_get_instance(cur, pending_req_t, link);
unsigned long keys[3] = {
pr->service,
0,
0
};
link_t *link = hash_table_find(&ns_hash_table, keys);
if (!link)
continue;
hashed_service_t *hs = hash_table_get_instance(link, hashed_service_t, link);
ipcarg_t retval = ipc_forward_fast(pr->callid, hs->phone,
pr->arg2, pr->arg3, 0, IPC_FF_NONE);
if (!(pr->callid & IPC_CALLID_NOTIFICATION))
ipc_answer_0(pr->callid, retval);
list_remove(cur);
free(pr);
goto loop;
}
}
 
int main(int argc, char **argv)
{
printf(NAME ": HelenOS IPC Naming Service\n");
ipc_call_t call;
ipc_callid_t callid;
ipcarg_t retval;
 
if (!hash_table_create(&ns_hash_table, NS_HASH_TABLE_CHAINS, 3,
&ns_hash_table_ops)) {
printf(NAME ": No memory available for services\n");
printf(NAME ": No memory available\n");
return ENOMEM;
}
list_initialize(&pending_req);
list_initialize(&cs_req);
printf(NAME ": Accepting connections\n");
while (true) {
process_pending_req();
ipc_call_t call;
ipc_callid_t callid = ipc_wait_for_call(&call);
ipcarg_t retval;
while (1) {
callid = ipc_wait_for_call(&call);
switch (IPC_GET_METHOD(call)) {
case IPC_M_SHARE_IN:
switch (IPC_GET_ARG3(call)) {
case SERVICE_MEM_REALTIME:
get_as_area(callid, &call, "clock.faddr", &clockaddr);
get_as_area(callid, &call, "clock.faddr",
&clockaddr);
break;
case SERVICE_MEM_KLOG:
get_as_area(callid, &call, "klog.faddr", &klogaddr);
get_as_area(callid, &call, "klog.faddr",
&klogaddr);
break;
default:
ipc_answer_0(callid, ENOENT);
213,36 → 142,23
/*
* Server requests service registration.
*/
if (service_clonable(IPC_GET_ARG1(call))) {
register_clonable(IPC_GET_ARG1(call),
IPC_GET_ARG5(call), &call, callid);
continue;
} else {
retval = register_service(IPC_GET_ARG1(call),
IPC_GET_ARG5(call), &call);
}
retval = register_service(IPC_GET_ARG1(call),
IPC_GET_ARG5(call), &call);
break;
case IPC_M_CONNECT_ME_TO:
/*
* Client requests to be connected to a service.
*/
if (service_clonable(IPC_GET_ARG1(call))) {
connect_to_clonable(IPC_GET_ARG1(call),
&call, callid);
continue;
} else {
connect_to_service(IPC_GET_ARG1(call), &call,
callid);
continue;
}
retval = connect_to_service(IPC_GET_ARG1(call), &call,
callid);
break;
default:
retval = ENOENT;
break;
}
if (!(callid & IPC_CALLID_NOTIFICATION))
if (!(callid & IPC_CALLID_NOTIFICATION)) {
ipc_answer_0(callid, retval);
}
}
/* Not reached */
252,11 → 168,10
/** Register service.
*
* @param service Service to be registered.
* @param phone Phone to be used for connections to the service.
* @param call Pointer to call structure.
* @param phone Phone to be used for connections to the service.
* @param call Pointer to call structure.
*
* @return Zero on success or a value from @ref errno.h.
*
*/
int register_service(ipcarg_t service, ipcarg_t phone, ipc_call_t *call)
{
265,20 → 180,23
call->in_phone_hash,
0
};
if (hash_table_find(&ns_hash_table, keys))
hashed_service_t *hs;
if (hash_table_find(&ns_hash_table, keys)) {
return EEXISTS;
hashed_service_t *hs = (hashed_service_t *) malloc(sizeof(hashed_service_t));
if (!hs)
}
hs = (hashed_service_t *) malloc(sizeof(hashed_service_t));
if (!hs) {
return ENOMEM;
}
link_initialize(&hs->link);
hs->service = service;
hs->phone = phone;
hs->in_phone_hash = call->in_phone_hash;
hash_table_insert(&ns_hash_table, keys, &hs->link);
return 0;
}
 
285,135 → 203,36
/** Connect client to service.
*
* @param service Service to be connected to.
* @param call Pointer to call structure.
* @param callid Call ID of the request.
* @param call Pointer to call structure.
* @param callid Call ID of the request.
*
* @return Zero on success or a value from @ref errno.h.
*
*/
void connect_to_service(ipcarg_t service, ipc_call_t *call, ipc_callid_t callid)
int connect_to_service(ipcarg_t service, ipc_call_t *call, ipc_callid_t callid)
{
ipcarg_t retval;
unsigned long keys[3] = {
service,
0,
0
};
link_t *link = hash_table_find(&ns_hash_table, keys);
if (!link) {
if (IPC_GET_ARG4(*call) & IPC_FLAG_BLOCKING) {
/* Blocking connection, add to pending list */
pending_req_t *pr = (pending_req_t *) malloc(sizeof(pending_req_t));
if (!pr) {
retval = ENOMEM;
goto out;
}
unsigned long keys[3] = { service, 0, 0 };
link_t *hlp;
hashed_service_t *hs;
pr->service = service;
pr->callid = callid;
pr->arg2 = IPC_GET_ARG2(*call);
pr->arg3 = IPC_GET_ARG3(*call);
list_append(&pr->link, &pending_req);
return;
}
retval = ENOENT;
goto out;
hlp = hash_table_find(&ns_hash_table, keys);
if (!hlp) {
return ENOENT;
}
hashed_service_t *hs = hash_table_get_instance(link, hashed_service_t, link);
retval = ipc_forward_fast(callid, hs->phone, IPC_GET_ARG2(*call),
IPC_GET_ARG3(*call), 0, IPC_FF_NONE);
out:
if (!(callid & IPC_CALLID_NOTIFICATION))
ipc_answer_0(callid, retval);
hs = hash_table_get_instance(hlp, hashed_service_t, link);
return ipc_forward_fast(callid, hs->phone, IPC_GET_ARG2(*call),
IPC_GET_ARG3(*call), 0, IPC_FF_NONE);
}
 
/** Register clonable service.
*
* @param service Service to be registered.
* @param phone Phone to be used for connections to the service.
* @param call Pointer to call structure.
*
*/
void register_clonable(ipcarg_t service, ipcarg_t phone, ipc_call_t *call,
ipc_callid_t callid)
{
if (list_empty(&cs_req)) {
/* There was no pending connection request. */
printf(NAME ": Unexpected clonable server.\n");
ipc_answer_0(callid, EBUSY);
return;
}
cs_req_t *csr = list_get_instance(cs_req.next, cs_req_t, link);
list_remove(&csr->link);
/* Currently we can only handle a single type of clonable service. */
assert(csr->service == SERVICE_LOAD);
ipc_answer_0(callid, EOK);
int rc = ipc_forward_fast(csr->callid, phone, IPC_GET_ARG2(csr->call),
IPC_GET_ARG3(csr->call), 0, IPC_FF_NONE);
free(csr);
}
 
/** Connect client to clonable service.
*
* @param service Service to be connected to.
* @param call Pointer to call structure.
* @param callid Call ID of the request.
*
* @return Zero on success or a value from @ref errno.h.
*
*/
void connect_to_clonable(ipcarg_t service, ipc_call_t *call,
ipc_callid_t callid)
{
assert(service == SERVICE_LOAD);
cs_req_t *csr = malloc(sizeof(cs_req_t));
if (csr == NULL) {
ipc_answer_0(callid, ENOMEM);
return;
}
/* Spawn a loader. */
int rc = loader_spawn("loader");
if (rc < 0) {
free(csr);
ipc_answer_0(callid, rc);
return;
}
csr->service = service;
csr->call = *call;
csr->callid = callid;
/*
* We can forward the call only after the server we spawned connects
* to us. Meanwhile we might need to service more connection requests.
* Thus we store the call in a queue.
*/
list_append(&csr->link, &cs_req);
}
 
/** Compute hash index into NS hash table.
*
* @param key Pointer keys. However, only the first key (i.e. service number)
* is used to compute the hash index.
*
* is used to compute the hash index.
* @return Hash index corresponding to key[0].
*
*/
hash_index_t ns_hash(unsigned long *key)
{
assert(key);
return (*key % NS_HASH_TABLE_CHAINS);
return *key % NS_HASH_TABLE_CHAINS;
}
 
/** Compare a key with hashed item.
424,20 → 243,20
* value. Note that this is close to being classified
* as a nasty hack.
*
* @param key Array of keys.
* @param key Array of keys.
* @param keys Must be lesser or equal to 3.
* @param item Pointer to a hash table item.
*
* @return Non-zero if the key matches the item, zero otherwise.
*
*/
int ns_compare(unsigned long key[], hash_count_t keys, link_t *item)
{
hashed_service_t *hs;
 
assert(key);
assert(keys <= 3);
assert(item);
hashed_service_t *hs = hash_table_get_instance(item, hashed_service_t, link);
hs = hash_table_get_instance(item, hashed_service_t, link);
if (keys == 2)
return key[1] == hs->in_phone_hash;
448,7 → 267,6
/** Perform actions after removal of item from the hash table.
*
* @param item Item that was removed from the hash table.
*
*/
void ns_remove(link_t *item)
{
456,6 → 274,6
free(hash_table_get_instance(item, hashed_service_t, link));
}
 
/**
/**
* @}
*/
/branches/network/uspace/srv/console/Makefile
31,9 → 31,8
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
include $(LIBC_PREFIX)/Makefile.toolchain
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
CFLAGS += -I. -I../kbd/include -I../fb
 
LIBS = $(LIBC_PREFIX)/libc.a
58,8 → 57,6
$(addsuffix .o,$(basename $(IMAGES)))
ARCH_OBJECTS := $(addsuffix .o,$(basename $(ARCH_SOURCES)))
 
OBJECTS := $(GENERIC_OBJECTS) $(ARCH_OBJECTS)
 
.PHONY: all clean depend disasm
 
all: $(OUTPUT) $(OUTPUT).disasm
67,13 → 64,13
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend $(OBJECTS)
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(OUTPUT): $(ARCH_OBJECTS) $(GENERIC_OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(GENERIC_OBJECTS) $(ARCH_OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm: $(OUTPUT).disasm
 
/branches/network/uspace/srv/console/console.c
35,13 → 35,12
#include <libc.h>
#include <fb.h>
#include <ipc/ipc.h>
#include <kbd.h>
#include <kbd/keycode.h>
#include <keys.h>
#include <ipc/fb.h>
#include <ipc/services.h>
#include <errno.h>
#include <key_buffer.h>
#include <ipc/console.h>
#include <console.h>
#include <unistd.h>
#include <async.h>
#include <libadt/fifo.h>
48,9 → 47,7
#include <screenbuffer.h>
#include <sys/mman.h>
#include <stdio.h>
#include <sysinfo.h>
 
#include "console.h"
#include "gcons.h"
 
#define MAX_KEYREQUESTS_BUFFERED 32
60,7 → 57,6
/** Index of currently used virtual console.
*/
int active_console = 0;
int prev_console = 0;
 
/** Information about framebuffer
*/
90,7 → 86,10
* faster virtual console
* switching */
 
static int kernel_pixmap = -1; /**< Number of fb pixmap, where kernel
* console is stored */
 
 
/** Find unused virtual console.
*
*/
110,54 → 109,27
async_msg_0(fb_info.phone, FB_CLEAR);
}
 
static void curs_visibility(bool visible)
static void curs_visibility(int v)
{
async_msg_1(fb_info.phone, FB_CURSOR_VISIBILITY, visible);
async_msg_1(fb_info.phone, FB_CURSOR_VISIBILITY, v);
}
 
static void curs_hide_sync(void)
{
ipc_call_sync_1_0(fb_info.phone, FB_CURSOR_VISIBILITY, false);
}
 
static void curs_goto(int row, int col)
{
async_msg_2(fb_info.phone, FB_CURSOR_GOTO, row, col);
}
 
static void set_style(int style)
static void set_style(style_t *style)
{
async_msg_1(fb_info.phone, FB_SET_STYLE, style);
async_msg_2(fb_info.phone, FB_SET_STYLE, style->fg_color,
style->bg_color);
}
 
static void set_color(int fgcolor, int bgcolor, int flags)
static void set_style_col(int fgcolor, int bgcolor)
{
async_msg_3(fb_info.phone, FB_SET_COLOR, fgcolor, bgcolor, flags);
async_msg_2(fb_info.phone, FB_SET_STYLE, fgcolor, bgcolor);
}
 
static void set_rgb_color(int fgcolor, int bgcolor)
{
async_msg_2(fb_info.phone, FB_SET_RGB_COLOR, fgcolor, bgcolor);
}
 
static void set_attrs(attrs_t *attrs)
{
switch (attrs->t) {
case at_style:
set_style(attrs->a.s.style);
break;
 
case at_idx:
set_color(attrs->a.i.fg_color, attrs->a.i.bg_color,
attrs->a.i.flags);
break;
 
case at_rgb:
set_rgb_color(attrs->a.r.fg_color, attrs->a.r.bg_color);
break;
}
}
 
static void prtchr(char c, int row, int col)
{
async_msg_3(fb_info.phone, FB_PUTCHAR, c, row, col);
215,81 → 187,114
}
 
/** Save current screen to pixmap, draw old pixmap
*
* @param oldpixmap Old pixmap
* @return ID of pixmap of current screen
*/
static int switch_screens(int oldpixmap)
{
int newpmap;
/* Save screen */
newpmap = async_req_0_0(fb_info.phone, FB_VP2PIXMAP);
if (newpmap < 0)
return -1;
 
if (oldpixmap != -1) {
/* Show old screen */
async_msg_2(fb_info.phone, FB_VP_DRAW_PIXMAP, 0, oldpixmap);
/* Drop old pixmap */
async_msg_1(fb_info.phone, FB_DROP_PIXMAP, oldpixmap);
}
return newpmap;
}
 
/** Switch to new console */
static void change_console(int newcons)
{
connection_t *conn;
static int console_pixmap = -1;
int i, j, rc;
keyfield_t *field;
attrs_t *attrs;
style_t *style;
 
if (newcons == active_console)
return;
 
if (newcons == KERNEL_CONSOLE) {
if (active_console == KERNEL_CONSOLE)
return;
active_console = KERNEL_CONSOLE;
curs_visibility(0);
 
async_serialize_start();
curs_hide_sync();
gcons_in_kernel();
if (kernel_pixmap == -1) {
/* store/restore unsupported */
set_style_col(DEFAULT_FOREGROUND, DEFAULT_BACKGROUND);
clrscr();
} else {
gcons_in_kernel();
console_pixmap = switch_screens(kernel_pixmap);
kernel_pixmap = -1;
}
async_serialize_end();
if (__SYSCALL0(SYS_DEBUG_ENABLE_CONSOLE)) {
prev_console = active_console;
active_console = KERNEL_CONSOLE;
} else
newcons = active_console;
 
__SYSCALL0(SYS_DEBUG_ENABLE_CONSOLE);
return;
}
async_serialize_start();
 
if (console_pixmap != -1) {
kernel_pixmap = switch_screens(console_pixmap);
console_pixmap = -1;
}
active_console = newcons;
gcons_change_console(newcons);
conn = &connections[active_console];
 
set_style(&conn->screenbuffer.style);
curs_visibility(0);
if (interbuffer) {
for (i = 0; i < conn->screenbuffer.size_x; i++)
for (j = 0; j < conn->screenbuffer.size_y; j++) {
unsigned int size_x;
 
size_x = conn->screenbuffer.size_x;
interbuffer[i + j * size_x] =
*get_field_at(&conn->screenbuffer, i, j);
}
/* This call can preempt, but we are already at the end */
rc = async_req_0_0(fb_info.phone, FB_DRAW_TEXT_DATA);
}
if (newcons != KERNEL_CONSOLE) {
async_serialize_start();
if (active_console == KERNEL_CONSOLE)
gcons_redraw_console();
active_console = newcons;
gcons_change_console(newcons);
conn = &connections[active_console];
set_attrs(&conn->screenbuffer.attrs);
curs_visibility(false);
if (interbuffer) {
for (i = 0; i < conn->screenbuffer.size_x; i++)
for (j = 0; j < conn->screenbuffer.size_y; j++) {
unsigned int size_x;
size_x = conn->screenbuffer.size_x;
interbuffer[i + j * size_x] =
*get_field_at(&conn->screenbuffer, i, j);
}
/* This call can preempt, but we are already at the end */
rc = async_req_0_0(fb_info.phone, FB_DRAW_TEXT_DATA);
}
if ((!interbuffer) || (rc != 0)) {
set_attrs(&conn->screenbuffer.attrs);
clrscr();
attrs = &conn->screenbuffer.attrs;
for (j = 0; j < conn->screenbuffer.size_y; j++)
for (i = 0; i < conn->screenbuffer.size_x; i++) {
field = get_field_at(&conn->screenbuffer, i, j);
if (!attrs_same(*attrs, field->attrs))
set_attrs(&field->attrs);
attrs = &field->attrs;
if ((field->character == ' ') &&
(attrs_same(field->attrs,
conn->screenbuffer.attrs)))
continue;
if ((!interbuffer) || (rc != 0)) {
set_style(&conn->screenbuffer.style);
clrscr();
style = &conn->screenbuffer.style;
 
prtchr(field->character, j, i);
}
}
curs_goto(conn->screenbuffer.position_y,
conn->screenbuffer.position_x);
curs_visibility(conn->screenbuffer.is_cursor_visible);
async_serialize_end();
for (j = 0; j < conn->screenbuffer.size_y; j++)
for (i = 0; i < conn->screenbuffer.size_x; i++) {
field = get_field_at(&conn->screenbuffer, i, j);
if (!style_same(*style, field->style))
set_style(&field->style);
style = &field->style;
if ((field->character == ' ') &&
(style_same(field->style,
conn->screenbuffer.style)))
continue;
 
prtchr(field->character, j, i);
}
}
curs_goto(conn->screenbuffer.position_y,
conn->screenbuffer.position_x);
curs_visibility(conn->screenbuffer.is_cursor_visible);
 
async_serialize_end();
}
 
/** Handler for keyboard */
298,7 → 303,7
ipc_callid_t callid;
ipc_call_t call;
int retval;
kbd_event_t ev;
int c;
connection_t *conn;
int newcon;
320,24 → 325,23
IPC_GET_ARG2(call));
retval = 0;
break;
case KBD_EVENT:
/* Got event from keyboard driver. */
case KBD_PUSHCHAR:
/* got key from keyboard driver */
retval = 0;
ev.type = IPC_GET_ARG1(call);
ev.key = IPC_GET_ARG2(call);
ev.mods = IPC_GET_ARG3(call);
ev.c = IPC_GET_ARG4(call);
c = IPC_GET_ARG1(call);
/* switch to another virtual console */
conn = &connections[active_console];
 
if ((ev.key >= KC_F1) && (ev.key < KC_F1 +
CONSOLE_COUNT)) {
if (ev.key == KC_F12)
/*
* if ((c >= KBD_KEY_F1) && (c < KBD_KEY_F1 +
* CONSOLE_COUNT)) {
*/
if ((c >= 0x101) && (c < 0x101 + CONSOLE_COUNT)) {
if (c == 0x112)
change_console(KERNEL_CONSOLE);
else
change_console(ev.key - KC_F1);
change_console(c - 0x101);
break;
}
344,14 → 348,14
/* if client is awaiting key, send it */
if (conn->keyrequest_counter > 0) {
conn->keyrequest_counter--;
ipc_answer_4(fifo_pop(conn->keyrequests), EOK,
ev.type, ev.key, ev.mods, ev.c);
ipc_answer_1(fifo_pop(conn->keyrequests), EOK,
c);
break;
}
 
keybuffer_push(&conn->keybuffer, &ev);
keybuffer_push(&conn->keybuffer, c);
retval = 0;
 
break;
default:
retval = ENOENT;
366,9 → 370,9
ipc_callid_t callid;
ipc_call_t call;
int consnum;
ipcarg_t arg1, arg2, arg3, arg4;
ipcarg_t arg1, arg2;
connection_t *conn;
 
if ((consnum = find_free_connection()) == -1) {
ipc_answer_0(iid, ELIMIT);
return;
383,23 → 387,20
/* Accept the connection */
ipc_answer_0(iid, EOK);
 
while (1) {
async_serialize_end();
callid = async_get_call(&call);
async_serialize_start();
 
arg1 = 0;
arg2 = 0;
arg3 = 0;
arg4 = 0;
 
switch (IPC_GET_METHOD(call)) {
case IPC_M_PHONE_HUNGUP:
gcons_notify_disconnect(consnum);
/* Answer all pending requests */
while (conn->keyrequest_counter > 0) {
while (conn->keyrequest_counter > 0) {
conn->keyrequest_counter--;
ipc_answer_0(fifo_pop(conn->keyrequests),
ENOENT);
437,26 → 438,11
break;
case CONSOLE_SET_STYLE:
arg1 = IPC_GET_ARG1(call);
screenbuffer_set_style(&conn->screenbuffer, arg1);
if (consnum == active_console)
set_style(arg1);
break;
case CONSOLE_SET_COLOR:
arg1 = IPC_GET_ARG1(call);
arg2 = IPC_GET_ARG2(call);
arg3 = IPC_GET_ARG3(call);
screenbuffer_set_color(&conn->screenbuffer, arg1,
arg2, arg3);
if (consnum == active_console)
set_color(arg1, arg2, arg3);
break;
case CONSOLE_SET_RGB_COLOR:
arg1 = IPC_GET_ARG1(call);
arg2 = IPC_GET_ARG2(call);
screenbuffer_set_rgb_color(&conn->screenbuffer, arg1,
screenbuffer_set_style(&conn->screenbuffer, arg1,
arg2);
if (consnum == active_console)
set_rgb_color(arg1, arg2);
set_style_col(arg1, arg2);
break;
case CONSOLE_CURSOR_VISIBILITY:
arg1 = IPC_GET_ARG1(call);
464,7 → 450,7
if (consnum == active_console)
curs_visibility(arg1);
break;
case CONSOLE_GETKEY:
case CONSOLE_GETCHAR:
if (keybuffer_empty(&conn->keybuffer)) {
/* buffer is empty -> store request */
if (conn->keyrequest_counter <
480,23 → 466,13
}
continue;
}
kbd_event_t ev;
keybuffer_pop(&conn->keybuffer, &ev);
arg1 = ev.type;
arg2 = ev.key;
arg3 = ev.mods;
arg4 = ev.c;
keybuffer_pop(&conn->keybuffer, (int *) &arg1);
break;
}
ipc_answer_4(callid, EOK, arg1, arg2, arg3, arg4);
ipc_answer_2(callid, EOK, arg1, arg2);
}
}
 
static void interrupt_received(ipc_callid_t callid, ipc_call_t *call)
{
change_console(prev_console);
}
 
int main(int argc, char *argv[])
{
printf(NAME ": HelenOS Console service\n");
503,43 → 479,43
ipcarg_t phonehash;
int kbd_phone;
size_t ib_size;
int i;
 
async_set_client_connection(client_connection);
/* Connect to keyboard driver */
kbd_phone = ipc_connect_me_to_blocking(PHONE_NS, SERVICE_KEYBOARD, 0, 0);
if (kbd_phone < 0) {
printf(NAME ": Failed to connect to keyboard service\n");
return -1;
 
kbd_phone = ipc_connect_me_to(PHONE_NS, SERVICE_KEYBOARD, 0, 0);
while (kbd_phone < 0) {
usleep(10000);
kbd_phone = ipc_connect_me_to(PHONE_NS, SERVICE_KEYBOARD, 0, 0);
}
if (ipc_connect_to_me(kbd_phone, SERVICE_CONSOLE, 0, 0, &phonehash) != 0) {
printf(NAME ": Failed to create callback from keyboard service\n");
if (ipc_connect_to_me(kbd_phone, SERVICE_CONSOLE, 0, 0, &phonehash) != 0)
return -1;
}
async_new_connection(phonehash, 0, NULL, keyboard_events);
/* Connect to framebuffer driver */
fb_info.phone = ipc_connect_me_to_blocking(PHONE_NS, SERVICE_VIDEO, 0, 0);
if (fb_info.phone < 0) {
printf(NAME ": Failed to connect to video service\n");
return -1;
fb_info.phone = ipc_connect_me_to(PHONE_NS, SERVICE_VIDEO, 0, 0);
while (fb_info.phone < 0) {
usleep(10000);
fb_info.phone = ipc_connect_me_to(PHONE_NS, SERVICE_VIDEO, 0, 0);
}
/* Disable kernel output to the console */
__SYSCALL0(SYS_DEBUG_DISABLE_CONSOLE);
/* Save old kernel screen */
kernel_pixmap = switch_screens(-1);
 
/* Initialize gcons */
gcons_init(fb_info.phone);
/* Synchronize, the gcons can have something in queue */
async_req_0_0(fb_info.phone, FB_FLUSH);
/* Enable double buffering */
async_msg_2(fb_info.phone, FB_VIEWPORT_DB, (sysarg_t) -1, 1);
async_req_0_2(fb_info.phone, FB_GET_CSIZE, &fb_info.rows,
&fb_info.cols);
set_rgb_color(DEFAULT_FOREGROUND, DEFAULT_BACKGROUND);
set_style_col(DEFAULT_FOREGROUND, DEFAULT_BACKGROUND);
clrscr();
/* Init virtual consoles */
559,47 → 535,33
}
}
connections[KERNEL_CONSOLE].used = 1;
 
/* Set up shared memory buffer. */
ib_size = sizeof(keyfield_t) * fb_info.cols * fb_info.rows;
interbuffer = as_get_mappable_page(ib_size);
 
if (as_area_create(interbuffer, ib_size, AS_AREA_READ |
AS_AREA_WRITE | AS_AREA_CACHEABLE) != interbuffer) {
interbuffer = NULL;
}
 
if (interbuffer) {
interbuffer = mmap(NULL,
sizeof(keyfield_t) * fb_info.cols * fb_info.rows,
PROTO_READ | PROTO_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, 0, 0);
if (!interbuffer) {
if (ipc_share_out_start(fb_info.phone, interbuffer,
AS_AREA_READ) != EOK) {
as_area_destroy(interbuffer);
munmap(interbuffer,
sizeof(keyfield_t) * fb_info.cols * fb_info.rows);
interbuffer = NULL;
}
}
 
curs_goto(0, 0);
curs_visibility(
connections[active_console].screenbuffer.is_cursor_visible);
 
/* Register at NS */
if (ipc_connect_to_me(PHONE_NS, SERVICE_CONSOLE, 0, 0, &phonehash) != 0)
return -1;
/* Receive kernel notifications */
// if (sysinfo_value("kconsole.present")) {
// int inr = sysinfo_value("kconsole.inr");
// if (ipc_register_irq(inr, device_assign_devno(), 0, NULL) != EOK)
// printf(NAME ": Error registering kconsole notifications\n");
//
// async_set_interrupt_received(interrupt_received);
// }
// FIXME: avoid connectiong to itself, keep using klog
// printf(NAME ": Accepting connections\n");
async_manager();
return 0;
 
return 0;
}
 
/** @}
*/
/branches/network/uspace/srv/console/gcons.c
81,7 → 81,7
 
static void vp_switch(int vp)
{
async_msg_1(fbphone, FB_VIEWPORT_SWITCH, vp);
async_msg_1(fbphone,FB_VIEWPORT_SWITCH, vp);
}
 
/** Create view port */
97,15 → 97,15
async_msg_0(fbphone, FB_CLEAR);
}
 
static void set_rgb_color(int fgcolor, int bgcolor)
static void set_style(int fgcolor, int bgcolor)
{
async_msg_2(fbphone, FB_SET_RGB_COLOR, fgcolor, bgcolor);
async_msg_2(fbphone, FB_SET_STYLE, fgcolor, bgcolor);
}
 
/** Transparent putchar */
static void tran_putch(char c, int row, int col)
{
async_msg_3(fbphone, FB_PUTCHAR, c, row, col);
async_msg_3(fbphone, FB_TRANS_PUTCHAR, c, row, col);
}
 
/** Redraw the button showing state of a given console */
189,10 → 189,10
console_state[consnum] = CONS_DISCONNECTED_SEL;
else
console_state[consnum] = CONS_DISCONNECTED;
 
if (active_console == KERNEL_CONSOLE)
return;
 
redraw_state(consnum);
vp_switch(console_vp);
}
217,10 → 217,16
/** Change to kernel console */
void gcons_in_kernel(void)
{
if (console_state[active_console] == CONS_DISCONNECTED_SEL)
console_state[active_console] = CONS_DISCONNECTED;
else
console_state[active_console] = CONS_IDLE;
redraw_state(active_console);
 
if (animation != -1)
async_msg_1(fbphone, FB_ANIM_STOP, animation);
active_console = KERNEL_CONSOLE;
 
active_console = KERNEL_CONSOLE; /* Set to kernel console */
vp_switch(0);
}
 
244,8 → 250,8
*/
void gcons_mouse_move(int dx, int dy)
{
mouse_x = limit(mouse_x + dx, 0, xres);
mouse_y = limit(mouse_y + dy, 0, yres);
mouse_x = limit(mouse_x+dx, 0, xres);
mouse_y = limit(mouse_y+dy, 0, yres);
 
async_msg_2(fbphone, FB_POINTER_MOVE, mouse_x, mouse_y);
}
252,7 → 258,7
 
static int gcons_find_conbut(int x, int y)
{
int status_start = STATUS_START + (xres - 800) / 2;
int status_start = STATUS_START + (xres - 800) / 2;;
 
if (y < STATUS_TOP || y >= STATUS_TOP + STATUS_HEIGHT)
return -1;
262,10 → 268,10
if (x >= status_start + (STATUS_WIDTH + STATUS_SPACE) * CONSOLE_COUNT)
return -1;
if (((x - status_start) % (STATUS_WIDTH + STATUS_SPACE)) < STATUS_SPACE)
if (((x - status_start) % (STATUS_WIDTH+STATUS_SPACE)) < STATUS_SPACE)
return -1;
return (x - status_start) / (STATUS_WIDTH + STATUS_SPACE);
return (x - status_start) / (STATUS_WIDTH+STATUS_SPACE);
}
 
/** Handle mouse click
336,23 → 342,22
extern int _binary_helenos_ppm_size;
extern char _binary_nameic_ppm_start[0];
extern int _binary_nameic_ppm_size;
 
/** Redraws console graphics */
void gcons_redraw_console(void)
/** Redraws console graphics */
static void gcons_redraw_console(void)
{
int i;
 
if (!use_gcons)
return;
vp_switch(0);
set_rgb_color(MAIN_COLOR, MAIN_COLOR);
set_style(MAIN_COLOR, MAIN_COLOR);
clear();
draw_pixmap(_binary_helenos_ppm_start,
(size_t) &_binary_helenos_ppm_size, xres - 66, 2);
draw_pixmap(_binary_nameic_ppm_start,
(size_t) &_binary_nameic_ppm_size, 5, 17);
 
for (i = 0; i < CONSOLE_COUNT; i++)
redraw_state(i);
vp_switch(console_vp);
454,16 → 459,16
int rc;
int i;
int status_start = STATUS_START;
 
fbphone = phone;
 
rc = async_req_0_2(phone, FB_GET_RESOLUTION, &xres, &yres);
if (rc)
return;
if ((xres < 800) || (yres < 600))
if (xres < 800 || yres < 600)
return;
 
/* create console viewport */
/* Align width & height to character size */
console_vp = vp_create(CONSOLE_MARGIN, CONSOLE_TOP,
481,7 → 486,7
if (cstatus_vp[i] < 0)
return;
vp_switch(cstatus_vp[i]);
set_rgb_color(0x202020, 0xffffff);
set_style(0x202020, 0xffffff);
}
/* Initialize icons */
501,12 → 506,13
ic_pixmaps[CONS_DISCONNECTED_SEL] = ic_pixmaps[CONS_SELECTED];
make_anim();
 
use_gcons = 1;
console_state[0] = CONS_DISCONNECTED_SEL;
console_state[KERNEL_CONSOLE] = CONS_KERNEL;
gcons_redraw_console();
}
 
/** @}
*/
 
/branches/network/uspace/srv/console/console.h
39,6 → 39,15
 
#define CONSOLE_COUNT 12
 
#define CONSOLE_GETCHAR 1026
#define CONSOLE_PUTCHAR 1027
#define CONSOLE_CLEAR 1028
#define CONSOLE_GOTO 1029
#define CONSOLE_GETSIZE 1030
#define CONSOLE_FLUSH 1031
#define CONSOLE_SET_STYLE 1032
#define CONSOLE_CURSOR_VISIBILITY 1033
 
#endif
/** @}
/branches/network/uspace/srv/console/screenbuffer.c
33,7 → 33,6
*/
 
#include <screenbuffer.h>
#include <console/style.h>
#include <malloc.h>
#include <unistd.h>
 
50,7 → 49,7
field = get_field_at(scr, scr->position_x, scr->position_y);
 
field->character = c;
field->attrs = scr->attrs;
field->style = scr->style;
}
 
/** Initilize screenbuffer. Allocate space for screen content in accordance to given size.
68,8 → 67,8
scr->size_x = size_x;
scr->size_y = size_y;
scr->attrs.t = at_style;
scr->attrs.a.s.style = STYLE_NORMAL;
scr->style.fg_color = DEFAULT_FOREGROUND;
scr->style.bg_color = DEFAULT_BACKGROUND;
scr->is_cursor_visible = 1;
screenbuffer_clear(scr);
86,7 → 85,7
for (i = 0; i < (scr->size_x * scr->size_y); i++) {
scr->buffer[i].character = ' ';
scr->buffer[i].attrs = scr->attrs;
scr->buffer[i].style = scr->style;
}
 
scr->top_line = 0;
104,7 → 103,7
for (i = 0; i < scr->size_x; i++) {
scr->buffer[i + line * scr->size_x].character = ' ';
scr->buffer[i + line * scr->size_x].attrs = scr->attrs;
scr->buffer[i + line * scr->size_x].style = scr->style;
}
}
 
137,37 → 136,12
* @param fg_color
* @param bg_color
*/
void screenbuffer_set_style(screenbuffer_t *scr, int style)
void screenbuffer_set_style(screenbuffer_t *scr, unsigned int fg_color, unsigned int bg_color)
{
scr->attrs.t = at_style;
scr->attrs.a.s.style = style;
scr->style.fg_color = fg_color;
scr->style.bg_color = bg_color;
}
 
/** Set new color.
* @param scr
* @param fg_color
* @param bg_color
*/
void screenbuffer_set_color(screenbuffer_t *scr, unsigned int fg_color, unsigned int bg_color, unsigned int flags)
{
scr->attrs.t = at_idx;
scr->attrs.a.i.fg_color = fg_color;
scr->attrs.a.i.bg_color = bg_color;
scr->attrs.a.i.flags = flags;
}
 
/** Set new RGB color.
* @param scr
* @param fg_color
* @param bg_color
*/
void screenbuffer_set_rgb_color(screenbuffer_t *scr, unsigned int fg_color, unsigned int bg_color)
{
scr->attrs.t = at_rgb;
scr->attrs.a.r.fg_color = fg_color;
scr->attrs.a.r.bg_color = bg_color;
}
 
/** @}
*/
/branches/network/uspace/srv/console/gcons.h
36,7 → 36,6
#define _GCONS_H_
 
void gcons_init(int phone);
void gcons_redraw_console(void);
void gcons_change_console(int consnum);
void gcons_notify_char(int consnum);
void gcons_in_kernel(void);
/branches/network/uspace/srv/console/screenbuffer.h
35,52 → 35,28
#ifndef __SCREENBUFFER_H__
#define __SCREENBUFFER_H__
 
#include <stdint.h>
 
#define DEFAULT_FOREGROUND 0x0 /**< default console foreground color */
#define DEFAULT_BACKGROUND 0xf0f0f0 /**< default console background color */
 
typedef struct {
uint8_t style;
} attr_style_t;
unsigned int bg_color; /**< background color */
unsigned int fg_color; /**< foreground color */
} style_t;
 
typedef struct {
uint8_t fg_color;
uint8_t bg_color;
uint8_t flags;
} attr_idx_t;
 
typedef struct {
uint32_t bg_color; /**< background color */
uint32_t fg_color; /**< foreground color */
} attr_rgb_t;
 
typedef struct {
enum {
at_style,
at_idx,
at_rgb
} t;
union {
attr_style_t s;
attr_idx_t i;
attr_rgb_t r;
} a;
} attrs_t;
 
/** One field on screen. It contain one character and its attributes. */
typedef struct {
char character; /**< Character itself */
attrs_t attrs; /**< Character`s attributes */
style_t style; /**< Character`s attributes */
} keyfield_t;
 
/** Structure for buffering state of one virtual console.
*/
typedef struct {
keyfield_t *buffer; /**< Screen content - characters and their attributes. Used as a circular buffer. */
keyfield_t *buffer; /**< Screen content - characters and its style. Used as cyclyc buffer. */
unsigned int size_x, size_y; /**< Number of columns and rows */
unsigned int position_x, position_y; /**< Coordinates of last printed character for determining cursor position */
attrs_t attrs; /**< Current attributes. */
style_t style; /**< Current style */
unsigned int top_line; /**< Points to buffer[][] line that will be printed at screen as the first line */
unsigned char is_cursor_visible; /**< Cursor state - default is visible */
} screenbuffer_t;
96,23 → 72,14
return scr->buffer + x + ((y + scr->top_line) % scr->size_y) * scr->size_x;
}
 
/** Compares two sets of attributes.
/** Compares two styles.
* @param s1 first style
* @param s2 second style
* @return nonzero on equality
*/
static inline int attrs_same(attrs_t a1, attrs_t a2)
static inline int style_same(style_t s1, style_t s2)
{
if (a1.t != a2.t) return 0;
 
switch (a1.t) {
case at_style: return a1.a.s.style == a2.a.s.style;
case at_idx: return a1.a.i.fg_color == a2.a.i.fg_color &&
a1.a.i.bg_color == a2.a.i.bg_color &&
a1.a.i.flags == a2.a.i.flags;
case at_rgb: return a1.a.r.fg_color == a2.a.r.fg_color &&
a1.a.r.bg_color == a2.a.r.bg_color;
}
return s1.fg_color == s2.fg_color && s1.bg_color == s2.bg_color;
}
 
 
123,11 → 90,7
void screenbuffer_clear_line(screenbuffer_t *scr, unsigned int line);
void screenbuffer_copy_buffer(screenbuffer_t *scr, keyfield_t *dest);
void screenbuffer_goto(screenbuffer_t *scr, unsigned int x, unsigned int y);
void screenbuffer_set_style(screenbuffer_t *scr, int style);
void screenbuffer_set_color(screenbuffer_t *scr, unsigned int fg_color,
unsigned int bg_color, unsigned int attr);
void screenbuffer_set_rgb_color(screenbuffer_t *scr, unsigned int fg_color,
unsigned int bg_color);
void screenbuffer_set_style(screenbuffer_t *scr, unsigned int fg_color, unsigned int bg_color);
 
#endif
 
/branches/network/uspace/srv/devmap/Makefile
31,7 → 31,6
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
CFLAGS += -I../libipc/include
45,7 → 44,7
SOURCES = \
devmap.c
 
CFLAGS += -D$(UARCH)
CFLAGS += -D$(ARCH)
 
OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
 
56,13 → 55,13
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend $(OBJECTS)
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm: $(OUTPUT).disasm
 
/branches/network/uspace/srv/devmap/devmap.c
28,9 → 28,9
 
/**
* @defgroup devmap Device mapper.
* @brief HelenOS device mapper.
* @brief HelenOS device mapper.
* @{
*/
*/
 
/** @file
*/
46,24 → 46,17
#include <string.h>
#include <ipc/devmap.h>
 
#define NAME "devmap"
#define NAME "devmap"
 
/** Pending lookup structure. */
typedef struct {
link_t link;
char *name; /**< Device name */
ipc_callid_t callid; /**< Call ID waiting for the lookup */
} pending_req_t;
 
LIST_INITIALIZE(devices_list);
LIST_INITIALIZE(drivers_list);
LIST_INITIALIZE(pending_req);
 
/* Locking order:
* drivers_list_futex
* devices_list_futex
* (devmap_driver_t *)->devices_futex
* create_handle_futex
/* order of locking:
* drivers_list_futex
* devices_list_futex
* (devmap_driver_t *)->devices_futex
* create_handle_futex
**/
 
static atomic_t devices_list_futex = FUTEX_INITIALIZER;
70,28 → 63,27
static atomic_t drivers_list_futex = FUTEX_INITIALIZER;
static atomic_t create_handle_futex = FUTEX_INITIALIZER;
 
 
static int devmap_create_handle(void)
{
static int last_handle = 0;
int handle;
 
/* TODO: allow reusing old handles after their unregistration
* and implement some version of LRU algorithm
*/
and implement some version of LRU algorithm */
/* FIXME: overflow */
futex_down(&create_handle_futex);
futex_down(&create_handle_futex);
 
last_handle += 1;
handle = last_handle;
futex_up(&create_handle_futex);
 
futex_up(&create_handle_futex);
 
return handle;
}
 
 
/** Initialize device mapper.
/** Initialize device mapper.
*
*
*/
98,7 → 90,7
static int devmap_init()
{
/* TODO: */
 
return EOK;
}
 
107,101 → 99,108
*/
static devmap_device_t *devmap_device_find_name(const char *name)
{
link_t *item = devices_list.next;
link_t *item;
devmap_device_t *device = NULL;
 
item = devices_list.next;
 
while (item != &devices_list) {
 
device = list_get_instance(item, devmap_device_t, devices);
if (0 == strcmp(device->name, name))
if (0 == strcmp(device->name, name)) {
break;
}
item = item->next;
}
 
if (item == &devices_list)
return NULL;
 
device = list_get_instance(item, devmap_device_t, devices);
return device;
}
 
/** Find device with given handle.
*
* @todo: use hash table
*
*/
static devmap_device_t *devmap_device_find_handle(int handle)
{
futex_down(&devices_list_futex);
link_t *item = (&devices_list)->next;
link_t *item;
devmap_device_t *device = NULL;
futex_down(&devices_list_futex);
 
item = (&devices_list)->next;
 
while (item != &devices_list) {
 
device = list_get_instance(item, devmap_device_t, devices);
if (device->handle == handle)
if (device->handle == handle) {
break;
}
item = item->next;
}
 
if (item == &devices_list) {
futex_up(&devices_list_futex);
return NULL;
}
 
device = list_get_instance(item, devmap_device_t, devices);
futex_up(&devices_list_futex);
 
return device;
}
 
/**
*
* Unregister device and free it. It's assumed that driver's device list is
* already locked.
*
*/
static int devmap_device_unregister_core(devmap_device_t *device)
{
 
list_remove(&(device->devices));
list_remove(&(device->driver_devices));
free(device->name);
 
free(device->name);
free(device);
 
 
return EOK;
}
 
/**
*
* Read info about new driver and add it into linked list of registered
* drivers.
*
*/
static void devmap_driver_register(devmap_driver_t **odriver)
{
size_t name_size;
ipc_callid_t callid;
ipc_call_t call;
devmap_driver_t *driver;
ipc_callid_t iid;
ipc_call_t icall;
 
*odriver = NULL;
ipc_call_t icall;
ipc_callid_t iid = async_get_call(&icall);
iid = async_get_call(&icall);
 
if (IPC_GET_METHOD(icall) != DEVMAP_DRIVER_REGISTER) {
ipc_answer_0(iid, EREFUSED);
return;
}
devmap_driver_t *driver = (devmap_driver_t *) malloc(sizeof(devmap_driver_t));
if (driver == NULL) {
}
 
if (NULL ==
(driver = (devmap_driver_t *)malloc(sizeof(devmap_driver_t)))) {
ipc_answer_0(iid, ENOMEM);
return;
}
/*
 
/*
* Get driver name
*/
ipc_callid_t callid;
size_t name_size;
if (!ipc_data_write_receive(&callid, &name_size)) {
free(driver);
ipc_answer_0(callid, EREFUSED);
208,7 → 207,7
ipc_answer_0(iid, EREFUSED);
return;
}
 
if (name_size > DEVMAP_NAME_MAXLEN) {
free(driver);
ipc_answer_0(callid, EINVAL);
215,18 → 214,17
ipc_answer_0(iid, EREFUSED);
return;
}
 
/*
* Allocate buffer for device name.
*/
driver->name = (char *) malloc(name_size + 1);
if (driver->name == NULL) {
if (NULL == (driver->name = (char *)malloc(name_size + 1))) {
free(driver);
ipc_answer_0(callid, ENOMEM);
ipc_answer_0(iid, EREFUSED);
return;
}
}
 
/*
* Send confirmation to sender and get data into buffer.
*/
236,23 → 234,22
ipc_answer_0(iid, EREFUSED);
return;
}
 
driver->name[name_size] = 0;
 
/* Initialize futex for list of devices owned by this driver */
futex_initialize(&(driver->devices_futex), 1);
/*
 
/*
* Initialize list of asociated devices
*/
list_initialize(&(driver->devices));
/*
 
/*
* Create connection to the driver
*/
ipc_call_t call;
callid = async_get_call(&call);
 
if (IPC_M_CONNECT_TO_ME != IPC_GET_METHOD(call)) {
ipc_answer_0(callid, ENOTSUP);
261,95 → 258,73
ipc_answer_0(iid, ENOTSUP);
return;
}
 
driver->phone = IPC_GET_ARG5(call);
ipc_answer_0(callid, EOK);
list_initialize(&(driver->drivers));
 
futex_down(&drivers_list_futex);
futex_down(&drivers_list_futex);
/* TODO:
* check that no driver with name equal to driver->name is registered
*/
/*
 
/*
* Insert new driver into list of registered drivers
*/
list_append(&(driver->drivers), &drivers_list);
futex_up(&drivers_list_futex);
futex_up(&drivers_list_futex);
ipc_answer_0(iid, EOK);
 
*odriver = driver;
}
 
/**
* Unregister device driver, unregister all its devices and free driver
/** Unregister device driver, unregister all its devices and free driver
* structure.
*
*/
static int devmap_driver_unregister(devmap_driver_t *driver)
{
if (driver == NULL)
devmap_device_t *device;
 
if (NULL == driver)
return EEXISTS;
futex_down(&drivers_list_futex);
futex_down(&drivers_list_futex);
 
ipc_hangup(driver->phone);
/* remove it from list of drivers */
list_remove(&(driver->drivers));
 
/* unregister all its devices */
futex_down(&devices_list_futex);
futex_down(&devices_list_futex);
futex_down(&(driver->devices_futex));
 
while (!list_empty(&(driver->devices))) {
devmap_device_t *device = list_get_instance(driver->devices.next,
device = list_get_instance(driver->devices.next,
devmap_device_t, driver_devices);
devmap_device_unregister_core(device);
}
futex_up(&(driver->devices_futex));
futex_up(&devices_list_futex);
futex_up(&drivers_list_futex);
futex_up(&devices_list_futex);
futex_up(&drivers_list_futex);
 
/* free name and driver */
if (NULL != driver->name)
if (NULL != driver->name) {
free(driver->name);
}
 
free(driver);
 
return EOK;
}
 
 
/** Process pending lookup requests */
static void process_pending_lookup()
{
link_t *cur;
loop:
for (cur = pending_req.next; cur != &pending_req; cur = cur->next) {
pending_req_t *pr = list_get_instance(cur, pending_req_t, link);
const devmap_device_t *dev = devmap_device_find_name(pr->name);
if (!dev)
continue;
ipc_answer_1(pr->callid, EOK, dev->handle);
free(pr->name);
list_remove(cur);
free(pr);
goto loop;
}
}
 
 
/** Register instance of device
*
*/
356,27 → 331,29
static void devmap_device_register(ipc_callid_t iid, ipc_call_t *icall,
devmap_driver_t *driver)
{
if (driver == NULL) {
ipc_callid_t callid;
size_t size;
devmap_device_t *device;
 
if (NULL == driver) {
ipc_answer_0(iid, EREFUSED);
return;
}
/* Create new device entry */
devmap_device_t *device = (devmap_device_t *) malloc(sizeof(devmap_device_t));
if (device == NULL) {
if (NULL ==
(device = (devmap_device_t *) malloc(sizeof(devmap_device_t)))) {
ipc_answer_0(iid, ENOMEM);
return;
}
/* Get device name */
ipc_callid_t callid;
size_t size;
if (!ipc_data_write_receive(&callid, &size)) {
free(device);
ipc_answer_0(iid, EREFUSED);
return;
}
 
if (size > DEVMAP_NAME_MAXLEN) {
free(device);
ipc_answer_0(callid, EINVAL);
386,8 → 363,8
/* +1 for terminating \0 */
device->name = (char *) malloc(size + 1);
if (device->name == NULL) {
 
if (NULL == device->name) {
free(device);
ipc_answer_0(callid, ENOMEM);
ipc_answer_0(iid, EREFUSED);
396,12 → 373,12
ipc_data_write_finalize(callid, device->name, size);
device->name[size] = 0;
 
list_initialize(&(device->devices));
list_initialize(&(device->driver_devices));
futex_down(&devices_list_futex);
 
futex_down(&devices_list_futex);
 
/* Check that device with such name is not already registered */
if (NULL != devmap_device_find_name(device->name)) {
printf(NAME ": Device '%s' already registered\n", device->name);
411,26 → 388,24
ipc_answer_0(iid, EEXISTS);
return;
}
 
/* Get unique device handle */
device->handle = devmap_create_handle();
device->handle = devmap_create_handle();
 
device->driver = driver;
/* Insert device into list of all devices */
list_append(&device->devices, &devices_list);
 
/* Insert device into list of devices that belog to one driver */
futex_down(&device->driver->devices_futex);
list_append(&device->driver_devices, &device->driver->devices);
futex_up(&device->driver->devices_futex);
futex_up(&devices_list_futex);
futex_up(&device->driver->devices_futex);
futex_up(&devices_list_futex);
 
ipc_answer_1(iid, EOK, device->handle);
process_pending_lookup();
}
 
/**
440,142 → 415,129
devmap_driver_t *driver)
{
/* TODO */
 
return EOK;
}
 
/** Connect client to the device.
*
* Find device driver owning requested device and forward
* the message to it.
*
*/
static void devmap_forward(ipc_callid_t callid, ipc_call_t *call)
{
devmap_device_t *dev;
int handle;
 
/*
* Get handle from request
*/
int handle = IPC_GET_ARG2(*call);
devmap_device_t *dev = devmap_device_find_handle(handle);
handle = IPC_GET_ARG2(*call);
dev = devmap_device_find_handle(handle);
 
if (NULL == dev) {
ipc_answer_0(callid, ENOENT);
return;
}
}
 
ipc_forward_fast(callid, dev->driver->phone, (ipcarg_t)(dev->handle),
IPC_GET_ARG3(*call), 0, IPC_FF_NONE);
}
 
/** Find handle for device instance identified by name.
*
* In answer will be send EOK and device handle in arg1 or a error
* code from errno.h.
*
* code from errno.h.
*/
static void devmap_get_handle(ipc_callid_t iid, ipc_call_t *icall)
{
/*
char *name = NULL;
size_t name_size;
const devmap_device_t *dev;
ipc_callid_t callid;
ipcarg_t retval;
/*
* Wait for incoming message with device name (but do not
* read the name itself until the buffer is allocated).
*/
ipc_callid_t callid;
size_t size;
if (!ipc_data_write_receive(&callid, &size)) {
if (!ipc_data_write_receive(&callid, &name_size)) {
ipc_answer_0(callid, EREFUSED);
ipc_answer_0(iid, EREFUSED);
return;
}
if ((size < 1) || (size > DEVMAP_NAME_MAXLEN)) {
 
if (name_size > DEVMAP_NAME_MAXLEN) {
ipc_answer_0(callid, EINVAL);
ipc_answer_0(iid, EREFUSED);
return;
}
 
/*
* Allocate buffer for device name.
*/
char *name = (char *) malloc(size);
if (name == NULL) {
if (NULL == (name = (char *)malloc(name_size))) {
ipc_answer_0(callid, ENOMEM);
ipc_answer_0(iid, EREFUSED);
return;
}
}
 
/*
* Send confirmation to sender and get data into buffer.
*/
ipcarg_t retval = ipc_data_write_finalize(callid, name, size);
if (retval != EOK) {
if (EOK != (retval = ipc_data_write_finalize(callid, name,
name_size))) {
ipc_answer_0(iid, EREFUSED);
free(name);
return;
}
name[size] = '\0';
 
/*
* Find device name in linked list of known devices.
*/
const devmap_device_t *dev = devmap_device_find_name(name);
dev = devmap_device_find_name(name);
 
/*
* Device was not found.
*/
if (dev == NULL) {
if (IPC_GET_ARG1(*icall) & IPC_FLAG_BLOCKING) {
/* Blocking lookup, add to pending list */
pending_req_t *pr = (pending_req_t *) malloc(sizeof(pending_req_t));
if (!pr) {
ipc_answer_0(iid, ENOMEM);
free(name);
return;
}
pr->name = name;
pr->callid = iid;
list_append(&pr->link, &pending_req);
return;
}
if (NULL == dev) {
ipc_answer_0(iid, ENOENT);
free(name);
return;
}
 
ipc_answer_1(iid, EOK, dev->handle);
free(name);
}
 
/** Find name of device identified by id and send it to caller.
/** Find name of device identified by id and send it to caller.
*
*/
static void devmap_get_name(ipc_callid_t iid, ipc_call_t *icall)
{
const devmap_device_t *device = devmap_device_find_handle(IPC_GET_ARG1(*icall));
const devmap_device_t *device;
size_t name_size;
 
device = devmap_device_find_handle(IPC_GET_ARG1(*icall));
 
/*
* Device not found.
*/
if (device == NULL) {
if (NULL == device) {
ipc_answer_0(iid, ENOENT);
return;
}
 
ipc_answer_0(iid, EOK);
 
name_size = strlen(device->name);
 
 
/* FIXME:
we have no channel from DEVMAP to client ->
sending must be initiated by client
 
int rc = ipc_data_write_send(phone, device->name, name_size);
if (rc != EOK) {
async_wait_for(req, NULL);
return rc;
}
ipc_answer_0(iid, EOK);
size_t name_size = strlen(device->name);
/* FIXME:
* We have no channel from DEVMAP to client, therefore
* sending must be initiated by client.
*
* int rc = ipc_data_write_send(phone, device->name, name_size);
* if (rc != EOK) {
* async_wait_for(req, NULL);
* return rc;
* }
*/
*/
/* TODO: send name in response */
}
 
584,30 → 546,31
*/
static void devmap_connection_driver(ipc_callid_t iid, ipc_call_t *icall)
{
/* Accept connection */
ipc_answer_0(iid, EOK);
ipc_callid_t callid;
ipc_call_t call;
bool cont = true;
devmap_driver_t *driver = NULL;
 
ipc_answer_0(iid, EOK);
 
devmap_driver_register(&driver);
 
if (NULL == driver)
return;
bool cont = true;
while (cont) {
ipc_call_t call;
ipc_callid_t callid = async_get_call(&call);
switch (IPC_GET_METHOD(call)) {
callid = async_get_call(&call);
 
switch (IPC_GET_METHOD(call)) {
case IPC_M_PHONE_HUNGUP:
cont = false;
/* Exit thread */
continue;
continue; /* Exit thread */
case DEVMAP_DRIVER_UNREGISTER:
if (NULL == driver)
if (NULL == driver) {
ipc_answer_0(callid, ENOENT);
else
} else {
ipc_answer_0(callid, EOK);
}
break;
case DEVMAP_DEVICE_REGISTER:
/* Register one instance of device */
624,18 → 587,20
devmap_get_handle(callid, &call);
break;
default:
if (!(callid & IPC_CALLID_NOTIFICATION))
if (!(callid & IPC_CALLID_NOTIFICATION)) {
ipc_answer_0(callid, ENOENT);
}
}
}
if (NULL != driver) {
/*
/*
* Unregister the device driver and all its devices.
*/
devmap_driver_unregister(driver);
driver = NULL;
}
}
 
/** Handle connection with device client.
643,21 → 608,23
*/
static void devmap_connection_client(ipc_callid_t iid, ipc_call_t *icall)
{
/* Accept connection */
ipc_answer_0(iid, EOK);
ipc_callid_t callid;
ipc_call_t call;
bool cont = true;
 
ipc_answer_0(iid, EOK); /* Accept connection */
 
while (cont) {
ipc_call_t call;
ipc_callid_t callid = async_get_call(&call);
switch (IPC_GET_METHOD(call)) {
callid = async_get_call(&call);
 
switch (IPC_GET_METHOD(call)) {
case IPC_M_PHONE_HUNGUP:
cont = false;
/* Exit thread */
continue;
continue; /* Exit thread */
 
case DEVMAP_DEVICE_GET_HANDLE:
devmap_get_handle(callid, &call);
devmap_get_handle(callid, &call);
 
break;
case DEVMAP_DEVICE_GET_NAME:
/* TODO */
664,13 → 631,14
devmap_get_name(callid, &call);
break;
default:
if (!(callid & IPC_CALLID_NOTIFICATION))
if (!(callid & IPC_CALLID_NOTIFICATION)) {
ipc_answer_0(callid, ENOENT);
}
}
}
}
 
/** Function for handling connections to devmap
/** Function for handling connections to devmap
*
*/
static void devmap_connection(ipc_callid_t iid, ipc_call_t *icall)
688,9 → 656,10
devmap_forward(iid, icall);
break;
default:
/* No such interface */
ipc_answer_0(iid, ENOENT);
ipc_answer_0(iid, ENOENT); /* No such interface */
}
 
/* Cleanup */
}
 
/**
700,6 → 669,8
{
printf(NAME ": HelenOS Device Mapper\n");
ipcarg_t phonead;
 
if (devmap_init() != 0) {
printf(NAME ": Error while initializing service\n");
return -1;
707,15 → 678,13
/* Set a handler of incomming connections */
async_set_client_connection(devmap_connection);
 
/* Register device mapper at naming service */
ipcarg_t phonead;
if (ipc_connect_to_me(PHONE_NS, SERVICE_DEVMAP, 0, 0, &phonead) != 0)
return -1;
printf(NAME ": Accepting connections\n");
async_manager();
/* Never reached */
return 0;
}
/branches/network/uspace/srv/pci/Makefile
31,7 → 31,6
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
 
53,7 → 52,7
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend $(OBJECTS)
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
$(MAKE) -C libpci clean
 
depend:
61,7 → 60,7
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(MAKE) -C libpci
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm:
$(OBJDUMP) -d $(OUTPUT) >$(OUTPUT).disasm
/branches/network/uspace/doc/doxygroups.h
41,16 → 41,6
* @ingroup netif
*/
 
/**
* @defgroup dp8390 Generic DP8390 network interface family service
* @ingroup netif
*/
 
/**
* @defgroup ne2k NE2000 network interface family
* @ingroup dp8390
*/
 
/**
* @defgroup net_nil Network interface layer
* @ingroup net
/branches/network/uspace/app/trace/errors.h
File deleted
/branches/network/uspace/app/trace/syscalls.h
File deleted
/branches/network/uspace/app/trace/proto.c
File deleted
/branches/network/uspace/app/trace/trace.h
File deleted
/branches/network/uspace/app/trace/proto.h
File deleted
/branches/network/uspace/app/trace/ipc_desc.c
File deleted
/branches/network/uspace/app/trace/ipcp.c
File deleted
/branches/network/uspace/app/trace/errors.c
File deleted
/branches/network/uspace/app/trace/Makefile
File deleted
/branches/network/uspace/app/trace/syscalls.c
File deleted
/branches/network/uspace/app/trace/trace.c
File deleted
/branches/network/uspace/app/trace/ipc_desc.h
File deleted
/branches/network/uspace/app/trace/ipcp.h
File deleted
/branches/network/uspace/app/init/init.c
27,9 → 27,9
*/
 
/** @addtogroup init Init
* @brief Init process for user space environment configuration.
* @brief Init process for testing purposes.
* @{
*/
*/
/**
* @file
*/
36,7 → 36,6
 
#include <stdio.h>
#include <unistd.h>
#include <ipc/ipc.h>
#include <vfs/vfs.h>
#include <bool.h>
#include <errno.h>
43,17 → 42,22
#include <fcntl.h>
#include <task.h>
#include <malloc.h>
#include <macros.h>
#include "init.h"
#include "version.h"
 
static void console_wait(void)
{
while (get_cons_phone() < 0)
usleep(50000); // FIXME
}
 
static bool mount_fs(const char *fstype)
{
int rc = -1;
while (rc < 0) {
rc = mount(fstype, "/", "initrd", IPC_FLAG_BLOCKING);
rc = mount(fstype, "/", "initrd");
 
switch (rc) {
case EOK:
printf(NAME ": Root filesystem mounted\n");
67,6 → 71,8
case ENOENT:
printf(NAME ": Unknown filesystem type (%s)\n", fstype);
return false;
default:
sleep(5); // FIXME
}
}
76,17 → 82,15
static void spawn(char *fname)
{
char *argv[2];
 
printf(NAME ": Spawning %s\n", fname);
 
argv[0] = fname;
argv[1] = NULL;
if (task_spawn(fname, argv)) {
/* Add reasonable delay to avoid intermixed klog output. */
usleep(10000);
} else {
printf(NAME ": Error spawning %s\n", fname);
 
if (task_spawn(fname, argv) != 0) {
/* Success */
sleep(1);
}
}
 
93,25 → 97,23
int main(int argc, char *argv[])
{
info_print();
sleep(5); // FIXME
if (!mount_fs(STRING(RDFMT))) {
if (!mount_fs("tmpfs") && !mount_fs("fat")) {
printf(NAME ": Exiting\n");
return -1;
}
// FIXME: spawn("/srv/pci");
spawn("/srv/fb");
spawn("/srv/kbd");
// FIXME: spawn("/sbin/pci");
spawn("/sbin/fb");
spawn("/sbin/kbd");
spawn("/sbin/networking_startup");
spawn("/srv/console");
spawn("/srv/fhc");
spawn("/srv/obio");
spawn("/sbin/console");
console_wait();
version_print();
spawn("/app/klog");
spawn("/app/bdsh");
spawn("/sbin/bdsh");
return 0;
}
/branches/network/uspace/app/init/Makefile
27,6 → 27,7
#
 
include ../../../version
include ../../Makefile.config
 
## Setup toolchain
#
33,14 → 34,21
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
CFLAGS += -I../../srv/kbd/include
 
LIBS = $(LIBC_PREFIX)/libc.a
DEFS += -DRELEASE=$(RELEASE)
DEFS += -DRELEASE=\"$(RELEASE)\"
 
ifdef REVISION
DEFS += "-DREVISION=\"$(REVISION)\""
endif
 
ifdef TIMESTAMP
DEFS += "-DTIMESTAMP=\"$(TIMESTAMP)\""
endif
 
## Sources
#
 
58,13 → 66,13
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend $(OBJECTS)
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm: $(OUTPUT).disasm
 
/branches/network/uspace/app/init/version.c
35,20 → 35,19
 
#include <unistd.h>
#include <stdio.h>
#include <macros.h>
#include "init.h"
#include "version.h"
 
char *release = STRING(RELEASE);
char *release = RELEASE;
 
#ifdef REVISION
char *revision = ", revision " STRING(REVISION);
char *revision = ", revision " REVISION;
#else
char *revision = "";
#endif
 
#ifdef TIMESTAMP
char *timestamp = "\nBuilt on " STRING(TIMESTAMP);
char *timestamp = "\nBuilt on " TIMESTAMP;
#else
char *timestamp = "";
#endif
61,8 → 60,7
/** Print version information. */
void version_print(void)
{
printf("HelenOS init\nRelease %s%s%s\n", release, revision, timestamp);
printf("Copyright (c) 2001-2009 HelenOS project\n");
printf("HelenOS init\nRelease %s%s%s\nCopyright (c) 2006 HelenOS project\n", release, revision, timestamp);
}
 
/** @}
/branches/network/uspace/app/bdsh/scli.c
45,6 → 45,7
/* Globals that are modified during start-up that modules/builtins
* should be aware of. */
volatile unsigned int cli_quit = 0;
volatile unsigned int cli_interactive = 1;
volatile unsigned int cli_verbocity = 1;
 
/* The official name of this program
52,8 → 53,8
const char *progname = PACKAGE_NAME;
 
/* These are not exposed, even to builtins */
static int cli_init(cliuser_t *);
static void cli_finit(cliuser_t *);
static int cli_init(cliuser_t *usr);
static void cli_finit(cliuser_t *usr);
 
/* Constructor */
static int cli_init(cliuser_t *usr)
93,7 → 94,6
get_input(&usr);
if (NULL != usr.line) {
ret = tok_input(&usr);
cli_set_prompt(&usr);
usr.lasterr = ret;
}
}
/branches/network/uspace/app/bdsh/cmds/builtins/exit/entry.h
File deleted
/branches/network/uspace/app/bdsh/cmds/builtins/exit/exit.c
File deleted
/branches/network/uspace/app/bdsh/cmds/builtins/exit/exit_def.h
File deleted
/branches/network/uspace/app/bdsh/cmds/builtins/exit/exit.h
File deleted
/branches/network/uspace/app/bdsh/cmds/builtins/cd/cd.c
42,7 → 42,7
 
static char * cmdname = "cd";
 
void help_cmd_cd(unsigned int level)
void * help_cmd_cd(unsigned int level)
{
if (level == HELP_SHORT) {
printf("`%s' changes the current working directory.\n", cmdname);
53,12 → 53,12
cmdname, cmdname);
}
 
return;
return CMD_VOID;
}
 
/* This is a very rudamentary 'cd' command. It is not 'link smart' (yet) */
 
int cmd_cd(char **argv, cliuser_t *usr)
int * cmd_cd(char **argv, cliuser_t *usr)
{
int argc, rc = 0;
 
/branches/network/uspace/app/bdsh/cmds/builtins/cd/cd_def.h
3,4 → 3,12
"Change the current working directory",
&cmd_cd,
&help_cmd_cd,
-1
},
{
"chdir",
NULL,
&cmd_cd,
&help_cmd_cd,
-1
},
/branches/network/uspace/app/bdsh/cmds/builtins/cd/entry.h
4,8 → 4,8
#include "scli.h"
 
/* Entry points for the cd command */
extern void help_cmd_cd(unsigned int);
extern int cmd_cd(char **, cliuser_t *);
extern void * help_cmd_cd(unsigned int);
extern int * cmd_cd(char **, cliuser_t *);
 
#endif
 
/branches/network/uspace/app/bdsh/cmds/builtins/builtins.h
4,11 → 4,9
#include "config.h"
 
#include "cd/entry.h"
#include "exit/entry.h"
 
builtin_t builtins[] = {
#include "cd/cd_def.h"
#include "exit/exit_def.h"
{NULL, NULL, NULL, NULL}
};
 
/branches/network/uspace/app/bdsh/cmds/builtins/builtin_aliases.h
4,6 → 4,7
/* See modules/module_aliases.h for an explanation of this file */
 
char *builtin_aliases[] = {
"chdir", "cd",
NULL, NULL
};
 
/branches/network/uspace/app/bdsh/cmds/modules/cp/cp.h
File deleted
/branches/network/uspace/app/bdsh/cmds/modules/cp/cp.c
File deleted
/branches/network/uspace/app/bdsh/cmds/modules/cp/cp_def.h
File deleted
/branches/network/uspace/app/bdsh/cmds/modules/cp/entry.h
File deleted
/branches/network/uspace/app/bdsh/cmds/modules/sleep/sleep.c
File deleted
/branches/network/uspace/app/bdsh/cmds/modules/sleep/sleep_def.h
File deleted
/branches/network/uspace/app/bdsh/cmds/modules/sleep/sleep.h
File deleted
/branches/network/uspace/app/bdsh/cmds/modules/sleep/entry.h
File deleted
/branches/network/uspace/app/bdsh/cmds/modules/touch/touch.c
37,7 → 37,6
#include <fcntl.h>
#include <dirent.h>
#include <sys/types.h>
#include <string.h>
 
#include "config.h"
#include "errors.h"
49,7 → 48,7
static char *cmdname = "touch";
 
/* Dispays help for touch in various levels */
void help_cmd_touch(unsigned int level)
void * help_cmd_touch(unsigned int level)
{
if (level == HELP_SHORT) {
printf("`%s' updates access times for files\n", cmdname);
59,11 → 58,11
"created\n", cmdname);
}
 
return;
return CMD_VOID;
}
 
/* Main entry point for touch, accepts an array of arguments */
int cmd_touch(char **argv)
int * cmd_touch(char **argv)
{
unsigned int argc, i = 0, ret = 0;
int fd;
80,7 → 79,7
}
 
for (i = 1; i < argc; i ++) {
buff = strdup(argv[i]);
buff = cli_strdup(argv[i]);
dirp = opendir(buff);
if (dirp) {
cli_error(CL_ENOTSUP, "%s is a directory", buff);
/branches/network/uspace/app/bdsh/cmds/modules/touch/touch_def.h
3,5 → 3,6
"Create files or update access times",
&cmd_touch,
&help_cmd_touch,
0
},
 
/branches/network/uspace/app/bdsh/cmds/modules/touch/entry.h
2,8 → 2,8
#define TOUCH_ENTRY_H
 
/* Entry points for the touch command */
extern int cmd_touch(char **);
extern void help_cmd_touch(unsigned int);
extern int * cmd_touch(char **);
extern void * help_cmd_touch(unsigned int);
 
#endif /* TOUCH_ENTRY_H */
 
/branches/network/uspace/app/bdsh/cmds/modules/mkdir/mkdir.c
60,7 → 60,7
};
 
 
void help_cmd_mkdir(unsigned int level)
void * help_cmd_mkdir(unsigned int level)
{
if (level == HELP_SHORT) {
printf("`%s' creates a new directory\n", cmdname);
79,7 → 79,7
cmdname, cmdname);
}
 
return;
return CMD_VOID;
}
 
/* This is kind of clunky, but effective for now */
93,7 → 93,7
 
/* Its a good idea to allocate path, plus we (may) need a copy of
* path to tokenize if parents are specified */
if (NULL == (tmp = strdup(path))) {
if (NULL == (tmp = cli_strdup(path))) {
cli_error(CL_ENOMEM, "%s: path too big?", cmdname);
return 1;
}
128,9 → 128,9
absolute = 1;
 
/* TODO: Canonify the path prior to tokenizing it, see below */
dirs[i] = strtok(tmp, "/");
dirs[i] = cli_strtok(tmp, "/");
while (dirs[i] && i < 255)
dirs[++i] = strtok(NULL, "/");
dirs[++i] = cli_strtok(NULL, "/");
 
if (NULL == dirs[0])
return 1;
181,7 → 181,7
return ret;
}
 
int cmd_mkdir(char **argv)
int * cmd_mkdir(char **argv)
{
unsigned int argc, create_parents = 0, i, ret = 0, follow = 0;
unsigned int verbose = 0;
/branches/network/uspace/app/bdsh/cmds/modules/mkdir/mkdir_def.h
3,6 → 3,14
"Create new directories",
&cmd_mkdir,
&help_cmd_mkdir,
0
},
 
{
"md",
NULL,
&cmd_mkdir,
&help_cmd_mkdir,
0
},
 
/branches/network/uspace/app/bdsh/cmds/modules/mkdir/entry.h
2,8 → 2,8
#define MKDIR_ENTRY_H
 
/* Entry points for the mkdir command */
extern int cmd_mkdir(char **);
extern void help_cmd_mkdir(unsigned int);
extern int * cmd_mkdir(char **);
extern void * help_cmd_mkdir(unsigned int);
 
#endif /* MKDIR_ENTRY_H */
 
/branches/network/uspace/app/bdsh/cmds/modules/cat/cat.c
59,7 → 59,7
};
 
/* Dispays help for cat in various levels */
void help_cmd_cat(unsigned int level)
void * help_cmd_cat(unsigned int level)
{
if (level == HELP_SHORT) {
printf("`%s' shows the contents of files\n", cmdname);
78,7 → 78,7
cmdname, cmdname);
}
 
return;
return CMD_VOID;
}
 
static unsigned int cat_file(const char *fname, size_t blen)
103,11 → 103,13
}
 
do {
memset(buff, 0, sizeof(buff));
bytes = read(fd, buff, blen);
if (bytes > 0) {
count += bytes;
buff[bytes] = '\0';
printf("%s", buff);
if (bytes < blen)
buff[bytes] = '\0';
printf(buff);
reads++;
}
} while (bytes > 0);
119,6 → 121,12
return 1;
}
 
/* Debug stuff, newline not added purposefully */
printf("** %s is a file with the size of %ld bytes\n",
fname, total);
printf( "** %d bytes were read in a buffer of %d bytes in %d reads\n",
count, blen, reads);
printf("** Read %s\n", count == total ? "Succeeded" : "Failed");
free(buff);
 
return 0;
125,7 → 133,7
}
 
/* Main entry point for cat, accepts an array of arguments */
int cmd_cat(char **argv)
int * cmd_cat(char **argv)
{
unsigned int argc, i, ret = 0, buffer = 0;
int c, opt_ind;
/branches/network/uspace/app/bdsh/cmds/modules/cat/cat_def.h
3,5 → 3,6
"Show the contents of a file",
&cmd_cat,
&help_cmd_cat,
0
},
 
/branches/network/uspace/app/bdsh/cmds/modules/cat/entry.h
2,8 → 2,8
#define CAT_ENTRY_H
 
/* Entry points for the cat command */
extern int cmd_cat(char **);
extern void help_cmd_cat(unsigned int);
extern int * cmd_cat(char **);
extern void * help_cmd_cat(unsigned int);
 
#endif /* CAT_ENTRY_H */
 
/branches/network/uspace/app/bdsh/cmds/modules/help/help.c
69,7 → 69,7
return HELP_IS_RUBBISH;
}
 
void help_cmd_help(unsigned int level)
void *help_cmd_help(unsigned int level)
{
if (level == HELP_SHORT) {
printf(
86,10 → 86,10
cmdname, cmdname, cmdname, cmdname);
}
 
return;
return CMD_VOID;
}
 
int cmd_help(char *argv[])
int *cmd_help(char *argv[])
{
module_t *mod;
builtin_t *cmd;
133,11 → 133,13
 
/* First, show a list of built in commands that are available in this mode */
for (cmd = builtins; cmd->name != NULL; cmd++, i++) {
if (!builtin_is_restricted(i)) {
if (is_builtin_alias(cmd->name))
printf(" %-16s\tAlias for `%s'\n", cmd->name,
alias_for_builtin(cmd->name));
else
printf(" %-16s\t%s\n", cmd->name, cmd->desc);
}
}
 
i = 0;
144,11 → 146,13
 
/* Now, show a list of module commands that are available in this mode */
for (mod = modules; mod->name != NULL; mod++, i++) {
if (!module_is_restricted(i)) {
if (is_module_alias(mod->name))
printf(" %-16s\tAlias for `%s'\n", mod->name,
alias_for_module(mod->name));
else
printf(" %-16s\t%s\n", mod->name, mod->desc);
}
}
 
printf("\n Try %s %s for more information on how `%s' works.\n\n",
/branches/network/uspace/app/bdsh/cmds/modules/help/help_def.h
3,4 → 3,5
"Show help for commands",
&cmd_help,
&help_cmd_help,
0
},
/branches/network/uspace/app/bdsh/cmds/modules/help/entry.h
2,7 → 2,7
#define HELP_ENTRY_H_
 
/* Entry points for the help command */
extern void help_cmd_help(unsigned int);
extern int cmd_help(char *[]);
extern void * help_cmd_help(unsigned int);
extern int * cmd_help(char *[]);
 
#endif
/branches/network/uspace/app/bdsh/cmds/modules/ls/ls.c
50,24 → 50,6
 
static char *cmdname = "ls";
 
static inline off_t flen(const char *f)
{
int fd;
off_t size;
 
fd = open(f, O_RDONLY);
if (fd == -1)
return 0;
 
size = lseek(fd, 0, SEEK_END);
close(fd);
 
if (size < 0)
size = 0;
 
return size;
}
 
static unsigned int ls_scope(const char *path)
{
int fd;
114,7 → 96,7
ls_print_dir(dp->d_name);
break;
case LS_FILE:
ls_print_file(dp->d_name, buff);
ls_print_file(dp->d_name);
break;
case LS_BOGUS:
/* Odd chance it was deleted from the time readdir() found
138,19 → 120,19
 
static void ls_print_dir(const char *d)
{
printf("%-40s\t<dir>\n", d);
printf("%-40s\t<DIR>\n", d);
 
return;
}
 
static void ls_print_file(const char *name, const char *pathname)
static void ls_print_file(const char *f)
{
printf("%-40s\t%llu\n", name, (long long) flen(pathname));
printf("%-40s\n", f);
 
return;
}
 
void help_cmd_ls(unsigned int level)
void * help_cmd_ls(unsigned int level)
{
if (level == HELP_SHORT) {
printf("`%s' lists files and directories.\n", cmdname);
160,10 → 142,10
"working directory is used.\n", cmdname);
}
 
return;
return CMD_VOID;
}
 
int cmd_ls(char **argv)
int * cmd_ls(char **argv)
{
unsigned int argc;
unsigned int scope;
192,7 → 174,7
free(buff);
return CMD_FAILURE;
case LS_FILE:
ls_print_file(buff, buff);
ls_print_file(buff);
break;
case LS_DIR:
dirp = opendir(buff);
/branches/network/uspace/app/bdsh/cmds/modules/ls/ls_def.h
3,4 → 3,14
"List files and directories",
&cmd_ls,
&help_cmd_ls,
0
},
 
{
"dir",
NULL,
&cmd_ls,
&help_cmd_ls,
0
},
 
/branches/network/uspace/app/bdsh/cmds/modules/ls/ls.h
10,7 → 10,7
static unsigned int ls_scope(const char *);
static void ls_scan_dir(const char *, DIR *);
static void ls_print_dir(const char *);
static void ls_print_file(const char *, const char *);
static void ls_print_file(const char *);
 
#endif /* LS_H */
 
/branches/network/uspace/app/bdsh/cmds/modules/ls/entry.h
2,8 → 2,8
#define LS_ENTRY_H
 
/* Entry points for the ls command */
extern int cmd_ls(char **);
extern void help_cmd_ls(unsigned int);
extern int * cmd_ls(char **);
extern void * help_cmd_ls(unsigned int);
 
#endif /* LS_ENTRY_H */
 
/branches/network/uspace/app/bdsh/cmds/modules/rm/rm.c
33,6 → 33,7
#include <unistd.h>
#include <fcntl.h>
#include <dirent.h>
#include <assert.h>
#include <getopt.h>
 
#include "config.h"
143,7 → 144,7
}
 
/* Dispays help for rm in various levels */
void help_cmd_rm(unsigned int level)
void * help_cmd_rm(unsigned int level)
{
if (level == HELP_SHORT) {
printf("`%s' removes files and directories.\n", cmdname);
160,11 → 161,11
"Currently, %s is under development, some options don't work.\n",
cmdname, cmdname);
}
return;
return CMD_VOID;
}
 
/* Main entry point for rm, accepts an array of arguments */
int cmd_rm(char **argv)
int * cmd_rm(char **argv)
{
unsigned int argc;
unsigned int i, scope, ret = 0;
218,11 → 219,7
while (NULL != argv[i]) {
len = strlen(argv[i]) + 2;
buff = (char *) realloc(buff, len);
if (buff == NULL) {
printf("rm: out of memory\n");
ret = 1;
break;
}
assert(buff != NULL);
memset(buff, 0, sizeof(buff));
snprintf(buff, len, argv[i]);
 
/branches/network/uspace/app/bdsh/cmds/modules/rm/rm_def.h
3,5 → 3,14
"Remove files and directories",
&cmd_rm,
&help_cmd_rm,
0
},
 
{
"del",
NULL,
&cmd_rm,
&help_cmd_rm,
0
},
 
/branches/network/uspace/app/bdsh/cmds/modules/rm/entry.h
2,8 → 2,8
#define RM_ENTRY_H
 
/* Entry points for the rm command */
extern int cmd_rm(char **);
extern void help_cmd_rm(unsigned int);
extern int * cmd_rm(char **);
extern void * help_cmd_rm(unsigned int);
 
#endif /* RM_ENTRY_H */
 
/branches/network/uspace/app/bdsh/cmds/modules/pwd/pwd_def.h
3,4 → 3,5
"Prints the current working directory",
&cmd_pwd,
&help_cmd_pwd,
-1
},
/branches/network/uspace/app/bdsh/cmds/modules/pwd/entry.h
4,8 → 4,8
#include "scli.h"
 
/* Entry points for the pwd command */
extern void help_cmd_pwd(unsigned int);
extern int cmd_pwd(char **);
extern void * help_cmd_pwd(unsigned int);
extern int * cmd_pwd(char **);
 
#endif
 
/branches/network/uspace/app/bdsh/cmds/modules/pwd/pwd.c
39,13 → 39,13
 
static char * cmdname = "pwd";
 
void help_cmd_pwd(unsigned int level)
void * help_cmd_pwd(unsigned int level)
{
printf("`%s' prints your current working directory.\n", cmdname);
return;
return CMD_VOID;
}
 
int cmd_pwd(char *argv[])
int * cmd_pwd(char *argv[])
{
char *buff;
 
/branches/network/uspace/app/bdsh/cmds/modules/modules.h
18,6 → 18,7
/* Prototypes for each module's entry (help/exec) points */
 
#include "help/entry.h"
#include "quit/entry.h"
#include "mkdir/entry.h"
#include "rm/entry.h"
#include "cat/entry.h"
24,8 → 25,6
#include "touch/entry.h"
#include "ls/entry.h"
#include "pwd/entry.h"
#include "sleep/entry.h"
#include "cp/entry.h"
 
/* Each .def function fills the module_t struct with the individual name, entry
* point, help entry point, etc. You can use config.h to control what modules
33,6 → 32,7
 
module_t modules[] = {
#include "help/help_def.h"
#include "quit/quit_def.h"
#include "mkdir/mkdir_def.h"
#include "rm/rm_def.h"
#include "cat/cat_def.h"
39,8 → 39,6
#include "touch/touch_def.h"
#include "ls/ls_def.h"
#include "pwd/pwd_def.h"
#include "sleep/sleep_def.h"
#include "cp/cp_def.h"
{NULL, NULL, NULL, NULL}
};
 
/branches/network/uspace/app/bdsh/cmds/modules/module_aliases.h
12,6 → 12,10
* the entry point being reached. */
 
char *mod_aliases[] = {
"exit", "quit",
"md", "mkdir",
"del", "rm",
"dir", "ls",
NULL, NULL
};
 
/branches/network/uspace/app/bdsh/cmds/mknewcmd
46,6 → 46,8
-e, --entry Entry function of the command (def: cmd_${def})
-h, --help-entry Entry function for command help (def: help_cmd_${def})
-a, --alias Alias (nickname) for this command (def: none)
-r, --restrict Restriction level (interactive, non-interactive, both)
(def: module is both, builtin is interactive only)
-t, --type Type of command (module or builtin) (def: module)
-H, --help This help summary
-V, --version Print $PROGNAME version and exit normally
65,7 → 67,8
$PROGNAME -n foo -d "Foo power" -a bar -r both -t module modules/foo
 
The example would generate a modular command named 'foo', which is also
reached by typing 'bar'.
reached by typing 'bar' and available in either interactive or noninteractive
mode.
 
Skeletal files do *not* depend on the autoconf generated "config.h" unless you
include it. This may or may not be desirable depending on your use.
94,6 → 97,7
"${CMDDESC}",
&${CMDENTRY},
&${HELPENTRY},
${CMDRESTRICT}
},
 
EOF
103,6 → 107,7
NULL,
&${CMDENTRY},
&${HELPENTRY},
${CMDRESTRICT}
},
 
EOF
115,8 → 120,8
EOF
[ "${CMDTYPE}" = "module" ] && cat << EOF >> ${OUTDIR}/entry.h
/* Entry points for the ${CMDNAME} command */
extern int ${CMDENTRY}(char **);
extern void ${HELPENTRY}(unsigned int);
extern int * ${CMDENTRY}(char **);
extern void * ${HELPENTRY}(unsigned int);
 
#endif /* ${defname}_ENTRY_H */
 
162,25 → 167,25
#include "${CMDNAME}.h"
#include "cmds.h"
 
static const char *cmdname = "${CMDNAME}";
static char *cmdname = "${CMDNAME}";
 
/* Dispays help for ${CMDNAME} in various levels */
void ${HELPENTRY}(unsigned int level)
void * ${HELPENTRY}(unsigned int level)
{
printf("This is the %s help for '%s'.\n",
level ? EXT_HELP : SHORT_HELP, cmdname);
return;
return CMD_VOID;
}
 
EOF
[ "${CMDTYPE}" = "module" ] && cat << EOF >> ${OUTDIR}/${CMDNAME}.c
/* Main entry point for ${CMDNAME}, accepts an array of arguments */
int ${CMDENTRY}(char **argv)
int * ${CMDENTRY}(char **argv)
EOF
[ "${CMDTYPE}" = "builtin" ] && cat << EOF >> ${OUTDIR}/${CMDNAME}.c
/* Main entry point for ${CMDNAME}, accepts an array of arguments and a
* pointer to the cliuser_t structure */
int ${CMDENTRY}(char **argv, cliuser_t *usr)
int * ${CMDENTRY}(char **argv, cliuser_t *usr)
EOF
cat << EOF >> ${OUTDIR}/${CMDNAME}.c
{
229,8 → 234,8
# We need at least one
[ $# = 0 ] && usage && exit 1;
 
TEMP=$(getopt -o n:d:e:h:a:t:HV \
--long name:,desc:,entry:,help-entry:,alias:,type:,help,version \
TEMP=$(getopt -o n:d:e:h:a:r:t:HV \
--long name:,desc:,entry:,help-entry:,alias:,restrict:,type:,help,version \
-- "$@") || {
echo "Try $PROGNAME --help for help"
}
264,6 → 269,11
shift 2
continue
;;
-r | --restrict)
CMDRESTRICT="$2"
shift 2
continue
;;
-t | --type)
CMDTYPE="$2"
shift 2
295,7 → 305,30
[ -n "$CMDTYPE" ] || CMDTYPE="module"
[ -n "$OUTDIR" ] || OUTDIR="${CMDTYPE}s/${CMDNAME}"
 
# Builtins typically only need to be available in interactive mode,
# set the default accordingly.
[ -n "$CMDRESTRICT" ] || {
[ "$CMDTYPE" = "module" ] && CMDRESTRICT="both"
[ "$CMDTYPE" = "builtin" ] && CMDRESTRICT="interactive"
}
 
# Set the restriction level as the structure expects to see it
case "$CMDRESTRICT" in
0 | both)
CMDRESTRICT="0"
;;
1 | non-interactive)
CMDRESTRICT="1"
;;
-1 | interactive)
CMDRESTRICT="-1"
;;
*)
usage
exit 1
;;
esac
 
# Do a little sanity
[ -d $OUTDIR ] && {
echo "$OUTDIR already exists, remove it to proceed."
/branches/network/uspace/app/bdsh/cmds/mod_cmds.c
53,6 → 53,26
 
extern volatile unsigned int cli_interactive;
 
int module_is_restricted(int pos)
{
/* Restriction Levels:
* -1 -> Available only in interactive mode
* 0 -> Available in any mode
* 1 -> Available only in non-interactive mode */
 
module_t *mod = modules;
mod += pos;
/* We're interactive, and the module is OK to run */
if (cli_interactive && mod->restricted <= 0)
return 0;
/* We're not interactive, and the module is OK to run */
if (!cli_interactive && mod->restricted >= 0)
return 0;
 
/* Anything else is just a big fat no :) */
return 1;
}
 
/* Checks if an entry function matching command exists in modules[], if so
* its position in the array is returned */
int is_module(const char *command)
/branches/network/uspace/app/bdsh/cmds/cmds.h
19,16 → 19,17
#define BUFF_SMALL 255
 
/* Return macros for int type entry points */
#define CMD_FAILURE 1
#define CMD_FAILURE (int*)1
#define CMD_SUCCESS 0
#define CMD_VOID (void *)NULL
 
/* Types for module command entry and help */
typedef int (* mod_entry_t)(char **);
typedef void (* mod_help_t)(unsigned int);
typedef int * (* mod_entry_t)(char **);
typedef void * (* mod_help_t)(unsigned int);
 
/* Built-in commands need to be able to modify cliuser_t */
typedef int (* builtin_entry_t)(char **, cliuser_t *);
typedef void (* builtin_help_t)(unsigned int);
typedef int * (* builtin_entry_t)(char **, cliuser_t *);
typedef void * (* builtin_help_t)(unsigned int);
 
/* Module structure */
typedef struct {
36,6 → 37,7
char *desc; /* Description of the command */
mod_entry_t entry; /* Command (exec) entry function */
mod_help_t help; /* Command (help) entry function */
int restricted; /* Restricts to interactive/non-interactive only */
} module_t;
 
/* Builtin structure, same as modules except different types of entry points */
/branches/network/uspace/app/bdsh/cmds/builtin_cmds.c
40,6 → 40,19
 
extern volatile unsigned int cli_interactive;
 
int builtin_is_restricted(int pos)
{
builtin_t *cmd = builtins;
cmd += pos;
 
if (cli_interactive && cmd->restricted <= 0)
return 0;
if (!cli_interactive && cmd->restricted >= 0)
return 0;
 
return 1;
}
 
int is_builtin(const char *command)
{
builtin_t *cmd;
/branches/network/uspace/app/bdsh/util.c
1,4 → 1,7
/* Copyright (c) 2008, Tim Post <tinkertim@gmail.com> - All rights reserved
/* Copyright (c) 2008, Tim Post <tinkertim@gmail.com>
* Copyright (C) 1998 by Wes Peters <wes@softweyr.com>
* Copyright (c) 1988, 1993 The Regents of the University of California.
* All rights reserved by all copyright holders.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
27,6 → 30,18
* POSSIBILITY OF SUCH DAMAGE.
*/
 
/* NOTES:
* 1 - Various functions were adapted from FreeBSD (copyright holders noted above)
* these functions are identified with comments.
*
* 2 - Some of these have since appeared in libc. They remain here for various
* reasons, such as the eventual integration of garbage collection for things
* that allocate memory and don't automatically free it.
*
* 3 - Things that expect a pointer to an allocated string do _no_ sanity checking
* if developing on a simulator with no debugger, take care :)
*/
 
#include <stdio.h>
#include <string.h>
#include <stdarg.h>
39,6 → 54,190
 
extern volatile int cli_errno;
 
/* some platforms do not have strdup, implement it here.
* Returns a pointer to an allocated string or NULL on failure */
char * cli_strdup(const char *s1)
{
size_t len = strlen(s1) + 1;
void *ret = malloc(len);
 
if (ret == NULL) {
cli_errno = CL_ENOMEM;
return (char *) NULL;
}
 
cli_errno = CL_EOK;
return (char *) memcpy(ret, s1, len);
}
 
/*
* Take a previously allocated string (s1), re-size it to accept s2 and copy
* the contents of s2 into s1.
* Return -1 on failure, or the length of the copied string on success.
*/
int cli_redup(char **s1, const char *s2)
{
size_t len = strlen(s2) + 1;
 
if (! len)
return -1;
 
*s1 = realloc(*s1, len);
 
if (*s1 == NULL) {
cli_errno = CL_ENOMEM;
return -1;
}
 
memset(*s1, 0, sizeof(*s1));
memcpy(*s1, s2, len);
cli_errno = CL_EOK;
return (int) len;
}
 
/* An asprintf() for formatting paths, similar to asprintf() but ensures
* the returned allocated string is <= PATH_MAX. On failure, an attempt
* is made to return the original string (if not null) unmodified.
*
* Returns: Length of the new string on success, 0 if the string was handed
* back unmodified, -1 on failure. On failure, cli_errno is set.
*
* We do not use POSIX_PATH_MAX, as it is typically much smaller than the
* PATH_MAX defined by the kernel.
*
* Use this like:
* if (1 > cli_psprintf(&char, "%s/%s", foo, bar)) {
* cli_error(cli_errno, "Failed to format path");
* stop_what_your_doing_as_your_out_of_memory();
* }
*/
 
int cli_psprintf(char **s1, const char *fmt, ...)
{
va_list ap;
size_t needed, base = PATH_MAX + 1;
int skipped = 0;
char *orig = NULL;
char *tmp = (char *) malloc(base);
 
/* Don't even touch s1, not enough memory */
if (NULL == tmp) {
cli_errno = CL_ENOMEM;
return -1;
}
 
/* If re-allocating s1, save a copy in case we fail */
if (NULL != *s1)
orig = cli_strdup(*s1);
 
/* Print the string to tmp so we can determine the size that
* we actually need */
memset(tmp, 0, sizeof(tmp));
va_start(ap, fmt);
/* vsnprintf will return the # of bytes not written */
skipped = vsnprintf(tmp, base, fmt, ap);
va_end(ap);
 
/* realloc/alloc s1 to be just the size that we need */
needed = strlen(tmp) + 1;
*s1 = realloc(*s1, needed);
 
if (NULL == *s1) {
/* No string lived here previously, or we failed to
* make a copy of it, either way there's nothing we
* can do. */
if (NULL == *orig) {
cli_errno = CL_ENOMEM;
return -1;
}
/* We can't even allocate enough size to restore the
* saved copy, just give up */
*s1 = realloc(*s1, strlen(orig) + 1);
if (NULL == *s1) {
free(tmp);
free(orig);
cli_errno = CL_ENOMEM;
return -1;
}
/* Give the string back as we found it */
memset(*s1, 0, sizeof(*s1));
memcpy(*s1, orig, strlen(orig) + 1);
free(tmp);
free(orig);
cli_errno = CL_ENOMEM;
return 0;
}
 
/* Ok, great, we have enough room */
memset(*s1, 0, sizeof(*s1));
memcpy(*s1, tmp, needed);
free(tmp);
 
/* Free tmp only if s1 was reallocated instead of allocated */
if (NULL != orig)
free(orig);
 
if (skipped) {
/* s1 was bigger than PATH_MAX when expanded, however part
* of the string was printed. Tell the caller not to use it */
cli_errno = CL_ETOOBIG;
return -1;
}
 
/* Success! */
cli_errno = CL_EOK;
return (int) needed;
}
/* Ported from FBSD strtok.c 8.1 (Berkeley) 6/4/93 */
char * cli_strtok_r(char *s, const char *delim, char **last)
{
char *spanp, *tok;
int c, sc;
 
if (s == NULL && (s = *last) == NULL) {
cli_errno = CL_EFAIL;
return (NULL);
}
 
cont:
c = *s++;
for (spanp = (char *)delim; (sc = *spanp++) != 0;) {
if (c == sc)
goto cont;
}
 
if (c == 0) { /* no non-delimiter characters */
*last = NULL;
return (NULL);
}
 
tok = s - 1;
 
for (;;) {
c = *s++;
spanp = (char *)delim;
do {
if ((sc = *spanp++) == c) {
if (c == 0)
s = NULL;
else
s[-1] = '\0';
*last = s;
return (tok);
}
} while (sc != 0);
}
}
 
/* Ported from FBSD strtok.c 8.1 (Berkeley) 6/4/93 */
char * cli_strtok(char *s, const char *delim)
{
static char *last;
 
return (cli_strtok_r(s, delim, &last));
}
 
/* Count and return the # of elements in an array */
unsigned int cli_count_args(char **args)
{
74,7 → 273,10
if (NULL == usr->cwd)
snprintf(usr->cwd, PATH_MAX, "(unknown)");
 
asprintf(&usr->prompt, "%s # ", usr->cwd);
if (1 < cli_psprintf(&usr->prompt, "%s # ", usr->cwd)) {
cli_error(cli_errno, "Failed to set prompt");
return 1;
}
 
return 0;
}
/branches/network/uspace/app/bdsh/util.h
3,6 → 3,13
 
#include "scli.h"
 
/* Internal string handlers */
extern char * cli_strdup(const char *);
extern int cli_redup(char **, const char *);
extern int cli_psprintf(char **, const char *, ...);
extern char * cli_strtok_r(char *, const char *, char **);
extern char * cli_strtok(char *, const char *);
 
/* Utility functions */
extern unsigned int cli_count_args(char **);
extern unsigned int cli_set_prompt(cliuser_t *usr);
/branches/network/uspace/app/bdsh/Makefile
30,17 → 30,25
# POSSIBILITY OF SUCH DAMAGE.
 
include ../../../version
include ../../Makefile.config
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
CFLAGS += -I../../srv/kbd/include
 
LIBS = $(LIBC_PREFIX)/libc.a
DEFS += -DRELEASE=$(RELEASE)
DEFS += -DRELEASE=\"$(RELEASE)\"
 
ifdef REVISION
DEFS += "-DREVISION=\"$(TIMESTAMP)\""
endif
 
ifdef TIMESTAMP
DEFS += "-DTIMESTAMP=\"$(TIMESTAMP)\""
endif
 
PROGRAM = bdsh
 
# Any directory that cleaning targets should know about
49,6 → 57,7
cmds/ \
cmds/modules/ \
cmds/modules/help/ \
cmds/modules/quit/ \
cmds/modules/mkdir/ \
cmds/modules/rm/ \
cmds/modules/cat/ \
55,14 → 64,12
cmds/modules/touch/ \
cmds/modules/ls/ \
cmds/modules/pwd/ \
cmds/modules/sleep/ \
cmds/modules/cp/ \
cmds/builtins/ \
cmds/builtins/exit/\
cmds/builtins/cd/
 
SOURCES = \
cmds/modules/help/help.c \
cmds/modules/quit/quit.c \
cmds/modules/mkdir/mkdir.c \
cmds/modules/rm/rm.c \
cmds/modules/cat/cat.c \
69,9 → 76,6
cmds/modules/touch/touch.c \
cmds/modules/ls/ls.c \
cmds/modules/pwd/pwd.c \
cmds/modules/sleep/sleep.c \
cmds/modules/cp/cp.c \
cmds/builtins/exit/exit.c \
cmds/builtins/cd/cd.c \
cmds/mod_cmds.c \
cmds/builtin_cmds.c \
104,7 → 108,7
@$(CC) -M $(CFLAGS) $(INC) $*.c > $*.d
 
$(PROGRAM): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(PROGRAM).map
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(PROGRAM).map
 
# Everything else is a phony target
.PHONY: all clean distclean depend disasm
/branches/network/uspace/app/bdsh/input.c
33,7 → 33,6
#include <stdlib.h>
#include <string.h>
#include <io/stream.h>
#include <console.h>
 
#include "config.h"
#include "util.h"
42,8 → 41,21
#include "errors.h"
#include "exec.h"
 
extern volatile unsigned int cli_interactive;
 
/* Not exposed in input.h */
static void cli_restricted(char *);
static void read_line(char *, int);
 
/* More than a macro than anything */
static void cli_restricted(char *cmd)
{
printf("%s is not available in %s mode\n", cmd,
cli_interactive ? "interactive" : "non-interactive");
 
return;
}
 
/* Tokenizes input from console, sees if the first word is a built-in, if so
* invokes the built-in entry point (a[0]) passing all arguments in a[] to
* the handler */
57,11 → 69,14
if (NULL == usr->line)
return CL_EFAIL;
 
tmp = strdup(usr->line);
tmp = cli_strdup(usr->line);
 
cmd[n] = strtok(tmp, " ");
/* Break up what the user typed, space delimited */
 
/* TODO: Protect things in quotes / ticks, expand wildcards */
cmd[n] = cli_strtok(tmp, " ");
while (cmd[n] && n < WORD_MAX) {
cmd[++n] = strtok(NULL, " ");
cmd[++n] = cli_strtok(NULL, " ");
}
 
/* We have rubbish */
70,19 → 85,39
goto finit;
}
 
/* Its a builtin command ? */
/* Its a builtin command */
if ((i = (is_builtin(cmd[0]))) > -1) {
/* Its not available in this mode, see what try_exec() thinks */
if (builtin_is_restricted(i)) {
rc = try_exec(cmd[0], cmd);
if (rc)
/* No external matching it could be found, tell the
* user that the command does exist, but is not
* available in this mode. */
cli_restricted(cmd[0]);
goto finit;
}
/* Its a builtin, its available, run it */
rc = run_builtin(i, cmd, usr);
goto finit;
/* Its a module ? */
/* We repeat the same dance for modules */
} else if ((i = (is_module(cmd[0]))) > -1) {
if (module_is_restricted(i)) {
rc = try_exec(cmd[0], cmd);
if (rc)
cli_restricted(cmd[0]);
goto finit;
}
rc = run_module(i, cmd);
goto finit;
} else {
/* Its not a module or builtin, restricted or otherwise.
* See what try_exec() thinks of it and just pass its return
* value back to the caller */
rc = try_exec(cmd[0], cmd);
goto finit;
}
 
/* See what try_exec thinks of it */
rc = try_exec(cmd[0], cmd);
 
finit:
if (NULL != usr->line) {
free(usr->line);
94,6 → 129,7
return rc;
}
 
/* Borrowed from Jiri Svoboda's 'cli' uspace app */
static void read_line(char *buffer, int n)
{
char c;
113,10 → 149,8
}
continue;
}
if (c >= ' ') {
putchar(c);
buffer[chars++] = c;
}
putchar(c);
buffer[chars++] = c;
}
putchar('\n');
buffer[chars] = '\0';
130,16 → 164,13
char line[INPUT_MAX];
size_t len = 0;
 
console_set_style(STYLE_EMPHASIS);
printf("%s", usr->prompt);
console_set_style(STYLE_NORMAL);
 
read_line(line, INPUT_MAX);
len = strlen(line);
/* Make sure we don't have rubbish or a C/R happy user */
if (len == 0 || line[0] == '\n')
return;
usr->line = strdup(line);
usr->line = cli_strdup(line);
 
return;
}
/branches/network/uspace/app/bdsh/exec.c
46,13 → 46,13
#include "errors.h"
 
/* FIXME: Just have find_command() return an allocated string */
static char *found;
char *found;
 
static char *find_command(char *);
static int try_access(const char *);
static unsigned int try_access(const char *);
 
/* work-around for access() */
static int try_access(const char *f)
static unsigned int try_access(const char *f)
{
int fd;
 
80,10 → 80,10
return (char *) cmd;
}
 
path_tok = strdup(PATH);
path_tok = cli_strdup(PATH);
 
/* Extract the PATH env to a path[] array */
path[n] = strtok(path_tok, PATH_DELIM);
path[n] = cli_strtok(path_tok, PATH_DELIM);
while (NULL != path[n]) {
if ((strlen(path[n]) + x ) > PATH_MAX) {
cli_error(CL_ENOTSUP,
91,7 → 91,7
n, n-1);
break;
}
path[++n] = strtok(NULL, PATH_DELIM);
path[++n] = cli_strtok(NULL, PATH_DELIM);
}
 
/* We now have n places to look for the command */
114,14 → 114,14
task_id_t tid;
char *tmp;
 
tmp = strdup(find_command(cmd));
tmp = cli_strdup(find_command(cmd));
free(found);
 
tid = task_spawn((const char *)tmp, argv);
tid = task_spawn((const char *)tmp, (const char **)argv);
free(tmp);
 
if (tid == 0) {
cli_error(CL_EEXEC, "Cannot spawn `%s'.", cmd);
cli_error(CL_EEXEC, "Can not spawn %s", cmd);
return 1;
} else {
return 0;
/branches/network/uspace/app/bdsh/README
57,12 → 57,12
They are typed as such (from cmds.h):
 
/* Types for module command entry and help */
typedef int (* mod_entry_t)(char **);
typedef void (* mod_help_t)(unsigned int);
typedef int * (* mod_entry_t)(char **);
typedef void * (* mod_help_t)(unsigned int);
 
/* Built-in commands need to be able to modify cliuser_t */
typedef int (* builtin_entry_t)(char **, cliuser_t *);
typedef void (* builtin_help_t)(unsigned int);
typedef int * (* builtin_entry_t)(char **, cliuser_t *);
typedef void * (* builtin_help_t)(unsigned int);
 
As you can see, both modular and builtin commands expect an array of
arguments, however bulitins also expect to be pointed to cliuser_t.
153,7 → 153,9
 
2: Change your "usage()" command as shown:
-- void usage(...)
++ void help_cmd_foo(unsigned int level)
++ void * help_cmd_foo(unsigned int level)
-- return;
++ retrn CMD_VOID;
 
'level' is either 0 or 1, indicating the level of help requested.
If the help / usage function currently exits based on how it is
161,19 → 163,33
 
3: Change the programs "main()" as shown:
-- int main(int argc, char **argv)
++ int cmd_foo(char **argv)
++ int * cmd_foo(char **argv)
-- return 1;
++ return CMD_FAILURE;
-- return 0;
++ return CMD_SUCCESS;
 
If main() returns an int that is not 1 or 0 (e.g. 127), cast it as
such:
 
-- return 127;
++ return (int *) 127;
 
NOTE: _ONLY_ the main and help entry points need to return int * or
void *, respectively. Also take note that argc has changed. The type
for entry points may soon change.
 
NOTE: If main is void, you'll need to change it and ensure that its
expecting an array of arguments, even if they'll never be read or
used. I.e.:
 
-- void main(void)
++ int cmd_foo(char **argv)
++ int * cmd_foo(char **argv)
 
Similararly, do not try to return CMD_VOID within the modules main
entry point. If somehow you escape the compiler yelling at you, you
will surely see pretty blue and yellow fireworks once its reached.
 
4: Don't expose more than the entry and help points:
-- void my_function(int n)
++ static void my_function(int n)
/branches/network/uspace/app/bdsh/config.h
1,18 → 1,15
/* Various things that are used in many places including a few
* tidbits left over from autoconf prior to the HelenOS port */
/* Various things that are used in many files
* Various temporary port work-arounds are addressed in __HELENOS__ , this
* serves as a convenience and later as a guide to make "phony.h" for future
* ports */
 
/* Specific port work-arounds : */
#ifndef PATH_MAX
#define PATH_MAX 255
#endif
 
#ifndef EXIT_SUCCESS
#define EXIT_SUCCESS 0
#define EXIT_FAILURE 1
#endif
#define EXIT_FAILURE 0
 
/* Work around for getenv() */
#define PATH "/srv:/app"
#define PATH "/bin:/sbin:/usr/bin:/usr/sbin:/usr/local/bin:/usr/local/sbin"
#define PATH_DELIM ":"
 
/* Used in many places */
29,7 → 26,7
#define PACKAGE_BUGREPORT "echo@echoreply.us"
#define PACKAGE_NAME "bdsh"
#define PACKAGE_STRING "The brain dead shell"
#define PACKAGE_TARNAME "bdsh"
#define PACKAGE_TARNAME "scli"
#define PACKAGE_VERSION "0.0.1"
 
 
/branches/network/uspace/app/bdsh/AUTHORS
8,6 → 8,9
 
* Based on the HelenOS testing sub-system written by Martin Decky
 
* cli_strtok() and cli_strtok_r() (util.c) were adapted from the FreeBSD
strtok() and strtok_r() functions written by Wes Peters.
 
* read_line() (input.c) was written by Jiri Svoboda
 
Individual author copyrights are listed in the headers of each file.
/branches/network/uspace/app/tetris/input.c
57,8 → 57,7
#include "tetris.h"
 
#include <async.h>
#include <ipc/console.h>
#include <kbd/kbd.h>
#include "../../srv/console/console.h"
 
/* return true iff the given timeval is positive */
#define TV_POS(tv) \
112,11 → 111,10
s = NULL;
 
if (!lastchar) {
again:
if (!getchar_inprog) {
cons_phone = get_console_phone();
cons_phone = get_cons_phone();
getchar_inprog = async_send_2(cons_phone,
CONSOLE_GETKEY, 0, 0, &charcall);
CONSOLE_GETCHAR, 0, 0, &charcall);
}
if (!s)
async_wait_for(getchar_inprog, &rc);
129,10 → 127,7
if (rc) {
stop("end of file, help");
}
if (IPC_GET_ARG1(charcall) == KE_RELEASE)
goto again;
 
lastchar = IPC_GET_ARG4(charcall);
lastchar = IPC_GET_ARG1(charcall);
}
if (tvp) {
/* since there is input, we may not have timed out */
/branches/network/uspace/app/tetris/Makefile
1,6 → 1,5
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
LIBS = $(LIBC_PREFIX)/libc.a
19,7 → 18,7
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend *.o
/branches/network/uspace/app/tetris/screen.c
50,12 → 50,13
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <console.h>
#include <io/stream.h>
 
 
#include <async.h>
#include "screen.h"
#include "tetris.h"
#include <ipc/console.h>
#include "../../srv/console/console.h"
 
static cell curscreen[B_SIZE]; /* 1 => standout (or otherwise marked) */
static int curscore;
72,19 → 73,29
putchar(*(s++));
}
 
static int con_phone;
 
 
 
static void set_style(int fgcolor, int bgcolor)
{
async_msg_2(con_phone, CONSOLE_SET_STYLE, fgcolor, bgcolor);
}
 
static void start_standout(void)
{
console_set_rgb_color(0xf0f0f0, 0);
set_style(0xf0f0f0, 0);
}
 
static void resume_normal(void)
{
console_set_rgb_color(0, 0xf0f0f0);
set_style(0, 0xf0f0f0);
}
 
 
void clear_screen(void)
{
console_clear();
async_msg_0(con_phone, CONSOLE_CLEAR);
moveto(0, 0);
}
 
96,7 → 107,7
{
 
resume_normal();
console_clear();
async_msg_0(con_phone, CONSOLE_CLEAR);
curscore = -1;
memset((char *)curscreen, 0, sizeof(curscreen));
}
107,7 → 118,8
void
scr_init(void)
{
console_cursor_visibility(0);
con_phone = get_cons_phone();
async_msg_1(con_phone, CONSOLE_CURSOR_VISIBILITY, 0);
resume_normal();
scr_clear();
}
114,12 → 126,12
 
void moveto(int r, int c)
{
console_goto(r, c);
async_msg_2(con_phone, CONSOLE_GOTO, r, c);
}
 
static void fflush(void)
{
console_flush();
async_msg_0(con_phone, CONSOLE_FLUSH);
}
 
winsize_t winsize;
126,7 → 138,8
 
static int get_display_size(winsize_t *ws)
{
return console_get_size(&ws->ws_row, &ws->ws_col);
return async_req_0_2(con_phone, CONSOLE_GETSIZE, &ws->ws_row,
&ws->ws_col);
}
 
/*
/branches/network/uspace/app/tetris/screen.h
49,8 → 49,8
#include <async.h>
 
typedef struct {
int ws_row;
int ws_col;
ipcarg_t ws_row;
ipcarg_t ws_col;
} winsize_t;
 
extern winsize_t winsize;
/branches/network/uspace/app/tester/loop/loop1.c
File deleted
/branches/network/uspace/app/tester/loop/loop1.def
File deleted
/branches/network/uspace/app/tester/stdio/stdio1.def
File deleted
/branches/network/uspace/app/tester/stdio/stdio2.def
File deleted
/branches/network/uspace/app/tester/stdio/stdio1.c
File deleted
/branches/network/uspace/app/tester/stdio/stdio2.c
File deleted
/branches/network/uspace/app/tester/console/console1.def
File deleted
/branches/network/uspace/app/tester/console/console1.c
File deleted
/branches/network/uspace/app/tester/tester.c
56,11 → 56,7
#include "ipc/answer.def"
#include "ipc/hangup.def"
#include "devmap/devmap1.def"
#include "loop/loop1.def"
#include "vfs/vfs1.def"
#include "console/console1.def"
#include "stdio/stdio1.def"
#include "stdio/stdio2.def"
{NULL, NULL, NULL}
};
 
137,7 → 133,7
if (c == 'a')
break;
if (test->name == NULL)
if (c > 'a')
printf("Unknown test\n\n");
else
run_test(test);
151,8 → 147,6
}
}
 
return 0;
}
 
/** @}
/branches/network/uspace/app/tester/Makefile
31,7 → 31,6
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
CFLAGS += -I../../srv/kbd/include
53,11 → 52,7
ipc/send_sync.c \
ipc/answer.c \
ipc/hangup.c \
loop/loop1.c \
devmap/devmap1.c \
console/console1.c \
stdio/stdio1.c \
stdio/stdio2.c \
vfs/vfs1.c
 
OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
69,13 → 64,13
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend $(OBJECTS)
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm: $(OUTPUT).disasm
 
/branches/network/uspace/app/tester/devmap/devmap1.c
132,10 → 132,12
int phone;
ipcarg_t callback_phonehash;
 
phone = ipc_connect_me_to_blocking(PHONE_NS, SERVICE_DEVMAP, DEVMAP_DRIVER, 0);
if (phone < 0) {
printf("Failed to connect to device mapper\n");
return -1;
phone = ipc_connect_me_to(PHONE_NS, SERVICE_DEVMAP, DEVMAP_DRIVER, 0);
 
while (phone < 0) {
usleep(100000);
phone = ipc_connect_me_to(PHONE_NS, SERVICE_DEVMAP,
DEVMAP_DRIVER, 0);
}
req = async_send_2(phone, DEVMAP_DRIVER_REGISTER, 0, 0, &answer);
/branches/network/uspace/app/tester/vfs/vfs1.c
45,7 → 45,7
{
int rc;
 
rc = mount("tmpfs", "/", "nulldev0", 0);
rc = mount("tmpfs", "/", "nulldev0");
switch (rc) {
case EOK:
if (!quiet)
/branches/network/uspace/app/tester/ipc/send_sync.c
35,6 → 35,7
{
int phoneid;
int res;
static int msgid = 1;
char c;
 
printf("Select phoneid to send msg: 2-9 (q to skip)\n");
/branches/network/uspace/app/tester/tester.h
69,11 → 69,7
extern char * test_answer(bool quiet);
extern char * test_hangup(bool quiet);
extern char * test_devmap1(bool quiet);
extern char * test_loop1(bool quiet);
extern char * test_vfs1(bool quiet);
extern char * test_console1(bool quiet);
extern char * test_stdio1(bool quiet);
extern char * test_stdio2(bool quiet);
 
extern test_t tests[];
 
/branches/network/uspace/app/klog/Makefile
31,7 → 31,6
 
LIBC_PREFIX = ../../lib/libc
SOFTINT_PREFIX = ../../lib/softint
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
LIBS = $(LIBC_PREFIX)/libc.a
53,13 → 52,13
-include Makefile.depend
 
clean:
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend $(OBJECTS)
-rm -f $(OUTPUT) $(OUTPUT).map $(OUTPUT).disasm Makefile.depend
 
depend:
$(CC) $(DEFS) $(CFLAGS) -M $(SOURCES) > Makefile.depend
 
$(OUTPUT): $(OBJECTS) $(LIBS)
$(LD) -T $(LIBC_PREFIX)/arch/$(UARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
$(LD) -T $(LIBC_PREFIX)/arch/$(ARCH)/_link.ld $(OBJECTS) $(LIBS) $(LFLAGS) -o $@ -Map $(OUTPUT).map
 
disasm: $(OUTPUT).disasm
 
/branches/network/uspace/app/klog/klog.c
27,9 → 27,9
*/
 
/** @addtogroup klog KLog
* @brief HelenOS KLog
* @brief HelenOS KLog
* @{
*/
*/
/**
* @file
*/
50,6 → 50,12
/* Pointer to klog area */
static char *klog;
 
static void console_wait(void)
{
while (get_cons_phone() < 0)
usleep(50000); // FIXME
}
 
static void interrupt_received(ipc_callid_t callid, ipc_call_t *call)
{
async_serialize_start();
80,13 → 86,14
printf(NAME ": Error initializing memory area\n");
return -1;
}
 
int inr = sysinfo_value("klog.inr");
int devno = sysinfo_value("klog.devno");
if (ipc_register_irq(inr, devno, 0, NULL) != EOK) {
printf(NAME ": Error registering klog notifications\n");
return -1;
}
// int inr = sysinfo_value("klog.inr");
// if (ipc_register_irq(inr, devno, 0, NULL) != EOK) {
// printf(NAME ": Error registering klog notifications\n");
// return -1;
// }
async_set_interrupt_received(interrupt_received);
klog_update();
async_manager();
/branches/network/uspace/lib/libblock/Makefile
File deleted
/branches/network/uspace/lib/libblock/libblock.c
File deleted
/branches/network/uspace/lib/libblock/libblock.h
File deleted
/branches/network/uspace/lib/libc/include/console.h
File deleted
/branches/network/uspace/lib/libc/include/console/color.h
File deleted
/branches/network/uspace/lib/libc/include/console/style.h
File deleted
/branches/network/uspace/lib/libc/include/macros.h
File deleted
/branches/network/uspace/lib/libc/include/mem.h
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/uspace/lib/libc/include/kbd/keycode.h
File deleted
/branches/network/uspace/lib/libc/include/kbd/kbd.h
File deleted
/branches/network/uspace/lib/libc/include/udebug.h
File deleted
/branches/network/uspace/lib/libc/include/ipc/bus.h
File deleted
/branches/network/uspace/lib/libc/include/ipc/console.h
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/uspace/lib/libc/include/ipc/services.h
30,8 → 30,8
* @{
*/
/**
* @file services.h
* @brief List of all known services and their codes.
* @file services.h
* @brief List of all known services and their codes.
*/
 
#ifndef LIBIPC_SERVICES_H_
38,15 → 38,12
#define LIBIPC_SERVICES_H_
 
typedef enum {
SERVICE_LOAD = 1,
SERVICE_PCI,
SERVICE_PCI = 1,
SERVICE_KEYBOARD,
SERVICE_VIDEO,
SERVICE_CONSOLE,
SERVICE_VFS,
SERVICE_DEVMAP,
SERVICE_FHC,
SERVICE_OBIO,
SERVICE_NETWORKING,
SERVICE_LO,
SERVICE_DP8390_ISA,
/branches/network/uspace/lib/libc/include/ipc/loader.h
32,19 → 32,17
/** @file
*/
 
#ifndef LIBC_IPC_LOADER_H_
#define LIBC_IPC_LOADER_H_
#ifndef LIBC_LOADER_H_
#define LIBC_LOADER_H_
 
#include <ipc/ipc.h>
 
typedef enum {
LOADER_HELLO = IPC_FIRST_USER_METHOD,
LOADER_GET_TASKID,
LOADER_SET_PATHNAME,
LOADER_SET_ARGS,
LOADER_LOAD,
LOADER_RUN
} loader_request_t;
} fb_request_t;
 
#endif
 
/branches/network/uspace/lib/libc/include/ipc/ipc.h
47,7 → 47,8
} ipc_call_t;
typedef sysarg_t ipc_callid_t;
 
typedef void (* ipc_async_callback_t)(void *, int, ipc_call_t *);
typedef void (* ipc_async_callback_t)(void *private, int retval,
ipc_call_t *data);
 
/*
* User-friendly wrappers for ipc_call_sync_fast() and ipc_call_sync_slow().
172,20 → 173,22
ipc_call_sync_slow((phoneid), (method), (arg1), (arg2), (arg3), \
(arg4), (arg5), (res1), (res2), (res3), (res4), (res5))
 
extern int ipc_call_sync_fast(int, ipcarg_t, ipcarg_t, ipcarg_t, ipcarg_t,
ipcarg_t *, ipcarg_t *, ipcarg_t *, ipcarg_t *, ipcarg_t *);
extern int ipc_call_sync_fast(int phoneid, ipcarg_t method, ipcarg_t arg1,
ipcarg_t arg2, ipcarg_t arg3, ipcarg_t *result1, ipcarg_t *result2,
ipcarg_t *result3, ipcarg_t *result4, ipcarg_t *result5);
 
extern int ipc_call_sync_slow(int, ipcarg_t, ipcarg_t, ipcarg_t, ipcarg_t,
ipcarg_t, ipcarg_t, ipcarg_t *, ipcarg_t *, ipcarg_t *, ipcarg_t *,
ipcarg_t *);
extern int ipc_call_sync_slow(int phoneid, ipcarg_t method, ipcarg_t arg1,
ipcarg_t arg2, ipcarg_t arg3, ipcarg_t arg4, ipcarg_t arg5,
ipcarg_t *result1, ipcarg_t *result2, ipcarg_t *result3, ipcarg_t *result4,
ipcarg_t *result5);
 
extern ipc_callid_t ipc_wait_cycle(ipc_call_t *, uint32_t, int);
extern ipc_callid_t ipc_wait_for_call_timeout(ipc_call_t *, uint32_t);
extern ipc_callid_t ipc_wait_cycle(ipc_call_t *call, uint32_t usec, int flags);
extern ipc_callid_t ipc_wait_for_call_timeout(ipc_call_t *data, uint32_t usec);
static inline ipc_callid_t ipc_wait_for_call(ipc_call_t *data)
{
return ipc_wait_for_call_timeout(data, SYNCH_NO_TIMEOUT);
}
extern ipc_callid_t ipc_trywait_for_call(ipc_call_t *);
extern ipc_callid_t ipc_trywait_for_call(ipc_call_t *data);
 
/*
* User-friendly wrappers for ipc_answer_fast() and ipc_answer_slow().
206,10 → 209,10
#define ipc_answer_5(callid, retval, arg1, arg2, arg3, arg4, arg5) \
ipc_answer_slow((callid), (retval), (arg1), (arg2), (arg3), (arg4), (arg5))
 
extern ipcarg_t ipc_answer_fast(ipc_callid_t, ipcarg_t, ipcarg_t, ipcarg_t,
ipcarg_t, ipcarg_t);
extern ipcarg_t ipc_answer_slow(ipc_callid_t, ipcarg_t, ipcarg_t, ipcarg_t,
ipcarg_t, ipcarg_t, ipcarg_t);
extern ipcarg_t ipc_answer_fast(ipc_callid_t callid, ipcarg_t retval,
ipcarg_t arg1, ipcarg_t arg2, ipcarg_t arg3, ipcarg_t arg4);
extern ipcarg_t ipc_answer_slow(ipc_callid_t callid, ipcarg_t retval,
ipcarg_t arg1, ipcarg_t arg2, ipcarg_t arg3, ipcarg_t arg4, ipcarg_t arg5);
 
/*
* User-friendly wrappers for ipc_call_async_fast() and ipc_call_async_slow().
217,7 → 220,8
* arguments. The macros decide between the fast and the slow version according
* to m.
*/
#define ipc_call_async_0(phoneid, method, private, callback, can_preempt) \
#define ipc_call_async_0(phoneid, method, private, callback, \
can_preempt) \
ipc_call_async_fast((phoneid), (method), 0, 0, 0, 0, (private), \
(callback), (can_preempt))
#define ipc_call_async_1(phoneid, method, arg1, private, callback, \
241,24 → 245,23
ipc_call_async_slow((phoneid), (method), (arg1), (arg2), (arg3), \
(arg4), (arg5), (private), (callback), (can_preempt))
 
extern void ipc_call_async_fast(int, ipcarg_t, ipcarg_t, ipcarg_t, ipcarg_t,
ipcarg_t, void *, ipc_async_callback_t, int);
extern void ipc_call_async_slow(int, ipcarg_t, ipcarg_t, ipcarg_t, ipcarg_t,
ipcarg_t, ipcarg_t, void *, ipc_async_callback_t, int);
extern void ipc_call_async_fast(int phoneid, ipcarg_t method, ipcarg_t arg1,
ipcarg_t arg2, ipcarg_t arg3, ipcarg_t arg4, void *private,
ipc_async_callback_t callback, int can_preempt);
extern void ipc_call_async_slow(int phoneid, ipcarg_t method, ipcarg_t arg1,
ipcarg_t arg2, ipcarg_t arg3, ipcarg_t arg4, ipcarg_t arg5, void *private,
ipc_async_callback_t callback, int can_preempt);
 
#define IPC_FLAG_BLOCKING 0x01
extern int ipc_connect_to_me(int phoneid, int arg1, int arg2, int arg3,
ipcarg_t *phone);
extern int ipc_connect_me_to(int phoneid, int arg1, int arg2, int arg3);
extern int ipc_hangup(int phoneid);
extern int ipc_register_irq(int inr, int devno, int method, irq_code_t *code);
extern int ipc_unregister_irq(int inr, int devno);
extern int ipc_forward_fast(ipc_callid_t callid, int phoneid, int method,
ipcarg_t arg1, ipcarg_t arg2, int mode);
 
extern int ipc_connect_to_me(int, int, int, int, ipcarg_t *);
extern int ipc_connect_me_to(int, int, int, int);
extern int ipc_connect_me_to_blocking(int, int, int, int);
extern int ipc_hangup(int);
extern int ipc_register_irq(int, int, int, irq_code_t *);
extern int ipc_unregister_irq(int, int);
extern int ipc_forward_fast(ipc_callid_t, int, int, ipcarg_t, ipcarg_t, int);
extern int ipc_forward_slow(ipc_callid_t, int, int, ipcarg_t, ipcarg_t,
ipcarg_t, ipcarg_t, ipcarg_t, int);
 
 
/*
* User-friendly wrappers for ipc_share_in_start().
*/
271,23 → 274,20
#define ipc_share_in_start_1_1(phoneid, dst, size, arg, flags) \
ipc_share_in_start((phoneid), (dst), (size), (arg), (flags))
 
extern int ipc_share_in_start(int, void *, size_t, ipcarg_t, int *);
extern int ipc_share_in_receive(ipc_callid_t *, size_t *);
extern int ipc_share_in_finalize(ipc_callid_t, void *, int );
extern int ipc_share_out_start(int, void *, int);
extern int ipc_share_out_receive(ipc_callid_t *, size_t *, int *);
extern int ipc_share_out_finalize(ipc_callid_t, void *);
extern int ipc_data_read_start(int, void *, size_t);
extern int ipc_data_read_receive(ipc_callid_t *, size_t *);
extern int ipc_data_read_finalize(ipc_callid_t, const void *, size_t);
extern int ipc_data_write_start(int, const void *, size_t);
extern int ipc_data_write_receive(ipc_callid_t *, size_t *);
extern int ipc_data_write_finalize(ipc_callid_t, void *, size_t);
extern int ipc_share_in_start(int phoneid, void *dst, size_t size, ipcarg_t arg,
int *flags);
extern int ipc_share_in_receive(ipc_callid_t *callid, size_t *size);
extern int ipc_share_in_finalize(ipc_callid_t callid, void *src, int flags);
extern int ipc_share_out_start(int phoneid, void *src, int flags);
extern int ipc_share_out_receive(ipc_callid_t *callid, size_t *size, int *flags);
extern int ipc_share_out_finalize(ipc_callid_t callid, void *dst);
extern int ipc_data_read_start(int phoneid, void *dst, size_t size);
extern int ipc_data_read_receive(ipc_callid_t *callid, size_t *size);
extern int ipc_data_read_finalize(ipc_callid_t callid, void *src, size_t size);
extern int ipc_data_write_start(int phoneid, void *src, size_t size);
extern int ipc_data_write_receive(ipc_callid_t *callid, size_t *size);
extern int ipc_data_write_finalize(ipc_callid_t callid, void *dst, size_t size);
 
#include <task.h>
 
extern int ipc_connect_kbox(task_id_t);
 
#endif
 
/** @}
/branches/network/uspace/lib/libc/include/ipc/fb.h
48,11 → 48,10
FB_VIEWPORT_CREATE,
FB_VIEWPORT_DELETE,
FB_SET_STYLE,
FB_SET_COLOR,
FB_SET_RGB_COLOR,
FB_GET_RESOLUTION,
FB_DRAW_TEXT_DATA,
FB_FLUSH,
FB_VIEWPORT_DB,
FB_DRAW_PPM,
FB_PREPARE_SHM,
FB_DROP_SHM,
60,6 → 59,7
FB_VP_DRAW_PIXMAP,
FB_VP2PIXMAP,
FB_DROP_PIXMAP,
FB_TRANS_PUTCHAR,
FB_ANIM_CREATE,
FB_ANIM_DROP,
FB_ANIM_ADDPIXMAP,
69,6 → 69,7
FB_POINTER_MOVE
} fb_request_t;
 
 
#endif
 
/** @}
/branches/network/uspace/lib/libc/include/stdio.h
52,19 → 52,6
(void) __SYSCALL3(SYS_KLOG, 1, (sysarg_t) buf, strlen(buf)); \
}
 
typedef struct {
/** Underlying file descriptor. */
int fd;
 
/** Error indicator. */
int error;
 
/** End-of-file indicator. */
int eof;
} FILE;
 
extern FILE *stdin, *stdout, *stderr;
 
extern int getchar(void);
 
extern int puts(const char *);
72,7 → 59,7
 
extern int printf(const char *, ...);
extern int asprintf(char **, const char *, ...);
extern int sprintf(char *, const char *, ...);
extern int sprintf(char *, const char *fmt, ...);
extern int snprintf(char *, size_t , const char *, ...);
 
extern int vprintf(const char *, va_list);
79,35 → 66,11
extern int vsprintf(char *, const char *, va_list);
extern int vsnprintf(char *, size_t, const char *, va_list);
 
#define fprintf(f, fmt, ...) printf(fmt, ##__VA_ARGS__)
 
extern int rename(const char *, const char *);
 
extern FILE *fopen(const char *, const char *);
extern int fclose(FILE *);
extern size_t fread(void *, size_t, size_t, FILE *);
extern size_t fwrite(const void *, size_t, size_t, FILE *);
extern int feof(FILE *);
extern int ferror(FILE *);
extern void clearerr(FILE *);
 
extern int fgetc(FILE *);
extern int fputc(int, FILE *);
extern int fputs(const char *, FILE *);
 
extern int fprintf(FILE *, const char *, ...);
extern int vfprintf(FILE *, const char *, va_list);
 
#define getc fgetc
#define putc fputc
 
extern int fseek(FILE *, long, int);
 
#ifndef SEEK_SET
#define SEEK_SET 0
#define SEEK_CUR 1
#define SEEK_END 2
#endif
 
#endif
 
/** @}
*/
/branches/network/uspace/lib/libc/include/vfs/vfs.h
39,8 → 39,7
 
extern char *absolutize(const char *, size_t *);
 
extern int mount(const char *, const char *, const char *,
const unsigned int flags);
extern int mount(const char *, const char *, const char *);
 
#endif
 
/branches/network/uspace/lib/libc/include/string.h
35,9 → 35,16
#ifndef LIBC_STRING_H_
#define LIBC_STRING_H_
 
#include <mem.h>
#include <sys/types.h>
 
#define bzero(ptr, len) memset((ptr), 0, (len))
 
extern void * memset(void *, int, size_t);
extern void * memcpy(void *, const void *, size_t);
extern void * memmove(void *, const void *, size_t);
 
extern int bcmp(const char *, const char *, size_t);
 
extern int strcmp(const char *, const char *);
extern int strncmp(const char *, const char *, size_t);
extern int stricmp(const char *, const char *);
57,9 → 64,6
extern long int strtol(const char *, char **, int);
extern unsigned long strtoul(const char *, char **, int);
 
extern char * strtok_r(char *, const char *, char **);
extern char * strtok(char *, const char *);
 
#endif
 
/** @}
/branches/network/uspace/lib/libc/include/ctype.h
79,19 → 79,11
static inline int tolower(int c)
{
if (isupper(c))
return (c + ('a' - 'A'));
return (c + ('a' - 'A' > 0 ? 'a' - 'A' : 'A' - 'a'));
else
return c;
}
 
static inline int toupper(int c)
{
if (islower(c))
return (c + ('A' - 'a'));
else
return c;
}
 
#endif
 
/** @}
/branches/network/uspace/lib/libc/include/task.h
40,8 → 40,7
typedef uint64_t task_id_t;
 
extern task_id_t task_get_id(void);
extern int task_set_name(const char *name);
extern task_id_t task_spawn(const char *path, char *const argv[]);
extern task_id_t task_spawn(const char *path, const char *argv[]);
 
#endif
 
/branches/network/uspace/lib/libc/include/libc.h
39,20 → 39,14
#include <kernel/syscall/syscall.h>
#include <libarch/syscall.h>
 
#define __SYSCALL0(id) \
__syscall0(0, 0, 0, 0, 0, 0, id)
#define __SYSCALL1(id, p1) \
__syscall1(p1, 0, 0, 0, 0, 0, id)
#define __SYSCALL2(id, p1, p2) \
__syscall2(p1, p2, 0, 0, 0, 0, id)
#define __SYSCALL3(id, p1, p2, p3) \
__syscall3(p1, p2, p3, 0, 0, 0, id)
#define __SYSCALL4(id, p1, p2, p3, p4) \
__syscall4(p1, p2, p3, p4, 0, 0, id)
#define __SYSCALL5(id, p1, p2, p3, p4, p5) \
__syscall5(p1, p2, p3, p4, p5, 0, id)
#define __SYSCALL0(id) __syscall(0, 0, 0, 0, 0, 0, id)
#define __SYSCALL1(id, p1) __syscall(p1, 0, 0, 0, 0, 0, id)
#define __SYSCALL2(id, p1, p2) __syscall(p1, p2, 0, 0, 0, 0, id)
#define __SYSCALL3(id, p1, p2, p3) __syscall(p1, p2, p3, 0, 0, 0, id)
#define __SYSCALL4(id, p1, p2, p3, p4) __syscall(p1, p2, p3, p4, 0, 0, id)
#define __SYSCALL5(id, p1, p2, p3, p4, p5) __syscall(p1, p2, p3, p4, p5, 0, id)
#define __SYSCALL6(id, p1, p2, p3, p4, p5, p6) \
__syscall6(p1, p2, p3, p4, p5, p6, id)
__syscall(p1, p2, p3, p4, p5, p6,id)
 
extern void __main(void *pcb_ptr);
extern void __exit(void);
/branches/network/uspace/lib/libc/include/loader/loader.h
File deleted
/branches/network/uspace/lib/libc/include/loader/pcb.h
40,32 → 40,31
 
typedef void (*entry_point_t)(void);
 
/** Program Control Block.
*
/**
* Holds pointers to data passed from the program loader to the program
* and/or to the dynamic linker. This includes the program entry point,
* arguments, environment variables etc.
*/
typedef struct {
/** Program entry point. */
/** Program entry point */
entry_point_t entry;
 
/** Number of command-line arguments. */
/** Number of command-line arguments */
int argc;
/** Command-line arguments. */
/** Command-line arguments */
char **argv;
 
/*
* ELF-specific data.
* ELF-specific data
*/
/** Pointer to ELF dynamic section of the program. */
/** Pointer to ELF dynamic section of the program */
void *dynamic;
/** Pointer to dynamic section of the runtime linker */
void *rtld_dynamic;
/** Runtime-linker load bias */
uintptr_t rtld_bias;
} pcb_t;
 
/**
* A pointer to the program control block. Having received the PCB pointer,
* the C library startup code stores it here for later use.
*/
extern pcb_t *__pcb;
 
#endif
/branches/network/uspace/lib/libc/include/io/stream.h
47,8 → 47,7
extern ssize_t write_stdout(const void *, size_t);
extern ssize_t write_stderr(const void *, size_t);
 
extern int get_console_phone(void);
extern void console_wait(void);
extern int get_cons_phone(void);
 
#endif
 
/branches/network/uspace/lib/libc/include/byteorder.h
52,14 → 52,6
#define uint32_t_be2host(n) (n)
#define uint64_t_be2host(n) (n)
 
#define host2uint16_t_le(n) uint16_t_byteorder_swap(n)
#define host2uint32_t_le(n) uint32_t_byteorder_swap(n)
#define host2uint64_t_le(n) uint64_t_byteorder_swap(n)
 
#define host2uint16_t_be(n) (n)
#define host2uint32_t_be(n) (n)
#define host2uint64_t_be(n) (n)
 
#else
 
#define uint16_t_le2host(n) (n)
70,14 → 62,6
#define uint32_t_be2host(n) uint32_t_byteorder_swap(n)
#define uint64_t_be2host(n) uint64_t_byteorder_swap(n)
 
#define host2uint16_t_le(n) (n)
#define host2uint32_t_le(n) (n)
#define host2uint64_t_le(n) (n)
 
#define host2uint16_t_be(n) uint16_t_byteorder_swap(n)
#define host2uint32_t_be(n) uint32_t_byteorder_swap(n)
#define host2uint64_t_be(n) uint64_t_byteorder_swap(n)
 
#endif
 
static inline uint64_t uint64_t_byteorder_swap(uint64_t n)
/branches/network/uspace/lib/libc/include/unistd.h
44,11 → 44,9
 
#define getpagesize() (PAGE_SIZE)
 
#ifndef SEEK_SET
#define SEEK_SET 0
#define SEEK_CUR 1
#define SEEK_END 2
#endif
#define SEEK_SET 0
#define SEEK_CUR 1
#define SEEK_END 2
 
extern ssize_t write(int, const void *, size_t);
extern ssize_t read(int, void *, size_t);
/branches/network/uspace/lib/libc/include/errno.h
35,10 → 35,6
#ifndef LIBC_ERRNO_H_
#define LIBC_ERRNO_H_
 
/* TODO: support threads/fibrils */
extern int _errno;
#define errno _errno
 
#include <kernel/errno.h>
 
#define ENAMETOOLONG (-256)
50,8 → 46,6
#define EBADF (-262)
#define ERANGE (-263)
#define EXDEV (-264)
#define EIO (-265)
#define EMLINK (-266)
 
#endif
 
/branches/network/uspace/lib/libc/include/sys/types.h
42,10 → 42,6
typedef long off_t;
typedef int mode_t;
 
typedef volatile uint8_t ioport8_t;
typedef volatile uint16_t ioport16_t;
typedef volatile uint32_t ioport32_t;
 
#endif
 
/** @}
/branches/network/uspace/lib/libc/include/async.h
76,7 → 76,7
#define async_send_5(phoneid, method, arg1, arg2, arg3, arg4, arg5, dataptr) \
async_send_slow((phoneid), (method), (arg1), (arg2), (arg3), (arg4), \
(arg5), (dataptr))
 
extern aid_t async_send_fast(int phoneid, ipcarg_t method, ipcarg_t arg1,
ipcarg_t arg2, ipcarg_t arg3, ipcarg_t arg4, ipc_call_t *dataptr);
extern aid_t async_send_slow(int phoneid, ipcarg_t method, ipcarg_t arg1,
86,8 → 86,8
extern int async_wait_timeout(aid_t amsgid, ipcarg_t *retval,
suseconds_t timeout);
 
fid_t async_new_connection(ipcarg_t in_phone_hash, ipc_callid_t callid,
ipc_call_t *call, void (*cthread)(ipc_callid_t, ipc_call_t *));
fid_t async_new_connection(ipcarg_t in_phone_hash,ipc_callid_t callid,
ipc_call_t *call, void (*cthread)(ipc_callid_t,ipc_call_t *));
void async_usleep(suseconds_t timeout);
void async_create_manager(void);
void async_destroy_manager(void);
118,7 → 118,7
/*
* User-friendly wrappers for async_req_fast() and async_req_slow(). The macros
* are in the form async_req_m_n(), where m is the number of payload arguments
* and n is the number of return arguments. The macros decide between the fast
* and n is the number of return arguments. The macros decidce between the fast
* and slow verion based on m.
*/
#define async_req_0_0(phoneid, method) \
/branches/network/uspace/lib/libc/include/syscall.h
32,28 → 32,15
/**
* @file
* @brief Syscall function declaration for architectures that don't
* inline syscalls or architectures that handle syscalls
* according to the number of arguments.
* inline syscalls.
*/
 
#ifndef LIBC_SYSCALL_H_
#define LIBC_SYSCALL_H_
 
#ifndef LIBARCH_SYSCALL_GENERIC
#error "You can't include this file directly."
#endif
 
#include <sys/types.h>
#include <kernel/syscall/syscall.h>
 
#define __syscall0 __syscall
#define __syscall1 __syscall
#define __syscall2 __syscall
#define __syscall3 __syscall
#define __syscall4 __syscall
#define __syscall5 __syscall
#define __syscall6 __syscall
 
extern sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2,
const sysarg_t p3, const sysarg_t p4, const sysarg_t p5, const sysarg_t p6,
const syscall_t id);
/branches/network/uspace/lib/libc/include/align.h
35,28 → 35,21
#ifndef LIBC_ALIGN_H_
#define LIBC_ALIGN_H_
 
/** Align to the nearest lower address which is a power of two.
/** Align to the nearest lower address.
*
* @param s Address or size to be aligned.
* @param a Size of alignment, must be power of 2.
* @param s Address or size to be aligned.
* @param a Size of alignment, must be power of 2.
*/
#define ALIGN_DOWN(s, a) ((s) & ~((a) - 1))
 
 
/** Align to the nearest higher address which is a power of two.
/** Align to the nearest higher address.
*
* @param s Address or size to be aligned.
* @param a Size of alignment, must be power of 2.
* @param s Address or size to be aligned.
* @param a Size of alignment, must be power of 2.
*/
#define ALIGN_UP(s, a) ((long)((s) + ((a) - 1)) & ~((long) (a) - 1))
 
/** Round up to the nearest higher boundary.
*
* @param n Number to be aligned.
* @param b Boundary, arbitrary unsigned number.
*/
#define ROUND_UP(n, b) (((n) / (b) + ((n) % (b) != 0)) * (b))
 
#endif
 
/** @}
/branches/network/uspace/lib/libc/include/ddi.h
37,11 → 37,9
 
#include <task.h>
 
extern int device_assign_devno(void);
extern int physmem_map(void *, void *, unsigned long, int);
extern int iospace_enable(task_id_t, void *, unsigned long);
extern int preemption_control(int);
extern int pio_enable(void *, size_t, void **);
extern int physmem_map(void *pf, void *vp, unsigned long pages, int flags);
extern int iospace_enable(task_id_t id, void *ioaddr, unsigned long size);
extern int preemption_control(int enable);
 
#endif
 
/branches/network/uspace/lib/libc/arch/ia64/Makefile.inc
29,6 → 29,10
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
TARGET = ia64-pc-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/ia64/bin
CFLAGS += -fno-unwind-tables -DMALLOC_ALIGNMENT_16
35,10 → 39,9
LFLAGS += -N $(SOFTINT_PREFIX)/libsoftint.a
AFLAGS +=
 
ARCH_SOURCES += arch/$(UARCH)/src/syscall.S \
arch/$(UARCH)/src/fibril.S \
arch/$(UARCH)/src/tls.c \
arch/$(UARCH)/src/ddi.c
ARCH_SOURCES += arch/$(ARCH)/src/syscall.S \
arch/$(ARCH)/src/fibril.S \
arch/$(ARCH)/src/tls.c
 
BFD_NAME = elf64-ia64-little
BFD_ARCH = ia64-elf64
/branches/network/uspace/lib/libc/arch/ia64/include/ddi.h
File deleted
/branches/network/uspace/lib/libc/arch/ia64/include/syscall.h
36,8 → 36,6
#ifndef LIBC_ia64_SYSCALL_H_
#define LIBC_ia64_SYSCALL_H_
 
#define LIBARCH_SYSCALL_GENERIC
 
#include <syscall.h>
 
#endif
/branches/network/uspace/lib/libc/arch/ia64/src/ddi.c
File deleted
/branches/network/uspace/lib/libc/arch/ia64/src/entry.s
38,7 → 38,7
#
__entry:
alloc loc0 = ar.pfs, 0, 1, 2, 0
movl r1 = _gp
mov r1 = _gp
 
# Pass PCB pointer as the first argument to __main
mov out0 = r2
/branches/network/uspace/lib/libc/arch/ia64/src/thread_entry.s
36,7 → 36,7
__thread_entry:
alloc loc0 = ar.pfs, 0, 1, 1, 0
 
movl r1 = _gp
mov r1 = _gp
#
# r8 contains address of uarg structure.
/branches/network/uspace/lib/libc/arch/ia64/_link.ld.in
1,4 → 1,4
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
/branches/network/uspace/lib/libc/arch/arm32/Makefile.inc
30,16 → 30,20
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
TARGET = arm-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/arm/bin
CFLAGS += -ffixed-r9 -mtp=soft
LFLAGS += -N $(SOFTINT_PREFIX)/libsoftint.a
AFLAGS +=
AFLAGS +=
 
ARCH_SOURCES += arch/$(UARCH)/src/syscall.c \
arch/$(UARCH)/src/fibril.S \
arch/$(UARCH)/src/tls.c \
arch/$(UARCH)/src/eabi.S
ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \
arch/$(ARCH)/src/fibril.S \
arch/$(ARCH)/src/tls.c \
arch/$(ARCH)/src/eabi.S
 
BFD_NAME = elf32-littlearm
BFD_ARCH = arm
/branches/network/uspace/lib/libc/arch/arm32/include/ddi.h
File deleted
/branches/network/uspace/lib/libc/arch/arm32/include/syscall.h
30,14 → 30,12
* @{
*/
/** @file
* @brief
* @brief Empty.
*/
 
#ifndef LIBC_arm32_SYSCALL_H_
#define LIBC_arm32_SYSCALL_H_
 
#define LIBARCH_SYSCALL_GENERIC
 
#include <syscall.h>
 
#endif
/branches/network/uspace/lib/libc/arch/arm32/_link.ld.in
1,4 → 1,4
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
/branches/network/uspace/lib/libc/arch/mips32eb/Makefile.inc
29,15 → 29,19
## Toolchain configuration
#
 
TARGET = mips-linux-gnu
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
TARGET = mips-sgi-irix5
TOOLCHAIN_DIR = $(CROSS_PREFIX)/mips/bin
CFLAGS += -mips3
CFLAGS += -mips3
 
ARCH_SOURCES += arch/$(UARCH)/src/syscall.c \
arch/$(UARCH)/src/fibril.S \
arch/$(UARCH)/src/tls.c
ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \
arch/$(ARCH)/src/fibril.S \
arch/$(ARCH)/src/tls.c
 
LFLAGS += -N
 
BFD_ARCH = mips
BFD_NAME = elf32-tradbigmips
BFD_NAME = elf32-big
/branches/network/uspace/lib/libc/arch/mips32eb/include/ddi.h
File deleted
\ No newline at end of file
Property changes:
Deleted: svn:special
-*
\ No newline at end of property
/branches/network/uspace/lib/libc/arch/ppc32/Makefile.inc
29,12 → 29,16
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
TARGET = ppc-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/ppc/bin
 
ARCH_SOURCES += arch/$(UARCH)/src/syscall.c \
arch/$(UARCH)/src/fibril.S \
arch/$(UARCH)/src/tls.c
ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \
arch/$(ARCH)/src/fibril.S \
arch/$(ARCH)/src/tls.c
 
CFLAGS += -mcpu=powerpc -msoft-float -m32
AFLAGS += -a32
/branches/network/uspace/lib/libc/arch/ppc32/include/ddi.h
File deleted
/branches/network/uspace/lib/libc/arch/ppc32/include/syscall.h
36,8 → 36,6
#ifndef LIBC_ppc32_SYSCALL_H_
#define LIBC_ppc32_SYSCALL_H_
 
#define LIBARCH_SYSCALL_GENERIC
 
#include <syscall.h>
 
#endif
/branches/network/uspace/lib/libc/arch/ppc32/src/entry.s
34,12 → 34,11
 
## User-space task entry point
#
# r6 contains the PCB pointer
# r3 contains the PCB pointer
#
__entry:
# Pass the PCB pointer to __main() as the first argument.
# The first argument is passed in r3.
mr %r3, %r6
# Since the first argument is passed in r3, no operation is needed.
bl __main
 
bl __exit
/branches/network/uspace/lib/libc/arch/ppc32/_link.ld.in
1,4 → 1,4
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
/branches/network/uspace/lib/libc/arch/amd64/Makefile.inc
29,12 → 29,16
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
TARGET = amd64-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/amd64/bin
 
ARCH_SOURCES += arch/$(UARCH)/src/syscall.S \
arch/$(UARCH)/src/fibril.S \
arch/$(UARCH)/src/tls.c
ARCH_SOURCES += arch/$(ARCH)/src/syscall.S \
arch/$(ARCH)/src/fibril.S \
arch/$(ARCH)/src/tls.c
 
LFLAGS += -N
 
/branches/network/uspace/lib/libc/arch/amd64/include/syscall.h
36,8 → 36,6
#ifndef LIBC_amd64_SYSCALL_H_
#define LIBC_amd64_SYSCALL_H_
 
#define LIBARCH_SYSCALL_GENERIC
 
#include <syscall.h>
 
#endif
/branches/network/uspace/lib/libc/arch/amd64/_link.ld.in
1,4 → 1,4
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
/branches/network/uspace/lib/libc/arch/ppc64/Makefile.inc
0,0 → 1,48
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
TARGET = ppc64-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/ppc64/bin
 
ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \
arch/$(ARCH)/src/fibril.S \
arch/$(ARCH)/src/tls.c
 
CFLAGS += -mcpu=powerpc64 -msoft-float -m64
AFLAGS += -a64
LFLAGS += -N
 
BFD_NAME = elf64-powerpc
BFD_ARCH = powerpc:common64
/branches/network/uspace/lib/libc/arch/ppc64/include/config.h
0,0 → 1,44
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libppc64
* @{
*/
/** @file
*/
 
#ifndef LIBC_ppc64_CONFIG_H_
#define LIBC_ppc64_CONFIG_H_
 
#define PAGE_WIDTH 12
#define PAGE_SIZE (1 << PAGE_WIDTH)
 
#endif
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/include/byteorder.h
0,0 → 1,43
/*
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcppc64
* @{
*/
/** @file
*/
 
#ifndef LIBC_ppc64_BYTEORDER_H_
#define LIBC_ppc64_BYTEORDER_H_
 
#define ARCH_IS_BIG_ENDIAN
 
#endif
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/include/tls.h
0,0 → 1,73
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcppc64
* @{
*/
/** @file
*/
 
#ifndef LIBC_ppc64_TLS_H_
#define LIBC_ppc64_TLS_H_
 
#define CONFIG_TLS_VARIANT_1
 
#define PPC_TP_OFFSET 0x7000
 
typedef struct {
void *fibril_data;
} tcb_t;
 
static inline void __tcb_set(tcb_t *tcb)
{
void *tp = tcb;
tp += PPC_TP_OFFSET + sizeof(tcb_t);
asm volatile (
"mr %%r2, %0\n"
:
: "r" (tp)
);
}
 
static inline tcb_t * __tcb_get(void)
{
void * retval;
asm volatile (
"mr %0, %%r2\n"
: "=r" (retval)
);
 
return (tcb_t *)(retval - PPC_TP_OFFSET - sizeof(tcb_t));
}
 
#endif
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/include/thread.h
0,0 → 1,41
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcppc64
* @{
*/
/** @file
*/
 
#ifndef LIBC_ppc64_THREAD_H_
#define LIBC_ppc64_THREAD_H_
 
#endif
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/include/types.h
0,0 → 1,55
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcppc64
* @{
*/
/** @file
*/
 
#ifndef LIBC_ppc64_TYPES_H_
#define LIBC_ppc64_TYPES_H_
 
typedef unsigned long sysarg_t;
 
typedef char int8_t;
typedef short int int16_t;
typedef int int32_t;
typedef long int int64_t;
 
typedef unsigned char uint8_t;
typedef unsigned short int uint16_t;
typedef unsigned int uint32_t;
typedef unsigned long int uint64_t;
 
typedef uint64_t uintptr_t;
 
#endif
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/include/fibril.h
0,0 → 1,83
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcppc64
* @{
*/
/** @file
*/
 
#ifndef LIBC_ppc64_FIBRIL_H_
#define LIBC_ppc64_FIBRIL_H_
 
#include <sys/types.h>
 
/* We define our own context_set, because we need to set
* the TLS pointer to the tcb+0x7000
*
* See tls_set in thread.h
*/
#define context_set(c, _pc, stack, size, ptls) \
(c)->pc = (sysarg_t) (_pc); \
(c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA; \
(c)->tls = ((sysarg_t) (ptls)) + 0x7000 + sizeof(tcb_t);
 
#define SP_DELTA 16
 
typedef struct {
uint64_t sp;
uint64_t pc;
uint64_t tls;
uint64_t r13;
uint64_t r14;
uint64_t r15;
uint64_t r16;
uint64_t r17;
uint64_t r18;
uint64_t r19;
uint64_t r20;
uint64_t r21;
uint64_t r22;
uint64_t r23;
uint64_t r24;
uint64_t r25;
uint64_t r26;
uint64_t r27;
uint64_t r28;
uint64_t r29;
uint64_t r30;
uint64_t r31;
uint64_t cr;
} __attribute__ ((packed)) context_t;
 
#endif
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/include/atomic.h
0,0 → 1,95
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcppc64
* @{
*/
/** @file
*/
 
#ifndef LIBC_ppc64_ATOMIC_H_
#define LIBC_ppc64_ATOMIC_H_
 
static inline void atomic_inc(atomic_t *val)
{
long tmp;
 
asm volatile (
"1:\n"
"lwarx %0, 0, %2\n"
"addic %0, %0, 1\n"
"stwcx. %0, 0, %2\n"
"bne- 1b"
: "=&r" (tmp), "=m" (val->count)
: "r" (&val->count), "m" (val->count)
: "cc");
}
 
static inline void atomic_dec(atomic_t *val)
{
long tmp;
 
asm volatile (
"1:\n"
"lwarx %0, 0, %2\n"
"addic %0, %0, -1\n"
"stwcx. %0, 0, %2\n"
"bne- 1b"
: "=&r" (tmp), "=m" (val->count)
: "r" (&val->count), "m" (val->count)
: "cc");
}
 
static inline long atomic_postinc(atomic_t *val)
{
atomic_inc(val);
return val->count - 1;
}
 
static inline long atomic_postdec(atomic_t *val)
{
atomic_dec(val);
return val->count + 1;
}
 
static inline long atomic_preinc(atomic_t *val)
{
atomic_inc(val);
return val->count;
}
 
static inline long atomic_predec(atomic_t *val)
{
atomic_dec(val);
return val->count;
}
 
#endif
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/include/syscall.h
0,0 → 1,44
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libc
* @{
*/
/**
* @file
*/
 
#ifndef LIBC_ppc64_SYSCALL_H_
#define LIBC_ppc64_SYSCALL_H_
 
#include <syscall.h>
 
#endif
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/include/regname.h
0,0 → 1,188
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcppc64
* @{
*/
/** @file
*/
 
#ifndef LIBC_ppc64_REGNAME_H_
#define LIBC_ppc64_REGNAME_H_
 
/* Condition Register Bit Fields */
#define cr0 0
#define cr1 1
#define cr2 2
#define cr3 3
#define cr4 4
#define cr5 5
#define cr6 6
#define cr7 7
 
/* General Purpose Registers (GPRs) */
#define r0 0
#define r1 1
#define r2 2
#define r3 3
#define r4 4
#define r5 5
#define r6 6
#define r7 7
#define r8 8
#define r9 9
#define r10 10
#define r11 11
#define r12 12
#define r13 13
#define r14 14
#define r15 15
#define r16 16
#define r17 17
#define r18 18
#define r19 19
#define r20 20
#define r21 21
#define r22 22
#define r23 23
#define r24 24
#define r25 25
#define r26 26
#define r27 27
#define r28 28
#define r29 29
#define r30 30
#define r31 31
 
/* GPR Aliases */
#define sp 1
 
/* Floating Point Registers (FPRs) */
#define fr0 0
#define fr1 1
#define fr2 2
#define fr3 3
#define fr4 4
#define fr5 5
#define fr6 6
#define fr7 7
#define fr8 8
#define fr9 9
#define fr10 10
#define fr11 11
#define fr12 12
#define fr13 13
#define fr14 14
#define fr15 15
#define fr16 16
#define fr17 17
#define fr18 18
#define fr19 19
#define fr20 20
#define fr21 21
#define fr22 22
#define fr23 23
#define fr24 24
#define fr25 25
#define fr26 26
#define fr27 27
#define fr28 28
#define fr29 29
#define fr30 30
#define fr31 31
 
#define vr0 0
#define vr1 1
#define vr2 2
#define vr3 3
#define vr4 4
#define vr5 5
#define vr6 6
#define vr7 7
#define vr8 8
#define vr9 9
#define vr10 10
#define vr11 11
#define vr12 12
#define vr13 13
#define vr14 14
#define vr15 15
#define vr16 16
#define vr17 17
#define vr18 18
#define vr19 19
#define vr20 20
#define vr21 21
#define vr22 22
#define vr23 23
#define vr24 24
#define vr25 25
#define vr26 26
#define vr27 27
#define vr28 28
#define vr29 29
#define vr30 30
#define vr31 31
 
#define evr0 0
#define evr1 1
#define evr2 2
#define evr3 3
#define evr4 4
#define evr5 5
#define evr6 6
#define evr7 7
#define evr8 8
#define evr9 9
#define evr10 10
#define evr11 11
#define evr12 12
#define evr13 13
#define evr14 14
#define evr15 15
#define evr16 16
#define evr17 17
#define evr18 18
#define evr19 19
#define evr20 20
#define evr21 21
#define evr22 22
#define evr23 23
#define evr24 24
#define evr25 25
#define evr26 26
#define evr27 27
#define evr28 28
#define evr29 29
#define evr30 30
#define evr31 31
 
#endif
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/include/stackarg.h
0,0 → 1,41
/*
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcppc64
* @{
*/
/** @file
*/
 
#ifndef LIBC_STACKARG_H_
#define LIBC_STACKARG_H_
 
#endif
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/include/faddr.h
0,0 → 1,45
/*
* Copyright (c) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcppc64
* @{
*/
/** @file
*/
 
#ifndef LIBC_ppc64_FADDR_H_
#define LIBC_ppc64_FADDR_H_
 
#include <libarch/types.h>
 
#define FADDR(fptr) ((uintptr_t) (fptr))
 
#endif
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/include/limits.h
0,0 → 1,46
/*
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcppc64
* @{
*/
/** @file
*/
 
#ifndef LIBC_ppc64_LIMITS_H_
#define LIBC_ppc64_LIMITS_H_
 
#define LONG_MIN MIN_INT64
#define LONG_MAX MAX_INT64
#define ULONG_MIN MIN_UINT64
#define ULONG_MAX MAX_UINT64
 
#endif
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/src/entry.s
0,0 → 1,40
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.section .init, "ax"
 
.org 0
 
.globl __entry
 
## User-space task entry point
#
#
__entry:
bl __main
bl __exit
/branches/network/uspace/lib/libc/arch/ppc64/src/fibril.S
0,0 → 1,62
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.text
 
.global context_save
.global context_restore
 
#include <libarch/regname.h>
#include <kernel/arch/context_offset.h>
 
context_save:
CONTEXT_SAVE_ARCH_CORE r3
mflr r4
stw r4, OFFSET_PC(r3)
mfcr r4
stw r4, OFFSET_CR(r3)
# context_save returns 1
li r3, 1
blr
 
 
context_restore:
CONTEXT_RESTORE_ARCH_CORE r3
lwz r4, OFFSET_CR(r3)
mtcr r4
lwz r4, OFFSET_PC(r3)
mtlr r4
# context_restore returns 0
li r3, 0
blr
/branches/network/uspace/lib/libc/arch/ppc64/src/syscall.c
0,0 → 1,66
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcppc64 ppc64
* @brief ppc64 architecture dependent parts of libc
* @ingroup lc
* @{
*/
/** @file
*/
 
#include <libc.h>
 
sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3,
const sysarg_t p4, const sysarg_t p5, const sysarg_t p6, const syscall_t id)
{
register sysarg_t __ppc32_reg_r3 asm("3") = p1;
register sysarg_t __ppc32_reg_r4 asm("4") = p2;
register sysarg_t __ppc32_reg_r5 asm("5") = p3;
register sysarg_t __ppc32_reg_r6 asm("6") = p4;
register sysarg_t __ppc32_reg_r7 asm("7") = p5;
register sysarg_t __ppc32_reg_r8 asm("8") = p6;
register sysarg_t __ppc32_reg_r9 asm("9") = id;
asm volatile (
"sc\n"
: "=r" (__ppc32_reg_r3)
: "r" (__ppc32_reg_r3),
"r" (__ppc32_reg_r4),
"r" (__ppc32_reg_r5),
"r" (__ppc32_reg_r6),
"r" (__ppc32_reg_r7),
"r" (__ppc32_reg_r8),
"r" (__ppc32_reg_r9)
);
return __ppc32_reg_r3;
}
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/src/tls.c
0,0 → 1,60
/*
* Copyright (c) 2006 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup libcppc64
* @{
*/
/** @file
*/
 
#include <tls.h>
#include <malloc.h>
 
/** Allocate TLS & TCB for initial module threads
*
* @param data Start of data section
* @return pointer to tcb_t structure
*
*/
tcb_t * __alloc_tls(void **data, size_t size)
{
tcb_t *tcb;
*data = malloc(sizeof(tcb_t) + size);
tcb = (tcb_t *) (*data + size);
return tcb;
}
 
void __free_tls_arch(tcb_t *tcb, size_t size)
{
void *start = ((void *) tcb) - size;
free(start);
}
 
/** @}
*/
/branches/network/uspace/lib/libc/arch/ppc64/src/thread_entry.s
0,0 → 1,39
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.text
.globl __thread_entry
 
## User-space thread entry point for all but the first threads.
#
#
__thread_entry:
b __thread_main
 
.end __thread_entry
/branches/network/uspace/lib/libc/arch/ppc64/_link.ld.in
0,0 → 1,52
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
text PT_LOAD FLAGS(5);
data PT_LOAD FLAGS(6);
}
 
SECTIONS {
. = 0x1000 + SIZEOF_HEADERS;
 
.init : {
*(.init);
} :text
.text : {
*(.text);
*(.toc);
*(.rodata*);
} :text
 
. = . + 0x1000;
 
.data : {
*(.opd);
*(.data*);
*(.sdata);
} :data
.tdata : {
_tdata_start = .;
*(.tdata);
_tdata_end = .;
} :data
.tbss : {
_tbss_start = .;
*(.tbss);
_tbss_end = .;
} :data
_tls_alignment = MAX(ALIGNOF(.tdata), ALIGNOF(.tbss));
.bss : {
*(.sbss);
*(COMMON);
*(.bss);
} :data
 
. = ALIGN(0x1000);
_heap = .;
/DISCARD/ : {
*(*);
}
 
}
/branches/network/uspace/lib/libc/arch/mips32/Makefile.inc
29,13 → 29,23
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
TARGET = mipsel-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/mipsel/bin
CFLAGS += -mips3
 
ARCH_SOURCES += arch/$(UARCH)/src/syscall.c \
arch/$(UARCH)/src/fibril.S \
arch/$(UARCH)/src/tls.c
-include ../../Makefile.config
ifeq ($(CONFIG_MIPS_FPU),y)
CFLAGS += -DCONFIG_MIPS_FPU
endif
 
ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \
arch/$(ARCH)/src/fibril.S \
arch/$(ARCH)/src/tls.c
 
 
BFD_ARCH = mips
BFD_NAME = elf32-tradlittlemips
/branches/network/uspace/lib/libc/arch/mips32/include/ddi.h
File deleted
/branches/network/uspace/lib/libc/arch/mips32/include/atomic.h
59,14 → 59,13
asm volatile (
"1:\n"
" ll %0, %1\n"
" addu %0, %0, %3\n" /* same as add, but never traps on overflow */
" addiu %0, %0, %3\n" /* same as addi, but never traps on overflow */
" move %2, %0\n"
" sc %0, %1\n"
" beq %0, %4, 1b\n" /* if the atomic operation failed, try again */
/* nop */ /* nop is inserted automatically by compiler */
" nop\n"
: "=&r" (tmp), "+m" (val->count), "=&r" (v)
: "r" (i), "i" (0)
: "i" (i), "i" (0)
);
 
return v;
/branches/network/uspace/lib/libc/arch/mips32/include/syscall.h
36,8 → 36,6
#ifndef LIBC_mips32_SYSCALL_H_
#define LIBC_mips32_SYSCALL_H_
 
#define LIBARCH_SYSCALL_GENERIC
 
#include <syscall.h>
 
#endif
/branches/network/uspace/lib/libc/arch/mips32/_link.ld.in
1,4 → 1,4
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
/branches/network/uspace/lib/libc/arch/ia32/Makefile.inc
29,13 → 29,17
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
TARGET = i686-pc-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/i686/bin
 
ARCH_SOURCES += arch/$(UARCH)/src/syscall.S \
arch/$(UARCH)/src/fibril.S \
arch/$(UARCH)/src/tls.c \
arch/$(UARCH)/src/setjmp.S
ARCH_SOURCES += arch/$(ARCH)/src/syscall.S \
arch/$(ARCH)/src/fibril.S \
arch/$(ARCH)/src/tls.c \
arch/$(ARCH)/src/setjmp.S
 
LFLAGS += -N
 
/branches/network/uspace/lib/libc/arch/ia32/include/syscall.h
36,25 → 36,8
#ifndef LIBC_ia32_SYSCALL_H_
#define LIBC_ia32_SYSCALL_H_
 
#include <sys/types.h>
#include <kernel/syscall/syscall.h>
#include <syscall.h>
 
#define __syscall0 __syscall_sysenter
#define __syscall1 __syscall_sysenter
#define __syscall2 __syscall_sysenter
#define __syscall3 __syscall_sysenter
#define __syscall4 __syscall_sysenter
#define __syscall5 __syscall_int
#define __syscall6 __syscall_int
 
extern sysarg_t
__syscall_sysenter(const sysarg_t, const sysarg_t, const sysarg_t, const sysarg_t,
const sysarg_t, const sysarg_t, const syscall_t);
 
extern sysarg_t
__syscall_int(const sysarg_t, const sysarg_t, const sysarg_t, const sysarg_t,
const sysarg_t, const sysarg_t, const syscall_t);
 
#endif
 
/** @}
/branches/network/uspace/lib/libc/arch/ia32/include/ddi.h
33,72 → 33,43
#ifndef LIBC_ia32_DDI_H_
#define LIBC_ia32_DDI_H_
 
#include <sys/types.h>
#include <libarch/types.h>
static inline void outb(int16_t port, uint8_t b)
{
asm volatile ("outb %0, %1\n" :: "a" (b), "d" (port));
}
 
#define IO_SPACE_BOUNDARY ((void *) (64 * 1024))
 
static inline uint8_t pio_read_8(ioport8_t *port)
static inline void outw(int16_t port, int16_t w)
{
uint8_t val;
asm volatile (
"inb %w[port], %b[val]\n"
: [val] "=a" (val)
: [port] "d" (port)
);
return val;
asm volatile ("outw %0, %1\n" :: "a" (w), "d" (port));
}
 
static inline uint16_t pio_read_16(ioport16_t *port)
static inline void outl(int16_t port, uint32_t l)
{
uint16_t val;
asm volatile (
"inw %w[port], %w[val]\n"
: [val] "=a" (val)
: [port] "d" (port)
);
return val;
asm volatile ("outl %0, %1\n" :: "a" (l), "d" (port));
}
 
static inline uint32_t pio_read_32(ioport32_t *port)
static inline uint8_t inb(int16_t port)
{
uint32_t val;
asm volatile (
"inl %w[port], %[val]\n"
: [val] "=a" (val)
: [port] "d" (port)
);
uint8_t val;
 
asm volatile ("inb %1, %0 \n" : "=a" (val) : "d"(port));
return val;
}
 
static inline void pio_write_8(ioport8_t *port, uint8_t val)
static inline int16_t inw(int16_t port)
{
asm volatile (
"outb %b[val], %w[port]\n"
:: [val] "a" (val), [port] "d" (port)
);
int16_t val;
 
asm volatile ("inw %1, %0 \n" : "=a" (val) : "d"(port));
return val;
}
 
static inline void pio_write_16(ioport16_t *port, uint16_t val)
static inline uint32_t inl(int16_t port)
{
asm volatile (
"outw %w[val], %w[port]\n"
:: [val] "a" (val), [port] "d" (port)
);
}
uint32_t val;
 
static inline void pio_write_32(ioport32_t *port, uint32_t val)
{
asm volatile (
"outl %[val], %w[port]\n"
:: [val] "a" (val), [port] "d" (port)
);
asm volatile ("inl %1, %0 \n" : "=a" (val) : "d"(port));
return val;
}
 
#endif
/branches/network/uspace/lib/libc/arch/ia32/src/syscall.S
28,14 → 28,14
 
.text
 
/** Syscall wrapper - INT $0x30 version.
/** Syscall wrapper.
*
* Mind the order of arguments. First two arguments and the syscall number go to
* scratch registers. An optimized version of this wrapper for fewer arguments
* could benefit from this and not save unused registers on the stack.
*/
.global __syscall_int
__syscall_int:
.global __syscall
__syscall:
pushl %ebx
pushl %esi
pushl %edi
53,38 → 53,3
popl %esi
popl %ebx
ret
 
 
/** Syscall wrapper - SYSENTER version.
*
* This is an optimized version of syscall for four or less arguments. Note
* that EBP and EDI are used to remember user stack address and the return
* address. The kernel part doesn't save DS, ES and FS so the handler restores
* these to the selector immediately following CS (it must be the flat data
* segment, otherwise the SYSENTER wouldn't work in the first place).
*/
.global __syscall_sysenter
__syscall_sysenter:
pushl %ebx
pushl %esi
pushl %edi
pushl %ebp
mov %esp, %ebp
lea ra, %edi
movl 20(%esp), %edx # First argument.
movl 24(%esp), %ecx # Second argument.
movl 28(%esp), %ebx # Third argument.
movl 32(%esp), %esi # Fourth argument.
movl 44(%esp), %eax # Syscall number.
sysenter
ra:
movw %cs, %cx
addw $8, %cx
movw %cx, %ds
movw %cx, %es
movw %cx, %fs
popl %ebp
popl %edi
popl %esi
popl %ebx
ret
/branches/network/uspace/lib/libc/arch/ia32/_link.ld.in
1,4 → 1,4
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
/branches/network/uspace/lib/libc/arch/sparc64/Makefile.inc
29,11 → 29,15
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
TARGET = sparc64-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/sparc64/bin
 
ARCH_SOURCES += arch/$(UARCH)/src/fibril.S \
arch/$(UARCH)/src/tls.c
ARCH_SOURCES += arch/$(ARCH)/src/fibril.S \
arch/$(ARCH)/src/tls.c
 
CFLAGS += -mcpu=ultrasparc -m64
LFLAGS += -no-check-sections -N
/branches/network/uspace/lib/libc/arch/sparc64/include/ddi.h
File deleted
/branches/network/uspace/lib/libc/arch/sparc64/include/syscall.h
38,14 → 38,6
#include <sys/types.h>
#include <kernel/syscall/syscall.h>
 
#define __syscall0 __syscall
#define __syscall1 __syscall
#define __syscall2 __syscall
#define __syscall3 __syscall
#define __syscall4 __syscall
#define __syscall5 __syscall
#define __syscall6 __syscall
 
static inline sysarg_t
__syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3,
const sysarg_t p4, const sysarg_t p5, const sysarg_t p6, const syscall_t id)
/branches/network/uspace/lib/libc/arch/sparc64/_link.ld.in
1,4 → 1,4
STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
STARTUP(LIBC_PREFIX/arch/ARCH/src/entry.o)
ENTRY(__entry)
 
PHDRS {
/branches/network/uspace/lib/libc/generic/kbd.c
File deleted
/branches/network/uspace/lib/libc/generic/mem.c
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/uspace/lib/libc/generic/udebug.c
File deleted
/branches/network/uspace/lib/libc/generic/loader.c
File deleted
/branches/network/uspace/lib/libc/generic/console.c
File deleted
/branches/network/uspace/lib/libc/generic/io/fprintf.c
File deleted
/branches/network/uspace/lib/libc/generic/io/stdio.c
File deleted
/branches/network/uspace/lib/libc/generic/io/stream.c
42,8 → 42,7
#include <ipc/ns.h>
#include <ipc/fb.h>
#include <ipc/services.h>
#include <ipc/console.h>
#include <kbd/kbd.h>
#include <console.h>
#include <unistd.h>
#include <async.h>
#include <sys/types.h>
59,17 → 58,13
{
open_console();
if (console_phone >= 0) {
kbd_event_t ev;
int rc;
ipcarg_t r0, r1;
size_t i = 0;
while (i < count) {
do {
rc = kbd_get_event(&ev);
if (rc < 0) return -1;
} while (ev.c == 0 || ev.type == KE_RELEASE);
 
((char *) buf)[i++] = ev.c;
if (async_req_0_2(console_phone, CONSOLE_GETCHAR, &r0, &r1) < 0)
return -1;
((char *) buf)[i++] = r0;
}
return i;
} else {
115,19 → 110,11
(void) __SYSCALL3(SYS_KLOG, 1, NULL, 0);
}
 
int get_console_phone(void)
int get_cons_phone(void)
{
if (console_phone < 0)
console_phone = ipc_connect_me_to_blocking(PHONE_NS, SERVICE_CONSOLE, 0, 0);
open_console();
return console_phone;
}
 
void console_wait(void)
{
while (console_phone < 0)
get_console_phone();
}
 
/** @}
*/
/branches/network/uspace/lib/libc/generic/ipc.c
598,7 → 598,7
ipcarg_t newphid;
int res;
 
res = ipc_call_sync_3_5(phoneid, IPC_M_CONNECT_ME_TO, arg1, arg2, arg3,
res = ipc_call_sync_3_5(phoneid, IPC_M_CONNECT_ME_TO, arg1, arg2, arg3,
NULL, NULL, NULL, NULL, &newphid);
if (res)
return res;
605,30 → 605,6
return newphid;
}
 
/** Ask through phone for a new connection to some service.
*
* If the connection is not available at the moment, the
* call will block.
*
* @param phoneid Phone handle used for contacting the other side.
* @param arg1 User defined argument.
* @param arg2 User defined argument.
* @param arg3 User defined argument.
*
* @return New phone handle on success or a negative error code.
*/
int ipc_connect_me_to_blocking(int phoneid, int arg1, int arg2, int arg3)
{
ipcarg_t newphid;
int res;
 
res = ipc_call_sync_4_5(phoneid, IPC_M_CONNECT_ME_TO, arg1, arg2, arg3,
IPC_FLAG_BLOCKING, NULL, NULL, NULL, NULL, &newphid);
if (res)
return res;
return newphid;
}
 
/** Hang up a phone.
*
* @param phoneid Handle of the phone to be hung up.
690,23 → 666,6
arg2, mode);
}
 
 
int ipc_forward_slow(ipc_callid_t callid, int phoneid, int method,
ipcarg_t arg1, ipcarg_t arg2, ipcarg_t arg3, ipcarg_t arg4, ipcarg_t arg5,
int mode)
{
ipc_call_t data;
 
IPC_SET_METHOD(data, method);
IPC_SET_ARG1(data, arg1);
IPC_SET_ARG2(data, arg2);
IPC_SET_ARG3(data, arg3);
IPC_SET_ARG4(data, arg4);
IPC_SET_ARG5(data, arg5);
 
return __SYSCALL3(SYS_IPC_FORWARD_SLOW, callid, (sysarg_t) &data, mode);
}
 
/** Wrapper for making IPC_M_SHARE_IN calls.
*
* @param phoneid Phone that will be used to contact the receiving side.
888,7 → 847,7
*
* @return Zero on success or a value from @ref errno.h on failure.
*/
int ipc_data_read_finalize(ipc_callid_t callid, const void *src, size_t size)
int ipc_data_read_finalize(ipc_callid_t callid, void *src, size_t size)
{
return ipc_answer_2(callid, EOK, (ipcarg_t) src, (ipcarg_t) size);
}
901,7 → 860,7
*
* @return Zero on success or a negative error code from errno.h.
*/
int ipc_data_write_start(int phoneid, const void *src, size_t size)
int ipc_data_write_start(int phoneid, void *src, size_t size)
{
return async_req_2_0(phoneid, IPC_M_DATA_WRITE, (ipcarg_t) src,
(ipcarg_t) size);
950,18 → 909,6
{
return ipc_answer_2(callid, EOK, (ipcarg_t) dst, (ipcarg_t) size);
}
 
#include <kernel/syscall/sysarg64.h>
/** Connect to a task specified by id.
*/
int ipc_connect_kbox(task_id_t id)
{
sysarg64_t arg;
 
arg.value = (unsigned long long) id;
 
return __SYSCALL1(SYS_IPC_CONNECT_KBOX, (sysarg_t) &arg);
}
/** @}
*/
/branches/network/uspace/lib/libc/generic/vfs/canonify.c
36,7 → 36,6
*/
 
#include <stdlib.h>
#include <vfs/canonify.h>
 
/** Token types used for tokenization of path. */
typedef enum {
/branches/network/uspace/lib/libc/generic/vfs/vfs.c
31,7 → 31,7
*/
/** @file
*/
 
#include <vfs/vfs.h>
#include <vfs/canonify.h>
#include <stdlib.h>
49,7 → 49,7
#include <errno.h>
#include <string.h>
#include <ipc/devmap.h>
#include "../../../srv/vfs/vfs.h"
#include "../../srv/vfs/vfs.h"
 
int vfs_phone = -1;
futex_t vfs_phone_futex = FUTEX_INITIALIZER;
57,7 → 57,7
futex_t cwd_futex = FUTEX_INITIALIZER;
DIR *cwd_dir = NULL;
char *cwd_path = NULL;
size_t cwd_len = 0;
size_t cwd_len = 0;
 
char *absolutize(const char *path, size_t *retlen)
{
109,39 → 109,34
return ncwd_path;
}
 
static void vfs_connect(void)
static int vfs_connect(void)
{
while (vfs_phone < 0)
vfs_phone = ipc_connect_me_to_blocking(PHONE_NS, SERVICE_VFS, 0, 0);
if (vfs_phone < 0)
vfs_phone = ipc_connect_me_to(PHONE_NS, SERVICE_VFS, 0, 0);
return vfs_phone;
}
 
static int device_get_handle(const char *name, dev_handle_t *handle,
const unsigned int flags)
static int device_get_handle(char *name, dev_handle_t *handle)
{
int phone;
if (flags & IPC_FLAG_BLOCKING)
phone = ipc_connect_me_to_blocking(PHONE_NS, SERVICE_DEVMAP, DEVMAP_CLIENT, 0);
else
phone = ipc_connect_me_to(PHONE_NS, SERVICE_DEVMAP, DEVMAP_CLIENT, 0);
int phone = ipc_connect_me_to(PHONE_NS, SERVICE_DEVMAP, DEVMAP_CLIENT,
0);
if (phone < 0)
return phone;
ipc_call_t answer;
aid_t req = async_send_2(phone, DEVMAP_DEVICE_GET_HANDLE, flags, 0,
aid_t req = async_send_2(phone, DEVMAP_DEVICE_GET_HANDLE, 0, 0,
&answer);
ipcarg_t retval = ipc_data_write_start(phone, name, strlen(name) + 1);
 
if (retval != EOK) {
async_wait_for(req, NULL);
ipc_hangup(phone);
return retval;
}
 
async_wait_for(req, &retval);
 
if (handle != NULL)
*handle = -1;
154,8 → 149,7
return retval;
}
 
int mount(const char *fs_name, const char *mp, const char *dev,
const unsigned int flags)
int mount(const char *fs_name, const char *mp, const char *dev)
{
int res;
ipcarg_t rc;
162,7 → 156,7
aid_t req;
dev_handle_t dev_handle;
res = device_get_handle(dev, &dev_handle, flags);
res = device_get_handle(dev, &dev_handle);
if (res != EOK)
return res;
170,13 → 164,20
char *mpa = absolutize(mp, &mpa_len);
if (!mpa)
return ENOMEM;
 
futex_down(&vfs_phone_futex);
async_serialize_start();
vfs_connect();
req = async_send_2(vfs_phone, VFS_MOUNT, dev_handle, flags, NULL);
rc = ipc_data_write_start(vfs_phone, (void *) mpa, mpa_len);
if (vfs_phone < 0) {
res = vfs_connect();
if (res < 0) {
async_serialize_end();
futex_up(&vfs_phone_futex);
free(mpa);
return res;
}
}
req = async_send_1(vfs_phone, VFS_MOUNT, dev_handle, NULL);
rc = ipc_data_write_start(vfs_phone, (void *)fs_name, strlen(fs_name));
if (rc != EOK) {
async_wait_for(req, NULL);
async_serialize_end();
184,8 → 185,8
free(mpa);
return (int) rc;
}
rc = ipc_data_write_start(vfs_phone, (void *) fs_name, strlen(fs_name));
/* Ask VFS whether it likes fs_name. */
rc = async_req_0_0(vfs_phone, IPC_M_PING);
if (rc != EOK) {
async_wait_for(req, NULL);
async_serialize_end();
193,17 → 194,24
free(mpa);
return (int) rc;
}
rc = ipc_data_write_start(vfs_phone, (void *)mpa, mpa_len);
if (rc != EOK) {
async_wait_for(req, NULL);
async_serialize_end();
futex_up(&vfs_phone_futex);
free(mpa);
return (int) rc;
}
async_wait_for(req, &rc);
async_serialize_end();
futex_up(&vfs_phone_futex);
free(mpa);
return (int) rc;
}
 
static int _open(const char *path, int lflag, int oflag, ...)
{
int res;
ipcarg_t rc;
ipc_call_t answer;
aid_t req;
215,8 → 223,15
futex_down(&vfs_phone_futex);
async_serialize_start();
vfs_connect();
if (vfs_phone < 0) {
res = vfs_connect();
if (res < 0) {
async_serialize_end();
futex_up(&vfs_phone_futex);
free(pa);
return res;
}
}
req = async_send_3(vfs_phone, VFS_OPEN, lflag, oflag, 0, &answer);
rc = ipc_data_write_start(vfs_phone, pa, pa_len);
if (rc != EOK) {
243,14 → 258,22
 
int close(int fildes)
{
int res;
ipcarg_t rc;
 
futex_down(&vfs_phone_futex);
async_serialize_start();
vfs_connect();
if (vfs_phone < 0) {
res = vfs_connect();
if (res < 0) {
async_serialize_end();
futex_up(&vfs_phone_futex);
return res;
}
}
rc = async_req_1_0(vfs_phone, VFS_CLOSE, fildes);
 
async_serialize_end();
futex_up(&vfs_phone_futex);
259,6 → 282,7
 
ssize_t read(int fildes, void *buf, size_t nbyte)
{
int res;
ipcarg_t rc;
ipc_call_t answer;
aid_t req;
265,8 → 289,14
 
futex_down(&vfs_phone_futex);
async_serialize_start();
vfs_connect();
if (vfs_phone < 0) {
res = vfs_connect();
if (res < 0) {
async_serialize_end();
futex_up(&vfs_phone_futex);
return res;
}
}
req = async_send_1(vfs_phone, VFS_READ, fildes, &answer);
rc = ipc_data_read_start(vfs_phone, (void *)buf, nbyte);
if (rc != EOK) {
286,6 → 316,7
 
ssize_t write(int fildes, const void *buf, size_t nbyte)
{
int res;
ipcarg_t rc;
ipc_call_t answer;
aid_t req;
292,8 → 323,14
 
futex_down(&vfs_phone_futex);
async_serialize_start();
vfs_connect();
if (vfs_phone < 0) {
res = vfs_connect();
if (res < 0) {
async_serialize_end();
futex_up(&vfs_phone_futex);
return res;
}
}
req = async_send_1(vfs_phone, VFS_WRITE, fildes, &answer);
rc = ipc_data_write_start(vfs_phone, (void *)buf, nbyte);
if (rc != EOK) {
313,15 → 350,23
 
off_t lseek(int fildes, off_t offset, int whence)
{
int res;
ipcarg_t rc;
 
futex_down(&vfs_phone_futex);
async_serialize_start();
vfs_connect();
ipcarg_t newoffs;
if (vfs_phone < 0) {
res = vfs_connect();
if (res < 0) {
async_serialize_end();
futex_up(&vfs_phone_futex);
return res;
}
}
off_t newoffs;
rc = async_req_3_1(vfs_phone, VFS_SEEK, fildes, offset, whence,
&newoffs);
(ipcarg_t)&newoffs);
 
async_serialize_end();
futex_up(&vfs_phone_futex);
329,17 → 374,24
if (rc != EOK)
return (off_t) -1;
return (off_t) newoffs;
return newoffs;
}
 
int ftruncate(int fildes, off_t length)
{
int res;
ipcarg_t rc;
futex_down(&vfs_phone_futex);
async_serialize_start();
vfs_connect();
if (vfs_phone < 0) {
res = vfs_connect();
if (res < 0) {
async_serialize_end();
futex_up(&vfs_phone_futex);
return res;
}
}
rc = async_req_2_0(vfs_phone, VFS_TRUNCATE, fildes, length);
async_serialize_end();
futex_up(&vfs_phone_futex);
381,6 → 433,7
 
int mkdir(const char *path, mode_t mode)
{
int res;
ipcarg_t rc;
aid_t req;
388,11 → 441,18
char *pa = absolutize(path, &pa_len);
if (!pa)
return ENOMEM;
 
futex_down(&vfs_phone_futex);
async_serialize_start();
vfs_connect();
if (vfs_phone < 0) {
res = vfs_connect();
if (res < 0) {
async_serialize_end();
futex_up(&vfs_phone_futex);
free(pa);
return res;
}
}
req = async_send_1(vfs_phone, VFS_MKDIR, mode, NULL);
rc = ipc_data_write_start(vfs_phone, pa, pa_len);
if (rc != EOK) {
411,6 → 471,7
 
static int _unlink(const char *path, int lflag)
{
int res;
ipcarg_t rc;
aid_t req;
421,8 → 482,15
 
futex_down(&vfs_phone_futex);
async_serialize_start();
vfs_connect();
if (vfs_phone < 0) {
res = vfs_connect();
if (res < 0) {
async_serialize_end();
futex_up(&vfs_phone_futex);
free(pa);
return res;
}
}
req = async_send_0(vfs_phone, VFS_UNLINK, NULL);
rc = ipc_data_write_start(vfs_phone, pa, pa_len);
if (rc != EOK) {
451,6 → 519,7
 
int rename(const char *old, const char *new)
{
int res;
ipcarg_t rc;
aid_t req;
468,8 → 537,16
 
futex_down(&vfs_phone_futex);
async_serialize_start();
vfs_connect();
if (vfs_phone < 0) {
res = vfs_connect();
if (res < 0) {
async_serialize_end();
futex_up(&vfs_phone_futex);
free(olda);
free(newa);
return res;
}
}
req = async_send_0(vfs_phone, VFS_RENAME, NULL);
rc = ipc_data_write_start(vfs_phone, olda, olda_len);
if (rc != EOK) {
522,7 → 599,6
cwd_path = pa;
cwd_len = pa_len;
futex_up(&cwd_futex);
return EOK;
}
 
char *getcwd(char *buf, size_t size)
/branches/network/uspace/lib/libc/generic/task.c
34,11 → 34,14
*/
 
#include <task.h>
#include <ipc/ipc.h>
#include <ipc/loader.h>
#include <libc.h>
#include <string.h>
#include <stdlib.h>
#include <async.h>
#include <errno.h>
#include <loader/loader.h>
#include <string.h>
#include <vfs/vfs.h>
 
task_id_t task_get_id(void)
{
49,72 → 52,134
return task_id;
}
 
/** Set the task name.
*
* @param name The new name, typically the command used to execute the
* program.
* @return Zero on success or negative error code.
*/
int task_set_name(const char *name)
static int task_spawn_loader(void)
{
return __SYSCALL2(SYS_TASK_SET_NAME, (sysarg_t) name, strlen(name));
int phone_id, rc;
 
rc = __SYSCALL1(SYS_PROGRAM_SPAWN_LOADER, (sysarg_t) &phone_id);
if (rc != 0)
return rc;
 
return phone_id;
}
 
/** Create a new task by running an executable from the filesystem.
static int loader_set_args(int phone_id, const char *argv[])
{
aid_t req;
ipc_call_t answer;
ipcarg_t rc;
 
const char **ap;
char *dp;
char *arg_buf;
size_t buffer_size;
size_t len;
 
/*
* Serialize the arguments into a single array. First
* compute size of the buffer needed.
*/
ap = argv;
buffer_size = 0;
while (*ap != NULL) {
buffer_size += strlen(*ap) + 1;
++ap;
}
 
arg_buf = malloc(buffer_size);
if (arg_buf == NULL) return ENOMEM;
 
/* Now fill the buffer with null-terminated argument strings */
ap = argv;
dp = arg_buf;
while (*ap != NULL) {
strcpy(dp, *ap);
dp += strlen(*ap) + 1;
 
++ap;
}
 
/* Send serialized arguments to the loader */
 
req = async_send_0(phone_id, LOADER_SET_ARGS, &answer);
rc = ipc_data_write_start(phone_id, (void *)arg_buf, buffer_size);
if (rc != EOK) {
async_wait_for(req, NULL);
return rc;
}
 
async_wait_for(req, &rc);
if (rc != EOK) return rc;
 
/* Free temporary buffer */
free(arg_buf);
 
return EOK;
}
 
/** Create a new task by running an executable from VFS.
*
* This is really just a convenience wrapper over the more complicated
* loader API.
*
* @param path pathname of the binary to execute
* @param argv command-line arguments
* @return ID of the newly created task or zero on error.
*/
task_id_t task_spawn(const char *path, char *const argv[])
task_id_t task_spawn(const char *path, const char *argv[])
{
loader_t *ldr;
task_id_t task_id;
int phone_id;
ipc_call_t answer;
aid_t req;
int rc;
ipcarg_t retval;
 
/* Connect to a program loader. */
ldr = loader_connect();
if (ldr == NULL)
char *pa;
size_t pa_len;
 
pa = absolutize(path, &pa_len);
if (!pa)
return 0;
 
/* Get task ID. */
rc = loader_get_task_id(ldr, &task_id);
if (rc != EOK)
goto error;
/* Spawn a program loader */
phone_id = task_spawn_loader();
if (phone_id < 0)
return 0;
 
/* Send program pathname. */
rc = loader_set_pathname(ldr, path);
/*
* Say hello so that the loader knows the incoming connection's
* phone hash.
*/
rc = async_req_0_0(phone_id, LOADER_HELLO);
if (rc != EOK)
goto error;
return 0;
 
/* Send arguments. */
rc = loader_set_args(ldr, argv);
if (rc != EOK)
/* Send program pathname */
req = async_send_0(phone_id, LOADER_SET_PATHNAME, &answer);
rc = ipc_data_write_start(phone_id, (void *)pa, pa_len);
if (rc != EOK) {
async_wait_for(req, NULL);
return 1;
}
 
async_wait_for(req, &retval);
if (retval != EOK)
goto error;
 
/* Load the program. */
rc = loader_load_program(ldr);
/* Send arguments */
rc = loader_set_args(phone_id, argv);
if (rc != EOK)
goto error;
 
/* Run it. */
rc = loader_run(ldr);
/* Request loader to start the program */
rc = async_req_0_0(phone_id, LOADER_RUN);
if (rc != EOK)
goto error;
 
/* Success */
ipc_hangup(phone_id);
return 1;
 
free(ldr);
return task_id;
 
/* Error exit */
error:
loader_abort(ldr);
free(ldr);
 
ipc_hangup(phone_id);
return 0;
}
 
/branches/network/uspace/lib/libc/generic/string.c
1,6 → 1,5
/*
* Copyright (c) 2005 Martin Decky
* Copyright (c) 2008 Jiri Svoboda
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
34,11 → 33,96
*/
 
#include <string.h>
#include <stdlib.h>
#include <unistd.h>
#include <ctype.h>
#include <limits.h>
#include <ctype.h>
#include <align.h>
#include <sys/types.h>
#include <malloc.h>
 
/* Dummy implementation of mem/ functions */
 
void *memset(void *s, int c, size_t n)
{
char *os = s;
while (n--)
*(os++) = c;
return s;
}
 
struct along {
unsigned long n;
} __attribute__ ((packed));
 
static void *unaligned_memcpy(void *dst, const void *src, size_t n)
{
int i, j;
struct along *adst = dst;
const struct along *asrc = src;
 
for (i = 0; i < n / sizeof(unsigned long); i++)
adst[i].n = asrc[i].n;
for (j = 0; j < n % sizeof(unsigned long); j++)
((unsigned char *) (((unsigned long *) dst) + i))[j] =
((unsigned char *) (((unsigned long *) src) + i))[j];
return (char *) dst;
}
 
void *memcpy(void *dst, const void *src, size_t n)
{
int i, j;
 
if (((long) dst & (sizeof(long) - 1)) ||
((long) src & (sizeof(long) - 1)))
return unaligned_memcpy(dst, src, n);
 
for (i = 0; i < n / sizeof(unsigned long); i++)
((unsigned long *) dst)[i] = ((unsigned long *) src)[i];
for (j = 0; j < n % sizeof(unsigned long); j++)
((unsigned char *) (((unsigned long *) dst) + i))[j] =
((unsigned char *) (((unsigned long *) src) + i))[j];
return (char *) dst;
}
 
void *memmove(void *dst, const void *src, size_t n)
{
int i, j;
if (src > dst)
return memcpy(dst, src, n);
 
for (j = (n % sizeof(unsigned long)) - 1; j >= 0; j--)
((unsigned char *) ((unsigned long *) dst))[j] =
((unsigned char *) ((unsigned long *) src))[j];
 
for (i = n / sizeof(unsigned long) - 1; i >=0 ; i--)
((unsigned long *) dst)[i] = ((unsigned long *) src)[i];
return (char *) dst;
}
 
/** Compare two memory areas.
*
* @param s1 Pointer to the first area to compare.
* @param s2 Pointer to the second area to compare.
* @param len Size of the first area in bytes. Both areas must have
* the same length.
* @return If len is 0, return zero. If the areas match, return
* zero. Otherwise return non-zero.
*/
int bcmp(const char *s1, const char *s2, size_t len)
{
for (; len && *s1++ == *s2++; len--)
;
return len;
}
 
/** Count the number of characters in the string, not including terminating 0.
*
* @param str String.
312,37 → 396,5
return (char *) memcpy(ret, s1, len);
}
 
char *strtok(char *s, const char *delim)
{
static char *next;
 
return strtok_r(s, delim, &next);
}
 
char *strtok_r(char *s, const char *delim, char **next)
{
char *start, *end;
 
if (s == NULL)
s = *next;
 
/* Skip over leading delimiters. */
while (*s && (strchr(delim, *s) != NULL)) ++s;
start = s;
 
/* Skip over token characters. */
while (*s && (strchr(delim, *s) == NULL)) ++s;
end = s;
*next = (*s ? s + 1 : s);
 
if (start == end) {
return NULL; /* No more tokens. */
}
 
/* Overwrite delimiter with NULL terminator. */
*end = '\0';
return start;
}
 
/** @}
*/
/branches/network/uspace/lib/libc/generic/libc.c
53,8 → 53,6
extern char _heap;
extern int main(int argc, char *argv[]);
 
int _errno;
 
void _exit(int status)
{
thread_exit(status);
71,6 → 69,8
f = fibril_setup();
__tcb_set(f->tcb);
open_console();
 
/* Save the PCB pointer */
__pcb = (pcb_t *)pcb_ptr;
 
/branches/network/uspace/lib/libc/generic/smc.c
34,7 → 34,6
 
#include <libc.h>
#include <sys/types.h>
#include <smc.h>
 
int smc_coherence(void *address, size_t size)
{
/branches/network/uspace/lib/libc/generic/async.c
483,7 → 483,7
{
connection_t *conn;
unsigned long key;
 
conn = malloc(sizeof(*conn));
if (!conn) {
if (callid)
498,7 → 498,7
conn->call = *call;
conn->wdata.active = 1; /* We will activate the fibril ASAP */
conn->cfibril = cfibril;
 
conn->wdata.fid = fibril_create(connection_fibril, conn);
if (!conn->wdata.fid) {
free(conn);
506,15 → 506,14
ipc_answer_0(callid, ENOMEM);
return NULL;
}
/* Add connection to the connection hash table */
key = conn->in_phone_hash;
futex_down(&async_futex);
hash_table_insert(&conn_hash_table, &key, &conn->link);
futex_up(&async_futex);
 
fibril_add_ready(conn->wdata.fid);
 
return conn->wdata.fid;
}
 
525,7 → 524,6
*
* @param callid Hash of the incoming call.
* @param call Data of the incoming call.
*
*/
static void handle_call(ipc_callid_t callid, ipc_call_t *call)
{
535,8 → 533,8
(*interrupt_received)(callid, call);
_in_interrupt_handler = 0;
return;
}
}
 
switch (IPC_GET_METHOD(*call)) {
case IPC_M_CONNECT_ME_TO:
/* Open new connection with fibril etc. */
544,11 → 542,11
client_connection);
return;
}
 
/* Try to route the call through the connection hash table */
if (route_call(callid, call))
return;
 
/* Unknown call from unknown phone - hang it up */
ipc_answer_0(callid, EHANGUP);
}
741,17 → 739,23
ipcarg_t arg2, ipcarg_t arg3, ipcarg_t arg4, ipc_call_t *dataptr)
{
amsg_t *msg;
 
if (_in_interrupt_handler) {
printf("Cannot send asynchronous request in interrupt "
"handler.\n");
_exit(1);
}
 
msg = malloc(sizeof(*msg));
msg->done = 0;
msg->dataptr = dataptr;
 
/* We may sleep in the next method, but it will use its own mechanism */
msg->wdata.active = 1;
ipc_call_async_4(phoneid, method, arg1, arg2, arg3, arg4, msg,
reply_received, !_in_interrupt_handler);
reply_received, 1);
 
return (aid_t) msg;
}
 
777,17 → 781,23
ipc_call_t *dataptr)
{
amsg_t *msg;
 
if (_in_interrupt_handler) {
printf("Cannot send asynchronous request in interrupt "
"handler.\n");
_exit(1);
}
 
msg = malloc(sizeof(*msg));
msg->done = 0;
msg->dataptr = dataptr;
 
/* We may sleep in next method, but it will use its own mechanism */
msg->wdata.active = 1;
 
ipc_call_async_5(phoneid, method, arg1, arg2, arg3, arg4, arg5, msg,
reply_received, !_in_interrupt_handler);
reply_received, 1);
 
return (aid_t) msg;
}
 
874,16 → 884,21
{
amsg_t *msg;
if (_in_interrupt_handler) {
printf("Cannot call async_usleep in interrupt handler.\n");
_exit(1);
}
 
msg = malloc(sizeof(*msg));
if (!msg)
return;
 
msg->wdata.fid = fibril_get_id();
msg->wdata.active = 0;
 
gettimeofday(&msg->wdata.expires, NULL);
tv_add(&msg->wdata.expires, timeout);
 
futex_down(&async_futex);
insert_timeout(&msg->wdata);
/* Leave the async_futex locked when entering this function */
/branches/network/uspace/lib/libc/generic/time.c
47,8 → 47,6
#include <as.h>
#include <ddi.h>
 
#include <time.h>
 
/* Pointers to public variables with time */
struct {
volatile sysarg_t seconds1;
/branches/network/uspace/lib/libc/generic/tls.c
116,7 → 116,7
tcb_t *tcb;
size = ALIGN_UP(size, &_tls_alignment);
*data = memalign((uintptr_t) &_tls_alignment, sizeof(tcb_t) + size);
*data = memalign(&_tls_alignment, sizeof(tcb_t) + size);
 
tcb = (tcb_t *) (*data + size);
tcb->self = tcb;
/branches/network/uspace/lib/libc/generic/thread.c
108,8 → 108,8
uarg->uspace_thread_arg = arg;
uarg->uspace_uarg = uarg;
rc = __SYSCALL4(SYS_THREAD_CREATE, (sysarg_t) uarg, (sysarg_t) name,
(sysarg_t) strlen(name), (sysarg_t) tid);
rc = __SYSCALL3(SYS_THREAD_CREATE, (sysarg_t) uarg, (sysarg_t) name,
(sysarg_t) tid);
if (rc) {
/*
/branches/network/uspace/lib/libc/generic/ddi.c
33,42 → 33,26
*/
 
#include <ddi.h>
#include <libarch/ddi.h>
#include <libc.h>
#include <task.h>
#include <as.h>
#include <align.h>
#include <libarch/config.h>
#include <kernel/ddi/ddi_arg.h>
 
/** Return unique device number.
*
* @return New unique device number.
*
*/
int device_assign_devno(void)
{
return __SYSCALL0(SYS_DEVICE_ASSIGN_DEVNO);
}
 
/** Map piece of physical memory to task.
*
* Caller of this function must have the CAP_MEM_MANAGER capability.
*
* @param pf Physical address of the starting frame.
* @param vp Virtual address of the starting page.
* @param pages Number of pages to map.
* @param flags Flags for the new address space area.
* @param pf Physical address of the starting frame.
* @param vp Virtual address of the sterting page.
* @param pages Number of pages to map.
* @param flags Flags for the new address space area.
*
* @return 0 on success, EPERM if the caller lacks the
* CAP_MEM_MANAGER capability, ENOENT if there is no task
* with specified ID and ENOMEM if there was some problem
* in creating address space area.
* @return 0 on success, EPERM if the caller lacks the CAP_MEM_MANAGER capability,
* ENOENT if there is no task with specified ID and ENOMEM if there
* was some problem in creating address space area.
*/
int physmem_map(void *pf, void *vp, unsigned long pages, int flags)
{
return __SYSCALL4(SYS_PHYSMEM_MAP, (sysarg_t) pf, (sysarg_t) vp, pages,
flags);
return __SYSCALL4(SYS_PHYSMEM_MAP, (sysarg_t) pf, (sysarg_t) vp, pages, flags);
}
 
/** Enable I/O space range to task.
75,14 → 59,13
*
* Caller of this function must have the IO_MEM_MANAGER capability.
*
* @param id Task ID.
* @param ioaddr Starting address of the I/O range.
* @param size Size of the range.
* @param id Task ID.
* @param ioaddr Starting address of the I/O range.
* @param size Size of the range.
*
* @return 0 on success, EPERM if the caller lacks the
* CAP_IO_MANAGER capability, ENOENT if there is no task
* with specified ID and ENOMEM if there was some problem
* in allocating memory.
* @return 0 on success, EPERM if the caller lacks the CAP_IO_MANAGER capability,
* ENOENT if there is no task with specified ID and ENOMEM if there
* was some problem in allocating memory.
*/
int iospace_enable(task_id_t id, void *ioaddr, unsigned long size)
{
97,7 → 80,7
 
/** Interrupt control
*
* @param enable 1 - enable interrupts, 0 - disable interrupts
* @param enable 1 - enable interrupts, 0 - disable interrupts
*/
int preemption_control(int enable)
{
104,36 → 87,5
return __SYSCALL1(SYS_PREEMPT_CONTROL, (sysarg_t) enable);
}
 
/** Enable PIO for specified I/O range.
*
* @param pio_addr I/O start address.
* @param size Size of the I/O region.
* @param use_addr Address where the final address for application's PIO
* will be stored.
*
* @return Zero on success or negative error code.
*/
int pio_enable(void *pio_addr, size_t size, void **use_addr)
{
void *phys;
void *virt;
size_t offset;
unsigned int pages;
 
#ifdef IO_SPACE_BOUNDARY
if (pio_addr < IO_SPACE_BOUNDARY) {
*use_addr = pio_addr;
return iospace_enable(task_get_id(), pio_addr, size);
}
#endif
 
phys = ALIGN_DOWN((uintptr_t) pio_addr, PAGE_SIZE);
offset = pio_addr - phys;
pages = ALIGN_UP(offset + size, PAGE_SIZE) >> PAGE_WIDTH;
virt = as_get_mappable_page(pages);
*use_addr = virt + offset;
return physmem_map(phys, virt, pages, AS_AREA_READ | AS_AREA_WRITE);
}
 
/** @}
*/
/branches/network/uspace/lib/libc/Makefile
31,6 → 31,7
 
LIBC_PREFIX = $(shell pwd)
SOFTINT_PREFIX = ../softint
CONSOLE_PREFIX = ../../srv/console
 
## Setup toolchain
#
37,17 → 38,17
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
CFLAGS += -I$(CONSOLE_PREFIX)
 
## Sources
#
 
 
GENERIC_SOURCES = \
generic/libc.c \
generic/ddi.c \
generic/as.c \
generic/cap.c \
generic/console.c \
generic/mem.c \
generic/string.c \
generic/fibril.c \
generic/pcb.c \
59,8 → 60,6
generic/io/asprintf.c \
generic/io/io.c \
generic/io/printf.c \
generic/io/fprintf.c \
generic/io/stdio.c \
generic/io/stream.c \
generic/io/sprintf.c \
generic/io/snprintf.c \
72,7 → 71,6
generic/sysinfo.c \
generic/ipc.c \
generic/async.c \
generic/loader.c \
generic/getopt.c \
generic/libadt/list.o \
generic/libadt/hash_table.o \
79,42 → 77,39
generic/time.c \
generic/err.c \
generic/stdlib.c \
generic/kbd.c \
generic/mman.c \
generic/udebug.c \
generic/vfs/vfs.c \
generic/vfs/canonify.c
 
ARCH_SOURCES += \
arch/$(UARCH)/src/entry.s \
arch/$(UARCH)/src/thread_entry.s
arch/$(ARCH)/src/entry.s \
arch/$(ARCH)/src/thread_entry.s
 
GENERIC_OBJECTS := $(addsuffix .o,$(basename $(GENERIC_SOURCES)))
ARCH_OBJECTS := $(addsuffix .o,$(basename $(ARCH_SOURCES)))
OBJECTS := $(GENERIC_OBJECTS) $(ARCH_OBJECTS)
 
.PHONY: all clean depend kerninc
 
all: kerninc libc.a arch/$(UARCH)/_link.ld
all: kerninc libc.a arch/$(ARCH)/_link.ld
 
kerninc:
ln -sfn ../../../../kernel/generic/include include/kernel
ln -sfn kernel/arch include/arch
ln -sfn ../arch/$(UARCH)/include include/libarch
ln -sfn ../arch/$(ARCH)/include include/libarch
 
-include Makefile.depend
 
clean:
-rm -f include/kernel include/arch include/libarch libc.a arch/$(UARCH)/_link.ld Makefile.depend
find generic/ arch/$(UARCH)/ malloc -name '*.o' -follow -exec rm \{\} \;
-rm -f include/kernel include/arch include/libarch libc.a arch/$(ARCH)/_link.ld Makefile.depend
find generic/ arch/$(ARCH)/ -name '*.o' -follow -exec rm \{\} \;
 
depend: kerninc
-makedepend -f - -- $(DEPEND_DEFS) $(CFLAGS) -- $(ARCH_SOURCES) $(GENERIC_SOURCES) > Makefile.depend 2> /dev/null
-makedepend $(DEFS) $(CFLAGS) -f - $(ARCH_SOURCES) $(GENERIC_SOURCES) > Makefile.depend 2> /dev/null
 
libc.a: depend $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
$(AR) rc libc.a $(LIBS) $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
 
arch/$(UARCH)/_link.ld: arch/$(UARCH)/_link.ld.in
arch/$(ARCH)/_link.ld: arch/$(ARCH)/_link.ld.in
$(CC) $(DEFS) $(CFLAGS) -DLIBC_PREFIX=$(LIBC_PREFIX) -E -x c $< | grep -v "^\#" > $@
 
%.o: %.S
/branches/network/uspace/lib/libc/Makefile.toolchain
26,23 → 26,16
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
CFLAGS = -fno-builtin -Wall -Werror-implicit-function-declaration -Wmissing-prototypes -O3 -nostdlib -nostdinc -imacros $(LIBC_PREFIX)/../../../config.h -I$(LIBC_PREFIX)/include -pipe -g
DEFS = -DARCH=$(ARCH)
CFLAGS = -fno-builtin -Wall -Werror-implicit-function-declaration -Wmissing-prototypes -O3 -nostdlib -nostdinc -I$(LIBC_PREFIX)/include
LFLAGS = -M -N $(SOFTINT_PREFIX)/libsoftint.a
AFLAGS =
#-Werror
 
## Cross-toolchain prefix
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
## Setup platform configuration
#
 
-include $(LIBC_PREFIX)/../../../Makefile.config
-include $(LIBC_PREFIX)/../../../config.defs
-include $(LIBC_PREFIX)/arch/$(UARCH)/Makefile.inc
include $(LIBC_PREFIX)/arch/$(ARCH)/Makefile.inc
 
## Simple detection of the host system
#
66,7 → 59,6
AR = $(BINUTILS_PREFIX)ar
OBJCOPY = $(BINUTILS_PREFIX)objcopy
OBJDUMP = $(BINUTILS_PREFIX)objdump
DEPEND_DEFS = $(DEFS) $(CONFIG_DEFS)
endif
 
ifeq ($(COMPILER),icc_native)
76,7 → 68,6
AR = ar
OBJCOPY = objcopy
OBJDUMP = objdump
DEPEND_DEFS = $(DEFS) $(CONFIG_DEFS)
endif
 
ifeq ($(COMPILER),gcc_cross)
86,5 → 77,5
AR = $(TOOLCHAIN_DIR)/$(TARGET)-ar
OBJCOPY = $(TOOLCHAIN_DIR)/$(TARGET)-objcopy
OBJDUMP = $(TOOLCHAIN_DIR)/$(TARGET)-objdump
DEPEND_DEFS = $(DEFS) $(CONFIG_DEFS)
endif
 
/branches/network/uspace/lib/libfs/libfs.c
36,6 → 36,7
 
#include "libfs.h"
#include "../../srv/vfs/vfs.h"
#include "../../srv/rd/rd.h"
#include <errno.h>
#include <async.h>
#include <ipc/ipc.h>
191,20 → 192,17
}
void *nodep;
if (lflag & L_CREATE)
nodep = ops->create(dev_handle, lflag);
nodep = ops->create(lflag);
else
nodep = ops->node_get(dev_handle,
index);
if (nodep) {
int rc;
 
rc = ops->link(cur, nodep, component);
if (rc != EOK) {
if (!ops->link(cur, nodep, component)) {
if (lflag & L_CREATE) {
(void)ops->destroy(
nodep);
}
ipc_answer_0(rid, rc);
ipc_answer_0(rid, ENOSPC);
} else {
ipc_answer_5(rid, EOK,
fs_handle, dev_handle,
265,17 → 263,14
void *nodep;
if (lflag & L_CREATE)
nodep = ops->create(dev_handle, lflag);
nodep = ops->create(lflag);
else
nodep = ops->node_get(dev_handle, index);
if (nodep) {
int rc;
 
rc = ops->link(cur, nodep, component);
if (rc != EOK) {
if (!ops->link(cur, nodep, component)) {
if (lflag & L_CREATE)
(void)ops->destroy(nodep);
ipc_answer_0(rid, rc);
ipc_answer_0(rid, ENOSPC);
} else {
ipc_answer_5(rid, EOK,
fs_handle, dev_handle,
336,5 → 331,62
ops->node_put(tmp);
}
 
/** Read data from a block device.
*
* @param phone Phone to be used to communicate with the device.
* @param buffer Communication buffer shared with the device.
* @param bufpos Pointer to the first unread valid offset within the
* communication buffer.
* @param buflen Pointer to the number of unread bytes that are ready in
* the communication buffer.
* @param pos Device position to be read.
* @param dst Destination buffer.
* @param size Size of the destination buffer.
* @param block_size Block size to be used for the transfer.
*
* @return True on success, false on failure.
*/
bool libfs_blockread(int phone, void *buffer, off_t *bufpos, size_t *buflen,
off_t *pos, void *dst, size_t size, size_t block_size)
{
off_t offset = 0;
size_t left = size;
while (left > 0) {
size_t rd;
if (*bufpos + left < *buflen)
rd = left;
else
rd = *buflen - *bufpos;
if (rd > 0) {
/*
* Copy the contents of the communication buffer to the
* destination buffer.
*/
memcpy(dst + offset, buffer + *bufpos, rd);
offset += rd;
*bufpos += rd;
*pos += rd;
left -= rd;
}
if (*bufpos == *buflen) {
/* Refill the communication buffer with a new block. */
ipcarg_t retval;
int rc = async_req_2_1(phone, RD_READ_BLOCK,
*pos / block_size, block_size, &retval);
if ((rc != EOK) || (retval != EOK))
return false;
*bufpos = 0;
*buflen = block_size;
}
}
return true;
}
 
/** @}
*/
/branches/network/uspace/lib/libfs/libfs.h
45,9 → 45,9
void * (* match)(void *, const char *);
void * (* node_get)(dev_handle_t, fs_index_t);
void (* node_put)(void *);
void * (* create)(dev_handle_t, int);
void * (* create)(int);
int (* destroy)(void *);
int (* link)(void *, void *, const char *);
bool (* link)(void *, void *, const char *);
int (* unlink)(void *, void *);
fs_index_t (* index_get)(void *);
size_t (* size_get)(void *);
69,6 → 69,9
 
extern void libfs_lookup(libfs_ops_t *, fs_handle_t, ipc_callid_t, ipc_call_t *);
 
extern bool libfs_blockread(int, void *, off_t *, size_t *, off_t *, void *,
size_t, size_t);
 
#endif
 
/** @}
/branches/network/uspace/lib/libfs/Makefile
31,7 → 31,6
#
 
LIBC_PREFIX = ../libc
 
## Setup toolchain
#
 
58,7 → 57,7
find . -name '*.o' -follow -exec rm \{\} \;
 
depend:
-makedepend -f - -- $(DEPEND_DEFS) $(CFLAGS) -- $(SOURCES) > Makefile.depend 2> /dev/null
-makedepend $(DEFS) $(CFLAGS) -f - $(SOURCES) > Makefile.depend 2> /dev/null
 
libfs.a: depend $(OBJECTS)
$(AR) rc libfs.a $(OBJECTS)
/branches/network/uspace/lib/softfloat/arch/ppc64/include/functions.h
0,0 → 1,76
/*
* Copyright (c) 2006 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup softfloatppc64 ppc64
* @ingroup sfl
* @brief softfloat architecture dependent definitions
* @{
*/
/** @file
*/
 
#ifndef __SOFTFLOAT_FUNCTIONS_H__
#define __SOFTFLOAT_FUNCTIONS_H__
 
#define float32_to_int(X) float32_to_int32(X);
#define float32_to_long(X) float32_to_int64(X);
#define float32_to_longlong(X) float32_to_int64(X);
 
#define float64_to_int(X) float64_to_int32(X);
#define float64_to_long(X) float64_to_int64(X);
#define float64_to_longlong(X) float64_to_int64(X);
 
#define float32_to_uint(X) float32_to_uint32(X);
#define float32_to_ulong(X) float32_to_uint64(X);
#define float32_to_ulonglong(X) float32_to_uint64(X);
 
#define float64_to_uint(X) float64_to_uint32(X);
#define float64_to_ulong(X) float64_to_uint64(X);
#define float64_to_ulonglong(X) float64_to_uint64(X);
 
#define int_to_float32(X) int32_to_float32(X);
#define long_to_float32(X) int64_to_float32(X);
#define longlong_to_float32(X) int64_to_float32(X);
 
#define int_to_float64(X) int32_to_float64(X);
#define long_to_float64(X) int64_to_float64(X);
#define longlong_to_float64(X) int64_to_float64(X);
 
#define uint_to_float32(X) uint32_to_float32(X);
#define ulong_to_float32(X) uint64_to_float32(X);
#define ulonglong_to_float32(X) uint64_to_float32(X);
 
#define uint_to_float64(X) uint32_to_float64(X);
#define ulong_to_float64(X) uint64_to_float64(X);
#define ulonglong_to_float64(X) uint64_to_float64(X);
 
#endif
 
/** @}
*/
 
/branches/network/uspace/lib/softfloat/Makefile
30,26 → 30,25
#
 
LIBC_PREFIX = ../libc
 
## Setup toolchain
#
 
include $(LIBC_PREFIX)/Makefile.toolchain
 
CFLAGS +=-Iinclude -Iarch/$(UARCH)/include/
CFLAGS +=-Iinclude -Iarch/$(ARCH)/include/
 
## Sources
#
 
GENERIC_SOURCES = \
generic/add.c \
generic/common.c \
generic/comparison.c \
generic/conversion.c \
generic/div.c \
generic/mul.c \
generic/other.c \
generic/softfloat.c \
GENERIC_SOURCES = \
generic/add.c \
generic/common.c \
generic/comparison.c \
generic/conversion.c \
generic/div.c \
generic/mul.c \
generic/other.c \
generic/softfloat.c \
generic/sub.c
 
ARCH_SOURCES =
67,7 → 66,7
find generic/ -name '*.o' -follow -exec rm \{\} \;
 
depend:
-makedepend -f - -- $(DEPEND_DEFS) $(CFLAGS) -- $(GENERIC_SOURCES) > Makefile.depend 2> /dev/null
-makedepend $(DEFS) $(CFLAGS) -f - $(GENERIC_SOURCES) > Makefile.depend 2> /dev/null
 
libsoftfloat.a: depend $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
$(AR) rc libsoftfloat.a $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
/branches/network/uspace/lib/softint/Makefile
30,7 → 30,6
#
 
LIBC_PREFIX = ../libc
 
## Setup toolchain
#
 
59,7 → 58,7
find generic/ -name '*.o' -follow -exec rm \{\} \;
 
depend:
-makedepend -f - -- $(DEPEMD_DEFS) $(CFLAGS) -- $(GENERIC_SOURCES) > Makefile.depend 2> /dev/null
-makedepend $(DEFS) $(CFLAGS) -f - $(GENERIC_SOURCES) > Makefile.depend 2> /dev/null
 
libsoftint.a: depend $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
$(AR) rc libsoftint.a $(ARCH_OBJECTS) $(GENERIC_OBJECTS)
/branches/network/uspace/Makefile
29,12 → 29,11
## Include configuration
#
 
-include ../Makefile.config
-include Makefile.config
 
DIRS = \
lib/libc \
lib/libfs \
lib/libblock \
lib/softint \
lib/softfloat \
srv/ns \
50,37 → 49,49
srv/net \
app/tetris \
app/tester \
app/trace \
app/klog \
app/init \
app/bdsh
 
ifeq ($(UARCH),amd64)
ifeq ($(ARCH), amd64)
DIRS += srv/pci
endif
 
ifeq ($(UARCH),ia32)
ifeq ($(ARCH), ia32)
DIRS += srv/pci
endif
 
ifeq ($(UARCH),sparc64)
DIRS += \
srv/fhc \
srv/obio
ifeq ($(ARCH), mips32)
CFLAGS += -DCONFIG_MIPS_FPU
endif
 
ifeq ($(ARCH), mips32eb)
CFLAGS += -DCONFIG_MIPS_FPU
endif
 
BUILDS := $(addsuffix .build,$(DIRS))
CLEANS := $(addsuffix .clean,$(DIRS))
 
.PHONY: all $(BUILDS) $(CLEANS) clean
.PHONY: all config build $(BUILDS) $(CLEANS) clean distclean
 
all: ../Makefile.config ../config.h ../config.defs $(BUILDS)
all:
../tools/config.py uspace.config default $(ARCH) $(COMPILER) $(CONFIG_DEBUG)
$(MAKE) -C . build
 
config:
../tools/config.py uspace.config
 
build: $(BUILDS)
 
clean: $(CLEANS)
find $(DIRS) -name '*.o' -follow -exec rm \{\} \;
find lib/libc -name "_link.ld" -exec rm \{\} \;
 
distclean: clean
-rm Makefile.config
 
$(CLEANS):
-$(MAKE) -C $(basename $@) clean
-$(MAKE) -C $(basename $@) clean ARCH=$(ARCH)
 
$(BUILDS):
$(MAKE) -C $(basename $@) all
 
$(MAKE) -C $(basename $@) all ARCH=$(ARCH) COMPILER=$(COMPILER) NETWORKING=$(NETWORKING)
/branches/network/uspace/dist/readme
File deleted
/branches/network/uspace/dist/etc/inittab
--- uspace/uspace.config (nonexistent)
+++ uspace/uspace.config (revision 4077)
@@ -0,0 +1,68 @@
+#
+# Copyright (c) 2006 Ondrej Palkovsky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+## General configuration directives
+
+# Architecture
+@ "amd64" AMD64/Intel EM64T
+@ "arm32" ARM 32-bit
+@ "ia32" Intel IA-32
+@ "ia64" Intel IA-64
+@ "mips32" MIPS 32-bit Little Endian
+@ "mips32eb" MIPS 32-bit Big Endian
+@ "ppc32" PowerPC 32-bit
+@ "ppc64" PowerPC 64-bit
+@ "sparc64" Sun UltraSPARC 64-bit
+! ARCH (choice)
+
+# Compiler
+@ "gcc_cross" GCC Cross-compiler
+@ "gcc_native" GCC Native
+@ "icc_native" ICC Native
+@ "suncc_native" Sun Studio C Compiler
+! [ARCH=amd64|ARCH=ia32] COMPILER (choice)
+
+# Compiler
+@ "gcc_cross" GCC Cross-compiler
+@ "gcc_native" GCC Native
+@ "icc_native" ICC Native
+! [ARCH=ia64] COMPILER (choice)
+
+# Compiler
+@ "gcc_cross" GCC Cross-compiler
+@ "gcc_native" GCC Native
+@ "suncc_native" Sun Studio C Compiler
+! [ARCH=sparc64] COMPILER (choice)
+
+# Compiler
+@ "gcc_cross" GCC Cross-compiler
+@ "gcc_native" GCC Native
+! [ARCH=arm32|ARCH=mips32|ARCH=mips32eb|ARCH=ppc32|ARCH=ppc64] COMPILER (choice)
+
+# General debuging and assert checking
+! CONFIG_DEBUG (y/n)
/branches/network/boot/arch/ia32/Makefile.inc
40,23 → 40,20
INIT_TASKS += $(USPACEDIR)/srv/fs/fat/fat
endif
 
RD_SRVS = \
RD_TASKS = \
$(USPACEDIR)/srv/pci/pci \
$(USPACEDIR)/srv/fb/fb \
$(USPACEDIR)/srv/kbd/kbd \
$(USPACEDIR)/srv/console/console \
$(USPACEDIR)/srv/fs/fat/fat
 
RD_APPS = \
$(USPACEDIR)/srv/fs/fat/fat \
$(USPACEDIR)/app/tetris/tetris \
$(USPACEDIR)/app/tester/tester \
$(USPACEDIR)/app/trace/trace \
$(USPACEDIR)/app/klog/klog \
$(USPACEDIR)/app/bdsh/bdsh \
$(USPACEDIR)/srv/net/networking/networking \
$(USPACEDIR)/srv/net/networking/startup/networking_startup \
$(USPACEDIR)/srv/net/netif/lo/lo \
$(USPACEDIR)/srv/net/netif/dp8390/dp8390
$(USPACEDIR)/srv/net/netif/lo/lo
# $(USPACEDIR)/srv/net/netif/dp8390_isa
 
ifeq ($(NETWORKING), modular)
RD_TASKS += $(USPACEDIR)/srv/net/il/ip/ip \
71,41 → 68,35
 
build: $(BASE)/image.iso
 
$(BASE)/image.iso: arch/$(BARCH)/grub/stage2_eltorito arch/$(BARCH)/grub/menu.lst $(KERNELDIR)/kernel.bin $(INIT_TASKS) $(RD_SRVS) $(RD_APPS)
mkdir -p arch/$(BARCH)/iso/boot/grub
cp arch/$(BARCH)/grub/stage2_eltorito arch/$(BARCH)/iso/boot/grub/
$(BASE)/image.iso: arch/$(ARCH)/grub/stage2_eltorito arch/$(ARCH)/grub/menu.lst $(KERNELDIR)/kernel.bin $(INIT_TASKS) $(RD_TASKS)
mkdir -p arch/$(ARCH)/iso/boot/grub
cp arch/$(ARCH)/grub/stage2_eltorito arch/$(ARCH)/iso/boot/grub/
ifneq ($(RDFMT),tmpfs)
cat arch/$(BARCH)/grub/menu.lst | grep -v "tmpfs" >arch/$(BARCH)/iso/boot/grub/menu.lst
cat arch/$(ARCH)/grub/menu.lst | grep -v "tmpfs" >arch/$(ARCH)/iso/boot/grub/menu.lst
endif
ifneq ($(RDFMT),fat)
cat arch/$(BARCH)/grub/menu.lst | grep -v "fat" >arch/$(BARCH)/iso/boot/grub/menu.lst
cat arch/$(ARCH)/grub/menu.lst | grep -v "fat" >arch/$(ARCH)/iso/boot/grub/menu.lst
endif
cp $(KERNELDIR)/kernel.bin arch/$(BARCH)/iso/boot/
cp $(KERNELDIR)/kernel.bin arch/$(ARCH)/iso/boot/
for task in $(INIT_TASKS) ; do \
cp $$task arch/$(BARCH)/iso/boot/ ; \
cp $$task arch/$(ARCH)/iso/boot/ ; \
done
for file in $(RD_SRVS) ; do \
cp $$file $(USPACEDIR)/dist/srv/ ; \
for task in $(RD_TASKS) ; do \
cp $$task $(USPACEDIR)/dist/sbin/ ; \
done
for file in $(RD_APPS) ; do \
cp $$file $(USPACEDIR)/dist/app/ ; \
done
ifeq ($(RDFMT),tmpfs)
$(BASE)/tools/mktmpfs.py $(USPACEDIR)/dist/ arch/$(BARCH)/iso/boot/initrd.fs
$(BASE)/tools/mktmpfs.py $(USPACEDIR)/dist/ arch/$(ARCH)/iso/boot/initrd.fs
endif
ifeq ($(RDFMT),fat)
$(BASE)/tools/mkfat.py $(USPACEDIR)/dist/ arch/$(BARCH)/iso/boot/initrd.fs
$(BASE)/tools/mkfat.sh $(USPACEDIR)/dist/ arch/$(ARCH)/iso/boot/initrd.fs
endif
$(BASE)/tools/mkhord.py 4096 arch/$(BARCH)/iso/boot/initrd.fs arch/$(BARCH)/iso/boot/initrd.img
rm arch/$(BARCH)/iso/boot/initrd.fs
mkisofs -J -r -b boot/grub/stage2_eltorito -no-emul-boot -boot-load-size 4 -boot-info-table -o $(BASE)/image.iso arch/$(BARCH)/iso/
$(BASE)/tools/mkhord.py 4096 arch/$(ARCH)/iso/boot/initrd.fs arch/$(ARCH)/iso/boot/initrd.img
rm arch/$(ARCH)/iso/boot/initrd.fs
mkisofs -J -r -b boot/grub/stage2_eltorito -no-emul-boot -boot-load-size 4 -boot-info-table -o $(BASE)/image.iso arch/$(ARCH)/iso/
 
clean:
-for file in $(RD_SRVS) ; do \
rm -f $(USPACEDIR)/dist/srv/`basename $$file` ; \
-for task in $(RD_TASKS) ; do \
rm -f $(USPACEDIR)/dist/sbin/`basename $$task` ; \
done
-for file in $(RD_APPS) ; do \
rm -f $(USPACEDIR)/dist/app/`basename $$file` ; \
done
-rm -fr arch/$(BARCH)/iso
-rm -fr arch/$(ARCH)/iso
-rm -f $(BASE)/image.iso
/branches/network/boot/arch/ia64/loader/Makefile
27,7 → 27,7
#
 
include ../../../../version
-include ../../../../Makefile.config
include ../../../Makefile.config
 
## Toolchain configuration
#
47,7 → 47,7
LD = ld
OBJCOPY = objcopy
OBJDUMP = objdump
GEFI_PREFIX =
GEFI_PREXIX =
endif
 
ifeq ($(COMPILER),icc_native)
68,8 → 68,16
endif
 
#-mno-pic means do not use gp + imm22 to address data
CFLAGS = -DRELEASE=$(RELEASE) -I. -I../../../generic -I../../../genarch -I../../../../kernel/generic/include -imacros ../../../../config.h -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -fno-unwind-tables -mfixed-range=f32-f127 -mno-pic -pipe
CFLAGS = -DRELEASE=\"$(RELEASE)\" -I. -I../../../generic -I../../../genarch -I../../../../kernel/generic/include -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -fno-unwind-tables -mfixed-range=f32-f127 -mno-pic
 
ifdef REVISION
CFLAGS += "-DREVISION=\"$(REVISION)\""
endif
 
ifdef TIMESTAMP
CFLAGS += "-DTIMESTAMP=\"$(TIMESTAMP)\""
endif
 
SOURCES = \
main.c \
../../../generic/printf.c \
79,36 → 87,21
asm.S \
boot.S
 
NOCOMPONENTS = \
$(KERNELDIR)/kernel.bin
COMPONENTS = \
$(KERNELDIR)/kernel.bin \
$(USPACEDIR)/srv/ns/ns \
$(USPACEDIR)/srv/loader/loader \
$(USPACEDIR)/app/init/init \
$(USPACEDIR)/srv/devmap/devmap \
$(USPACEDIR)/srv/rd/rd \
$(USPACEDIR)/srv/vfs/vfs
ifeq ($(RDFMT),tmpfs)
COMPONENTS += $(USPACEDIR)/srv/fs/tmpfs/tmpfs
endif
ifeq ($(RDFMT),fat)
COMPONENTS += $(USPACEDIR)/srv/fs/fat/fat
endif
 
RD_SRVS = \
$(USPACEDIR)/srv/fb/fb \
$(USPACEDIR)/srv/kbd/kbd \
$(USPACEDIR)/srv/console/console \
$(USPACEDIR)/srv/vfs/vfs \
$(USPACEDIR)/srv/fs/tmpfs/tmpfs \
$(USPACEDIR)/srv/fs/fat/fat
 
RD_APPS = \
$(USPACEDIR)/srv/fs/fat/fat \
$(USPACEDIR)/srv/devmap/devmap \
$(USPACEDIR)/app/init/init \
$(USPACEDIR)/app/tetris/tetris \
$(USPACEDIR)/app/tester/tester \
$(USPACEDIR)/app/trace/trace \
$(USPACEDIR)/app/klog/klog \
$(USPACEDIR)/app/bdsh/bdsh
$(USPACEDIR)/app/klog/klog
 
OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
COMPONENT_OBJECTS := $(addsuffix .o,$(basename $(notdir $(COMPONENTS))))
122,41 → 115,22
hello.efi: image.boot
make -C gefi/HelenOS PREFIX=$(GEFI_PREFIX)
cp gefi/HelenOS/hello.efi ../../../../
# cp gefi/HelenOS/hello.efi /boot/efi/
cp gefi/HelenOS/image.bin ../../../../
 
image.boot: depend _components.h _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS)
$(LD) -Map image.map -no-check-sections -N -T _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS) -o $@
image.boot: depend _components.h _link.ld $(COMPONENT_OBJECTS) $(OBJECTS)
$(LD) -Map image.map -no-check-sections -N -T _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) -o $@
 
depend:
-makedepend -f - -- $(DEFS) $(CFLAGS) -- $(SOURCES) > Makefile.depend 2> /dev/null
-makedepend $(DEFS) $(CFLAGS) -f - $(SOURCES) > Makefile.depend 2> /dev/null
 
clean:
-for file in $(RD_SRVS) ; do \
rm -f $(USPACEDIR)/dist/srv/`basename $$file` ; \
done
-for file in $(RD_APPS) ; do \
rm -f $(USPACEDIR)/dist/app/`basename $$file` ; \
done
-rm -f _components.h _components.c _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS) image.boot image.map image.disasm initrd.img image.boot Makefile.depend ../../../../image.bin ../../../../hello.efi
-rm -f _components.h _components.c _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) image.boot image.map image.disasm Makefile.depend ../../../../image.bin ../../../../hello.efi
make -C gefi clean
make -C gefi/HelenOS clean
 
_components.h _components.c _link.ld $(COMPONENT_OBJECTS) initrd.o: $(COMPONENTS) $(RD_SRVS) $(RD_APPS) _link.ld.in
for file in $(RD_SRVS) ; do \
cp $$file $(USPACEDIR)/dist/srv/ ; \
done
for file in $(RD_APPS) ; do \
cp $$file $(USPACEDIR)/dist/app/ ; \
done
ifeq ($(RDFMT),tmpfs)
../../../../tools/mktmpfs.py $(USPACEDIR)/dist/ initrd.fs
endif
ifeq ($(RDFMT),fat)
../../../../tools/mkfat.py $(USPACEDIR)/dist/ initrd.fs
endif
../../../../tools/mkhord.py 16384 initrd.fs initrd.img
rm initrd.fs
../../../tools/pack.py $(OBJCOPY) $(BFD_NAME) $(BFD_ARCH) 16384 "unsigned long" $(COMPONENTS) ./initrd.img
_components.h _components.c _link.ld $(COMPONENT_OBJECTS): $(COMPONENTS) _link.ld.in
../../../tools/pack.py $(OBJCOPY) $(BFD_NAME) $(BFD_ARCH) 16384 "unsigned long" $(COMPONENTS)
 
%.o: %.S
$(CC) $(DEFS) $(CFLAGS) -D__ASM__ -c $< -o $@
/branches/network/boot/arch/ia64/loader/gefi/apps/Makefile
28,7 → 28,7
CRTOBJS = ../gnuefi/crt0-efi-$(ARCH).o
LDSCRIPT = ../gnuefi/elf_$(ARCH)_efi.lds
LDFLAGS += -T $(LDSCRIPT) -shared -Bsymbolic -L../lib -L../gnuefi $(CRTOBJS)
LOADLIBES = -lefi -lgnuefi $(shell $(CC) -print-libgcc-file-name)
LOADLIBES = -lefi -lgnuefi
FORMAT = efi-app-$(ARCH)
 
TARGETS = t.efi t2.efi t3.efi t4.efi t5.efi t6.efi printenv.efi t7.efi
/branches/network/boot/arch/ia64/loader/gefi/HelenOS/mkimage.c
File deleted
/branches/network/boot/arch/ia64/loader/gefi/HelenOS/division.c
File deleted
\ No newline at end of file
Property changes:
Deleted: svn:special
-*
\ No newline at end of property
/branches/network/boot/arch/ia64/loader/gefi/HelenOS/division.h
File deleted
\ No newline at end of file
Property changes:
Deleted: svn:special
-*
\ No newline at end of property
/branches/network/boot/arch/ia64/loader/gefi/HelenOS/Makefile
28,7 → 28,6
CRTOBJS = ../gnuefi/crt0-efi-$(ARCH).o
LDSCRIPT = ../gnuefi/elf_$(ARCH)_efi.lds
LDFLAGS += -T $(LDSCRIPT) -shared -Bsymbolic -L../lib -L../gnuefi $(CRTOBJS)
#LOADLIBES = -lefi -lgnuefi $(shell $(CC) -print-libgcc-file-name)
LOADLIBES = -lefi -lgnuefi
FORMAT = efi-app-$(ARCH)
 
46,32 → 45,16
-j .rela -j .reloc --target=$(FORMAT) hello.so hello.efi
$(OBJDUMP) -d hello.efi > hello.disass
 
#When selected first lines or second lines, select if image is linked into hello or not - usefull for network boot
#hello.so: hello.o image.o division.o
hello.so: hello.o image.bin division.o
# $(LD) $(LDFLAGS) -Map hello.map hello.o division.o image.o -o hello.so $(LOADLIBES) #link image inside hello
$(LD) $(LDFLAGS) -Map hello.map hello.o division.o -o hello.so $(LOADLIBES) #dont link image inside hello
hello.so: hello.o image.o
$(LD) $(LDFLAGS) -Map hello.map hello.o -o hello.so $(LOADLIBES)
 
hello.o: hello.c
$(CC) $(INCDIR) $(CFLAGS) $(CPPFLAGS) -c hello.c -o hello.o
 
division.o: division.c
$(CC) $(INCDIR) $(CFLAGS) $(CPPFLAGS) -c division.c -o division.o
 
 
image.bin: ../../image.boot
image.o: ../../image.boot
$(OBJCOPY) -O binary ../../image.boot image.bin
$(OBJCOPY) -I binary -O elf64-ia64-little -B ia64 image.bin image.o
 
 
image.o: ../../image.boot mkimage
$(OBJCOPY) -O binary ../../image.boot image.bin
./mkimage
$(CC) $(INCDIR) $(CFLAGS) $(CPPFLAGS) -c image.c -o image.o
# $(OBJCOPY) -I binary -O elf64-ia64-little -B ia64 image.bin image.o
 
mkimage: mkimage.c
gcc -o mkimage mkimage.c
 
 
gefi:
make -C .. prefix=$(PREFIX)
/branches/network/boot/arch/ia64/loader/gefi/HelenOS/hello.c
1,29 → 1,9
#include <efi.h>
#include <efilib.h>
 
#include <../../../../../../kernel/arch/ia64/include/bootinfo.h>
 
#define KERNEL_LOAD_ADDRESS 0x4400000
 
#define MEM_MAP_DESCRIPTOR_OFFSET_TYPE 0
#define MEM_MAP_DESCRIPTOR_OFFSET_BASE 8
#define MEM_MAP_DESCRIPTOR_OFFSET_PAGES 24
 
 
 
//Link image as a data array into hello - usefull with network boot
//#define IMAGE_LINKED
 
bootinfo_t *bootinfo=(bootinfo_t *)BOOTINFO_ADDRESS;
 
 
#ifdef IMAGE_LINKED
extern char HOSimage[];
extern int HOSimagesize;
#endif
 
 
 
static CHAR16 *
a2u (char *str)
{
35,7 → 15,24
mem[i] = 0;
return mem;
}
char HEX[256];
 
char hexs[]="0123456789ABCDEF";
/*
void to_hex(unsigned long long num)
{
int a;
for(a=15;a>=0;a--)
{
char c=num - (num & 0xfffffffffffffff0LL);
num/=16;
c=hexs[c];
HEX[a]=c;
}
 
}
*/
 
EFI_STATUS
efi_main (EFI_HANDLE image, EFI_SYSTEM_TABLE *systab)
{
75,18 → 72,16
EFI_FILE *FileHandle;
 
BS->HandleProtocol(LoadedImage->DeviceHandle, &FileSystemProtocol, &Vol);
Vol->OpenVolume (Vol, &CurDir);
 
char FileName[1024];
char *OsKernelBuffer;
int i;
int defaultLoad;
int imageLoad;
UINTN Size;
 
StrCpy(FileName,DevicePathToStr(LoadedImage->FilePath));
for(i=StrLen(FileName);i>=0 && FileName[i]!='\\';i--);
FileName[i] = 0;
FileName[0] = 0;
Print(L"%s\n",LoadedImage->LoadOptions);
102,13 → 97,11
}
while(LoadOptions[i]==L' ') if(LoadOptions[i++]==0) break;
if(LoadOptions[i++]==0){
if(LoadOptions[i++]==0)
StrCat(FileName,L"\\image.bin");
defaultLoad=1;
}
/* else{
else{
CHAR16 buf[1024];
//buf[0]='\\';
buf[0]='\\';
i--;
int j;
for(j=0;LoadOptions[i+j]!=L' '&&LoadOptions[i+j]!=0;j++)
115,101 → 108,38
buf[j+1]=LoadOptions[i+j];
buf[j+1]=0;
StrCat(FileName,buf);
defaultLoad=0;
}*/
else{
CHAR16 buf[1024];
//buf[0]='\\';
i--;
int j;
for(j=0;LoadOptions[i+j]!=L' '&&LoadOptions[i+j]!=0;j++)
buf[j]=LoadOptions[i+j];
buf[j+1]=0;
StrCat(FileName,buf);
defaultLoad=0;
}
//Print(L"%s\n",FileName);
 
imageLoad=1;
#ifdef IMAGE_LINKED
if(defaultLoad) {
Print(L"Using Linked Image\n");
imageLoad=0;
EFI_STATUS stat;
stat=CurDir->Open(CurDir, &FileHandle, FileName, EFI_FILE_MODE_READ, 0);
if(EFI_ERROR(stat)){
Print(L"Error Opening Image %s\n",FileName);
return 0;
}
#endif
Size = 0x00400000;
BS->AllocatePool(EfiLoaderData, Size, &OsKernelBuffer);
FileHandle->Read(FileHandle, &Size, OsKernelBuffer);
FileHandle->Close(FileHandle);
 
char * HOS;
if(imageLoad)
{
Size = 0x00400000;
if(Size<1) return 0;
 
Vol->OpenVolume (Vol, &CurDir);
 
EFI_STATUS stat;
stat=CurDir->Open(CurDir, &FileHandle, FileName, EFI_FILE_MODE_READ, 0);
if(EFI_ERROR(stat)){
Print(L"Error Opening Image %s\n",FileName);
return 0;
}
BS->AllocatePool(EfiLoaderData, Size, &OsKernelBuffer);
FileHandle->Read(FileHandle, &Size, OsKernelBuffer);
FileHandle->Close(FileHandle);
HOS = OsKernelBuffer;
if(Size<1) return 0;
 
}
#ifdef IMAGE_LINKED
else {
HOS = HOSimage;
Size = HOSimagesize;
Print(L"Image start %llX\n",(long long)HOS);
Print(L"Image size %llX\n",(long long)Size);
Print(L"Image &size %llX\n",(long long)&Size);
}
#endif
char * HOS = OsKernelBuffer;
int HOSSize = Size;
 
 
rArg rSAL;
rArg rPAL;
 
//Setup AP's wake up address
LibSalProc(0x01000000,2,0x4400200,0,0,0,0,0,&rSAL);
 
 
//Get System Frequency
UINT64 sys_freq;
LibSalProc(0x01000012,0,0,0,0,0,0,0,&rSAL);
sys_freq=rSAL.p1;
 
UINT64 freq_scale;
//Get CPU Frequency to System Frequency ratio
LibPalProc(14,0,0,0,&rPAL);
freq_scale=rPAL.p1;
 
 
UINT64 sapic;
LibGetSalIpiBlock(&sapic);
Print (L"SAPIC:%X\n", sapic);
//bootinfo->sapic=sapic;
 
 
UINT64 wakeup_intno;
LibGetSalWakeupVector(&wakeup_intno);
Print (L"WAKEUP INTNO:%X\n", wakeup_intno);
 
 
 
 
 
{
UINTN cookie;
void *p=(void *)KERNEL_LOAD_ADDRESS;
UINTN mapsize,descsize;
UINT32 desver;
EFI_STATUS status;
EFI_MEMORY_DESCRIPTOR emd[1024];
mapsize=1024*sizeof(emd);
status=BS->AllocatePages(AllocateAnyPages,EfiLoaderData,/*(HOSSize>>12)+1*/ 1,p);
if(EFI_ERROR(status)){
220,18 → 150,10
return EFI_SUCCESS;
}
UINTN no_entryes;
void * mds;
mds=LibMemoryMap(&no_entryes,&cookie,&descsize,&desver);
for(i=0;i<no_entryes;i++)
{
unsigned int type=*((unsigned int *)(mds+i*descsize+MEM_MAP_DESCRIPTOR_OFFSET_TYPE));
unsigned long long base=*((unsigned long long *)(mds+i*descsize+MEM_MAP_DESCRIPTOR_OFFSET_BASE));
unsigned long long pages=*((unsigned long long *)(mds+i*descsize+MEM_MAP_DESCRIPTOR_OFFSET_PAGES));
Print(L"T:%02d %016llX %016llX\n",type,base,pages*EFI_PAGE_SIZE);
status=BS->GetMemoryMap(&mapsize,emd,&cookie,&descsize,&desver);
if(EFI_ERROR(status)){
Print(L"Error 1\n");
return EFI_SUCCESS;
}
status=BS->ExitBootServices(image,cookie);
if(EFI_ERROR(status)){
239,62 → 161,12
return EFI_SUCCESS;
}
}
int a;
for(a=0;a<HOSSize;a++){
((char *)(0x4400000))[a]=HOS[a];
}
bootinfo->sapic=(unsigned long *)sapic;
bootinfo->wakeup_intno=wakeup_intno;
bootinfo->sys_freq=sys_freq;
bootinfo->freq_scale=freq_scale;
bootinfo->hello_configured=1;
 
 
bootinfo->memmap_items=0;
for(i=0;i<no_entryes;i++)
{
unsigned int type=*((unsigned int *)(mds+i*descsize+MEM_MAP_DESCRIPTOR_OFFSET_TYPE));
unsigned long long base=*((unsigned long long *)(mds+i*descsize+MEM_MAP_DESCRIPTOR_OFFSET_BASE));
unsigned long long pages=*((unsigned long long *)(mds+i*descsize+MEM_MAP_DESCRIPTOR_OFFSET_PAGES));
switch (type)
{
case EfiConventionalMemory:
bootinfo->memmap[bootinfo->memmap_items].type=EFI_MEMMAP_FREE_MEM;
bootinfo->memmap[bootinfo->memmap_items].base=base;
bootinfo->memmap[bootinfo->memmap_items].size=pages*EFI_PAGE_SIZE;
bootinfo->memmap_items++;
break;
case EfiMemoryMappedIO:
bootinfo->memmap[bootinfo->memmap_items].type=EFI_MEMMAP_IO;
bootinfo->memmap[bootinfo->memmap_items].base=base;
bootinfo->memmap[bootinfo->memmap_items].size=pages*EFI_PAGE_SIZE;
bootinfo->memmap_items++;
break;
case EfiMemoryMappedIOPortSpace:
bootinfo->memmap[bootinfo->memmap_items].type=EFI_MEMMAP_IO_PORTS;
bootinfo->memmap[bootinfo->memmap_items].base=base;
bootinfo->memmap[bootinfo->memmap_items].size=pages*EFI_PAGE_SIZE;
bootinfo->memmap_items++;
break;
default :
break;
}
 
}
 
 
//Run Kernel
asm volatile(
305,6 → 177,8
);
//Not reached
while(1){
((volatile int *)(0x80000000000b8000))[0]++;
}
return EFI_SUCCESS;
}
/branches/network/boot/arch/ia64/loader/gefi/Make.defaults
27,19 → 27,30
#
INSTALLROOT=/usr/local
 
TOPDIR := $(shell pwd)
TOPDIR := $(shell if [ "$$PWD" != "" ]; then echo $$PWD; else pwd; fi)
 
ARCH = ia64
INCDIR = -I. -I$(CDIR)/inc -I$(CDIR)/inc/$(ARCH) -I$(CDIR)/inc/protocol
ARCH = $(shell uname -m | sed s,i[3456789]86,ia32,)
INCDIR = -I. -I$(CDIR)/inc -I$(CDIR)/inc/$(ARCH) -I$(CDIR)/inc/protocol
CPPFLAGS = -DCONFIG_$(ARCH)
CFLAGS = -O2 -fpic -Wall -fshort-wchar -fno-strict-aliasing -fno-merge-constants -frename-registers -mfixed-range=f32-f127
LDFLAGS = -nostdlib
INSTALL = install
CFLAGS = -O2 -fpic -Wall -fshort-wchar -fno-strict-aliasing -fno-merge-constants
LDFLAGS = -nostdlib
INSTALL = install
 
CC = $(prefix)gcc
AS = $(prefix)as
LD = $(prefix)ld
AR = $(prefix)ar
RANLIB = $(prefix)ranlib
OBJCOPY = $(prefix)objcopy
OBJDUMP = $(prefix)objdump
GCC_VERSION=$(shell $(CROSS_COMPILE)$(CC) -v 2>&1 | fgrep 'gcc version' | cut -f3 -d' ' | cut -f1 -d'.')
 
# prefix =
CC = $(prefix)gcc
AS = $(prefix)as
LD = $(prefix)ld
AR = $(prefix)ar
RANLIB = $(prefix)ranlib
OBJCOPY = $(prefix)objcopy
OBJDUMP = $(prefix)objdump
 
 
ifneq ($(GCC_VERSION),2)
CFLAGS += -frename-registers
endif
 
CFLAGS += -mfixed-range=f32-f127
 
/branches/network/boot/arch/ia64/loader/gefi/Makefile
23,9 → 23,9
 
include Make.defaults
 
SUBDIRS = lib gnuefi inc
SUBDIRS = lib gnuefi inc apps
 
all: $(SUBDIRS)
all: check_gcc $(SUBDIRS)
 
$(SUBDIRS):
$(MAKE) -C $@
39,4 → 39,13
 
.PHONY: $(SUBDIRS) clean depend
 
#
# on both platforms you must use gcc 3.0 or higher
#
check_gcc:
ifeq ($(GCC_VERSION),2)
@echo "you need to use a version of gcc >= 3.0, you are using `$(CC) --version`"
@exit 1
endif
 
include Make.rules
/branches/network/boot/arch/ia64/loader/_link.ld.in
12,14 → 12,11
*(.data); /* initialized data */
_got = . ;
*(.got .got.*);
*(.bss); /* uninitialized static variables */
*(COMMON);
}
 
.sboot : {
*(.sdata);
*(.sdata2);
*(.sbss);
*(.bss); /* uninitialized static variables */
*(COMMON);
}
/DISCARD/ : {
/branches/network/boot/arch/ia64/loader/boot.S
34,7 → 34,6
.global start
start:
 
 
mov ar.rsc = r0
# movl r8 = (VRN_KERNEL << VRN_SHIFT) ;;
movl r1 = 0x4400000
58,22 → 57,6
mov b1 = r18 ;;
br.call.sptk.many b0 = b1
 
.align 512
ap_start:
 
 
ap_loop:
movl r18=0x4405000;;
mov b1 = r18 ;;
br.call.sptk.many b0 = b1;;
 
.align 1024
 
.align 4096
.global binfo
binfo:
 
 
.bss #on this line is ".bss", it cannot be seen in my mcedit :-(
 
 
/branches/network/boot/arch/ia64/loader/asm.S
37,5 → 37,7
alloc loc0 = ar.pfs, 1, 1, 0, 0
movl r8 = 0x4404000;;
mov b1 = r8 ;;
mov r1 = in0; #Save bootinfo prt
mov r1 = in0;
br.call.sptk.many b0 = b1;;
.global ofw
ofw:
/branches/network/boot/arch/ia64/loader/main.c
1,6 → 1,6
/*
* Copyright (c) 2005 Martin Decky
* Copyright (c) 2006 Jakub Jermar
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
33,13 → 33,11
#include "_components.h"
#include <align.h>
#include <balloc.h>
#include <macros.h>
#include <string.h>
 
extern bootinfo_t binfo;
bootinfo_t bootinfo;
component_t components[COMPONENTS];
 
char *release = STRING(RELEASE);
char *release = RELEASE;
 
void write(const char *str, const int len)
{
46,22 → 44,15
return;
}
 
#define DEFAULT_MEMORY_BASE 0x4000000
#define DEFAULT_MEMORY_SIZE 0x4000000
#define DEFAULT_LEGACY_IO_BASE 0x00000FFFFC000000
#define DEFAULT_LEGACY_IO_SIZE 0x4000000
 
#define DEFAULT_FREQ_SCALE 0x0000000100000001 /* 1/1 */
#define DEFAULT_SYS_FREQ 100000000 /* 100MHz */
 
#ifdef REVISION
char *revision = ", revision " STRING(REVISION);
char *revision = ", revision " REVISION;
#else
char *revision = "";
#endif
 
#ifdef TIMESTAMP
char *timestamp = "\nBuilt on " STRING(TIMESTAMP);
char *timestamp = "\nBuilt on " TIMESTAMP;
#else
char *timestamp = "";
#endif
69,18 → 60,26
/** Print version information. */
static void version_print(void)
{
printf("HelenOS IA64 Bootloader\nRelease %s%s%s\n"
"Copyright (c) 2006 HelenOS project\n", release, revision,
timestamp);
printf("HelenOS IA64 Bootloader\nRelease %s%s%s\nCopyright (c) 2006 HelenOS project\n", release, revision, timestamp);
}
 
void bootstrap(void)
{
 
int ii;
bootinfo_t *bootinfo = &binfo;
//for(ii=0;ii<KERNEL_SIZE;ii++) ((char *)(0x100000))[ii] = ((char *)KERNEL_START)[ii+1];
//((int *)(0x100000))[0]++;
 
 
 
version_print();
 
init_components(components);
 
printf("\nSystem info\n");
92,46 → 91,20
printf(" %P: %s image (size %d bytes)\n", components[i].start,
components[i].name, components[i].size);
 
if (!bootinfo->hello_configured) {
/*
* Load configuration defaults for simulators.
*/
bootinfo->memmap_items = 0;
bootinfo->memmap[bootinfo->memmap_items].base =
DEFAULT_MEMORY_BASE;
bootinfo->memmap[bootinfo->memmap_items].size =
DEFAULT_MEMORY_SIZE;
bootinfo->memmap[bootinfo->memmap_items].type =
EFI_MEMMAP_FREE_MEM;
bootinfo->memmap_items++;
 
bootinfo->memmap[bootinfo->memmap_items].base =
DEFAULT_LEGACY_IO_BASE;
bootinfo->memmap[bootinfo->memmap_items].size =
DEFAULT_LEGACY_IO_SIZE;
bootinfo->memmap[bootinfo->memmap_items].type =
EFI_MEMMAP_IO_PORTS;
bootinfo->memmap_items++;
bootinfo->freq_scale = DEFAULT_FREQ_SCALE;
bootinfo->sys_freq = DEFAULT_SYS_FREQ;
}
bootinfo.taskmap.count = 0;
for (i = 0; i < COMPONENTS; i++) {
 
bootinfo->taskmap.count = 0;
for (i = 0; i < COMPONENTS; i++) {
if (i > 0) {
bootinfo->taskmap.tasks[bootinfo->taskmap.count].addr =
components[i].start;
bootinfo->taskmap.tasks[bootinfo->taskmap.count].size =
components[i].size;
strncpy(bootinfo->taskmap.tasks[
bootinfo->taskmap.count].name,
components[i].name, BOOTINFO_TASK_NAME_BUFLEN);
bootinfo->taskmap.count++;
bootinfo.taskmap.tasks[bootinfo.taskmap.count].addr = components[i].start;
bootinfo.taskmap.tasks[bootinfo.taskmap.count].size = components[i].size;
bootinfo.taskmap.count++;
}
}
 
jump_to_kernel(bootinfo);
 
jump_to_kernel(&bootinfo);
 
 
}
 
/branches/network/boot/arch/ia64/loader/main.h
29,14 → 29,29
#ifndef BOOT_ia64_MAIN_H_
#define BOOT_ia64_MAIN_H_
 
#include <ofw.h>
#include <ofw_tree.h>
#include <types.h>
#include <../../../../kernel/arch/ia64/include/bootinfo.h>
 
 
#define CONFIG_INIT_TASKS 32
 
typedef struct {
void *addr;
size_t size;
} init_task_t;
typedef struct {
count_t count;
init_task_t tasks[CONFIG_INIT_TASKS];
} init_t;
 
typedef struct {
init_t taskmap;
} bootinfo_t;
 
extern bootinfo_t bootinfo;
 
extern void start(void);
extern void bootstrap(void);
 
/branches/network/boot/arch/ia64/Makefile.inc
26,17 → 26,39
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#ifeq ($(MACHINE),ski)
 
 
 
#VMAXLMA_SRC = tools/ia64/vmaxlma.c
#build: $(BASE)/kernel.bin
#echo Building SKI
#$(BASE)/kernel.bin: $(KERNELDIR)/kernel.bin vmaxlma
# cp $(KERNELDIR)/kernel.bin $(BASE)/kernel.bin
# ./vmaxlma $(BASE)/kernel.bin
#vmaxlma: $(VMAXLMA_SRC)
# $(CC) $(VMAXLMA_SRC) -o $@
#clean:
# -rm -f $(BASE)/kernel.bin vmaxlma
 
 
#else
 
 
build: $(BASE)/image.boot
 
$(BASE)/image.boot: depend arch/$(BARCH)/loader/image.boot
cp arch/$(BARCH)/loader/image.boot $(BASE)/image.boot
$(BASE)/image.boot: depend arch/$(ARCH)/loader/image.boot
cp arch/$(ARCH)/loader/image.boot $(BASE)/image.boot
 
depend:
-rm arch/$(BARCH)/loader/image.boot
-rm arch/$(ARCH)/loader/image.boot
 
arch/$(BARCH)/loader/image.boot:
make -C arch/$(BARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
arch/$(ARCH)/loader/image.boot:
make -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) "DEFS=$(DEFS)"
 
clean: generic_clean
make -C arch/$(BARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
make -C arch/$(ARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) "DEFS=$(DEFS)"
-rm -f $(BASE)/image.boot
 
 
#endif
/branches/network/boot/arch/arm32/loader/Makefile
27,7 → 27,7
#
 
include ../../../../version
-include ../../../../Makefile.config
include ../../../Makefile.config
 
## Toolchain configuration
#
57,8 → 57,20
OBJDUMP = $(TOOLCHAIN_DIR)/$(TARGET)-objdump
endif
 
CFLAGS = -DRELEASE=$(RELEASE) -I. -I../../../generic -I../../.. -imacros ../../../../config.h -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -pipe
CFLAGS = -DRELEASE=\"$(RELEASE)\" -I. -I../../../generic -I../../.. -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3
 
ifdef REVISION
CFLAGS += "-DREVISION=\"$(REVISION)\""
endif
 
ifdef TIMESTAMP
CFLAGS += "-DTIMESTAMP=\"$(TIMESTAMP)\""
endif
 
ifdef MACHINE
CFLAGS += "-DMACHINE=$(MACHINE)"
endif
 
SOURCES = \
main.c \
boot.S \
67,7 → 79,6
print/gxemul.c \
_components.c \
../../../generic/printf.c \
../../../generic/string.c \
../../../genarch/division.c
 
COMPONENTS = \
85,17 → 96,14
COMPONENTS += $(USPACEDIR)/srv/fs/fat/fat
endif
 
RD_SRVS = \
RD_TASKS = \
$(USPACEDIR)/srv/fb/fb \
$(USPACEDIR)/srv/kbd/kbd \
$(USPACEDIR)/srv/console/console \
$(USPACEDIR)/srv/fs/tmpfs/tmpfs \
$(USPACEDIR)/srv/fs/fat/fat
 
RD_APPS = \
$(USPACEDIR)/srv/fs/fat/fat \
$(USPACEDIR)/app/tetris/tetris \
$(USPACEDIR)/app/tester/tester \
$(USPACEDIR)/app/trace/trace \
$(USPACEDIR)/app/klog/klog \
$(USPACEDIR)/app/bdsh/bdsh
 
112,29 → 120,23
$(LD) -no-check-sections -N -T _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS) -o $@
 
depend:
-makedepend -f - -- $(DEFS) $(CFLAGS) -- $(SOURCES) > Makefile.depend 2> /dev/null
-makedepend $(DEFS) $(CFLAGS) -f - $(SOURCES) > Makefile.depend 2> /dev/null
 
clean:
-for file in $(RD_SRVS) ; do \
rm -f $(USPACEDIR)/dist/srv/`basename $$file` ; \
-for task in $(RD_TASKS) ; do \
rm -f $(USPACEDIR)/dist/sbin/`basename $$task` ; \
done
-for file in $(RD_APPS) ; do \
rm -f $(USPACEDIR)/dist/app/`basename $$file` ; \
done
-rm -f _components.h _components.c _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS) initrd.img image.boot Makefile.depend
 
_components.h _components.c _link.ld $(COMPONENT_OBJECTS) initrd.o: $(COMPONENTS) $(RD_SRVS) $(RD_APPS) _link.ld.in
for file in $(RD_SRVS) ; do \
cp $$file $(USPACEDIR)/dist/srv/ ; \
_components.h _components.c _link.ld $(COMPONENT_OBJECTS) initrd.o: $(COMPONENTS) _link.ld.in
for task in $(RD_TASKS) ; do \
cp $$task $(USPACEDIR)/dist/sbin/ ; \
done
for file in $(RD_APPS) ; do \
cp $$file $(USPACEDIR)/dist/app/ ; \
done
ifeq ($(RDFMT),tmpfs)
../../../../tools/mktmpfs.py $(USPACEDIR)/dist/ initrd.fs
endif
ifeq ($(RDFMT),fat)
../../../../tools/mkfat.py $(USPACEDIR)/dist/ initrd.fs
../../../../tools/mkfat.sh $(USPACEDIR)/dist/ initrd.fs
endif
../../../../tools/mkhord.py 4096 initrd.fs initrd.img
rm initrd.fs
/branches/network/boot/arch/arm32/loader/boot.S
53,3 → 53,5
# make place for PTL0 page table
page_table:
.skip PTL0_ENTRIES * PTL0_ENTRY_SIZE
 
 
/branches/network/boot/arch/arm32/loader/main.c
32,16 → 32,13
*/
/** @file
* @brief Bootstrap.
*/
*/
 
 
#include "main.h"
#include "main.h"
#include "asm.h"
#include "_components.h"
#include <printf.h>
#include <align.h>
#include <macros.h>
#include <string.h>
 
#include "mm.h"
 
49,16 → 46,16
#define KERNEL_VIRTUAL_ADDRESS 0x80200000
 
 
char *release = STRING(RELEASE);
char *release = RELEASE;
 
#ifdef REVISION
char *revision = ", revision " STRING(REVISION);
char *revision = ", revision " REVISION;
#else
char *revision = "";
#endif
 
#ifdef TIMESTAMP
char *timestamp = "\nBuilt on " STRING(TIMESTAMP);
char *timestamp = "\nBuilt on " TIMESTAMP;
#else
char *timestamp = "";
#endif
104,8 → 101,6
if (i > 0) {
bootinfo.tasks[bootinfo.cnt].addr = ((void *) KERNEL_VIRTUAL_ADDRESS) + top;
bootinfo.tasks[bootinfo.cnt].size = components[i].size;
strncpy(bootinfo.tasks[bootinfo.cnt].name,
components[i].name, BOOTINFO_TASK_NAME_BUFLEN);
bootinfo.cnt++;
}
top += components[i].size;
113,7 → 108,7
}
printf("\nBooting the kernel...\n");
jump_to_kernel((void *) KERNEL_VIRTUAL_ADDRESS, &bootinfo);
jump_to_kernel((void *) KERNEL_VIRTUAL_ADDRESS, &bootinfo, sizeof(bootinfo));
}
 
/** @}
/branches/network/boot/arch/arm32/loader/asm.h
32,7 → 32,7
*/
/** @file
* @brief Functions implemented in assembly.
*/
*/
 
 
#ifndef BOOT_arm32_ASM_H
40,10 → 40,10
 
 
/** Copies cnt bytes from dst to src.
*
*
* @param dst Destination address.
* @param src Source address.
* @param cnt Count of bytes to be copied.
* @param cnt Count of bytes to be copied.
*/
#define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt))
 
58,11 → 58,12
 
/** Jumps to the kernel entry point.
*
* @param entry Kernel entry point address.
* @param bootinfo Structure holding information about loaded tasks.
*
* @param entry Kernel entry point address.
* @param bootinfo Structure holding information about loaded tasks.
* @param bootinfo_size Size of the bootinfo structure.
*/
extern void jump_to_kernel(void *entry, void *bootinfo) __attribute__((noreturn));
extern void jump_to_kernel(void *entry, void *bootinfo,
unsigned int bootinfo_size) __attribute__((noreturn));
 
 
#endif
/branches/network/boot/arch/arm32/loader/main.h
32,7 → 32,7
*/
/** @file
* @brief Boot related declarations.
*/
*/
 
 
#ifndef BOOT_arm32_MAIN_H
39,13 → 39,17
#define BOOT_arm32_MAIN_H
 
 
/** Aligns to the nearest higher address.
*
* @param addr Address or number to be aligned.
* @param align Size of alignment, must be power of 2.
*/
#define ALIGN_UP(addr, align) (((addr) + ((align) - 1)) & ~((align) - 1))
 
/** Maximum number of tasks in the #bootinfo_t struct. */
#define TASKMAP_MAX_RECORDS 32
 
/** Size of buffer for storing task name in task_t. */
#define BOOTINFO_TASK_NAME_BUFLEN 32
 
 
/** Struct holding information about single loaded task. */
typedef struct {
/** Address where the task was placed. */
52,8 → 56,6
void *addr;
/** Size of the task's binary. */
unsigned int size;
/** Task name. */
char name[BOOTINFO_TASK_NAME_BUFLEN];
} task_t;
 
 
72,3 → 74,4
 
/** @}
*/
 
/branches/network/boot/arch/arm32/Makefile.inc
28,15 → 28,15
 
build: $(BASE)/image.boot
 
$(BASE)/image.boot: depend arch/$(BARCH)/loader/image.boot
cp arch/$(BARCH)/loader/image.boot $(BASE)/image.boot
$(BASE)/image.boot: depend arch/$(ARCH)/loader/image.boot
cp arch/$(ARCH)/loader/image.boot $(BASE)/image.boot
 
depend:
-rm arch/$(BARCH)/loader/image.boot
-rm arch/$(ARCH)/loader/image.boot
 
arch/$(BARCH)/loader/image.boot:
make -C arch/$(BARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
arch/$(ARCH)/loader/image.boot:
make -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) IMAGE=$(IMAGE)
 
clean:
make -C arch/$(BARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
make -C arch/$(ARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) IMAGE=$(IMAGE)
-rm -f $(BASE)/image.boot
/branches/network/boot/arch/ppc32/loader/Makefile
27,7 → 27,7
#
 
include ../../../../version
-include ../../../../Makefile.config
include ../../../Makefile.config
 
## Toolchain configuration
#
57,8 → 57,16
OBJDUMP = $(TOOLCHAIN_DIR)/$(TARGET)-objdump
endif
 
CFLAGS = -DRELEASE=$(RELEASE) -I. -I../../../generic -I../../../genarch -imacros ../../../../config.h -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -mcpu=powerpc -msoft-float -m32 -pipe
CFLAGS = -DRELEASE=\"$(RELEASE)\" -I. -I../../../generic -I../../../genarch -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -mcpu=powerpc -msoft-float -m32
 
ifdef REVISION
CFLAGS += "-DREVISION=\"$(REVISION)\""
endif
 
ifdef TIMESTAMP
CFLAGS += "-DTIMESTAMP=\"$(TIMESTAMP)\""
endif
 
SOURCES = \
main.c \
ofwarch.c \
65,7 → 73,6
_components.c \
../../../genarch/ofw.c \
../../../generic/printf.c \
../../../generic/string.c \
asm.S \
boot.S
 
76,7 → 83,7
$(USPACEDIR)/app/init/init \
$(USPACEDIR)/srv/devmap/devmap \
$(USPACEDIR)/srv/rd/rd \
$(USPACEDIR)/srv/vfs/vfs
$(USPACEDIR)/srv/vfs/vfs
ifeq ($(RDFMT),tmpfs)
COMPONENTS += $(USPACEDIR)/srv/fs/tmpfs/tmpfs
endif
84,17 → 91,14
COMPONENTS += $(USPACEDIR)/srv/fs/fat/fat
endif
 
RD_SRVS = \
RD_TASKS = \
$(USPACEDIR)/srv/fb/fb \
$(USPACEDIR)/srv/kbd/kbd \
$(USPACEDIR)/srv/console/console \
$(USPACEDIR)/srv/fs/tmpfs/tmpfs \
$(USPACEDIR)/srv/fs/fat/fat
 
RD_APPS = \
$(USPACEDIR)/srv/fs/fat/fat \
$(USPACEDIR)/app/tetris/tetris \
$(USPACEDIR)/app/tester/tester \
$(USPACEDIR)/app/trace/trace \
$(USPACEDIR)/app/klog/klog \
$(USPACEDIR)/app/bdsh/bdsh
 
111,29 → 115,23
$(LD) -no-check-sections -N -T _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS) -o $@
 
depend:
-makedepend -f - -- $(DEFS) $(CFLAGS) -- $(SOURCES) > Makefile.depend 2> /dev/null
-makedepend $(DEFS) $(CFLAGS) -f - $(SOURCES) > Makefile.depend 2> /dev/null
 
clean:
-for file in $(RD_SRVS) ; do \
rm -f $(USPACEDIR)/dist/srv/`basename $$file` ; \
-for task in $(RD_TASKS) ; do \
rm -f $(USPACEDIR)/dist/sbin/`basename $$task` ; \
done
-for file in $(RD_APPS) ; do \
rm -f $(USPACEDIR)/dist/app/`basename $$file` ; \
done
-rm -f _components.h _components.c _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS) initrd.img image.boot Makefile.depend
 
_components.h _components.c _link.ld $(COMPONENT_OBJECTS) initrd.o: $(COMPONENTS) $(RD_SRVS) $(RD_APPS) _link.ld.in
for file in $(RD_SRVS) ; do \
cp $$file $(USPACEDIR)/dist/srv/ ; \
_components.h _components.c _link.ld $(COMPONENT_OBJECTS) initrd.o: $(COMPONENTS) $(RD_TASKS) _link.ld.in
for task in $(RD_TASKS) ; do \
cp $$task $(USPACEDIR)/dist/sbin/ ; \
done
for file in $(RD_APPS) ; do \
cp $$file $(USPACEDIR)/dist/app/ ; \
done
ifeq ($(RDFMT),tmpfs)
../../../../tools/mktmpfs.py $(USPACEDIR)/dist/ initrd.fs
endif
ifeq ($(RDFMT),fat)
../../../../tools/mkfat.py $(USPACEDIR)/dist/ initrd.fs
../../../../tools/mkfat.sh $(USPACEDIR)/dist/ initrd.fs
endif
../../../../tools/mkhord.py 4096 initrd.fs initrd.img
rm initrd.fs
/branches/network/boot/arch/ppc32/loader/_link.ld.in
1,9 → 1,9
OUTPUT_FORMAT("elf32-powerpc")
OUTPUT_ARCH(powerpc:common)
ENTRY(start)
 
OUTPUT_FORMAT("elf32-powerpc")
OUTPUT_ARCH(powerpc:common)
ENTRY(start)
SECTIONS {
.boot 0x01000000: AT (0) {
.boot 0x10000000: AT (0) {
*(BOOTSTRAP);
*(REALMODE);
*(.text);
10,12 → 10,12
*(.rodata);
*(.rodata.*);
*(.data); /* initialized data */
*(.data); /* initialized data */
*(.sdata);
*(.sdata2);
*(.sbss);
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
[[COMPONENTS]]
}
}
/branches/network/boot/arch/ppc32/loader/main.c
32,8 → 32,6
#include "_components.h"
#include <ofw.h>
#include <align.h>
#include <macros.h>
#include <string.h>
 
#define HEAP_GAP 1024000
 
74,16 → 72,16
}
}
 
char *release = STRING(RELEASE);
char *release = RELEASE;
 
#ifdef REVISION
char *revision = ", revision " STRING(REVISION);
char *revision = ", revision " REVISION;
#else
char *revision = "";
#endif
 
#ifdef TIMESTAMP
char *timestamp = "\nBuilt on " STRING(TIMESTAMP);
char *timestamp = "\nBuilt on " TIMESTAMP;
#else
char *timestamp = "";
#endif
91,7 → 89,7
/** Print version information. */
static void version_print(void)
{
printf("HelenOS PPC32 Bootloader\nRelease %s%s%s\nCopyright (c) 2006 HelenOS project\n\n", release, revision, timestamp);
printf("HelenOS PPC32 Bootloader\nRelease %s%s%s\nCopyright (c) 2006 HelenOS project\n", release, revision, timestamp);
}
 
void bootstrap(void)
109,29 → 107,29
check_align(&trans, "translation table");
if (!ofw_memmap(&bootinfo.memmap)) {
printf("Error: Unable to get memory map, halting.\n");
printf("Error: unable to get memory map, halting.\n");
halt();
}
if (bootinfo.memmap.total == 0) {
printf("Error: No memory detected, halting.\n");
printf("Error: no memory detected, halting.\n");
halt();
}
if (!ofw_screen(&bootinfo.screen))
printf("Warning: Unable to get screen properties.\n");
if (!ofw_screen(&bootinfo.screen)) {
printf("Error: unable to get screen properties, halting.\n");
halt();
}
if (!ofw_macio(&bootinfo.macio))
printf("Warning: Unable to get macio properties.\n");
if (!ofw_keyboard(&bootinfo.keyboard)) {
printf("Error: unable to get keyboard properties, halting.\n");
halt();
}
printf("Device statistics\n");
printf("\nDevice statistics\n");
printf(" screen at %L, resolution %dx%d, %d bpp (scanline %d bytes)\n", bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height, bootinfo.screen.bpp, bootinfo.screen.scanline);
printf(" keyboard at %L (size %d bytes)\n", bootinfo.keyboard.addr, bootinfo.keyboard.size);
if (bootinfo.screen.addr)
printf(" screen at %L, resolution %dx%d, %d bpp (scanline %d bytes)\n", bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height, bootinfo.screen.bpp, bootinfo.screen.scanline);
if (bootinfo.macio.addr)
printf(" macio at %L (size %d bytes)\n", bootinfo.macio.addr, bootinfo.macio.size);
void *real_mode_pa = ofw_translate(&real_mode);
void *trans_pa = ofw_translate(&trans);
void *bootinfo_pa = ofw_translate(&bootinfo);
167,9 → 165,6
if (j == 0) {
bootinfo.taskmap.tasks[bootinfo.taskmap.count].addr = (void *) (pages << PAGE_WIDTH);
bootinfo.taskmap.tasks[bootinfo.taskmap.count].size = components[i].size;
strncpy(bootinfo.taskmap.tasks[bootinfo.taskmap.count].name,
components[i].name, BOOTINFO_TASK_NAME_BUFLEN);
 
bootinfo.taskmap.count++;
}
}
181,8 → 176,6
fix_overlap(&trans, &trans_pa, "translation table", &top);
fix_overlap(&bootinfo, &bootinfo_pa, "boot info", &top);
ofw_setup_palette();
printf("\nBooting the kernel...\n");
jump_to_kernel(bootinfo_pa, sizeof(bootinfo), trans_pa, pages << PAGE_WIDTH, real_mode_pa, (void *) bootinfo.screen.addr, bootinfo.screen.scanline);
}
/branches/network/boot/arch/ppc32/loader/asm.S
28,26 → 28,8
 
#include "asm.h"
#include "regname.h"
#include "debug.inc"
 
.macro SMC_COHERENCY addr
dcbst 0, \addr
sync
icbi 0, \addr
sync
isync
.endm
 
.macro FLUSH_DCACHE addr
dcbst 0, \addr
sync
isync
.endm
 
.macro TLB_FLUSH reg
tlbie \reg
addi \reg, \reg, 0x1000
.endm
 
.text
 
.global halt
158,6 → 140,9
 
real_mode:
DEBUG_INIT
DEBUG_real_mode
# copy kernel to proper location
#
# r5 = trans (pa)
178,13 → 163,14
mtctr r31
lwz r29, 0(r5)
DEBUG_INIT
DEBUG_copy_loop
copy_loop:
lwz r28, 0(r29)
stw r28, 0(r30)
SMC_COHERENCY r30
addi r29, r29, 4
addi r30, r30, 4
subi r6, r6, 4
194,11 → 180,15
bdnz copy_loop
DEBUG_end_copy_loop
addi r5, r5, 4
b page_copy
copy_end:
DEBUG_segments
# initially fill segment registers
li r31, 0
206,7 → 196,7
li r29, 8
mtctr r29
li r30, 0 # ASID 0 (VSIDs 0 .. 7)
 
seg_fill_uspace:
mtsrin r30, r31
230,6 → 220,8
# invalidate block address translation registers
DEBUG_bat
li r30, 0
mtspr ibat0u, r30
259,6 → 251,8
# create empty Page Hash Table
# on top of memory, size 64 KB
DEBUG_pht
lwz r31, 0(r3) # r31 = memory size
lis r30, 65536@h
280,7 → 274,6
# write zeroes
stw r29, 0(r31)
FLUSH_DCACHE r31
addi r31, r31, 4
subi r30, r30, 4
289,6 → 282,8
beq clear_end
bdnz pht_clear
 
DEBUG_end_pht_clear
clear_end:
296,6 → 291,8
# create BAT identity mapping
DEBUG_mapping
lwz r31, 0(r3) # r31 = memory size
lis r29, 0x0002
318,6 → 315,8
bdnz bat_mask
DEBUG_bat_mask
andi. r31, r31, 0x07ff # mask = mask & 0x07ff (BAT can map up to 256 MB)
li r29, 2
337,90 → 336,16
mtspr dbat0l, r30
no_bat:
 
#endif
# flush TLB
DEBUG_tlb
li r31, 0
sync
tlbia
tlbsync
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
DEBUG_prepare
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
TLB_FLUSH r31
eieio
tlbsync
sync
# start the kernel
#
# pc = KERNEL_START_ADDR
448,6 → 373,8
sync
isync
DEBUG_rfi
rfi
 
.align PAGE_WIDTH
/branches/network/boot/arch/ppc32/loader/regname.h
208,13 → 208,11
#define hid0 1008
 
/* MSR bits */
#define msr_dr (1 << 4)
#define msr_ir (1 << 5)
#define msr_pr (1 << 14)
#define msr_ir (1 << 4)
#define msr_dr (1 << 5)
#define msr_ee (1 << 15)
 
/* HID0 bits */
#define hid0_sten (1 << 24)
#define hid0_ice (1 << 15)
#define hid0_dce (1 << 14)
#define hid0_icfi (1 << 11)
/branches/network/boot/arch/ppc32/loader/main.h
33,17 → 33,9
 
#define TASKMAP_MAX_RECORDS 32
 
/** Size of buffer for storing task name in task_t. */
#define BOOTINFO_TASK_NAME_BUFLEN 32
 
/** Struct holding information about single loaded task. */
typedef struct {
/** Address where the task was placed. */
void *addr;
/** Size of the task's binary. */
unsigned int size;
/** Task name. */
char name[BOOTINFO_TASK_NAME_BUFLEN];
} task_t;
 
typedef struct {
55,7 → 47,7
memmap_t memmap;
taskmap_t taskmap;
screen_t screen;
macio_t macio;
keyboard_t keyboard;
} bootinfo_t;
 
extern void start(void);
/branches/network/boot/arch/ppc32/loader/ofwarch.c
39,32 → 39,25
 
void write(const char *str, const int len)
{
int i;
for (i = 0; i < len; i++) {
if (str[i] == '\n')
ofw_write("\r", 1);
ofw_write(&str[i], 1);
}
ofw_write(str, len);
}
 
int ofw_macio(macio_t *macio)
int ofw_keyboard(keyboard_t *keyboard)
{
char device_name[BUF_SIZE];
if (ofw_get_property(ofw_aliases, "macio", device_name, sizeof(device_name)) <= 0)
return false;
phandle device = ofw_find_device(device_name);
if (device == -1)
return false;
pci_reg_t pci_reg;
if (ofw_get_property(device, "assigned-addresses", &pci_reg, sizeof(pci_reg)) <= 0)
pci_reg_t macio;
if (ofw_get_property(device, "assigned-addresses", &macio, sizeof(macio)) <= 0)
return false;
macio->addr = (void *) pci_reg.addr.addr_lo;
macio->size = pci_reg.size_lo;
keyboard->addr = (void *) macio.addr.addr_lo;
keyboard->size = macio.size_lo;
 
return true;
}
/branches/network/boot/arch/ppc32/loader/debug.inc
0,0 → 1,11479
#
# Copyright (C) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.macro DEBUG_INIT
#ifdef CONFIG_DEBUG
lis r11, 65535
ori r11, r11, 65535
lis r12, 0
ori r12, r12, 0
mr r10, r8
#endif
.endm
 
.macro DEBUG_real_mode
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
#endif
.endm
 
.macro DEBUG_copy_loop
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
#endif
.endm
 
.macro DEBUG_end_copy_loop
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r11, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r11, 328(r10)
stw r11, 332(r10)
stw r11, 336(r10)
stw r11, 340(r10)
stw r11, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r11, 360(r10)
stw r11, 364(r10)
stw r11, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r11, 388(r10)
stw r11, 392(r10)
stw r12, 396(r10)
stw r11, 400(r10)
stw r11, 404(r10)
stw r11, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r11, 376(r10)
stw r11, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r11, 376(r10)
stw r11, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r11, 376(r10)
stw r11, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r11, 376(r10)
stw r11, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r11, 376(r10)
stw r11, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r11, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r11, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r11, 328(r10)
stw r11, 332(r10)
stw r11, 336(r10)
stw r11, 340(r10)
stw r11, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r11, 360(r10)
stw r11, 364(r10)
stw r11, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r11, 400(r10)
stw r11, 404(r10)
stw r11, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r11, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r11, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
#endif
.endm
 
.macro DEBUG_segments
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
#endif
.endm
 
.macro DEBUG_bat
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
#endif
.endm
 
.macro DEBUG_mapping
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
#endif
.endm
 
.macro DEBUG_tlb
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
#endif
.endm
 
.macro DEBUG_prepare
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
#endif
.endm
 
.macro DEBUG_rfi
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
#endif
.endm
 
.macro DEBUG_pht
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
#endif
.endm
 
.macro DEBUG_end_pht_clear
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r11, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r11, 328(r10)
stw r11, 332(r10)
stw r11, 336(r10)
stw r11, 340(r10)
stw r11, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r11, 360(r10)
stw r11, 364(r10)
stw r11, 368(r10)
stw r11, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r11, 388(r10)
stw r11, 392(r10)
stw r12, 396(r10)
stw r11, 400(r10)
stw r11, 404(r10)
stw r11, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r11, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r11, 332(r10)
stw r11, 336(r10)
stw r11, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r11, 360(r10)
stw r11, 364(r10)
stw r11, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r11, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r11, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r11, 328(r10)
stw r11, 332(r10)
stw r11, 336(r10)
stw r11, 340(r10)
stw r11, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r11, 360(r10)
stw r11, 364(r10)
stw r11, 368(r10)
stw r12, 372(r10)
stw r11, 376(r10)
stw r11, 380(r10)
stw r12, 384(r10)
stw r11, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r11, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
#endif
.endm
 
.macro DEBUG_bat_mask
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
#endif
.endm
/branches/network/boot/arch/ppc32/Makefile.inc
28,15 → 28,15
 
build: $(BASE)/image.boot
 
$(BASE)/image.boot: depend arch/$(BARCH)/loader/image.boot
cp arch/$(BARCH)/loader/image.boot $(BASE)/image.boot
$(BASE)/image.boot: depend arch/$(ARCH)/loader/image.boot
cp arch/$(ARCH)/loader/image.boot $(BASE)/image.boot
 
depend:
-rm arch/$(BARCH)/loader/image.boot
-rm arch/$(ARCH)/loader/image.boot
 
arch/$(BARCH)/loader/image.boot:
make -C arch/$(BARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
arch/$(ARCH)/loader/image.boot:
make -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) "DEFS=$(DEFS)"
 
clean: generic_clean
make -C arch/$(BARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
make -C arch/$(ARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) "DEFS=$(DEFS)"
-rm -f $(BASE)/image.boot
/branches/network/boot/arch/ppc64/loader/Makefile
0,0 → 1,119
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
include ../../../../version
include ../../../Makefile.config
 
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
BFD_NAME = elf64-powerpc
BFD_ARCH = powerpc:common64
TARGET = ppc64-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/ppc64/bin
 
ifeq ($(COMPILER),gcc_native)
CC = gcc
AS = as
LD = ld
OBJCOPY = objcopy
OBJDUMP = objdump
endif
 
ifeq ($(COMPILER),gcc_cross)
CC = $(TOOLCHAIN_DIR)/$(TARGET)-gcc
AS = $(TOOLCHAIN_DIR)/$(TARGET)-as
LD = $(TOOLCHAIN_DIR)/$(TARGET)-ld
OBJCOPY = $(TOOLCHAIN_DIR)/$(TARGET)-objcopy
OBJDUMP = $(TOOLCHAIN_DIR)/$(TARGET)-objdump
endif
 
CFLAGS = -DRELEASE=\"$(RELEASE)\" -I. -I../../../generic -I../../../genarch -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -mcpu=powerpc64 -msoft-float -m64
 
ifdef REVISION
CFLAGS += "-DREVISION=\"$(REVISION)\""
endif
 
ifdef TIMESTAMP
CFLAGS += "-DTIMESTAMP=\"$(TIMESTAMP)\""
endif
 
SOURCES = \
main.c \
ofwarch.c \
_components.c \
../../../genarch/ofw.c \
../../../generic/printf.c \
asm.S \
boot.S
 
COMPONENTS = \
$(KERNELDIR)/kernel.bin \
$(USPACEDIR)/srv/ns/ns \
$(USPACEDIR)/srv/fb/fb \
$(USPACEDIR)/srv/kbd/kbd \
$(USPACEDIR)/srv/console/console \
$(USPACEDIR)/srv/vfs/vfs \
$(USPACEDIR)/srv/fs/tmpfs/tmpfs \
$(USPACEDIR)/srv/fs/fat/fat \
$(USPACEDIR)/srv/devmap/devmap \
$(USPACEDIR)/app/init/init \
$(USPACEDIR)/app/tetris/tetris \
$(USPACEDIR)/app/tester/tester \
$(USPACEDIR)/app/klog/klog
 
OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
COMPONENT_OBJECTS := $(addsuffix .o,$(basename $(notdir $(COMPONENTS))))
 
.PHONY: all clean depend
 
all: image.boot
 
-include Makefile.depend
 
image.boot: depend _components.h _link.ld $(COMPONENT_OBJECTS) $(OBJECTS)
$(LD) -no-check-sections -N -T _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) -o $@
 
depend:
-makedepend $(DEFS) $(CFLAGS) -f - $(SOURCES) > Makefile.depend 2> /dev/null
 
clean:
-rm -f _components.h _components.c _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) image.boot Makefile.depend
 
_components.h _components.c _link.ld $(COMPONENT_OBJECTS): $(COMPONENTS) _link.ld.in
../../../tools/pack.py $(OBJCOPY) $(BFD_NAME) $(BFD_ARCH) 4096 "unsigned long" $(COMPONENTS)
 
%.o: %.S
$(CC) $(DEFS) $(CFLAGS) -D__ASM__ -c $< -o $@
 
%.o: %.c
$(CC) $(DEFS) $(CFLAGS) -c $< -o $@
/branches/network/boot/arch/ppc64/loader/_link.ld.in
0,0 → 1,27
OUTPUT_FORMAT("elf64-powerpc")
OUTPUT_ARCH(powerpc:common64)
ENTRY(start)
SECTIONS {
.boot 0x0000000010000000: AT (0) {
*(BOOTSTRAP);
*(REALMODE);
*(.text);
*(.toc);
*(.opd);
*(.rodata);
*(.rodata.*);
*(.data); /* initialized data */
*(.sdata);
*(.sdata2);
*(.sbss);
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
[[COMPONENTS]]
}
/DISCARD/ : {
*(*);
}
}
/branches/network/boot/arch/ppc64/loader/main.c
0,0 → 1,182
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#include "main.h"
#include <printf.h>
#include "asm.h"
#include "_components.h"
#include <ofw.h>
#include <align.h>
 
#define HEAP_GAP 1024000
 
bootinfo_t bootinfo;
 
 
static void check_align(const void *addr, const char *desc)
{
if ((unsigned long) addr % PAGE_SIZE != 0) {
printf("Error: %s not on page boundary, halting.\n", desc);
halt();
}
}
 
 
static void fix_overlap(void *va, void **pa, const char *desc, unsigned long *top)
{
if ((unsigned long) *pa + PAGE_SIZE < *top) {
printf("Warning: %s overlaps kernel physical area\n", desc);
void *new_va = (void *) (ALIGN_UP((unsigned long) KERNEL_END + HEAP_GAP, PAGE_SIZE) + *top);
void *new_pa = (void *) (HEAP_GAP + *top);
*top += PAGE_SIZE;
if (ofw_map(new_pa, new_va, PAGE_SIZE, 0) != 0) {
printf("Error: Unable to map page aligned memory at %L (physical %L), halting.\n", new_va, new_pa);
halt();
}
if ((unsigned long) new_pa + PAGE_SIZE < KERNEL_SIZE) {
printf("Error: %s cannot be relocated, halting.\n", desc);
halt();
}
printf("Relocating %L -> %L (physical %L -> %L)\n", va, new_va, *pa, new_pa);
*pa = new_pa;
memcpy(new_va, va, PAGE_SIZE);
}
}
 
char *release = RELEASE;
 
#ifdef REVISION
char *revision = ", revision " REVISION;
#else
char *revision = "";
#endif
 
#ifdef TIMESTAMP
char *timestamp = "\nBuilt on " TIMESTAMP;
#else
char *timestamp = "";
#endif
 
/** Print version information. */
static void version_print(void)
{
printf("HelenOS PPC64 Bootloader\nRelease %s%s%s\nCopyright (c) 2006 HelenOS project\n", release, revision, timestamp);
}
 
void bootstrap(void)
{
version_print();
component_t components[COMPONENTS];
init_components(components);
unsigned int i;
for (i = 0; i < COMPONENTS; i++)
check_align(components[i].start, components[i].name);
check_align(&real_mode, "bootstrap trampoline");
check_align(&trans, "translation table");
if (!ofw_memmap(&bootinfo.memmap)) {
printf("Error: unable to get memory map, halting.\n");
halt();
}
if (bootinfo.memmap.total == 0) {
printf("Error: no memory detected, halting.\n");
halt();
}
if (!ofw_screen(&bootinfo.screen)) {
printf("Error: unable to get screen properties, halting.\n");
halt();
}
if (!ofw_keyboard(&bootinfo.keyboard)) {
printf("Error: unable to get keyboard properties, halting.\n");
halt();
}
printf("\nDevice statistics\n");
printf(" screen at %L, resolution %dx%d, %d bpp (scanline %d bytes)\n", bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height, bootinfo.screen.bpp, bootinfo.screen.scanline);
printf(" keyboard at %L (size %d bytes)\n", bootinfo.keyboard.addr, bootinfo.keyboard.size);
void *real_mode_pa = ofw_translate(&real_mode);
void *trans_pa = ofw_translate(&trans);
void *bootinfo_pa = ofw_translate(&bootinfo);
printf("\nMemory statistics (total %d MB)\n", bootinfo.memmap.total >> 20);
printf(" %L: boot info structure (physical %L)\n", &bootinfo, bootinfo_pa);
printf(" %L: bootstrap trampoline (physical %L)\n", &real_mode, real_mode_pa);
printf(" %L: translation table (physical %L)\n", &trans, trans_pa);
for (i = 0; i < COMPONENTS; i++)
printf(" %L: %s image (size %d bytes)\n", components[i].start, components[i].name, components[i].size);
unsigned long top = 0;
for (i = 0; i < COMPONENTS; i++)
top += ALIGN_UP(components[i].size, PAGE_SIZE);
unsigned long pages = ALIGN_UP(KERNEL_SIZE, PAGE_SIZE) >> PAGE_WIDTH;
for (i = 0; i < pages; i++) {
void *pa = ofw_translate(KERNEL_START + (i << PAGE_WIDTH));
fix_overlap(KERNEL_START + (i << PAGE_WIDTH), &pa, "kernel", &top);
trans[i] = pa;
}
bootinfo.taskmap.count = 0;
for (i = 1; i < COMPONENTS; i++) {
unsigned long component_pages = ALIGN_UP(components[i].size, PAGE_SIZE) >> PAGE_WIDTH;
unsigned long j;
for (j = 0; j < component_pages; j++) {
void *pa = ofw_translate(components[i].start + (j << PAGE_WIDTH));
fix_overlap(components[i].start + (j << PAGE_WIDTH), &pa, components[i].name, &top);
trans[pages + j] = pa;
if (j == 0) {
bootinfo.taskmap.tasks[bootinfo.taskmap.count].addr = (void *) (pages << PAGE_WIDTH);
bootinfo.taskmap.tasks[bootinfo.taskmap.count].size = components[i].size;
bootinfo.taskmap.count++;
}
}
pages += component_pages;
}
fix_overlap(&real_mode, &real_mode_pa, "bootstrap trampoline", &top);
fix_overlap(&trans, &trans_pa, "translation table", &top);
fix_overlap(&bootinfo, &bootinfo_pa, "boot info", &top);
printf("\nBooting the kernel...\n");
jump_to_kernel(bootinfo_pa, sizeof(bootinfo), trans_pa, pages << PAGE_WIDTH, real_mode_pa, (void *) bootinfo.screen.addr, bootinfo.screen.scanline);
}
/branches/network/boot/arch/ppc64/loader/ofwarch.h
0,0 → 1,35
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef BOOT_ppc64_OFWARCH_H_
#define BOOT_ppc64_OFWARCH_H_
 
#define OFW_ADDRESS_CELLS 2
#define OFW_SIZE_CELLS 2
 
#endif
/branches/network/boot/arch/ppc64/loader/asm.S
0,0 → 1,301
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include "asm.h"
#include "regname.h"
#include "debug.inc"
 
.text
 
.global halt
.global memcpy
.global jump_to_kernel
 
halt:
b halt
 
memcpy:
srwi. r7, r5, 3
addi r6, r3, -4
addi r4, r4, -4
beq 2f
andi. r0, r6, 3
mtctr r7
bne 5f
1:
lwz r7, 4(r4)
lwzu r8, 8(r4)
stw r7, 4(r6)
stwu r8, 8(r6)
bdnz 1b
andi. r5, r5, 7
2:
cmplwi 0, r5, 4
blt 3f
lwzu r0, 4(r4)
addi r5, r5, -4
stwu r0, 4(r6)
3:
cmpwi 0, r5, 0
beqlr
mtctr r5
addi r4, r4, 3
addi r6, r6, 3
4:
lbzu r0, 1(r4)
stbu r0, 1(r6)
bdnz 4b
blr
5:
subfic r0, r0, 4
mtctr r0
6:
lbz r7, 4(r4)
addi r4, r4, 1
stb r7, 4(r6)
addi r6, r6, 1
bdnz 6b
subf r5, r0, r5
rlwinm. r7, r5, 32-3, 3, 31
beq 2b
mtctr r7
b 1b
 
 
jump_to_kernel:
# r3 = bootinfo (pa)
# r4 = bootinfo_size
# r5 = trans (pa)
# r6 = bytes to copy
# r7 = real_mode (pa)
# r8 = framebuffer (pa)
# r9 = scanline
# disable interrupts
mfmsr r31
rlwinm r31, r31, 0, 17, 15
mtmsr r31
# set real_mode meeting point address
mtspr srr0, r7
# jumps to real_mode
mfmsr r31
lis r30, ~0@h
ori r30, r30, ~(msr_ir | msr_dr)@l
and r31, r31, r30
mtspr srr1, r31
sync
isync
rfid
 
.section REALMODE, "ax"
.align PAGE_WIDTH
.global real_mode
 
real_mode:
DEBUG_INIT
DEBUG_real_mode
# copy kernel to proper location
#
# r5 = trans (pa)
# r6 = bytes to copy
# r8 = framebuffer (pa)
# r9 = scanline
li r31, PAGE_SIZE >> 2
li r30, 0
page_copy:
cmpwi r6, 0
beq copy_end
# copy page
mtctr r31
lwz r29, 0(r5)
DEBUG_INIT
DEBUG_copy_loop
copy_loop:
lwz r28, 0(r29)
stw r28, 0(r30)
addi r29, r29, 4
addi r30, r30, 4
subi r6, r6, 4
cmpwi r6, 0
beq copy_end
bdnz copy_loop
DEBUG_end_copy_loop
addi r5, r5, 4
b page_copy
copy_end:
DEBUG_segments
# initially fill segment registers
li r31, 0
li r29, 8
mtctr r29
li r30, 0 # ASID 0 (VSIDs 0 .. 7)
 
seg_fill_uspace:
mtsrin r30, r31
addi r30, r30, 1
addis r31, r31, 0x1000 # move to next SR
bdnz seg_fill_uspace
li r29, 8
mtctr r29
lis r30, 0x4000 # priviledged access only
ori r30, r30, 8 # ASID 0 (VSIDs 8 .. 15)
seg_fill_kernel:
mtsrin r30, r31
addi r30, r30, 1
addis r31, r31, 0x1000 # move to next SR
bdnz seg_fill_kernel
# create empty Page Hash Table
# on top of memory, size 64 KB
DEBUG_pht
lwz r31, 0(r3) # r31 = memory size
lis r30, 65536@h
ori r30, r30, 65536@l # r30 = 65536
subi r29, r30, 1 # r29 = 65535
sub r31, r31, r30
andc r31, r31, r29 # pht = ALIGN_DOWN(memory_size - 65536, 65536)
mtsdr1 r31
li r29, 2
srw r30, r30, r29 # r30 = 16384
li r29, 0
pht_clear:
# write zeroes
stw r29, 0(r31)
addi r31, r31, 4
subi r30, r30, 4
cmpwi r30, 0
beq clear_end
bdnz pht_clear
 
DEBUG_end_pht_clear
clear_end:
DEBUG_tlb
tlbia
tlbsync
DEBUG_prepare
# start the kernel
#
# pc = KERNEL_START_ADDR
# r3 = bootinfo (pa)
# sprg0 = KA2PA(KERNEL_START_ADDR)
# sprg3 = physical memory size
# sp = 0 (pa)
lis r31, KERNEL_START_ADDR@ha
addi r31, r31, KERNEL_START_ADDR@l
mtspr srr0, r31
subis r31, r31, 0x8000
mtsprg0 r31
lwz r31, 0(r3)
mtsprg3 r31
li sp, 0
mfmsr r31
ori r31, r31, (msr_ir | msr_dr)@l
mtspr srr1, r31
sync
isync
DEBUG_rfi
rfid
 
.align PAGE_WIDTH
.global trans
trans:
.space (TRANS_SIZE * TRANS_ITEM_SIZE)
/branches/network/boot/arch/ppc64/loader/boot.S
0,0 → 1,42
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include "regname.h"
 
.section BOOTSTRAP, "ax"
 
.global start
 
start:
lis r4, ofw_cif@ha
addi r4, r4, ofw_cif@l
stw r5, 0(r4)
bl ofw_init
b bootstrap
/branches/network/boot/arch/ppc64/loader/regname.h
0,0 → 1,204
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef __ppc32_REGNAME_H__
#define __ppc32_REGNAME_H__
 
/* Condition Register Bit Fields */
#define cr0 0
#define cr1 1
#define cr2 2
#define cr3 3
#define cr4 4
#define cr5 5
#define cr6 6
#define cr7 7
 
/* General Purpose Registers (GPRs) */
#define r0 0
#define r1 1
#define r2 2
#define r3 3
#define r4 4
#define r5 5
#define r6 6
#define r7 7
#define r8 8
#define r9 9
#define r10 10
#define r11 11
#define r12 12
#define r13 13
#define r14 14
#define r15 15
#define r16 16
#define r17 17
#define r18 18
#define r19 19
#define r20 20
#define r21 21
#define r22 22
#define r23 23
#define r24 24
#define r25 25
#define r26 26
#define r27 27
#define r28 28
#define r29 29
#define r30 30
#define r31 31
 
/* GPR Aliases */
#define sp 1
 
/* Floating Point Registers (FPRs) */
#define fr0 0
#define fr1 1
#define fr2 2
#define fr3 3
#define fr4 4
#define fr5 5
#define fr6 6
#define fr7 7
#define fr8 8
#define fr9 9
#define fr10 10
#define fr11 11
#define fr12 12
#define fr13 13
#define fr14 14
#define fr15 15
#define fr16 16
#define fr17 17
#define fr18 18
#define fr19 19
#define fr20 20
#define fr21 21
#define fr22 22
#define fr23 23
#define fr24 24
#define fr25 25
#define fr26 26
#define fr27 27
#define fr28 28
#define fr29 29
#define fr30 30
#define fr31 31
 
#define vr0 0
#define vr1 1
#define vr2 2
#define vr3 3
#define vr4 4
#define vr5 5
#define vr6 6
#define vr7 7
#define vr8 8
#define vr9 9
#define vr10 10
#define vr11 11
#define vr12 12
#define vr13 13
#define vr14 14
#define vr15 15
#define vr16 16
#define vr17 17
#define vr18 18
#define vr19 19
#define vr20 20
#define vr21 21
#define vr22 22
#define vr23 23
#define vr24 24
#define vr25 25
#define vr26 26
#define vr27 27
#define vr28 28
#define vr29 29
#define vr30 30
#define vr31 31
 
#define evr0 0
#define evr1 1
#define evr2 2
#define evr3 3
#define evr4 4
#define evr5 5
#define evr6 6
#define evr7 7
#define evr8 8
#define evr9 9
#define evr10 10
#define evr11 11
#define evr12 12
#define evr13 13
#define evr14 14
#define evr15 15
#define evr16 16
#define evr17 17
#define evr18 18
#define evr19 19
#define evr20 20
#define evr21 21
#define evr22 22
#define evr23 23
#define evr24 24
#define evr25 25
#define evr26 26
#define evr27 27
#define evr28 28
#define evr29 29
#define evr30 30
#define evr31 31
 
/* Special Purpose Registers (SPRs) */
#define xer 1
#define lr 8
#define ctr 9
#define dec 22
#define sdr1 25
#define srr0 26
#define srr1 27
#define sprg0 272
#define sprg1 273
#define sprg2 274
#define sprg3 275
#define prv 287
#define hid0 1008
 
/* MSR bits */
#define msr_ir (1 << 4)
#define msr_dr (1 << 5)
 
/* HID0 bits */
#define hid0_ice (1 << 15)
#define hid0_dce (1 << 14)
#define hid0_icfi (1 << 11)
#define hid0_dci (1 << 10)
 
#endif
/branches/network/boot/arch/ppc64/loader/asm.h
0,0 → 1,52
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef BOOT_ppc64_ASM_H_
#define BOOT_ppc64_ASM_H_
 
#define PAGE_SIZE 4096
#define PAGE_WIDTH 12
 
#define TRANS_SIZE 1024
#define TRANS_ITEM_SIZE 8
 
#define KERNEL_START_ADDR 0x80008000
 
#ifndef __ASM__
 
#define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt))
 
extern void *trans[TRANS_SIZE];
 
extern void halt();
extern void jump_to_kernel(void *bootinfo, unsigned long bootinfo_size, void *trans, unsigned long kernel_size, void *real_mode, void *fb, unsigned long scanline) __attribute__((noreturn));
extern void real_mode();
 
#endif
 
#endif
/branches/network/boot/arch/ppc64/loader/main.h
0,0 → 1,58
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef BOOT_ppc64_MAIN_H_
#define BOOT_ppc64_MAIN_H_
 
#include "ofw.h"
 
#define TASKMAP_MAX_RECORDS 32
 
typedef struct {
void *addr;
unsigned long size;
} task_t;
 
typedef struct {
unsigned long count;
task_t tasks[TASKMAP_MAX_RECORDS];
} taskmap_t;
 
typedef struct {
memmap_t memmap;
taskmap_t taskmap;
screen_t screen;
keyboard_t keyboard;
} bootinfo_t;
 
extern void start(void);
extern void bootstrap(void);
 
extern memmap_t memmap;
 
#endif
/branches/network/boot/arch/ppc64/loader/ofwarch.c
0,0 → 1,68
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#include <ofwarch.h>
#include <ofw.h>
#include <printf.h>
 
typedef int (* ofw_entry_t)(ofw_args_t *args);
 
int ofw(ofw_args_t *args)
{
return ((ofw_entry_t) ofw_cif)(args);
}
 
void write(const char *str, const int len)
{
ofw_write(str, len);
}
 
int ofw_keyboard(keyboard_t *keyboard)
{
char device_name[BUF_SIZE];
if (ofw_get_property(ofw_aliases, "macio", device_name, sizeof(device_name)) <= 0)
return false;
phandle device = ofw_find_device(device_name);
if (device == -1)
return false;
pci_reg_t macio;
if (ofw_get_property(device, "assigned-addresses", &macio, sizeof(macio)) <= 0)
return false;
keyboard->addr = (void *) (((unsigned long) macio.addr.addr_lo) | (((unsigned long) macio.addr.addr_hi) << 32));
keyboard->size = macio.size_lo;
 
return true;
}
 
int ofw_translate_failed(ofw_arg_t flag)
{
return 0;
}
/branches/network/boot/arch/ppc64/loader/types.h
0,0 → 1,44
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef BOOT_ppc64_TYPES_H_
#define BOOT_ppc64_TYPES_H_
 
#include <gentypes.h>
 
typedef signed char int8_t;
 
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned int uint32_t;
typedef unsigned long uint64_t;
 
typedef uint64_t uintptr_t;
typedef uint64_t unative_t;
 
#endif
/branches/network/boot/arch/ppc64/loader/debug.inc
0,0 → 1,11479
#
# Copyright (C) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.macro DEBUG_INIT
#ifdef CONFIG_DEBUG
lis r11, 65535
ori r11, r11, 65535
lis r12, 0
ori r12, r12, 0
mr r10, r8
#endif
.endm
 
.macro DEBUG_real_mode
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
#endif
.endm
 
.macro DEBUG_copy_loop
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
#endif
.endm
 
.macro DEBUG_end_copy_loop
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r11, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r11, 328(r10)
stw r11, 332(r10)
stw r11, 336(r10)
stw r11, 340(r10)
stw r11, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r11, 360(r10)
stw r11, 364(r10)
stw r11, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r11, 388(r10)
stw r11, 392(r10)
stw r12, 396(r10)
stw r11, 400(r10)
stw r11, 404(r10)
stw r11, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r11, 376(r10)
stw r11, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r11, 376(r10)
stw r11, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r11, 376(r10)
stw r11, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r11, 376(r10)
stw r11, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r11, 376(r10)
stw r11, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r11, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r11, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r11, 328(r10)
stw r11, 332(r10)
stw r11, 336(r10)
stw r11, 340(r10)
stw r11, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r11, 360(r10)
stw r11, 364(r10)
stw r11, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r11, 400(r10)
stw r11, 404(r10)
stw r11, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r11, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r11, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
#endif
.endm
 
.macro DEBUG_segments
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
#endif
.endm
 
.macro DEBUG_bat
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
#endif
.endm
 
.macro DEBUG_mapping
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
#endif
.endm
 
.macro DEBUG_tlb
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
#endif
.endm
 
.macro DEBUG_prepare
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r12, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
#endif
.endm
 
.macro DEBUG_rfi
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
#endif
.endm
 
.macro DEBUG_pht
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
#endif
.endm
 
.macro DEBUG_end_pht_clear
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r11, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r11, 328(r10)
stw r11, 332(r10)
stw r11, 336(r10)
stw r11, 340(r10)
stw r11, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r11, 360(r10)
stw r11, 364(r10)
stw r11, 368(r10)
stw r11, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r11, 388(r10)
stw r11, 392(r10)
stw r12, 396(r10)
stw r11, 400(r10)
stw r11, 404(r10)
stw r11, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r11, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r11, 332(r10)
stw r11, 336(r10)
stw r11, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r11, 360(r10)
stw r11, 364(r10)
stw r11, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r11, 408(r10)
stw r11, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r11, 260(r10)
stw r11, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r11, 280(r10)
stw r11, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r11, 324(r10)
stw r11, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r11, 344(r10)
stw r11, 348(r10)
stw r12, 352(r10)
stw r11, 356(r10)
stw r11, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r11, 372(r10)
stw r11, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r11, 264(r10)
stw r11, 268(r10)
stw r11, 272(r10)
stw r11, 276(r10)
stw r11, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r11, 300(r10)
stw r11, 304(r10)
stw r11, 308(r10)
stw r11, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r11, 328(r10)
stw r11, 332(r10)
stw r11, 336(r10)
stw r11, 340(r10)
stw r11, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r11, 360(r10)
stw r11, 364(r10)
stw r11, 368(r10)
stw r12, 372(r10)
stw r11, 376(r10)
stw r11, 380(r10)
stw r12, 384(r10)
stw r11, 388(r10)
stw r11, 392(r10)
stw r11, 396(r10)
stw r11, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
stw r12, 256(r10)
stw r12, 260(r10)
stw r12, 264(r10)
stw r12, 268(r10)
stw r12, 272(r10)
stw r12, 276(r10)
stw r12, 280(r10)
stw r12, 284(r10)
stw r12, 288(r10)
stw r12, 292(r10)
stw r12, 296(r10)
stw r12, 300(r10)
stw r12, 304(r10)
stw r12, 308(r10)
stw r12, 312(r10)
stw r12, 316(r10)
stw r12, 320(r10)
stw r12, 324(r10)
stw r12, 328(r10)
stw r12, 332(r10)
stw r12, 336(r10)
stw r12, 340(r10)
stw r12, 344(r10)
stw r12, 348(r10)
stw r12, 352(r10)
stw r12, 356(r10)
stw r12, 360(r10)
stw r12, 364(r10)
stw r12, 368(r10)
stw r12, 372(r10)
stw r12, 376(r10)
stw r12, 380(r10)
stw r12, 384(r10)
stw r12, 388(r10)
stw r12, 392(r10)
stw r12, 396(r10)
stw r12, 400(r10)
stw r12, 404(r10)
stw r12, 408(r10)
stw r12, 412(r10)
#endif
.endm
 
.macro DEBUG_bat_mask
#ifdef CONFIG_DEBUG
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r11, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r11, 68(r10)
stw r11, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r12, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r11, 140(r10)
stw r11, 144(r10)
stw r11, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r11, 240(r10)
stw r11, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r11, 244(r10)
stw r11, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r11, 24(r10)
stw r11, 28(r10)
stw r12, 32(r10)
stw r11, 36(r10)
stw r11, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r11, 52(r10)
stw r11, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r11, 76(r10)
stw r11, 80(r10)
stw r12, 84(r10)
stw r11, 88(r10)
stw r11, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r11, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r11, 164(r10)
stw r11, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r11, 180(r10)
stw r11, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r11, 196(r10)
stw r11, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r11, 216(r10)
stw r11, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r11, 8(r10)
stw r11, 12(r10)
stw r11, 16(r10)
stw r11, 20(r10)
stw r11, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r11, 40(r10)
stw r11, 44(r10)
stw r11, 48(r10)
stw r12, 52(r10)
stw r11, 56(r10)
stw r11, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r11, 80(r10)
stw r11, 84(r10)
stw r11, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r11, 132(r10)
stw r11, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r11, 152(r10)
stw r11, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r11, 168(r10)
stw r11, 172(r10)
stw r11, 176(r10)
stw r12, 180(r10)
stw r11, 184(r10)
stw r11, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r11, 200(r10)
stw r11, 204(r10)
stw r11, 208(r10)
stw r11, 212(r10)
stw r11, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r11, 228(r10)
stw r11, 232(r10)
stw r11, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r11, 248(r10)
stw r11, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r11, 100(r10)
stw r11, 104(r10)
stw r11, 108(r10)
stw r11, 112(r10)
stw r11, 116(r10)
stw r11, 120(r10)
stw r11, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
add r10, r10, r9
stw r12, 0(r10)
stw r12, 4(r10)
stw r12, 8(r10)
stw r12, 12(r10)
stw r12, 16(r10)
stw r12, 20(r10)
stw r12, 24(r10)
stw r12, 28(r10)
stw r12, 32(r10)
stw r12, 36(r10)
stw r12, 40(r10)
stw r12, 44(r10)
stw r12, 48(r10)
stw r12, 52(r10)
stw r12, 56(r10)
stw r12, 60(r10)
stw r12, 64(r10)
stw r12, 68(r10)
stw r12, 72(r10)
stw r12, 76(r10)
stw r12, 80(r10)
stw r12, 84(r10)
stw r12, 88(r10)
stw r12, 92(r10)
stw r12, 96(r10)
stw r12, 100(r10)
stw r12, 104(r10)
stw r12, 108(r10)
stw r12, 112(r10)
stw r12, 116(r10)
stw r12, 120(r10)
stw r12, 124(r10)
stw r12, 128(r10)
stw r12, 132(r10)
stw r12, 136(r10)
stw r12, 140(r10)
stw r12, 144(r10)
stw r12, 148(r10)
stw r12, 152(r10)
stw r12, 156(r10)
stw r12, 160(r10)
stw r12, 164(r10)
stw r12, 168(r10)
stw r12, 172(r10)
stw r12, 176(r10)
stw r12, 180(r10)
stw r12, 184(r10)
stw r12, 188(r10)
stw r12, 192(r10)
stw r12, 196(r10)
stw r12, 200(r10)
stw r12, 204(r10)
stw r12, 208(r10)
stw r12, 212(r10)
stw r12, 216(r10)
stw r12, 220(r10)
stw r12, 224(r10)
stw r12, 228(r10)
stw r12, 232(r10)
stw r12, 236(r10)
stw r12, 240(r10)
stw r12, 244(r10)
stw r12, 248(r10)
stw r12, 252(r10)
#endif
.endm
/branches/network/boot/arch/ppc64/Makefile.inc
0,0 → 1,42
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
build: $(BASE)/image.boot
 
$(BASE)/image.boot: depend arch/$(ARCH)/loader/image.boot
cp arch/$(ARCH)/loader/image.boot $(BASE)/image.boot
 
depend:
-rm arch/$(ARCH)/loader/image.boot
 
arch/$(ARCH)/loader/image.boot:
make -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
 
clean: generic_clean
make -C arch/$(ARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
-rm -f $(BASE)/image.boot
/branches/network/boot/arch/mips32/loader/_link.ld.in
File deleted
/branches/network/boot/arch/mips32/loader/Makefile
27,7 → 27,7
#
 
include ../../../../version
-include ../../../../Makefile.config
include ../../../Makefile.config
 
## Toolchain configuration
#
36,25 → 36,17
CROSS_PREFIX = /usr/local
endif
 
ifeq ($(IMAGE),binary)
LD_IN = binary
endif
ifeq ($(IMAGE),ecoff)
LD_IN = ecoff
endif
BFD_NAME = elf32-tradlittlemips
BFD_ARCH = mips
TARGET = mipsel-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/mipsel/bin
 
ifeq ($(MACHINE),lgxemul)
BFD_NAME = elf32-tradlittlemips
BFD = ecoff-littlemips
endif
ifeq ($(MACHINE),bgxemul)
BFD_NAME = elf32-tradbigmips
BFD = ecoff-bigmips
TOOLCHAIN_DIR = $(CROSS_PREFIX)/mips/bin
TARGET = mips-linux-gnu
endif
ifeq ($(MACHINE),msim)
BFD_NAME = elf32-tradlittlemips
BFD = binary
endif
 
ifeq ($(COMPILER),gcc_native)
CC = gcc
AS = as
71,14 → 63,21
OBJDUMP = $(TOOLCHAIN_DIR)/$(TARGET)-objdump
endif
 
CFLAGS = -DRELEASE=$(RELEASE) -I. -I../../../generic -imacros ../../../../config.h -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mhard-float -mips3 -pipe
CFLAGS = -DRELEASE=\"$(RELEASE)\" -I. -I../../../generic -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mhard-float -mips3
 
ifdef REVISION
CFLAGS += "-DREVISION=\"$(REVISION)\""
endif
 
ifdef TIMESTAMP
CFLAGS += "-DTIMESTAMP=\"$(TIMESTAMP)\""
endif
 
SOURCES = \
main.c \
msim.c \
_components.c \
../../../generic/printf.c \
../../../generic/string.c \
asm.S \
boot.S
 
89,7 → 88,7
$(USPACEDIR)/app/init/init \
$(USPACEDIR)/srv/devmap/devmap \
$(USPACEDIR)/srv/rd/rd \
$(USPACEDIR)/srv/vfs/vfs
$(USPACEDIR)/srv/vfs/vfs
ifeq ($(RDFMT),tmpfs)
COMPONENTS += $(USPACEDIR)/srv/fs/tmpfs/tmpfs
endif
97,20 → 96,18
COMPONENTS += $(USPACEDIR)/srv/fs/fat/fat
endif
 
RD_SRVS = \
RD_TASKS = \
$(USPACEDIR)/srv/fb/fb \
$(USPACEDIR)/srv/kbd/kbd \
$(USPACEDIR)/srv/console/console \
$(USPACEDIR)/srv/fs/tmpfs/tmpfs \
$(USPACEDIR)/srv/fs/fat/fat
 
RD_APPS = \
$(USPACEDIR)/srv/fs/fat/fat \
$(USPACEDIR)/app/tetris/tetris \
$(USPACEDIR)/app/tester/tester \
$(USPACEDIR)/app/trace/trace \
$(USPACEDIR)/app/bdsh/bdsh \
$(USPACEDIR)/app/klog/klog
 
 
OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
COMPONENT_OBJECTS := $(addsuffix .o,$(basename $(notdir $(COMPONENTS))))
 
120,41 → 117,35
 
-include Makefile.depend
 
image.boot: image.raw
$(OBJCOPY) -O $(BFD) $< $@
image.boot: depend _components.h _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS)
$(LD) -no-check-sections -N -T _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS) -o $@
 
image.raw: depend _components.h _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS)
$(LD) -no-check-sections -N -T _link.ld -o $@ $(COMPONENT_OBJECTS) initrd.o $(OBJECTS)
 
depend:
-makedepend -f - -- $(DEFS) $(CFLAGS) -- $(SOURCES) > Makefile.depend 2> /dev/null
-makedepend $(DEFS) $(CFLAGS) -f - $(SOURCES) > Makefile.depend 2> /dev/null
 
clean:
-for file in $(RD_SRVS) ; do \
rm -f $(USPACEDIR)/dist/srv/`basename $$file` ; \
-for task in $(RD_TASKS) ; do \
rm -f $(USPACEDIR)/dist/sbin/`basename $$task` ; \
done
-for file in $(RD_APPS) ; do \
rm -f $(USPACEDIR)/dist/app/`basename $$file` ; \
done
-rm -f _components.h _components.c _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS) initrd.img image.raw image.boot Makefile.depend
-rm -f _components.h _components.c _link.ld _link.ld.in $(COMPONENT_OBJECTS) initrd.o $(OBJECTS) initrd.img image.boot Makefile.depend
 
_components.h _components.c _link.ld $(COMPONENT_OBJECTS) initrd.o: $(COMPONENTS) $(RD_SRVS) $(RD_APPS) _link.ld.in
for file in $(RD_SRVS) ; do \
cp $$file $(USPACEDIR)/dist/srv/ ; \
_components.h _components.c _link.ld $(COMPONENT_OBJECTS) initrd.o: $(COMPONENTS) _link.ld.in
for task in $(RD_TASKS) ; do \
cp $$task $(USPACEDIR)/dist/sbin/ ; \
done
for file in $(RD_APPS) ; do \
cp $$file $(USPACEDIR)/dist/app/ ; \
done
ifeq ($(RDFMT),tmpfs)
../../../../tools/mktmpfs.py $(USPACEDIR)/dist/ initrd.fs
endif
ifeq ($(RDFMT),fat)
../../../../tools/mkfat.py $(USPACEDIR)/dist/ initrd.fs
../../../../tools/mkfat.sh $(USPACEDIR)/dist/ initrd.fs
endif
../../../../tools/mkhord.py 16384 initrd.fs initrd.img
rm initrd.fs
../../../tools/pack.py $(OBJCOPY) $(BFD_NAME) $(BFD_ARCH) 16384 "unsigned int" $(COMPONENTS) ./initrd.img
 
_link.ld.in: _link.ld.in.$(LD_IN)
cp $< $@
 
%.o: %.S
$(CC) $(DEFS) $(CFLAGS) -D__ASM__ -c $< -o $@
 
/branches/network/boot/arch/mips32/loader/_link.ld.in.ecoff
0,0 → 1,21
OUTPUT_FORMAT("ecoff-littlemips")
ENTRY(start)
SECTIONS {
.boot 0xbfc00000: AT (0) {
*(BOOTSTRAP);
*(.text);
*(.rodata);
*(.rodata.*);
*(.data); /* initialized data */
*(.sdata);
*(.sdata2);
*(.sbss);
*(.scommon);
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
*(.reginfo);
[[COMPONENTS]]
}
}
/branches/network/boot/arch/mips32/loader/_link.ld.in.binary
0,0 → 1,21
OUTPUT_FORMAT("binary")
ENTRY(start)
SECTIONS {
.boot 0xbfc00000: AT (0) {
*(BOOTSTRAP);
*(.text);
*(.rodata);
*(.rodata.*);
*(.data); /* initialized data */
*(.sdata);
*(.sdata2);
*(.sbss);
*(.scommon);
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
*(.reginfo);
[[COMPONENTS]]
}
}
/branches/network/boot/arch/mips32/loader/main.c
28,9 → 28,6
 
#include "main.h"
#include <printf.h>
#include <align.h>
#include <macros.h>
#include <string.h>
#include "msim.h"
#include "asm.h"
#include "_components.h"
37,16 → 34,16
 
#define KERNEL_VIRTUAL_ADDRESS 0x80100000
 
char *release = STRING(RELEASE);
char *release = RELEASE;
 
#ifdef REVISION
char *revision = ", revision " STRING(REVISION);
char *revision = ", revision " REVISION;
#else
char *revision = "";
#endif
 
#ifdef TIMESTAMP
char *timestamp = "\nBuilt on " STRING(TIMESTAMP);
char *timestamp = "\nBuilt on " TIMESTAMP;
#else
char *timestamp = "";
#endif
75,10 → 72,9
printf(" %L: %s image (size %d bytes)\n", components[i].start, components[i].name, components[i].size);
printf("\nCopying components\n");
unsigned int top = 0;
bootinfo.cnt = 0;
for (i = 0; i < min(COMPONENTS, TASKMAP_MAX_RECORDS); i++) {
for (i = 0; i < COMPONENTS; i++) {
printf(" %s...", components[i].name);
top = ALIGN_UP(top, PAGE_SIZE);
memcpy(((void *) KERNEL_VIRTUAL_ADDRESS) + top, components[i].start, components[i].size);
85,8 → 81,6
if (i > 0) {
bootinfo.tasks[bootinfo.cnt].addr = ((void *) KERNEL_VIRTUAL_ADDRESS) + top;
bootinfo.tasks[bootinfo.cnt].size = components[i].size;
strncpy(bootinfo.tasks[bootinfo.cnt].name,
components[i].name, BOOTINFO_TASK_NAME_BUFLEN);
bootinfo.cnt++;
}
top += components[i].size;
93,13 → 87,6
printf("done.\n");
}
unsigned int *cpumap = (unsigned int *) CPUMAP;
bootinfo.cpumap = 0;
for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
if (cpumap[i] != 0)
bootinfo.cpumap |= (1 << i);
}
printf("\nBooting the kernel...\n");
jump_to_kernel((void *) KERNEL_VIRTUAL_ADDRESS, &bootinfo);
jump_to_kernel((void *) KERNEL_VIRTUAL_ADDRESS, &bootinfo, sizeof(bootinfo));
}
/branches/network/boot/arch/mips32/loader/asm.h
29,11 → 29,11
#ifndef BOOT_mips32_ASM_H_
#define BOOT_mips32_ASM_H_
 
#define PAGE_SIZE 16384
#define PAGE_WIDTH 14
#define PAGE_SIZE 16384
#define PAGE_WIDTH 14
 
#define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt))
#define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt))
 
void jump_to_kernel(void *entry, void *bootinfo) __attribute__((noreturn));
void jump_to_kernel(void *entry, void *bootinfo, unsigned int bootinfo_size) __attribute__((noreturn));
 
#endif
/branches/network/boot/arch/mips32/loader/main.h
29,30 → 29,21
#ifndef BOOT_mips32_MAIN_H_
#define BOOT_mips32_MAIN_H_
 
#define CPUMAP 0x80001000
#define INITIAL_STACK 0x80002000
#define MSIM_DORDER_ADDRESS 0xb0000004
/** Align to the nearest higher address.
*
* @param addr Address or size to be aligned.
* @param align Size of alignment, must be power of 2.
*/
#define ALIGN_UP(addr, align) (((addr) + ((align) - 1)) & ~((align) - 1))
 
#define TASKMAP_MAX_RECORDS 32
#define CPUMAP_MAX_RECORDS 32
#define TASKMAP_MAX_RECORDS 32
 
#ifndef __ASM__
 
/** Size of buffer for storing task name in task_t. */
#define BOOTINFO_TASK_NAME_BUFLEN 32
 
/** Struct holding information about single loaded task. */
typedef struct {
/** Address where the task was placed. */
void *addr;
/** Size of the task's binary. */
unsigned int size;
/** Task name. */
char name[BOOTINFO_TASK_NAME_BUFLEN];
} task_t;
 
typedef struct {
unsigned int cpumap;
unsigned int cnt;
task_t tasks[TASKMAP_MAX_RECORDS];
} bootinfo_t;
61,5 → 52,3
extern void bootstrap(void);
 
#endif
 
#endif
/branches/network/boot/arch/mips32/loader/boot.S
27,8 → 27,9
#
 
#include "regname.h"
#include "main.h"
 
#define INITIAL_STACK 0x80040000
 
.set noat
.set noreorder
.set nomacro
37,82 → 38,8
 
.global start
start:
lui $sp, INITIAL_STACK >> 16
ori $sp, $sp, INITIAL_STACK & 0xffff
/* Setup CPU map (on msim this code
is executed in parallel on all CPUs,
but it not an issue) */
la $a0, CPUMAP
sw $zero, 0($a0)
sw $zero, 4($a0)
sw $zero, 8($a0)
sw $zero, 12($a0)
sw $zero, 16($a0)
sw $zero, 20($a0)
sw $zero, 24($a0)
sw $zero, 28($a0)
sw $zero, 32($a0)
sw $zero, 36($a0)
sw $zero, 40($a0)
sw $zero, 44($a0)
sw $zero, 48($a0)
sw $zero, 52($a0)
sw $zero, 56($a0)
sw $zero, 60($a0)
sw $zero, 64($a0)
sw $zero, 68($a0)
sw $zero, 72($a0)
sw $zero, 76($a0)
sw $zero, 80($a0)
sw $zero, 84($a0)
sw $zero, 88($a0)
sw $zero, 92($a0)
sw $zero, 96($a0)
sw $zero, 100($a0)
sw $zero, 104($a0)
sw $zero, 108($a0)
sw $zero, 112($a0)
sw $zero, 116($a0)
sw $zero, 120($a0)
sw $zero, 124($a0)
lui $a1, 1
#ifdef MACHINE_msim
/* Read dorder value */
la $k0, MSIM_DORDER_ADDRESS
lw $k1, ($k0)
/* If we are not running on BSP
then end in an infinite loop */
beq $k1, $zero, bsp
j bootstrap
nop
/* Record CPU presence */
sll $a2, $k1, 2
addu $a2, $a2, $a0
sw $a1, ($a2)
loop:
j loop
nop
#endif
bsp:
/* Record CPU presence */
sw $a1, ($a0)
/* Setup initial stack */
la $sp, INITIAL_STACK
j bootstrap
nop
/branches/network/boot/arch/mips32/Makefile.inc
28,15 → 28,15
 
build: $(BASE)/image.boot
 
$(BASE)/image.boot: depend arch/$(BARCH)/loader/image.boot
cp arch/$(BARCH)/loader/image.boot $(BASE)/image.boot
$(BASE)/image.boot: depend arch/$(ARCH)/loader/image.boot
cp arch/$(ARCH)/loader/image.boot $(BASE)/image.boot
 
depend:
-rm arch/$(BARCH)/loader/image.boot
-rm arch/$(ARCH)/loader/image.boot
 
arch/$(BARCH)/loader/image.boot:
make -C arch/$(BARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
arch/$(ARCH)/loader/image.boot:
make -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) IMAGE=$(IMAGE)
 
clean:
make -C arch/$(BARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
make -C arch/$(ARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) IMAGE=$(IMAGE)
-rm -f $(BASE)/image.boot
/branches/network/boot/arch/sparc64/loader/Makefile
27,7 → 27,7
#
 
include ../../../../version
-include ../../../../Makefile.config
include ../../../Makefile.config
 
## Toolchain configuration
#
57,8 → 57,16
OBJDUMP = $(TOOLCHAIN_DIR)/$(TARGET)-objdump
endif
 
CFLAGS = -DRELEASE=$(RELEASE) -I. -I../../../generic -I../../../genarch -imacros ../../../../config.h -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -mcpu=ultrasparc -m64 -mno-fpu -pipe
CFLAGS = -DRELEASE=\"$(RELEASE)\" -I. -I../../../generic -I../../../genarch -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -mcpu=ultrasparc -m64
 
ifdef REVISION
CFLAGS += "-DREVISION=\"$(REVISION)\""
endif
 
ifdef TIMESTAMP
CFLAGS += "-DTIMESTAMP=\"$(TIMESTAMP)\""
endif
 
SOURCES = \
main.c \
_components.c \
71,9 → 79,6
asm.S \
boot.S
 
#
# All components that go to image.boot without the ramdisk.
#
COMPONENTS = \
$(KERNELDIR)/kernel.bin \
$(USPACEDIR)/srv/ns/ns \
89,40 → 94,19
COMPONENTS += $(USPACEDIR)/srv/fs/fat/fat
endif
 
#
# Final list of all components that go to image.boot.
#
ALL_COMPONENTS = $(COMPONENTS)
ifeq ($(CONFIG_RD_EXTERNAL),n)
ALL_COMPONENTS += ./initrd.img
endif
 
RD_SRVS = \
RD_TASKS = \
$(USPACEDIR)/srv/fb/fb \
$(USPACEDIR)/srv/kbd/kbd \
$(USPACEDIR)/srv/console/console \
$(USPACEDIR)/srv/fs/tmpfs/tmpfs
 
ifeq ($(MACHINE),generic)
RD_SRVS += \
$(USPACEDIR)/srv/fs/tmpfs/tmpfs \
$(USPACEDIR)/srv/fs/fat/fat \
$(USPACEDIR)/srv/fhc/fhc \
$(USPACEDIR)/srv/obio/obio
endif
 
RD_APPS = \
$(USPACEDIR)/app/tetris/tetris \
$(USPACEDIR)/app/trace/trace \
$(USPACEDIR)/app/tester/tester \
$(USPACEDIR)/app/bdsh/bdsh \
$(USPACEDIR)/app/klog/klog
 
ifeq ($(MACHINE),generic)
RD_APPS += \
$(USPACEDIR)/app/tester/tester
endif
 
OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
ALL_COMPONENT_OBJECTS := $(addsuffix .o,$(basename $(notdir $(ALL_COMPONENTS))))
COMPONENT_OBJECTS := $(addsuffix .o,$(basename $(notdir $(COMPONENTS))))
 
.PHONY: all clean depend
 
130,37 → 114,31
 
-include Makefile.depend
 
image.boot: depend _components.h _link.ld $(ALL_COMPONENT_OBJECTS) $(OBJECTS)
$(LD) -Map image.map -no-check-sections -N -T _link.ld $(ALL_COMPONENT_OBJECTS) $(OBJECTS) -o $@
image.boot: depend _components.h _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS)
$(LD) -Map image.map -no-check-sections -N -T _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS) -o $@
 
depend:
-makedepend -f - -- $(DEFS) $(CFLAGS) -- $(SOURCES) > Makefile.depend 2> /dev/null
-makedepend $(DEFS) $(CFLAGS) -f - $(SOURCES) > Makefile.depend 2> /dev/null
 
clean:
-for file in $(RD_SRVS) ; do \
rm -f $(USPACEDIR)/dist/srv/`basename $$file` ; \
-for task in $(RD_TASKS) ; do \
rm -f $(USPACEDIR)/dist/sbin/`basename $$task` ; \
done
-for file in $(RD_APPS) ; do \
rm -f $(USPACEDIR)/dist/app/`basename $$file` ; \
done
-rm -f _components.h _components.c _link.ld $(ALL_COMPONENT_OBJECTS) $(OBJECTS) initrd.img image.boot image.map image.disasm Makefile.depend
-rm -f _components.h _components.c _link.ld $(COMPONENT_OBJECTS) initrd.o $(OBJECTS) initrd.img image.boot image.map image.disasm Makefile.depend
 
_components.h _components.c _link.ld $(ALL_COMPONENT_OBJECTS): $(COMPONENTS) $(RD_SRVS) $(RD_APPS) _link.ld.in
for file in $(RD_SRVS) ; do \
cp $$file $(USPACEDIR)/dist/srv/ ; \
_components.h _components.c _link.ld $(COMPONENT_OBJECTS) initrd.o: $(COMPONENTS) $(RD_TASKS) _link.ld.in
for task in $(RD_TASKS) ; do \
cp $$task $(USPACEDIR)/dist/sbin/ ; \
done
for file in $(RD_APPS) ; do \
cp $$file $(USPACEDIR)/dist/app/ ; \
done
ifeq ($(RDFMT),tmpfs)
../../../../tools/mktmpfs.py $(USPACEDIR)/dist/ initrd.fs
endif
ifeq ($(RDFMT),fat)
../../../../tools/mkfat.py $(USPACEDIR)/dist/ initrd.fs
../../../../tools/mkfat.sh $(USPACEDIR)/dist/ initrd.fs
endif
../../../../tools/mkhord.py 16384 initrd.fs initrd.img
rm initrd.fs
../../../tools/pack.py $(OBJCOPY) $(BFD_NAME) $(BFD_ARCH) 1 "unsigned long" $(ALL_COMPONENTS)
../../../tools/pack.py $(OBJCOPY) $(BFD_NAME) $(BFD_ARCH) 1 "unsigned long" $(COMPONENTS) ./initrd.img
 
%.o: %.S
$(CC) $(DEFS) $(CFLAGS) -D__ASM__ -c $< -o $@
/branches/network/boot/arch/sparc64/loader/asm.S
105,28 → 105,9
* 1. Make sure that the code we have moved has drained to main memory.
* 2. Invalidate I-cache.
* 3. Flush instruction pipeline.
*/
 
/*
* US3 processors have a write-invalidate cache, so explicitly
* invalidating it is not required. Whether to invalidate I-cache
* or not is decided according to the value of the global
* "subarchitecture" variable (set in the bootstrap).
*/
set subarchitecture, %g2
ldub [%g2], %g2
cmp %g2, 3
be 1f
nop
0:
call icache_flush
nop
1:
membar #StoreStore
/*
* Flush the instruction pipeline.
*/
*/
call icache_flush
membar #StoreStore
flush %i7
 
mov %o0, %l1
153,6 → 134,7
retl
! SF Erratum #51
nop
 
.global ofw
ofw:
save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
/branches/network/boot/arch/sparc64/loader/ofwarch.c
32,7 → 32,7
* @brief Architecture dependent parts of OpenFirmware interface.
*/
 
#include <ofwarch.h>
#include <ofwarch.h>
#include <ofw.h>
#include <printf.h>
#include <string.h>
40,10 → 40,6
#include "main.h"
#include "asm.h"
 
/* these tho variables will be set by the detect_subarchitecture function */
extern uint8_t subarchitecture;
extern uint16_t mid_mask;
 
void write(const char *str, const int len)
{
int i;
60,40 → 56,36
return flag != -1;
}
 
/**
* Starts all CPUs represented by following siblings of the given node,
* except for the current CPU.
*
* @param child The first child of the OFW tree node whose children
* represent CPUs to be woken up.
* @param current_mid MID of the current CPU, the current CPU will
* (of course) not be woken up.
* @return Number of CPUs which have the same parent node as
* "child".
*/
static int wake_cpus_in_node(phandle child, uint64_t current_mid)
int ofw_cpu(void)
{
int cpus;
char type_name[BUF_SIZE];
 
phandle node;
node = ofw_get_child_node(ofw_root);
if (node == 0 || node == -1) {
printf("Could not find any child nodes of the root node.\n");
return 0;
}
for (cpus = 0; child != 0 && child != -1;
child = ofw_get_peer_node(child), cpus++) {
if (ofw_get_property(child, "device_type", type_name,
uint64_t current_mid;
asm volatile ("ldxa [%1] %2, %0\n"
: "=r" (current_mid)
: "r" (0), "i" (ASI_UPA_CONFIG));
current_mid >>= UPA_CONFIG_MID_SHIFT;
current_mid &= UPA_CONFIG_MID_MASK;
 
int cpus;
for (cpus = 0; node != 0 && node != -1; node = ofw_get_peer_node(node),
cpus++) {
if (ofw_get_property(node, "device_type", type_name,
sizeof(type_name)) > 0) {
if (strcmp(type_name, "cpu") == 0) {
uint32_t mid;
/*
* "upa-portid" for US, "portid" for US-III,
* "cpuid" for US-IV
*/
if (ofw_get_property(
child, "upa-portid",
&mid, sizeof(mid)) <= 0
&& ofw_get_property(child, "portid",
&mid, sizeof(mid)) <= 0
&& ofw_get_property(child, "cpuid",
&mid, sizeof(mid)) <= 0)
if (ofw_get_property(node, "upa-portid", &mid,
sizeof(mid)) <= 0)
continue;
if (current_mid != mid) {
101,7 → 93,7
* Start secondary processor.
*/
(void) ofw_call("SUNW,start-cpu", 3, 1,
NULL, child, KERNEL_VIRTUAL_ADDRESS,
NULL, node, KERNEL_VIRTUAL_ADDRESS,
bootinfo.physmem_start |
AP_PROCESSOR);
}
112,59 → 104,12
return cpus;
}
 
/**
* Finds out the current CPU's MID and wakes up all AP processors.
*/
int ofw_cpu(void)
{
int cpus;
phandle node;
phandle subnode;
phandle cpus_parent;
phandle cmp;
char name[BUF_SIZE];
 
/* get the current CPU MID */
uint64_t current_mid;
asm volatile ("ldxa [%1] %2, %0\n"
: "=r" (current_mid)
: "r" (0), "i" (ASI_ICBUS_CONFIG));
current_mid >>= ICBUS_CONFIG_MID_SHIFT;
 
current_mid &= mid_mask;
 
/* wake up CPUs */
cpus_parent = ofw_find_device("/ssm@0,0");
if (cpus_parent == 0 || cpus_parent == -1) {
cpus_parent = ofw_find_device("/");
}
 
node = ofw_get_child_node(cpus_parent);
cpus = wake_cpus_in_node(node, current_mid);
while (node != 0 && node != -1) {
if (ofw_get_property(node, "name", name,
sizeof(name)) > 0) {
if (strcmp(name, "cmp") == 0) {
subnode = ofw_get_child_node(node);
cpus += wake_cpus_in_node(subnode,
current_mid);
}
}
node = ofw_get_peer_node(node);
}
return cpus;
}
 
/** Get physical memory starting address.
*
* @param start Pointer to variable where the physical memory starting
* address will be stored.
* @param start Pointer to variable where the physical memory starting
* address will be stored.
*
* @return Non-zero on succes, zero on failure.
* @return Non-zero on succes, zero on failure.
*/
int ofw_get_physmem_start(uintptr_t *start)
{
/branches/network/boot/arch/sparc64/loader/main.c
36,87 → 36,34
#include <ofw_tree.h>
#include "ofwarch.h"
#include <align.h>
#include <macros.h>
#include <string.h>
 
bootinfo_t bootinfo;
 
component_t components[COMPONENTS];
 
char *release = STRING(RELEASE);
char *release = RELEASE;
 
#ifdef REVISION
char *revision = ", revision " STRING(REVISION);
char *revision = ", revision " REVISION;
#else
char *revision = "";
#endif
 
#ifdef TIMESTAMP
char *timestamp = "\nBuilt on " STRING(TIMESTAMP);
char *timestamp = "\nBuilt on " TIMESTAMP;
#else
char *timestamp = "";
#endif
 
/** UltraSPARC subarchitecture - 1 for US, 3 for US3 */
uint8_t subarchitecture;
 
/**
* mask of the MID field inside the ICBUS_CONFIG register shifted by
* MID_SHIFT bits to the right
*/
uint16_t mid_mask;
 
/** Print version information. */
static void version_print(void)
{
printf("HelenOS SPARC64 Bootloader\nRelease %s%s%s\n"
"Copyright (c) 2006 HelenOS project\n",
release, revision, timestamp);
printf("HelenOS SPARC64 Bootloader\nRelease %s%s%s\nCopyright (c) 2006 HelenOS project\n", release, revision, timestamp);
}
 
/* the lowest ID (read from the VER register) of some US3 CPU model */
#define FIRST_US3_CPU 0x14
 
/* the greatest ID (read from the VER register) of some US3 CPU model */
#define LAST_US3_CPU 0x19
 
/* UltraSPARC IIIi processor implementation code */
#define US_IIIi_CODE 0x15
 
/**
* Sets the global variables "subarchitecture" and "mid_mask" to
* correct values.
*/
static void detect_subarchitecture(void)
{
uint64_t v;
asm volatile ("rdpr %%ver, %0\n" : "=r" (v));
v = (v << 16) >> 48;
if ((v >= FIRST_US3_CPU) && (v <= LAST_US3_CPU)) {
subarchitecture = SUBARCH_US3;
if (v == US_IIIi_CODE)
mid_mask = (1 << 5) - 1;
else
mid_mask = (1 << 10) - 1;
} else if (v < FIRST_US3_CPU) {
subarchitecture = SUBARCH_US;
mid_mask = (1 << 5) - 1;
} else {
printf("\nThis CPU is not supported by HelenOS.");
}
}
 
void bootstrap(void)
{
void *base = (void *) KERNEL_VIRTUAL_ADDRESS;
void *balloc_base;
unsigned int top = 0;
int i, j;
 
version_print();
detect_subarchitecture();
init_components(components);
 
if (!ofw_get_physmem_start(&bootinfo.physmem_start)) {
128,103 → 75,34
printf("Error: unable to get memory map, halting.\n");
halt();
}
 
if (bootinfo.memmap.total == 0) {
printf("Error: no memory detected, halting.\n");
halt();
}
 
/*
* SILO for some reason adds 0x400000 and subtracts
* bootinfo.physmem_start to/from silo_ramdisk_image.
* We just need plain physical address so we fix it up.
*/
if (silo_ramdisk_image) {
silo_ramdisk_image += bootinfo.physmem_start;
silo_ramdisk_image -= 0x400000;
/* Install 1:1 mapping for the ramdisk. */
if (ofw_map((void *)((uintptr_t) silo_ramdisk_image),
(void *)((uintptr_t) silo_ramdisk_image),
silo_ramdisk_size, -1) != 0) {
printf("Failed to map ramdisk.\n");
halt();
}
}
printf("\nSystem info\n");
printf(" memory: %dM starting at %P\n",
bootinfo.memmap.total >> 20, bootinfo.physmem_start);
bootinfo.memmap.total >> 20, bootinfo.physmem_start);
 
printf("\nMemory statistics\n");
printf(" kernel entry point at %P\n", KERNEL_VIRTUAL_ADDRESS);
printf(" %P: boot info structure\n", &bootinfo);
/*
* Figure out destination address for each component.
* In this phase, we don't copy the components yet because we want to
* to be careful not to overwrite anything, especially the components
* which haven't been copied yet.
*/
bootinfo.taskmap.count = 0;
for (i = 0; i < COMPONENTS; i++) {
unsigned int i;
for (i = 0; i < COMPONENTS; i++)
printf(" %P: %s image (size %d bytes)\n", components[i].start,
components[i].name, components[i].size);
top = ALIGN_UP(top, PAGE_SIZE);
if (i > 0) {
if (bootinfo.taskmap.count == TASKMAP_MAX_RECORDS) {
printf("Skipping superfluous components.\n");
break;
}
bootinfo.taskmap.tasks[bootinfo.taskmap.count].addr =
base + top;
bootinfo.taskmap.tasks[bootinfo.taskmap.count].size =
components[i].size;
strncpy(bootinfo.taskmap.tasks[
bootinfo.taskmap.count].name, components[i].name,
BOOTINFO_TASK_NAME_BUFLEN);
bootinfo.taskmap.count++;
}
top += components[i].size;
}
 
j = bootinfo.taskmap.count - 1; /* do not consider ramdisk */
void * base = (void *) KERNEL_VIRTUAL_ADDRESS;
unsigned int top = 0;
 
if (silo_ramdisk_image) {
/* Treat the ramdisk as the last bootinfo task. */
if (bootinfo.taskmap.count == TASKMAP_MAX_RECORDS) {
printf("Skipping ramdisk.\n");
goto skip_ramdisk;
}
printf("\nCopying components\n");
bootinfo.taskmap.count = 0;
for (i = 0; i < COMPONENTS; i++) {
printf(" %s...", components[i].name);
top = ALIGN_UP(top, PAGE_SIZE);
bootinfo.taskmap.tasks[bootinfo.taskmap.count].addr =
base + top;
bootinfo.taskmap.tasks[bootinfo.taskmap.count].size =
silo_ramdisk_size;
bootinfo.taskmap.count++;
printf("\nCopying ramdisk...");
/*
* Claim and map the whole ramdisk as it may exceed the area
* given to us by SILO.
*/
(void) ofw_claim_phys(base + top, silo_ramdisk_size);
(void) ofw_map(bootinfo.physmem_start + base + top, base + top,
silo_ramdisk_size, -1);
memmove(base + top, (void *)((uintptr_t)silo_ramdisk_image),
silo_ramdisk_size);
printf("done.\n");
top += silo_ramdisk_size;
}
skip_ramdisk:
 
/*
* Now we can proceed to copy the components. We do it in reverse order
* so that we don't overwrite anything even if the components overlap
* with base.
*/
printf("\nCopying bootinfo tasks\n");
for (i = COMPONENTS - 1; i > 0; i--, j--) {
printf(" %s...", components[i].name);
 
/*
* At this point, we claim the physical memory that we are
* going to use. We should be safe in case of the virtual
232,41 → 110,36
* SPARC binding, should restrict its use of virtual memory
* to addresses from [0xffd00000; 0xffefffff] and
* [0xfe000000; 0xfeffffff].
*
* XXX We don't map this piece of memory. We simply rely on
* SILO to have it done for us already in this case.
*/
(void) ofw_claim_phys(bootinfo.physmem_start +
bootinfo.taskmap.tasks[j].addr,
(void) ofw_claim_phys(bootinfo.physmem_start + base + top,
ALIGN_UP(components[i].size, PAGE_SIZE));
memcpy((void *)bootinfo.taskmap.tasks[j].addr,
components[i].start, components[i].size);
memcpy(base + top, components[i].start, components[i].size);
if (i > 0) {
bootinfo.taskmap.tasks[bootinfo.taskmap.count].addr =
base + top;
bootinfo.taskmap.tasks[bootinfo.taskmap.count].size =
components[i].size;
bootinfo.taskmap.count++;
}
top += components[i].size;
printf("done.\n");
}
 
printf("\nCopying kernel...");
(void) ofw_claim_phys(bootinfo.physmem_start + base,
ALIGN_UP(components[0].size, PAGE_SIZE));
memcpy(base, components[0].start, components[0].size);
printf("done.\n");
 
/*
* Claim and map the physical memory for the boot allocator.
* Claim the physical memory for the boot allocator.
* Initialize the boot allocator.
*/
balloc_base = base + ALIGN_UP(top, PAGE_SIZE);
(void) ofw_claim_phys(bootinfo.physmem_start + balloc_base,
BALLOC_MAX_SIZE);
(void) ofw_map(bootinfo.physmem_start + balloc_base, balloc_base,
BALLOC_MAX_SIZE, -1);
balloc_init(&bootinfo.ballocs, (uintptr_t)balloc_base);
(void) ofw_claim_phys(bootinfo.physmem_start +
base + ALIGN_UP(top, PAGE_SIZE), BALLOC_MAX_SIZE);
balloc_init(&bootinfo.ballocs, ALIGN_UP(((uintptr_t) base) + top,
PAGE_SIZE));
 
printf("\nCanonizing OpenFirmware device tree...");
bootinfo.ofw_root = ofw_tree_build();
printf("done.\n");
 
#ifdef CONFIG_AP
#ifdef CONFIG_SMP
printf("\nChecking for secondary processors...");
if (!ofw_cpu())
printf("Error: unable to get CPU properties\n");
273,10 → 146,9
printf("done.\n");
#endif
 
ofw_setup_palette();
 
printf("\nBooting the kernel...\n");
jump_to_kernel((void *) KERNEL_VIRTUAL_ADDRESS,
bootinfo.physmem_start | BSP_PROCESSOR, &bootinfo,
sizeof(bootinfo));
}
 
/branches/network/boot/arch/sparc64/loader/boot.S
53,15 → 53,6
.ascii "HdrS"
.word 0
.half 0
.half 0
.half 0
.half 0
.global silo_ramdisk_image
silo_ramdisk_image:
.word 0
.global silo_ramdisk_size
silo_ramdisk_size:
.word 0
 
.align 8
1:
/branches/network/boot/arch/sparc64/loader/main.h
38,19 → 38,12
 
#define TASKMAP_MAX_RECORDS 32
 
/** Size of buffer for storing task name in task_t. */
#define BOOTINFO_TASK_NAME_BUFLEN 32
 
#define BSP_PROCESSOR 1
#define AP_PROCESSOR 0
 
#define SUBARCH_US 1
#define SUBARCH_US3 3
 
typedef struct {
void *addr;
uint32_t size;
char name[BOOTINFO_TASK_NAME_BUFLEN];
} task_t;
 
typedef struct {
66,9 → 59,6
ofw_tree_node_t *ofw_root;
} bootinfo_t;
 
extern uint32_t silo_ramdisk_image;
extern uint32_t silo_ramdisk_size;
 
extern bootinfo_t bootinfo;
 
extern void start(void);
/branches/network/boot/arch/sparc64/loader/register.h
33,7 → 33,8
#define PSTATE_PRIV_BIT 4
#define PSTATE_AM_BIT 8
 
#define ASI_ICBUS_CONFIG 0x4a
#define ICBUS_CONFIG_MID_SHIFT 17
#define ASI_UPA_CONFIG 0x4a
#define UPA_CONFIG_MID_SHIFT 17
#define UPA_CONFIG_MID_MASK 0x1f
 
#endif
/branches/network/boot/arch/sparc64/Makefile.inc
26,40 → 26,26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
TMP = distroot
TMP=distroot
 
ifeq ($(CONFIG_AOUT_ISOFS_B),y)
SILO_PACKAGE = silo.tar.gz
else
SILO_PACKAGE = silo.patched.tar.gz
endif
 
build: $(BASE)/image.iso
 
$(BASE)/image.iso: depend arch/$(BARCH)/loader/image.boot
$(BASE)/image.iso: depend arch/$(ARCH)/loader/image.boot
mkdir -p $(TMP)/boot
mkdir -p $(TMP)/HelenOS
cat arch/$(BARCH)/silo/$(SILO_PACKAGE) | (cd $(TMP)/boot; tar xvfz -)
cp arch/$(BARCH)/silo/README arch/$(BARCH)/silo/COPYING $(TMP)/boot
ifeq ($(CONFIG_RD_EXTERNAL),y)
cp arch/$(BARCH)/silo/silo.conf $(TMP)/boot/silo.conf
else
cat arch/$(BARCH)/silo/silo.conf | grep -v initrd > $(TMP)/boot/silo.conf
endif
cp arch/$(BARCH)/loader/image.boot $(TMP)/HelenOS/image.boot
cat arch/$(ARCH)/silo/silo.tar.gz | (cd $(TMP)/boot; tar xvfz -)
cp arch/$(ARCH)/silo/README arch/$(ARCH)/silo/COPYING arch/$(ARCH)/silo/silo.conf $(TMP)/boot
cp arch/$(ARCH)/loader/image.boot $(TMP)/HelenOS/image.boot
gzip -f $(TMP)/HelenOS/image.boot
ifeq ($(CONFIG_RD_EXTERNAL),y)
cp arch/$(BARCH)/loader/initrd.img $(TMP)/HelenOS/initrd.img
endif
mkisofs -f -G $(TMP)/boot/isofs.b -B ... -r -o $(BASE)/image.iso $(TMP)/
 
depend:
-rm arch/$(BARCH)/loader/image.boot
-rm arch/$(ARCH)/loader/image.boot
 
arch/$(BARCH)/loader/image.boot:
$(MAKE) -C arch/$(BARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
arch/$(ARCH)/loader/image.boot:
$(MAKE) -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) "DEFS=$(DEFS)"
 
clean: generic_clean
$(MAKE) -C arch/$(BARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
$(MAKE) -C arch/$(ARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
-rm -fr $(TMP)
-rm -f $(BASE)/image.iso
/branches/network/boot/arch/sparc64/silo/silo.patched.tar.gz
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Deleted: svn:mime-type
-application/octet-stream
\ No newline at end of property
/branches/network/boot/arch/sparc64/silo/silo.conf
1,4 → 1,3
timeout = 0
image = /HelenOS/image.boot.gz
label = HelenOS
initrd = /HelenOS/initrd.img
/branches/network/boot/arch/amd64/Makefile.inc
40,58 → 40,49
INIT_TASKS += $(USPACEDIR)/srv/fs/fat/fat
endif
 
RD_SRVS = \
RD_TASKS = \
$(USPACEDIR)/srv/pci/pci \
$(USPACEDIR)/srv/fb/fb \
$(USPACEDIR)/srv/kbd/kbd \
$(USPACEDIR)/srv/console/console \
$(USPACEDIR)/srv/fs/tmpfs/tmpfs \
$(USPACEDIR)/srv/fs/fat/fat
 
RD_APPS = \
$(USPACEDIR)/app/tetris/tetris \
$(USPACEDIR)/app/tester/tester \
$(USPACEDIR)/app/trace/trace \
$(USPACEDIR)/app/klog/klog \
$(USPACEDIR)/app/bdsh/bdsh
$(USPACEDIR)/app/bdsh/bdsh \
$(USPACEDIR)/srv/fs/tmpfs/tmpfs \
$(USPACEDIR)/srv/fs/fat/fat
 
build: $(BASE)/image.iso
 
$(BASE)/image.iso: arch/$(BARCH)/grub/stage2_eltorito arch/$(BARCH)/grub/menu.lst $(KERNELDIR)/kernel.bin $(INIT_TASKS) $(RD_SRVS) $(RD_APPS)
mkdir -p arch/$(BARCH)/iso/boot/grub
cp arch/$(BARCH)/grub/stage2_eltorito arch/$(BARCH)/iso/boot/grub/
$(BASE)/image.iso: arch/$(ARCH)/grub/stage2_eltorito arch/$(ARCH)/grub/menu.lst $(KERNELDIR)/kernel.bin $(INIT_TASKS) $(RD_TASKS)
mkdir -p arch/$(ARCH)/iso/boot/grub
cp arch/$(ARCH)/grub/stage2_eltorito arch/$(ARCH)/iso/boot/grub/
ifneq ($(RDFMT),tmpfs)
cat arch/$(BARCH)/grub/menu.lst | grep -v "tmpfs" >arch/$(BARCH)/iso/boot/grub/menu.lst
cat arch/$(ARCH)/grub/menu.lst | grep -v "tmpfs" >arch/$(ARCH)/iso/boot/grub/menu.lst
endif
ifneq ($(RDFMT),fat)
cat arch/$(BARCH)/grub/menu.lst | grep -v "fat" >arch/$(BARCH)/iso/boot/grub/menu.lst
cat arch/$(ARCH)/grub/menu.lst | grep -v "fat" >arch/$(ARCH)/iso/boot/grub/menu.lst
endif
cp $(KERNELDIR)/kernel.bin arch/$(BARCH)/iso/boot/
cp $(KERNELDIR)/kernel.bin arch/$(ARCH)/iso/boot/
for task in $(INIT_TASKS) ; do \
cp $$task arch/$(BARCH)/iso/boot/ ; \
cp $$task arch/$(ARCH)/iso/boot/ ; \
done
for file in $(RD_SRVS) ; do \
cp $$file $(USPACEDIR)/dist/srv/ ; \
for task in $(RD_TASKS) ; do \
cp $$task $(USPACEDIR)/dist/sbin/ ; \
done
for file in $(RD_APPS) ; do \
cp $$file $(USPACEDIR)/dist/app/ ; \
done
ifeq ($(RDFMT),tmpfs)
$(BASE)/tools/mktmpfs.py $(USPACEDIR)/dist/ arch/$(BARCH)/iso/boot/initrd.fs
$(BASE)/tools/mktmpfs.py $(USPACEDIR)/dist/ arch/$(ARCH)/iso/boot/initrd.fs
endif
ifeq ($(RDFMT),fat)
$(BASE)/tools/mkfat.py $(USPACEDIR)/dist/ arch/$(BARCH)/iso/boot/initrd.fs
$(BASE)/tools/mkfat.sh $(USPACEDIR)/dist/ arch/$(ARCH)/iso/boot/initrd.fs
endif
$(BASE)/tools/mkhord.py 4096 arch/$(BARCH)/iso/boot/initrd.fs arch/$(BARCH)/iso/boot/initrd.img
rm arch/$(BARCH)/iso/boot/initrd.fs
mkisofs -J -r -b boot/grub/stage2_eltorito -no-emul-boot -boot-load-size 4 -boot-info-table -o $(BASE)/image.iso arch/$(BARCH)/iso/
$(BASE)/tools/mkhord.py 4096 arch/$(ARCH)/iso/boot/initrd.fs arch/$(ARCH)/iso/boot/initrd.img
rm arch/$(ARCH)/iso/boot/initrd.fs
mkisofs -J -r -b boot/grub/stage2_eltorito -no-emul-boot -boot-load-size 4 -boot-info-table -o $(BASE)/image.iso arch/$(ARCH)/iso/
 
clean:
-for file in $(RD_SRVS) ; do \
rm -f $(USPACEDIR)/dist/srv/`basename $$file` ; \
-for task in $(RD_TASKS) ; do \
rm -f $(USPACEDIR)/dist/sbin/`basename $$task` ; \
done
-for file in $(RD_APPS) ; do \
rm -f $(USPACEDIR)/dist/app/`basename $$file` ; \
done
-rm -fr arch/$(BARCH)/iso
-rm -fr arch/$(ARCH)/iso
-rm -f $(BASE)/image.iso
/branches/network/boot/arch/ia32xen/grub/menu.lst
0,0 → 1,20
default 0
timeout 10
 
title=HelenOS/ia32xen
root (cd)
kernel /boot/xen.gz
module /boot/kernel.bin
module /boot/ns
module /boot/init
module /boot/pci
module /boot/fb
module /boot/kbd
module /boot/console
module /boot/vfs
module /boot/tmpfs
module /boot/fat
module /boot/devmap
module /boot/tetris
module /boot/tester
module /boot/klog
/branches/network/boot/arch/ia32xen/grub/menu.debug.lst
0,0 → 1,16
default 0
timeout 10
 
title=HelenOS/ia32xen
root (cd)
kernel /boot/xen.debug.gz noreboot console=com1,vga com1=auto,8n1,0x3f8
module /boot/kernel.bin
module /boot/ns
module /boot/init
module /boot/pci
module /boot/fb
module /boot/kbd
module /boot/console
module /boot/tetris
module /boot/tester
module /boot/klog
/branches/network/boot/arch/ia32xen/grub/xen.gz
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property
/branches/network/boot/arch/ia32xen/grub/xen.debug.gz
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property
/branches/network/boot/arch/ia32xen/grub/stage2_eltorito
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property
/branches/network/boot/arch/ia32xen/grub/COPYING
0,0 → 1,340
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
 
Copyright (C) 1989, 1991 Free Software Foundation, Inc.
59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
 
Preamble
 
The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
License is intended to guarantee your freedom to share and change free
software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
using it. (Some other Free Software Foundation software is covered by
the GNU Library General Public License instead.) You can apply it to
your programs, too.
 
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
this service if you wish), that you receive source code or can get it
if you want it, that you can change the software or use pieces of it
in new free programs; and that you know you can do these things.
 
To protect your rights, we need to make restrictions that forbid
anyone to deny you these rights or to ask you to surrender the rights.
These restrictions translate to certain responsibilities for you if you
distribute copies of the software, or if you modify it.
 
For example, if you distribute copies of such a program, whether
gratis or for a fee, you must give the recipients all the rights that
you have. You must make sure that they, too, receive or can get the
source code. And you must show them these terms so they know their
rights.
 
We protect your rights with two steps: (1) copyright the software, and
(2) offer you this license which gives you legal permission to copy,
distribute and/or modify the software.
 
Also, for each author's protection and ours, we want to make certain
that everyone understands that there is no warranty for this free
software. If the software is modified by someone else and passed on, we
want its recipients to know that what they have is not the original, so
that any problems introduced by others will not reflect on the original
authors' reputations.
 
Finally, any free program is threatened constantly by software
patents. We wish to avoid the danger that redistributors of a free
program will individually obtain patent licenses, in effect making the
program proprietary. To prevent this, we have made it clear that any
patent must be licensed for everyone's free use or not licensed at all.
 
The precise terms and conditions for copying, distribution and
modification follow.
GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
 
0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License. The "Program", below,
refers to any such program or work, and a "work based on the Program"
means either the Program or any derivative work under copyright law:
that is to say, a work containing the Program or a portion of it,
either verbatim or with modifications and/or translated into another
language. (Hereinafter, translation is included without limitation in
the term "modification".) Each licensee is addressed as "you".
 
Activities other than copying, distribution and modification are not
covered by this License; they are outside its scope. The act of
running the Program is not restricted, and the output from the Program
is covered only if its contents constitute a work based on the
Program (independent of having been made by running the Program).
Whether that is true depends on what the Program does.
 
1. You may copy and distribute verbatim copies of the Program's
source code as you receive it, in any medium, provided that you
conspicuously and appropriately publish on each copy an appropriate
copyright notice and disclaimer of warranty; keep intact all the
notices that refer to this License and to the absence of any warranty;
and give any other recipients of the Program a copy of this License
along with the Program.
 
You may charge a fee for the physical act of transferring a copy, and
you may at your option offer warranty protection in exchange for a fee.
 
2. You may modify your copy or copies of the Program or any portion
of it, thus forming a work based on the Program, and copy and
distribute such modifications or work under the terms of Section 1
above, provided that you also meet all of these conditions:
 
a) You must cause the modified files to carry prominent notices
stating that you changed the files and the date of any change.
 
b) You must cause any work that you distribute or publish, that in
whole or in part contains or is derived from the Program or any
part thereof, to be licensed as a whole at no charge to all third
parties under the terms of this License.
 
c) If the modified program normally reads commands interactively
when run, you must cause it, when started running for such
interactive use in the most ordinary way, to print or display an
announcement including an appropriate copyright notice and a
notice that there is no warranty (or else, saying that you provide
a warranty) and that users may redistribute the program under
these conditions, and telling the user how to view a copy of this
License. (Exception: if the Program itself is interactive but
does not normally print such an announcement, your work based on
the Program is not required to print an announcement.)
These requirements apply to the modified work as a whole. If
identifiable sections of that work are not derived from the Program,
and can be reasonably considered independent and separate works in
themselves, then this License, and its terms, do not apply to those
sections when you distribute them as separate works. But when you
distribute the same sections as part of a whole which is a work based
on the Program, the distribution of the whole must be on the terms of
this License, whose permissions for other licensees extend to the
entire whole, and thus to each and every part regardless of who wrote it.
 
Thus, it is not the intent of this section to claim rights or contest
your rights to work written entirely by you; rather, the intent is to
exercise the right to control the distribution of derivative or
collective works based on the Program.
 
In addition, mere aggregation of another work not based on the Program
with the Program (or with a work based on the Program) on a volume of
a storage or distribution medium does not bring the other work under
the scope of this License.
 
3. You may copy and distribute the Program (or a work based on it,
under Section 2) in object code or executable form under the terms of
Sections 1 and 2 above provided that you also do one of the following:
 
a) Accompany it with the complete corresponding machine-readable
source code, which must be distributed under the terms of Sections
1 and 2 above on a medium customarily used for software interchange; or,
 
b) Accompany it with a written offer, valid for at least three
years, to give any third party, for a charge no more than your
cost of physically performing source distribution, a complete
machine-readable copy of the corresponding source code, to be
distributed under the terms of Sections 1 and 2 above on a medium
customarily used for software interchange; or,
 
c) Accompany it with the information you received as to the offer
to distribute corresponding source code. (This alternative is
allowed only for noncommercial distribution and only if you
received the program in object code or executable form with such
an offer, in accord with Subsection b above.)
 
The source code for a work means the preferred form of the work for
making modifications to it. For an executable work, complete source
code means all the source code for all modules it contains, plus any
associated interface definition files, plus the scripts used to
control compilation and installation of the executable. However, as a
special exception, the source code distributed need not include
anything that is normally distributed (in either source or binary
form) with the major components (compiler, kernel, and so on) of the
operating system on which the executable runs, unless that component
itself accompanies the executable.
 
If distribution of executable or object code is made by offering
access to copy from a designated place, then offering equivalent
access to copy the source code from the same place counts as
distribution of the source code, even though third parties are not
compelled to copy the source along with the object code.
4. You may not copy, modify, sublicense, or distribute the Program
except as expressly provided under this License. Any attempt
otherwise to copy, modify, sublicense or distribute the Program is
void, and will automatically terminate your rights under this License.
However, parties who have received copies, or rights, from you under
this License will not have their licenses terminated so long as such
parties remain in full compliance.
 
5. You are not required to accept this License, since you have not
signed it. However, nothing else grants you permission to modify or
distribute the Program or its derivative works. These actions are
prohibited by law if you do not accept this License. Therefore, by
modifying or distributing the Program (or any work based on the
Program), you indicate your acceptance of this License to do so, and
all its terms and conditions for copying, distributing or modifying
the Program or works based on it.
 
6. Each time you redistribute the Program (or any work based on the
Program), the recipient automatically receives a license from the
original licensor to copy, distribute or modify the Program subject to
these terms and conditions. You may not impose any further
restrictions on the recipients' exercise of the rights granted herein.
You are not responsible for enforcing compliance by third parties to
this License.
 
7. If, as a consequence of a court judgment or allegation of patent
infringement or for any other reason (not limited to patent issues),
conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License. If you cannot
distribute so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you
may not distribute the Program at all. For example, if a patent
license would not permit royalty-free redistribution of the Program by
all those who receive copies directly or indirectly through you, then
the only way you could satisfy both it and this License would be to
refrain entirely from distribution of the Program.
 
If any portion of this section is held invalid or unenforceable under
any particular circumstance, the balance of the section is intended to
apply and the section as a whole is intended to apply in other
circumstances.
 
It is not the purpose of this section to induce you to infringe any
patents or other property right claims or to contest validity of any
such claims; this section has the sole purpose of protecting the
integrity of the free software distribution system, which is
implemented by public license practices. Many people have made
generous contributions to the wide range of software distributed
through that system in reliance on consistent application of that
system; it is up to the author/donor to decide if he or she is willing
to distribute software through any other system and a licensee cannot
impose that choice.
 
This section is intended to make thoroughly clear what is believed to
be a consequence of the rest of this License.
8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
those countries, so that distribution is permitted only in or among
countries not thus excluded. In such case, this License incorporates
the limitation as if written in the body of this License.
 
9. The Free Software Foundation may publish revised and/or new versions
of the General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.
 
Each version is given a distinguishing version number. If the Program
specifies a version number of this License which applies to it and "any
later version", you have the option of following the terms and conditions
either of that version or of any later version published by the Free
Software Foundation. If the Program does not specify a version number of
this License, you may choose any version ever published by the Free Software
Foundation.
 
10. If you wish to incorporate parts of the Program into other free
programs whose distribution conditions are different, write to the author
to ask for permission. For software which is copyrighted by the Free
Software Foundation, write to the Free Software Foundation; we sometimes
make exceptions for this. Our decision will be guided by the two goals
of preserving the free status of all derivatives of our free software and
of promoting the sharing and reuse of software generally.
 
NO WARRANTY
 
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
REPAIR OR CORRECTION.
 
12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
 
END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
 
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
 
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
 
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 
 
Also add information on how to contact you by electronic and paper mail.
 
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
 
Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
 
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
 
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
 
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
 
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
 
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Library General
Public License instead of this License.
/branches/network/boot/arch/ia32xen/grub/README
0,0 → 1,5
For licensing terms of GRUB boot loader see the file COPYING contained
in this directory. Full version of GRUB, including its source code,
can be downloaded from GRUB's project page:
 
http://www.gnu.org/software/grub/
/branches/network/boot/arch/ia32xen/Makefile.inc
0,0 → 1,64
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
TASKS = \
$(USPACEDIR)/srv/ns/ns \
$(USPACEDIR)/srv/pci/pci \
$(USPACEDIR)/srv/fb/fb \
$(USPACEDIR)/srv/kbd/kbd \
$(USPACEDIR)/srv/console/console \
$(USPACEDIR)/srv/vfs/vfs \
$(USPACEDIR)/srv/fs/tmpfs/tmpfs \
$(USPACEDIR)/srv/fs/fat/fat \
$(USPACEDIR)/srv/devmap/devmap \
$(USPACEDIR)/app/init/init \
$(USPACEDIR)/app/tetris/tetris \
$(USPACEDIR)/app/tester/tester \
$(USPACEDIR)/app/klog/klog
 
build: $(BASE)/image.iso
 
$(BASE)/image.iso: arch/$(ARCH)/grub/stage2_eltorito arch/$(ARCH)/grub/menu.lst arch/$(ARCH)/grub/menu.debug.lst arch/$(ARCH)/grub/xen.gz arch/$(ARCH)/grub/xen.debug.gz $(KERNELDIR)/kernel.bin $(TASKS)
mkdir -p arch/$(ARCH)/iso/boot/grub
cp arch/$(ARCH)/grub/stage2_eltorito arch/$(ARCH)/iso/boot/grub/
ifeq ($(CONFIG_DEBUG),y)
cp arch/$(ARCH)/grub/menu.debug.lst arch/$(ARCH)/iso/boot/grub/menu.lst
cp arch/$(ARCH)/grub/xen.debug.gz arch/$(ARCH)/iso/boot/
else
cp arch/$(ARCH)/grub/menu.lst arch/$(ARCH)/iso/boot/grub/
cp arch/$(ARCH)/grub/xen.gz arch/$(ARCH)/iso/boot/
endif
cp $(KERNELDIR)/kernel.bin arch/$(ARCH)/iso/boot/
for task in $(TASKS) ; do \
cp $$task arch/$(ARCH)/iso/boot/ ; \
done
mkisofs -J -r -b boot/grub/stage2_eltorito -no-emul-boot -boot-load-size 4 -boot-info-table -o $(BASE)/image.iso arch/$(ARCH)/iso/
 
clean:
-rm -fr arch/$(ARCH)/iso
-rm -f $(BASE)/image.iso
/branches/network/boot/boot.config
0,0 → 1,84
#
# Copyright (c) 2006 Ondrej Palkovsky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
## General configuration directives
 
# Architecture
@ "amd64" AMD64/Intel EM64T
@ "arm32" ARM 32-bit
@ "ia32" Intel IA-32
@ "ia32xen" Intel IA-32 on Xen hypervisor
@ "ia64" Intel IA-64
@ "mips32" MIPS 32-bit
@ "ppc32" PowerPC 32-bit
@ "ppc64" PowerPC 64-bit
@ "sparc64" Sun UltraSPARC
! ARCH (choice)
 
# Compiler
@ "gcc_cross" GCC Cross-compiler
@ "gcc_native" GCC Native
@ "icc_native" ICC Native
@ "suncc_native" Sun Studio C Compiler
! [ARCH=amd64|ARCH=ia32|ARCH=ia32xen] COMPILER (choice)
# Compiler
@ "gcc_cross" GCC Cross-compiler
@ "gcc_native" GCC Native
@ "icc_native" ICC Native
! [ARCH=ia64] COMPILER (choice)
# Compiler
@ "gcc_cross" GCC Cross-compiler
@ "gcc_native" GCC Native
@ "suncc_native" Sun Studio C Compiler
! [ARCH=sparc64] COMPILER (choice)
# Compiler
@ "gcc_cross" GCC Cross-compiler
@ "gcc_native" GCC Native
! [ARCH=arm32|ARCH=mips32|ARCH=ppc32|ARCH=ppc64] COMPILER (choice)
 
# Start AP processors by the loader
! [ARCH=sparc64] CONFIG_SMP (y/n)
 
# Debug bootloader
! [ARCH=ppc32] CONFIG_DEBUG (n/y)
 
# Use Block Address Translation
! [ARCH=ppc32] CONFIG_BAT (y/n)
 
# Target image
@ "binary" Binary image (MSIM)
@ "ecoff" Ecoff image (GXEmul)
! [ARCH=mips32] IMAGE (choice)
 
# Ramdisk format
@ "tmpfs" TMPFS image
@ "fat" FAT16 image
! RDFMT (choice)
/branches/network/boot/tools/ia32/gen_vga323.c
1,36 → 1,8
/*
* Copyright (c) 2008 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#include <stdio.h>
 
#define RED(i) (((i) >> 5) & ((1 << 3) - 1))
#define GREEN(i) (((i) >> 3) & ((1 << 2) - 1))
#define BLUE(i) ((i) & ((1 << 3) - 1))
#define RED(i) ((i >> 5) & ((1 << 3) - 1))
#define GREEN(i) ((i >> 3) & ((1 << 2) - 1))
#define BLUE(i) (i & ((1 << 3) - 1))
 
int main(int argc, char *argv[]) {
unsigned int i;
/branches/network/boot/tools/ppc32/font-8x16.h
0,0 → 1,38
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef __FONT_8X16_H__
#define __FONT_8X16_H__
 
#define FONT_GLIPHS 256
#define FONT_SCANLINES 16
#define FONT_WIDTH 8
 
extern unsigned char fb_font[FONT_GLIPHS * FONT_SCANLINES];
 
#endif
/branches/network/boot/tools/ppc32/font-8x16.c
0,0 → 1,4641
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#include "font-8x16.h"
 
unsigned char fb_font[FONT_GLIPHS * FONT_SCANLINES] = {
 
/* 0 0x00 '^@' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 1 0x01 '^A' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0x81, /* 10000001 */
0xa5, /* 10100101 */
0x81, /* 10000001 */
0x81, /* 10000001 */
0xbd, /* 10111101 */
0x99, /* 10011001 */
0x81, /* 10000001 */
0x81, /* 10000001 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 2 0x02 '^B' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0xff, /* 11111111 */
0xdb, /* 11011011 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xc3, /* 11000011 */
0xe7, /* 11100111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 3 0x03 '^C' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x6c, /* 01101100 */
0xfe, /* 11111110 */
0xfe, /* 11111110 */
0xfe, /* 11111110 */
0xfe, /* 11111110 */
0x7c, /* 01111100 */
0x38, /* 00111000 */
0x10, /* 00010000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 4 0x04 '^D' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x10, /* 00010000 */
0x38, /* 00111000 */
0x7c, /* 01111100 */
0xfe, /* 11111110 */
0x7c, /* 01111100 */
0x38, /* 00111000 */
0x10, /* 00010000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 5 0x05 '^E' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x3c, /* 00111100 */
0xe7, /* 11100111 */
0xe7, /* 11100111 */
0xe7, /* 11100111 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 6 0x06 '^F' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x7e, /* 01111110 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0x7e, /* 01111110 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 7 0x07 '^G' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x3c, /* 00111100 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 8 0x08 '^H' */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xe7, /* 11100111 */
0xc3, /* 11000011 */
0xc3, /* 11000011 */
0xe7, /* 11100111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
 
/* 9 0x09 '^I' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x3c, /* 00111100 */
0x66, /* 01100110 */
0x42, /* 01000010 */
0x42, /* 01000010 */
0x66, /* 01100110 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 10 0x0a '^J' */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xc3, /* 11000011 */
0x99, /* 10011001 */
0xbd, /* 10111101 */
0xbd, /* 10111101 */
0x99, /* 10011001 */
0xc3, /* 11000011 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
 
/* 11 0x0b '^K' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x1e, /* 00011110 */
0x0e, /* 00001110 */
0x1a, /* 00011010 */
0x32, /* 00110010 */
0x78, /* 01111000 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x78, /* 01111000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 12 0x0c '^L' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x3c, /* 00111100 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x3c, /* 00111100 */
0x18, /* 00011000 */
0x7e, /* 01111110 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 13 0x0d '^M' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x3f, /* 00111111 */
0x33, /* 00110011 */
0x3f, /* 00111111 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x70, /* 01110000 */
0xf0, /* 11110000 */
0xe0, /* 11100000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 14 0x0e '^N' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7f, /* 01111111 */
0x63, /* 01100011 */
0x7f, /* 01111111 */
0x63, /* 01100011 */
0x63, /* 01100011 */
0x63, /* 01100011 */
0x63, /* 01100011 */
0x67, /* 01100111 */
0xe7, /* 11100111 */
0xe6, /* 11100110 */
0xc0, /* 11000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 15 0x0f '^O' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0xdb, /* 11011011 */
0x3c, /* 00111100 */
0xe7, /* 11100111 */
0x3c, /* 00111100 */
0xdb, /* 11011011 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 16 0x10 '^P' */
0x00, /* 00000000 */
0x80, /* 10000000 */
0xc0, /* 11000000 */
0xe0, /* 11100000 */
0xf0, /* 11110000 */
0xf8, /* 11111000 */
0xfe, /* 11111110 */
0xf8, /* 11111000 */
0xf0, /* 11110000 */
0xe0, /* 11100000 */
0xc0, /* 11000000 */
0x80, /* 10000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 17 0x11 '^Q' */
0x00, /* 00000000 */
0x02, /* 00000010 */
0x06, /* 00000110 */
0x0e, /* 00001110 */
0x1e, /* 00011110 */
0x3e, /* 00111110 */
0xfe, /* 11111110 */
0x3e, /* 00111110 */
0x1e, /* 00011110 */
0x0e, /* 00001110 */
0x06, /* 00000110 */
0x02, /* 00000010 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 18 0x12 '^R' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x7e, /* 01111110 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x7e, /* 01111110 */
0x3c, /* 00111100 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 19 0x13 '^S' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x00, /* 00000000 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 20 0x14 '^T' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7f, /* 01111111 */
0xdb, /* 11011011 */
0xdb, /* 11011011 */
0xdb, /* 11011011 */
0x7b, /* 01111011 */
0x1b, /* 00011011 */
0x1b, /* 00011011 */
0x1b, /* 00011011 */
0x1b, /* 00011011 */
0x1b, /* 00011011 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 21 0x15 '^U' */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0x60, /* 01100000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x6c, /* 01101100 */
0x38, /* 00111000 */
0x0c, /* 00001100 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 22 0x16 '^V' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0xfe, /* 11111110 */
0xfe, /* 11111110 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 23 0x17 '^W' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x7e, /* 01111110 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x7e, /* 01111110 */
0x3c, /* 00111100 */
0x18, /* 00011000 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 24 0x18 '^X' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x7e, /* 01111110 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 25 0x19 '^Y' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x7e, /* 01111110 */
0x3c, /* 00111100 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 26 0x1a '^Z' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x0c, /* 00001100 */
0xfe, /* 11111110 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 27 0x1b '^[' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0xfe, /* 11111110 */
0x60, /* 01100000 */
0x30, /* 00110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 28 0x1c '^\' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 29 0x1d '^]' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x28, /* 00101000 */
0x6c, /* 01101100 */
0xfe, /* 11111110 */
0x6c, /* 01101100 */
0x28, /* 00101000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 30 0x1e '^^' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x10, /* 00010000 */
0x38, /* 00111000 */
0x38, /* 00111000 */
0x7c, /* 01111100 */
0x7c, /* 01111100 */
0xfe, /* 11111110 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 31 0x1f '^_' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0xfe, /* 11111110 */
0x7c, /* 01111100 */
0x7c, /* 01111100 */
0x38, /* 00111000 */
0x38, /* 00111000 */
0x10, /* 00010000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 32 0x20 ' ' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 33 0x21 '!' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x3c, /* 00111100 */
0x3c, /* 00111100 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 34 0x22 '"' */
0x00, /* 00000000 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x24, /* 00100100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 35 0x23 '#' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0xfe, /* 11111110 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0xfe, /* 11111110 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 36 0x24 '$' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc2, /* 11000010 */
0xc0, /* 11000000 */
0x7c, /* 01111100 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x86, /* 10000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 37 0x25 '%' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc2, /* 11000010 */
0xc6, /* 11000110 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0xc6, /* 11000110 */
0x86, /* 10000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 38 0x26 '&' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x38, /* 00111000 */
0x76, /* 01110110 */
0xdc, /* 11011100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 39 0x27 ''' */
0x00, /* 00000000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 40 0x28 '(' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x0c, /* 00001100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 41 0x29 ')' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 42 0x2a '*' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x66, /* 01100110 */
0x3c, /* 00111100 */
0xff, /* 11111111 */
0x3c, /* 00111100 */
0x66, /* 01100110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 43 0x2b '+' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x7e, /* 01111110 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 44 0x2c ',' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 45 0x2d '-' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 46 0x2e '.' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 47 0x2f '/' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x02, /* 00000010 */
0x06, /* 00000110 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0xc0, /* 11000000 */
0x80, /* 10000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 48 0x30 '0' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xd6, /* 11010110 */
0xd6, /* 11010110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x6c, /* 01101100 */
0x38, /* 00111000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 49 0x31 '1' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x38, /* 00111000 */
0x78, /* 01111000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 50 0x32 '2' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0x06, /* 00000110 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0xc0, /* 11000000 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 51 0x33 '3' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x3c, /* 00111100 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 52 0x34 '4' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x0c, /* 00001100 */
0x1c, /* 00011100 */
0x3c, /* 00111100 */
0x6c, /* 01101100 */
0xcc, /* 11001100 */
0xfe, /* 11111110 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x1e, /* 00011110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 53 0x35 '5' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xfc, /* 11111100 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 54 0x36 '6' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x60, /* 01100000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xfc, /* 11111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 55 0x37 '7' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0xc6, /* 11000110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 56 0x38 '8' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 57 0x39 '9' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7e, /* 01111110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x0c, /* 00001100 */
0x78, /* 01111000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 58 0x3a ':' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 59 0x3b ';' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 60 0x3c '<' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x06, /* 00000110 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x0c, /* 00001100 */
0x06, /* 00000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 61 0x3d '=' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 62 0x3e '>' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x60, /* 01100000 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x0c, /* 00001100 */
0x06, /* 00000110 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 63 0x3f '?' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 64 0x40 '@' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xde, /* 11011110 */
0xde, /* 11011110 */
0xde, /* 11011110 */
0xdc, /* 11011100 */
0xc0, /* 11000000 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 65 0x41 'A' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x10, /* 00010000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 66 0x42 'B' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfc, /* 11111100 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x7c, /* 01111100 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0xfc, /* 11111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 67 0x43 'C' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x3c, /* 00111100 */
0x66, /* 01100110 */
0xc2, /* 11000010 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc2, /* 11000010 */
0x66, /* 01100110 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 68 0x44 'D' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xf8, /* 11111000 */
0x6c, /* 01101100 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x6c, /* 01101100 */
0xf8, /* 11111000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 69 0x45 'E' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0x66, /* 01100110 */
0x62, /* 01100010 */
0x68, /* 01101000 */
0x78, /* 01111000 */
0x68, /* 01101000 */
0x60, /* 01100000 */
0x62, /* 01100010 */
0x66, /* 01100110 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 70 0x46 'F' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0x66, /* 01100110 */
0x62, /* 01100010 */
0x68, /* 01101000 */
0x78, /* 01111000 */
0x68, /* 01101000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0xf0, /* 11110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 71 0x47 'G' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x3c, /* 00111100 */
0x66, /* 01100110 */
0xc2, /* 11000010 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xde, /* 11011110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x66, /* 01100110 */
0x3a, /* 00111010 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 72 0x48 'H' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 73 0x49 'I' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x3c, /* 00111100 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 74 0x4a 'J' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x1e, /* 00011110 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x78, /* 01111000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 75 0x4b 'K' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xe6, /* 11100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x6c, /* 01101100 */
0x78, /* 01111000 */
0x78, /* 01111000 */
0x6c, /* 01101100 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0xe6, /* 11100110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 76 0x4c 'L' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xf0, /* 11110000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x62, /* 01100010 */
0x66, /* 01100110 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 77 0x4d 'M' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0xee, /* 11101110 */
0xfe, /* 11111110 */
0xfe, /* 11111110 */
0xd6, /* 11010110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 78 0x4e 'N' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0xe6, /* 11100110 */
0xf6, /* 11110110 */
0xfe, /* 11111110 */
0xde, /* 11011110 */
0xce, /* 11001110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 79 0x4f 'O' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 80 0x50 'P' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfc, /* 11111100 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x7c, /* 01111100 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0xf0, /* 11110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 81 0x51 'Q' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xd6, /* 11010110 */
0xde, /* 11011110 */
0x7c, /* 01111100 */
0x0c, /* 00001100 */
0x0e, /* 00001110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 82 0x52 'R' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfc, /* 11111100 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x7c, /* 01111100 */
0x6c, /* 01101100 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0xe6, /* 11100110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 83 0x53 'S' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x60, /* 01100000 */
0x38, /* 00111000 */
0x0c, /* 00001100 */
0x06, /* 00000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 84 0x54 'T' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0x7e, /* 01111110 */
0x5a, /* 01011010 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 85 0x55 'U' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 86 0x56 'V' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x6c, /* 01101100 */
0x38, /* 00111000 */
0x10, /* 00010000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 87 0x57 'W' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xd6, /* 11010110 */
0xd6, /* 11010110 */
0xd6, /* 11010110 */
0xfe, /* 11111110 */
0xee, /* 11101110 */
0x6c, /* 01101100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 88 0x58 'X' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x6c, /* 01101100 */
0x7c, /* 01111100 */
0x38, /* 00111000 */
0x38, /* 00111000 */
0x7c, /* 01111100 */
0x6c, /* 01101100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 89 0x59 'Y' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x3c, /* 00111100 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 90 0x5a 'Z' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0xc6, /* 11000110 */
0x86, /* 10000110 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0xc2, /* 11000010 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 91 0x5b '[' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x3c, /* 00111100 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 92 0x5c '\' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x80, /* 10000000 */
0xc0, /* 11000000 */
0xe0, /* 11100000 */
0x70, /* 01110000 */
0x38, /* 00111000 */
0x1c, /* 00011100 */
0x0e, /* 00001110 */
0x06, /* 00000110 */
0x02, /* 00000010 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 93 0x5d ']' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x3c, /* 00111100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 94 0x5e '^' */
0x10, /* 00010000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 95 0x5f '_' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xff, /* 11111111 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 96 0x60 '`' */
0x00, /* 00000000 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x0c, /* 00001100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 97 0x61 'a' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x78, /* 01111000 */
0x0c, /* 00001100 */
0x7c, /* 01111100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 98 0x62 'b' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xe0, /* 11100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x78, /* 01111000 */
0x6c, /* 01101100 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 99 0x63 'c' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 100 0x64 'd' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x1c, /* 00011100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x3c, /* 00111100 */
0x6c, /* 01101100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 101 0x65 'e' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 102 0x66 'f' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x1c, /* 00011100 */
0x36, /* 00110110 */
0x32, /* 00110010 */
0x30, /* 00110000 */
0x78, /* 01111000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x78, /* 01111000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 103 0x67 'g' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x76, /* 01110110 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x7c, /* 01111100 */
0x0c, /* 00001100 */
0xcc, /* 11001100 */
0x78, /* 01111000 */
0x00, /* 00000000 */
 
/* 104 0x68 'h' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xe0, /* 11100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x6c, /* 01101100 */
0x76, /* 01110110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0xe6, /* 11100110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 105 0x69 'i' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 106 0x6a 'j' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x00, /* 00000000 */
0x0e, /* 00001110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
 
/* 107 0x6b 'k' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xe0, /* 11100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x66, /* 01100110 */
0x6c, /* 01101100 */
0x78, /* 01111000 */
0x78, /* 01111000 */
0x6c, /* 01101100 */
0x66, /* 01100110 */
0xe6, /* 11100110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 108 0x6c 'l' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 109 0x6d 'm' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xec, /* 11101100 */
0xfe, /* 11111110 */
0xd6, /* 11010110 */
0xd6, /* 11010110 */
0xd6, /* 11010110 */
0xd6, /* 11010110 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 110 0x6e 'n' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xdc, /* 11011100 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 111 0x6f 'o' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 112 0x70 'p' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xdc, /* 11011100 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x7c, /* 01111100 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0xf0, /* 11110000 */
0x00, /* 00000000 */
 
/* 113 0x71 'q' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x76, /* 01110110 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x7c, /* 01111100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x1e, /* 00011110 */
0x00, /* 00000000 */
 
/* 114 0x72 'r' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xdc, /* 11011100 */
0x76, /* 01110110 */
0x66, /* 01100110 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0xf0, /* 11110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 115 0x73 's' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0x60, /* 01100000 */
0x38, /* 00111000 */
0x0c, /* 00001100 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 116 0x74 't' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x10, /* 00010000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0xfc, /* 11111100 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x36, /* 00110110 */
0x1c, /* 00011100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 117 0x75 'u' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 118 0x76 'v' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x6c, /* 01101100 */
0x38, /* 00111000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 119 0x77 'w' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xd6, /* 11010110 */
0xd6, /* 11010110 */
0xd6, /* 11010110 */
0xfe, /* 11111110 */
0x6c, /* 01101100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 120 0x78 'x' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0x6c, /* 01101100 */
0x38, /* 00111000 */
0x38, /* 00111000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 121 0x79 'y' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7e, /* 01111110 */
0x06, /* 00000110 */
0x0c, /* 00001100 */
0xf8, /* 11111000 */
0x00, /* 00000000 */
 
/* 122 0x7a 'z' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0xcc, /* 11001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 123 0x7b '{' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x0e, /* 00001110 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x70, /* 01110000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x0e, /* 00001110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 124 0x7c '|' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 125 0x7d '}' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x70, /* 01110000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x0e, /* 00001110 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x70, /* 01110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 126 0x7e '~' */
0x00, /* 00000000 */
0x76, /* 01110110 */
0xdc, /* 11011100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 127 0x7f '' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x10, /* 00010000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 128 0x80 '€' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x3c, /* 00111100 */
0x66, /* 01100110 */
0xc2, /* 11000010 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc2, /* 11000010 */
0x66, /* 01100110 */
0x3c, /* 00111100 */
0x18, /* 00011000 */
0x70, /* 01110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 129 0x81 '' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xcc, /* 11001100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 130 0x82 '‚' */
0x00, /* 00000000 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 131 0x83 'ƒ' */
0x00, /* 00000000 */
0x10, /* 00010000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0x00, /* 00000000 */
0x78, /* 01111000 */
0x0c, /* 00001100 */
0x7c, /* 01111100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 132 0x84 '„' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xcc, /* 11001100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x78, /* 01111000 */
0x0c, /* 00001100 */
0x7c, /* 01111100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 133 0x85 '…' */
0x00, /* 00000000 */
0x60, /* 01100000 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x78, /* 01111000 */
0x0c, /* 00001100 */
0x7c, /* 01111100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 134 0x86 '†' */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0x38, /* 00111000 */
0x00, /* 00000000 */
0x78, /* 01111000 */
0x0c, /* 00001100 */
0x7c, /* 01111100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 135 0x87 '‡' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x18, /* 00011000 */
0x70, /* 01110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 136 0x88 'ˆ' */
0x00, /* 00000000 */
0x10, /* 00010000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 137 0x89 '‰' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 138 0x8a 'Š' */
0x00, /* 00000000 */
0x60, /* 01100000 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 139 0x8b '‹' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x66, /* 01100110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 140 0x8c 'Œ' */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x66, /* 01100110 */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 141 0x8d '' */
0x00, /* 00000000 */
0x60, /* 01100000 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 142 0x8e 'Ž' */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x10, /* 00010000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 143 0x8f '' */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0x38, /* 00111000 */
0x10, /* 00010000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 144 0x90 '' */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0x66, /* 01100110 */
0x62, /* 01100010 */
0x68, /* 01101000 */
0x78, /* 01111000 */
0x68, /* 01101000 */
0x62, /* 01100010 */
0x66, /* 01100110 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 145 0x91 '‘' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xec, /* 11101100 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x7e, /* 01111110 */
0xd8, /* 11011000 */
0xd8, /* 11011000 */
0x6e, /* 01101110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 146 0x92 '’' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x3e, /* 00111110 */
0x6c, /* 01101100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xfe, /* 11111110 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xce, /* 11001110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 147 0x93 '“' */
0x00, /* 00000000 */
0x10, /* 00010000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 148 0x94 '”' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 149 0x95 '•' */
0x00, /* 00000000 */
0x60, /* 01100000 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 150 0x96 '–' */
0x00, /* 00000000 */
0x30, /* 00110000 */
0x78, /* 01111000 */
0xcc, /* 11001100 */
0x00, /* 00000000 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 151 0x97 '—' */
0x00, /* 00000000 */
0x60, /* 01100000 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 152 0x98 '˜' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7e, /* 01111110 */
0x06, /* 00000110 */
0x0c, /* 00001100 */
0x78, /* 01111000 */
0x00, /* 00000000 */
 
/* 153 0x99 '™' */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 154 0x9a 'š' */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 155 0x9b '›' */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 156 0x9c 'œ' */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0x64, /* 01100100 */
0x60, /* 01100000 */
0xf0, /* 11110000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0xe6, /* 11100110 */
0xfc, /* 11111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 157 0x9d '' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x3c, /* 00111100 */
0x18, /* 00011000 */
0x7e, /* 01111110 */
0x18, /* 00011000 */
0x7e, /* 01111110 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 158 0x9e 'ž' */
0x00, /* 00000000 */
0xf8, /* 11111000 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xf8, /* 11111000 */
0xc4, /* 11000100 */
0xcc, /* 11001100 */
0xde, /* 11011110 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 159 0x9f 'Ÿ' */
0x00, /* 00000000 */
0x0e, /* 00001110 */
0x1b, /* 00011011 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x7e, /* 01111110 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0xd8, /* 11011000 */
0x70, /* 01110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 160 0xa0 ' ' */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0x00, /* 00000000 */
0x78, /* 01111000 */
0x0c, /* 00001100 */
0x7c, /* 01111100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 161 0xa1 '¡' */
0x00, /* 00000000 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 162 0xa2 '¢' */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 163 0xa3 '£' */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0x00, /* 00000000 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 164 0xa4 '¤' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x76, /* 01110110 */
0xdc, /* 11011100 */
0x00, /* 00000000 */
0xdc, /* 11011100 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 165 0xa5 '¥' */
0x76, /* 01110110 */
0xdc, /* 11011100 */
0x00, /* 00000000 */
0xc6, /* 11000110 */
0xe6, /* 11100110 */
0xf6, /* 11110110 */
0xfe, /* 11111110 */
0xde, /* 11011110 */
0xce, /* 11001110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 166 0xa6 '¦' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x3c, /* 00111100 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x3e, /* 00111110 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 167 0xa7 '§' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x38, /* 00111000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 168 0xa8 '¨' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x00, /* 00000000 */
0x30, /* 00110000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0xc0, /* 11000000 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x7c, /* 01111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 169 0xa9 '©' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 170 0xaa 'ª' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 171 0xab '«' */
0x00, /* 00000000 */
0x60, /* 01100000 */
0xe0, /* 11100000 */
0x62, /* 01100010 */
0x66, /* 01100110 */
0x6c, /* 01101100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0xdc, /* 11011100 */
0x86, /* 10000110 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x3e, /* 00111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 172 0xac '¬' */
0x00, /* 00000000 */
0x60, /* 01100000 */
0xe0, /* 11100000 */
0x62, /* 01100010 */
0x66, /* 01100110 */
0x6c, /* 01101100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x66, /* 01100110 */
0xce, /* 11001110 */
0x9a, /* 10011010 */
0x3f, /* 00111111 */
0x06, /* 00000110 */
0x06, /* 00000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 173 0xad '­' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x3c, /* 00111100 */
0x3c, /* 00111100 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 174 0xae '®' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x36, /* 00110110 */
0x6c, /* 01101100 */
0xd8, /* 11011000 */
0x6c, /* 01101100 */
0x36, /* 00110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 175 0xaf '¯' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xd8, /* 11011000 */
0x6c, /* 01101100 */
0x36, /* 00110110 */
0x6c, /* 01101100 */
0xd8, /* 11011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 176 0xb0 '°' */
0x11, /* 00010001 */
0x44, /* 01000100 */
0x11, /* 00010001 */
0x44, /* 01000100 */
0x11, /* 00010001 */
0x44, /* 01000100 */
0x11, /* 00010001 */
0x44, /* 01000100 */
0x11, /* 00010001 */
0x44, /* 01000100 */
0x11, /* 00010001 */
0x44, /* 01000100 */
0x11, /* 00010001 */
0x44, /* 01000100 */
0x11, /* 00010001 */
0x44, /* 01000100 */
 
/* 177 0xb1 '±' */
0x55, /* 01010101 */
0xaa, /* 10101010 */
0x55, /* 01010101 */
0xaa, /* 10101010 */
0x55, /* 01010101 */
0xaa, /* 10101010 */
0x55, /* 01010101 */
0xaa, /* 10101010 */
0x55, /* 01010101 */
0xaa, /* 10101010 */
0x55, /* 01010101 */
0xaa, /* 10101010 */
0x55, /* 01010101 */
0xaa, /* 10101010 */
0x55, /* 01010101 */
0xaa, /* 10101010 */
 
/* 178 0xb2 '²' */
0xdd, /* 11011101 */
0x77, /* 01110111 */
0xdd, /* 11011101 */
0x77, /* 01110111 */
0xdd, /* 11011101 */
0x77, /* 01110111 */
0xdd, /* 11011101 */
0x77, /* 01110111 */
0xdd, /* 11011101 */
0x77, /* 01110111 */
0xdd, /* 11011101 */
0x77, /* 01110111 */
0xdd, /* 11011101 */
0x77, /* 01110111 */
0xdd, /* 11011101 */
0x77, /* 01110111 */
 
/* 179 0xb3 '³' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 180 0xb4 '´' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0xf8, /* 11111000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 181 0xb5 'µ' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0xf8, /* 11111000 */
0x18, /* 00011000 */
0xf8, /* 11111000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 182 0xb6 '¶' */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0xf6, /* 11110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
 
/* 183 0xb7 '·' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
 
/* 184 0xb8 '¸' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xf8, /* 11111000 */
0x18, /* 00011000 */
0xf8, /* 11111000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 185 0xb9 '¹' */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0xf6, /* 11110110 */
0x06, /* 00000110 */
0xf6, /* 11110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
 
/* 186 0xba 'º' */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
 
/* 187 0xbb '»' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0x06, /* 00000110 */
0xf6, /* 11110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
 
/* 188 0xbc '¼' */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0xf6, /* 11110110 */
0x06, /* 00000110 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 189 0xbd '½' */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 190 0xbe '¾' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0xf8, /* 11111000 */
0x18, /* 00011000 */
0xf8, /* 11111000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 191 0xbf '¿' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xf8, /* 11111000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 192 0xc0 'À' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x1f, /* 00011111 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 193 0xc1 'Á' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0xff, /* 11111111 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 194 0xc2 'Â' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xff, /* 11111111 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 195 0xc3 'Ã' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x1f, /* 00011111 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 196 0xc4 'Ä' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xff, /* 11111111 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 197 0xc5 'Å' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0xff, /* 11111111 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 198 0xc6 'Æ' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x1f, /* 00011111 */
0x18, /* 00011000 */
0x1f, /* 00011111 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 199 0xc7 'Ç' */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x37, /* 00110111 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
 
/* 200 0xc8 'È' */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x37, /* 00110111 */
0x30, /* 00110000 */
0x3f, /* 00111111 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 201 0xc9 'É' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x3f, /* 00111111 */
0x30, /* 00110000 */
0x37, /* 00110111 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
 
/* 202 0xca 'Ê' */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0xf7, /* 11110111 */
0x00, /* 00000000 */
0xff, /* 11111111 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 203 0xcb 'Ë' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xff, /* 11111111 */
0x00, /* 00000000 */
0xf7, /* 11110111 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
 
/* 204 0xcc 'Ì' */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x37, /* 00110111 */
0x30, /* 00110000 */
0x37, /* 00110111 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
 
/* 205 0xcd 'Í' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xff, /* 11111111 */
0x00, /* 00000000 */
0xff, /* 11111111 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 206 0xce 'Î' */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0xf7, /* 11110111 */
0x00, /* 00000000 */
0xf7, /* 11110111 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
 
/* 207 0xcf 'Ï' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0xff, /* 11111111 */
0x00, /* 00000000 */
0xff, /* 11111111 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 208 0xd0 'Ð' */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0xff, /* 11111111 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 209 0xd1 'Ñ' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xff, /* 11111111 */
0x00, /* 00000000 */
0xff, /* 11111111 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 210 0xd2 'Ò' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xff, /* 11111111 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
 
/* 211 0xd3 'Ó' */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x3f, /* 00111111 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 212 0xd4 'Ô' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x1f, /* 00011111 */
0x18, /* 00011000 */
0x1f, /* 00011111 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 213 0xd5 'Õ' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x1f, /* 00011111 */
0x18, /* 00011000 */
0x1f, /* 00011111 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 214 0xd6 'Ö' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x3f, /* 00111111 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
 
/* 215 0xd7 '×' */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0xff, /* 11111111 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
 
/* 216 0xd8 'Ø' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0xff, /* 11111111 */
0x18, /* 00011000 */
0xff, /* 11111111 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 217 0xd9 'Ù' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0xf8, /* 11111000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 218 0xda 'Ú' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x1f, /* 00011111 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 219 0xdb 'Û' */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
 
/* 220 0xdc 'Ü' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
 
/* 221 0xdd 'Ý' */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
0xf0, /* 11110000 */
 
/* 222 0xde 'Þ' */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
0x0f, /* 00001111 */
 
/* 223 0xdf 'ß' */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0xff, /* 11111111 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 224 0xe0 'à' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x76, /* 01110110 */
0xdc, /* 11011100 */
0xd8, /* 11011000 */
0xd8, /* 11011000 */
0xd8, /* 11011000 */
0xdc, /* 11011100 */
0x76, /* 01110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 225 0xe1 'á' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x78, /* 01111000 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xcc, /* 11001100 */
0xd8, /* 11011000 */
0xcc, /* 11001100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xcc, /* 11001100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 226 0xe2 'â' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0xc0, /* 11000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 227 0xe3 'ã' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 228 0xe4 'ä' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0xc6, /* 11000110 */
0x60, /* 01100000 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 229 0xe5 'å' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0xd8, /* 11011000 */
0xd8, /* 11011000 */
0xd8, /* 11011000 */
0xd8, /* 11011000 */
0xd8, /* 11011000 */
0x70, /* 01110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 230 0xe6 'æ' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x7c, /* 01111100 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0xc0, /* 11000000 */
0x00, /* 00000000 */
 
/* 231 0xe7 'ç' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x76, /* 01110110 */
0xdc, /* 11011100 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 232 0xe8 'è' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0x18, /* 00011000 */
0x3c, /* 00111100 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x3c, /* 00111100 */
0x18, /* 00011000 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 233 0xe9 'é' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xfe, /* 11111110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x6c, /* 01101100 */
0x38, /* 00111000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 234 0xea 'ê' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0xee, /* 11101110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 235 0xeb 'ë' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x1e, /* 00011110 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x0c, /* 00001100 */
0x3e, /* 00111110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x66, /* 01100110 */
0x3c, /* 00111100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 236 0xec 'ì' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0xdb, /* 11011011 */
0xdb, /* 11011011 */
0xdb, /* 11011011 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 237 0xed 'í' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x03, /* 00000011 */
0x06, /* 00000110 */
0x7e, /* 01111110 */
0xdb, /* 11011011 */
0xdb, /* 11011011 */
0xf3, /* 11110011 */
0x7e, /* 01111110 */
0x60, /* 01100000 */
0xc0, /* 11000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 238 0xee 'î' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x1c, /* 00011100 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x7c, /* 01111100 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x60, /* 01100000 */
0x30, /* 00110000 */
0x1c, /* 00011100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 239 0xef 'ï' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7c, /* 01111100 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0xc6, /* 11000110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 240 0xf0 'ð' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0xfe, /* 11111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 241 0xf1 'ñ' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x7e, /* 01111110 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 242 0xf2 'ò' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x0c, /* 00001100 */
0x06, /* 00000110 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 243 0xf3 'ó' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x30, /* 00110000 */
0x60, /* 01100000 */
0x30, /* 00110000 */
0x18, /* 00011000 */
0x0c, /* 00001100 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 244 0xf4 'ô' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x0e, /* 00001110 */
0x1b, /* 00011011 */
0x1b, /* 00011011 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
 
/* 245 0xf5 'õ' */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0xd8, /* 11011000 */
0xd8, /* 11011000 */
0xd8, /* 11011000 */
0x70, /* 01110000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 246 0xf6 'ö' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 247 0xf7 '÷' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x76, /* 01110110 */
0xdc, /* 11011100 */
0x00, /* 00000000 */
0x76, /* 01110110 */
0xdc, /* 11011100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 248 0xf8 'ø' */
0x00, /* 00000000 */
0x38, /* 00111000 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x38, /* 00111000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 249 0xf9 'ù' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 250 0xfa 'ú' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x18, /* 00011000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 251 0xfb 'û' */
0x00, /* 00000000 */
0x0f, /* 00001111 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0x0c, /* 00001100 */
0xec, /* 11101100 */
0x6c, /* 01101100 */
0x6c, /* 01101100 */
0x3c, /* 00111100 */
0x1c, /* 00011100 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 252 0xfc 'ü' */
0x00, /* 00000000 */
0x6c, /* 01101100 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x36, /* 00110110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 253 0xfd 'ý' */
0x00, /* 00000000 */
0x3c, /* 00111100 */
0x66, /* 01100110 */
0x0c, /* 00001100 */
0x18, /* 00011000 */
0x32, /* 00110010 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 254 0xfe 'þ' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x7e, /* 01111110 */
0x7e, /* 01111110 */
0x7e, /* 01111110 */
0x7e, /* 01111110 */
0x7e, /* 01111110 */
0x7e, /* 01111110 */
0x7e, /* 01111110 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
/* 255 0xff 'ÿ' */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
0x00, /* 00000000 */
 
};
/branches/network/boot/tools/ppc32/debug.c
0,0 → 1,68
#include "font-8x16.h"
 
#define FB_REG "r8"
#define SCAN_REG "r9"
 
#define ADDR_REG "r10"
#define FG_REG "r11"
#define BG_REG "r12"
 
#define FG_COLOR 0xffffffff
#define BG_COLOR 0x00000000
 
#define BPP 4
 
void print_macro_init(void) {
printf(".macro DEBUG_INIT\n");
printf("#ifdef CONFIG_DEBUG\n");
printf("\tlis %s, %d\n", FG_REG, FG_COLOR >> 16);
printf("\tori %s, %s, %d\n", FG_REG, FG_REG, FG_COLOR & 0xffff);
printf("\t\n");
printf("\tlis %s, %d\n", BG_REG, BG_COLOR >> 16);
printf("\tori %s, %s, %d\n", BG_REG, BG_REG, BG_COLOR & 0xffff);
printf("\t\n");
printf("\tmr %s, %s\n", ADDR_REG, FB_REG);
printf("#endif\n");
printf(".endm\n");
}
 
void print_macro(const char *name) {
printf(".macro DEBUG_%s\n", name);
printf("#ifdef CONFIG_DEBUG\n");
unsigned int y;
for (y = 0; y < FONT_SCANLINES; y++) {
printf("\t\n");
if (y > 0)
printf("\tadd %s, %s, %s\n", ADDR_REG, ADDR_REG, SCAN_REG);
unsigned int i;
for (i = 0; name[i] != 0; i++) {
char c = name[i];
unsigned int x;
for (x = 0; x < FONT_WIDTH; x++) {
if (((fb_font[c * FONT_SCANLINES + y] >> (FONT_WIDTH - x)) & 1) == 1)
printf("\tstw %s, %d(%s)\n", FG_REG, (i * FONT_WIDTH + x) * BPP, ADDR_REG);
else
printf("\tstw %s, %d(%s)\n", BG_REG, (i * FONT_WIDTH + x) * BPP, ADDR_REG);
}
}
}
printf("#endif\n");
printf(".endm\n");
}
 
int main(int argc, char *argv[]) {
print_macro_init();
int i;
for (i = 1; i < argc; i++) {
printf("\n");
print_macro(argv[i]);
}
return 0;
}
/branches/network/boot/tools/ppc32/Makefile
0,0 → 1,8
debug: debug.o font-8x16.o
gcc -o debug debug.o font-8x16.o
 
debug.o: debug.c font-8x16.h
gcc -c -o debug.o debug.c
 
font-8x16.o: font-8x16.c font-8x16.h
gcc -c -o font-8x16.o font-8x16.c
/branches/network/boot/tools/ia64/vmaxlma.c
0,0 → 1,75
/*
* Swap VMA and LMA in ELF header.
*
* by Jakub Jermar <jermar@itbs.cz>
*
* GPL'ed, copyleft
*/
 
/*
* HP's IA-64 simulator Ski seems to confuse VMA and LMA in the ELF header.
* Instead of using LMA, Ski loads sections at their VMA addresses.
* This short program provides a workaround for this bug by simply
* swapping VMA and LMA in the ELF header of the executable.
*
* Note that after applying this workaround, you will be able to load
* ELF objects with different VMA and LMA in Ski, but the executable
* will become wronged for other potential uses.
*/
#include <stdio.h>
#include <stdlib.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/mman.h>
#include <unistd.h>
#include <fcntl.h>
 
void syntax(char *prg)
{
printf("%s ELF-file\n", prg);
exit(1);
}
 
void error(char *msg)
{
printf("Error: %s\n", msg);
exit(2);
}
 
#define ELF_VMA (0x50/sizeof(unsigned long long))
#define ELF_LMA (0x58/sizeof(unsigned long long))
#define ELF_ENTRY (0x18/sizeof(unsigned long long))
 
#define LENGTH 0x98
 
int main(int argc, char *argv[])
{
int fd;
unsigned long long vma, lma,entry;
unsigned long long *elf;
 
if (argc != 2)
syntax(argv[0]);
fd = open(argv[1], O_RDWR);
if (fd == -1)
error("open failed");
 
elf = mmap(NULL, LENGTH, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
if ((void *) elf == (void *) -1)
error("map failed");
lma = elf[ELF_LMA];
elf[ELF_VMA] = lma;
entry = lma;
elf[ELF_ENTRY] = entry;
if (munmap(elf, LENGTH) == -1)
error("munmap failed");
if (close(fd) == -1)
error("close failed");
return 0;
}
/branches/network/boot/genarch/ofw.h
74,7 → 74,7
typedef struct {
void *addr;
uint32_t size;
} macio_t;
} keyboard_t;
 
typedef struct {
uint32_t info;
122,8 → 122,7
extern int ofw_map(const void *phys, const void *virt, const int size, const int mode);
extern int ofw_memmap(memmap_t *map);
extern int ofw_screen(screen_t *screen);
extern int ofw_macio(macio_t *macio);
extern int ofw_setup_palette(void);
extern int ofw_keyboard(keyboard_t *keyboard);
extern void ofw_quiesce(void);
 
#endif
/branches/network/boot/genarch/balloc.h
31,7 → 31,7
 
#include <types.h>
 
#define BALLOC_MAX_SIZE (128 * 1024)
#define BALLOC_MAX_SIZE (1024 * 1024)
 
typedef struct {
uintptr_t base;
/branches/network/boot/genarch/ofw.c
25,7 → 25,7
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#include <ofw.h>
#include <ofwarch.h>
#include <printf.h>
48,8 → 48,7
if (ofw_chosen == -1)
halt();
if (ofw_get_property(ofw_chosen, "stdout", &ofw_stdout,
sizeof(ofw_stdout)) <= 0)
if (ofw_get_property(ofw_chosen, "stdout", &ofw_stdout, sizeof(ofw_stdout)) <= 0)
ofw_stdout = 0;
ofw_root = ofw_find_device("/");
58,13 → 57,11
halt();
}
if (ofw_get_property(ofw_chosen, "mmu", &ofw_mmu,
sizeof(ofw_mmu)) <= 0) {
if (ofw_get_property(ofw_chosen, "mmu", &ofw_mmu, sizeof(ofw_mmu)) <= 0) {
puts("\r\nError: Unable to get mmu property, halted.\r\n");
halt();
}
if (ofw_get_property(ofw_chosen, "memory", &ofw_memory_prop,
sizeof(ofw_memory_prop)) <= 0) {
if (ofw_get_property(ofw_chosen, "memory", &ofw_memory_prop, sizeof(ofw_memory_prop)) <= 0) {
puts("\r\nError: Unable to get memory property, halted.\r\n");
halt();
}
84,18 → 81,14
 
/** Perform a call to OpenFirmware client interface.
*
* @param service String identifying the service requested.
* @param nargs Number of input arguments.
* @param nret Number of output arguments. This includes the return
* value.
* @param rets Buffer for output arguments or NULL. The buffer must
* accommodate nret - 1 items.
* @param service String identifying the service requested.
* @param nargs Number of input arguments.
* @param nret Number of output arguments. This includes the return value.
* @param rets Buffer for output arguments or NULL. The buffer must accommodate nret - 1 items.
*
* @return Return value returned by the client interface.
* @return Return value returned by the client interface.
*/
unsigned long
ofw_call(const char *service, const int nargs, const int nret, ofw_arg_t *rets,
...)
unsigned long ofw_call(const char *service, const int nargs, const int nret, ofw_arg_t *rets, ...)
{
va_list list;
ofw_args_t args;
126,9 → 119,7
return ofw_call("finddevice", 1, 1, NULL, name);
}
 
int
ofw_get_property(const phandle device, const char *name, void *buf,
const int buflen)
int ofw_get_property(const phandle device, const char *name, void *buf, const int buflen)
{
return ofw_call("getprop", 4, 1, NULL, device, name, buf, buflen);
}
153,8 → 144,7
unsigned int ret = 1;
if (ofw_get_property(device, "#address-cells", &ret, sizeof(ret)) <= 0)
if (ofw_get_property(ofw_root, "#address-cells", &ret,
sizeof(ret)) <= 0)
if (ofw_get_property(ofw_root, "#address-cells", &ret, sizeof(ret)) <= 0)
ret = OFW_ADDRESS_CELLS;
return ret;
166,8 → 156,7
unsigned int ret;
if (ofw_get_property(device, "#size-cells", &ret, sizeof(ret)) <= 0)
if (ofw_get_property(ofw_root, "#size-cells", &ret,
sizeof(ret)) <= 0)
if (ofw_get_property(ofw_root, "#size-cells", &ret, sizeof(ret)) <= 0)
ret = OFW_SIZE_CELLS;
return ret;
203,8 → 192,7
ofw_arg_t result[4];
int shift;
 
if (ofw_call("call-method", 4, 5, result, "translate", ofw_mmu,
virt, 0) != 0) {
if (ofw_call("call-method", 3, 5, result, "translate", ofw_mmu, virt) != 0) {
puts("Error: MMU method translate() failed, halting.\n");
halt();
}
224,8 → 212,7
{
ofw_arg_t retaddr;
 
if (ofw_call("call-method", 5, 2, &retaddr, "claim", ofw_mmu, 0, len,
virt) != 0) {
if (ofw_call("call-method", 5, 2, &retaddr, "claim", ofw_mmu, 0, len, virt) != 0) {
puts("Error: MMU method claim() failed, halting.\n");
halt();
}
282,8 → 269,8
phys_lo = (uintptr_t) phys;
}
 
return ofw_call("call-method", 7, 1, NULL, "map", ofw_mmu, mode, size,
virt, phys_hi, phys_lo);
return ofw_call("call-method", 7, 1, NULL, "map", ofw_mmu, mode, size, virt,
phys_hi, phys_lo);
}
 
/** Save OpenFirmware physical memory map.
294,12 → 281,10
*/
int ofw_memmap(memmap_t *map)
{
unsigned int ac = ofw_get_address_cells(ofw_memory) /
(sizeof(uintptr_t) / sizeof(uint32_t));
unsigned int sc = ofw_get_size_cells(ofw_memory) /
(sizeof(uintptr_t) / sizeof(uint32_t));
unsigned int ac = ofw_get_address_cells(ofw_memory);
unsigned int sc = ofw_get_size_cells(ofw_memory);
 
uintptr_t buf[((ac + sc) * MEMMAP_MAX_RECORDS)];
uint32_t buf[((ac + sc) * MEMMAP_MAX_RECORDS)];
int ret = ofw_get_property(ofw_memory, "reg", buf, sizeof(buf));
if (ret <= 0) /* ret is the number of written bytes */
return false;
307,22 → 292,11
int pos;
map->total = 0;
map->count = 0;
for (pos = 0; (pos < ret / sizeof(uintptr_t)) &&
for (pos = 0; (pos < ret / sizeof(uint32_t)) &&
(map->count < MEMMAP_MAX_RECORDS); pos += ac + sc) {
void *start = (void *) (buf[pos + ac - 1]);
void * start = (void *) ((uintptr_t) buf[pos + ac - 1]);
unsigned int size = buf[pos + ac + sc - 1];
 
/*
* This is a hot fix of the issue which occurs on machines
* where there are holes in the physical memory (such as
* SunBlade 1500). Should we detect a hole in the physical
* memory, we will ignore any memory detected behind
* the hole and pretend the hole does not exist.
*/
if ((map->count > 0) && (map->zones[map->count - 1].start +
map->zones[map->count - 1].size < start))
break;
 
if (size > 0) {
map->zones[map->count].start = start;
map->zones[map->count].size = size;
334,13 → 308,13
return true;
}
 
 
int ofw_screen(screen_t *screen)
{
char device_name[BUF_SIZE];
uint32_t virtaddr;
if (ofw_get_property(ofw_aliases, "screen", device_name,
sizeof(device_name)) <= 0)
if (ofw_get_property(ofw_aliases, "screen", device_name, sizeof(device_name)) <= 0)
return false;
phandle device = ofw_find_device(device_name);
347,78 → 321,27
if (device == -1)
return false;
if (ofw_get_property(device, "address", &virtaddr,
sizeof(virtaddr)) <= 0)
if (ofw_get_property(device, "address", &virtaddr, sizeof(virtaddr)) <= 0)
return false;
 
screen->addr = (void *) ((uintptr_t) virtaddr);
 
if (ofw_get_property(device, "width", &screen->width,
sizeof(screen->width)) <= 0)
if (ofw_get_property(device, "width", &screen->width, sizeof(screen->width)) <= 0)
return false;
if (ofw_get_property(device, "height", &screen->height,
sizeof(screen->height)) <= 0)
if (ofw_get_property(device, "height", &screen->height, sizeof(screen->height)) <= 0)
return false;
if (ofw_get_property(device, "depth", &screen->bpp,
sizeof(screen->bpp)) <= 0)
if (ofw_get_property(device, "depth", &screen->bpp, sizeof(screen->bpp)) <= 0)
return false;
if (ofw_get_property(device, "linebytes", &screen->scanline,
sizeof(screen->scanline)) <= 0)
if (ofw_get_property(device, "linebytes", &screen->scanline, sizeof(screen->scanline)) <= 0)
return false;
return true;
}
 
#define RED(i) (((i) >> 5) & ((1 << 3) - 1))
#define GREEN(i) (((i) >> 3) & ((1 << 2) - 1))
#define BLUE(i) ((i) & ((1 << 3) - 1))
#define CLIP(i) ((i) <= 255 ? (i) : 255)
 
 
/**
* Sets up the palette for the 8-bit color depth configuration so that the
* 3:2:3 color scheme can be used. Checks that setting the palette makes sense
* (appropriate nodes exist in the OBP tree and the color depth is not greater
* than 8).
*
* @return true if the palette has been set, false otherwise
*
*/
int ofw_setup_palette(void)
{
char device_name[BUF_SIZE];
/* resolve alias */
if (ofw_get_property(ofw_aliases, "screen", device_name,
sizeof(device_name)) <= 0)
return false;
/* for depth greater than 8 it makes no sense to set up the palette */
uint32_t depth;
phandle device = ofw_find_device(device_name);
if (device == -1)
return false;
if (ofw_get_property(device, "depth", &depth, sizeof(uint32_t)) <= 0)
return false;
if (depth != 8)
return false;
/* required in order to be able to make a method call */
ihandle screen = ofw_open(device_name);
if (screen == -1)
return false;
/* setup the palette so that the (inverted) 3:2:3 scheme is usable */
unsigned int i;
for (i = 0; i < 256; i++)
ofw_call("call-method", 6, 1, NULL, "color!", screen,
255 - i, CLIP(BLUE(i) * 37), GREEN(i) * 85, CLIP(RED(i) * 37));
return true;
}
 
void ofw_quiesce(void)
{
ofw_call("quiesce", 0, 0, NULL);
/branches/network/boot/genarch/ofw_tree.c
42,11 → 42,10
 
static ofw_tree_property_t *ofw_tree_properties_alloc(unsigned count)
{
return balloc(count * sizeof(ofw_tree_property_t),
sizeof(ofw_tree_property_t));
return balloc(count * sizeof(ofw_tree_property_t), sizeof(ofw_tree_property_t));
}
 
static void *ofw_tree_space_alloc(size_t size)
static void * ofw_tree_space_alloc(size_t size)
{
char *addr;
 
66,26 → 65,23
return addr;
}
 
/** Transfer information from one OpenFirmware node into its memory
* representation.
/** Transfer information from one OpenFirmware node into its memory representation.
*
* Transfer entire information from the OpenFirmware device tree 'current' node
* to its memory representation in 'current_node'. This function recursively
* processes all node's children. Node's peers are processed iteratively in
* order to prevent stack from overflowing.
* Transfer entire information from the OpenFirmware device tree 'current' node to
* its memory representation in 'current_node'. This function recursively processes
* all node's children. Node's peers are processed iteratively in order to prevent
* stack from overflowing.
*
* @param current_node Pointer to uninitialized ofw_tree_node structure that
* will become the memory represenation of 'current'.
* @param parent_node Parent ofw_tree_node structure or NULL in case of root
* node.
* @param current_node Pointer to uninitialized ofw_tree_node structure that will
* become the memory represenation of 'current'.
* @param parent_node Parent ofw_tree_node structure or NULL in case of root node.
* @param current OpenFirmware phandle to the current device tree node.
*/
static void ofw_tree_node_process(ofw_tree_node_t *current_node,
ofw_tree_node_t *parent_node, phandle current)
ofw_tree_node_t *parent_node, phandle current)
{
static char path[MAX_PATH_LEN + 1];
static char path[MAX_PATH_LEN+1];
static char name[OFW_TREE_PROPERTY_MAX_NAMELEN];
static char name2[OFW_TREE_PROPERTY_MAX_NAMELEN];
phandle peer;
phandle child;
size_t len;
125,6 → 121,7
memcpy(current_node->da_name, &path[i], len);
current_node->da_name[len] = '\0';
/*
* Recursively process the potential child node.
*/
134,8 → 131,7
child_node = ofw_tree_node_alloc();
if (child_node) {
ofw_tree_node_process(child_node, current_node,
child);
ofw_tree_node_process(child_node, current_node, child);
current_node->child = child_node;
}
}
144,11 → 140,9
* Count properties.
*/
name[0] = '\0';
while (ofw_next_property(current, name, name2) == 1) {
while (ofw_next_property(current, name, name) == 1)
current_node->properties++;
memcpy(name, name2, OFW_TREE_PROPERTY_MAX_NAMELEN);
}
 
if (!current_node->properties)
return;
155,23 → 149,20
/*
* Copy properties.
*/
current_node->property =
ofw_tree_properties_alloc(current_node->properties);
current_node->property = ofw_tree_properties_alloc(current_node->properties);
if (!current_node->property)
return;
name[0] = '\0';
for (i = 0; ofw_next_property(current, name, name2) == 1; i++) {
for (i = 0; ofw_next_property(current, name, name) == 1; i++) {
size_t size;
if (i == current_node->properties)
break;
memcpy(name, name2, OFW_TREE_PROPERTY_MAX_NAMELEN);
memcpy(current_node->property[i].name, name,
OFW_TREE_PROPERTY_MAX_NAMELEN);
current_node->property[i].name[
OFW_TREE_PROPERTY_MAX_NAMELEN] = '\0';
OFW_TREE_PROPERTY_MAX_NAMELEN);
current_node->property[i].name[OFW_TREE_PROPERTY_MAX_NAMELEN] = '\0';
 
size = ofw_get_proplen(current, name);
current_node->property[i].size = size;
183,8 → 174,7
/*
* Copy property value to memory node.
*/
(void) ofw_get_property(current, name,
buf, size);
(void) ofw_get_property(current, name, buf, size);
}
} else {
current_node->property[i].value = NULL;
191,8 → 181,7
}
}
 
/* Just in case we ran out of memory. */
current_node->properties = i;
current_node->properties = i; /* Just in case we ran out of memory. */
 
/*
* Iteratively process the next peer node.
225,33 → 214,15
 
/** Construct memory representation of OpenFirmware device tree.
*
* @return NULL on failure or pointer to the root node.
* @return NULL on failure or pointer to the root node.
*/
ofw_tree_node_t *ofw_tree_build(void)
{
ofw_tree_node_t *root;
phandle ssm_node;
ofw_tree_node_t *ssm;
root = ofw_tree_node_alloc();
if (root)
ofw_tree_node_process(root, NULL, ofw_root);
 
/*
* The firmware client interface does not automatically include the
* "ssm" node in the list of children of "/". A nasty yet working
* solution is to explicitly stick "ssm" to the OFW tree.
*/
ssm_node = ofw_find_device("/ssm@0,0");
if (ssm_node != -1) {
ssm = ofw_tree_node_alloc();
if (ssm) {
ofw_tree_node_process(ssm, root,
ofw_find_device("/ssm@0,0"));
ssm->peer = root->child;
root->child = ssm;
}
}
return root;
}
/branches/network/boot/generic/macros.h
File deleted
/branches/network/boot/generic/align.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup generic
/** @addtogroup generic
* @{
*/
/** @file
/branches/network/boot/generic/printf.c
83,16 → 83,14
*/
static void print_number(const unative_t num, const unsigned int base)
{
int val = num;
 
/* This is enough even for base 2. */
char d[sizeof(unative_t) * 8 + 1];
int val = num;
char d[sizeof(unative_t) * 8 + 1]; /* this is good enough even for base == 2 */
int i = sizeof(unative_t) * 8 - 1;
 
do {
d[i--] = digits[val % base];
} while (val /= base);
 
d[sizeof(unative_t) * 8] = 0;
puts(&d[i + 1]);
}
158,89 → 156,89
int i = 0;
va_list ap;
char c;
 
va_start(ap, fmt);
 
while ((c = fmt[i++])) {
switch (c) {
 
/* control character */
case '%':
 
switch (c = fmt[i++]) {
 
/* percentile itself */
/* control character */
case '%':
break;
 
/*
* String and character conversions.
*/
case 's':
puts(va_arg(ap, char_ptr));
goto loop;
 
case 'c':
c = (char) va_arg(ap, int);
break;
 
/*
* Hexadecimal conversions with fixed width.
*/
case 'P':
puts("0x");
case 'p':
print_fixed_hex(va_arg(ap, unative_t),
sizeof(unative_t));
goto loop;
 
case 'Q':
puts("0x");
case 'q':
print_fixed_hex(va_arg(ap, uint64_t), INT64);
goto loop;
 
case 'L':
puts("0x");
case 'l':
print_fixed_hex(va_arg(ap, unative_t), INT32);
goto loop;
 
case 'W':
puts("0x");
case 'w':
print_fixed_hex(va_arg(ap, unative_t), INT16);
goto loop;
 
case 'B':
puts("0x");
case 'b':
print_fixed_hex(va_arg(ap, unative_t), INT8);
goto loop;
 
/*
* Decimal and hexadecimal conversions.
*/
case 'd':
print_number(va_arg(ap, unative_t), 10);
goto loop;
case 'X':
puts("0x");
case 'x':
print_number(va_arg(ap, unative_t), 16);
goto loop;
/*
* Bad formatting.
*/
switch (c = fmt[i++]) {
/* percentile itself */
case '%':
break;
/*
* String and character conversions.
*/
case 's':
puts(va_arg(ap, char_ptr));
goto loop;
case 'c':
c = (char) va_arg(ap, int);
break;
/*
* Hexadecimal conversions with fixed width.
*/
case 'P':
puts("0x");
case 'p':
print_fixed_hex(va_arg(ap, unative_t), sizeof(unative_t));
goto loop;
case 'Q':
puts("0x");
case 'q':
print_fixed_hex(va_arg(ap, uint64_t), INT64);
goto loop;
case 'L':
puts("0x");
case 'l':
print_fixed_hex(va_arg(ap, unative_t), INT32);
goto loop;
case 'W':
puts("0x");
case 'w':
print_fixed_hex(va_arg(ap, unative_t), INT16);
goto loop;
case 'B':
puts("0x");
case 'b':
print_fixed_hex(va_arg(ap, unative_t), INT8);
goto loop;
/*
* Decimal and hexadecimal conversions.
*/
case 'd':
print_number(va_arg(ap, unative_t), 10);
goto loop;
case 'X':
puts("0x");
case 'x':
print_number(va_arg(ap, unative_t), 16);
goto loop;
/*
* Bad formatting.
*/
default:
goto out;
}
default:
goto out;
}
 
default:
write(&c, 1);
write(&c, 1);
}
loop:
;
}
/branches/network/boot/generic/string.c
39,9 → 39,9
 
/** Return number of characters in a string.
*
* @param str NULL terminated string.
* @param str NULL terminated string.
*
* @return Number of characters in str.
* @return Number of characters in str.
*/
size_t strlen(const char *str)
{
53,17 → 53,16
return i;
}
 
/** Compare two NULL terminated strings.
/** Compare two NULL terminated strings
*
* Do a char-by-char comparison of two NULL terminated strings.
* The strings are considered equal iff they consist of the same
* characters on the minimum of their lengths.
*
* @param src First string to compare.
* @param dst Second string to compare.
* @param src First string to compare.
* @param dst Second string to compare.
*
* @return 0 if the strings are equal, -1 if first is smaller,
* 1 if second smaller.
* @return 0 if the strings are equal, -1 if first is smaller, 1 if second smaller.
*
*/
int strcmp(const char *src, const char *dst)
82,7 → 81,7
}
 
 
/** Compare two NULL terminated strings.
/** Compare two NULL terminated strings
*
* Do a char-by-char comparison of two NULL terminated strings.
* The strings are considered equal iff they consist of the same
89,12 → 88,11
* characters on the minimum of their lengths and specified maximal
* length.
*
* @param src First string to compare.
* @param dst Second string to compare.
* @param len Maximal length for comparison.
* @param src First string to compare.
* @param dst Second string to compare.
* @param len Maximal length for comparison.
*
* @return 0 if the strings are equal, -1 if first is smaller,
* 1 if second smaller.
* @return 0 if the strings are equal, -1 if first is smaller, 1 if second smaller.
*
*/
int strncmp(const char *src, const char *dst, size_t len)
120,9 → 118,9
* If 'src' is shorter than 'len', '\0' is inserted behind the
* last copied character.
*
* @param src Source string.
* @param dest Destination buffer.
* @param len Size of destination buffer.
* @param src Source string.
* @param dest Destination buffer.
* @param len Size of destination buffer.
*/
void strncpy(char *dest, const char *src, size_t len)
{
134,13 → 132,13
dest[i-1] = '\0';
}
 
/** Convert ascii representation to unative_t.
/** Convert ascii representation to unative_t
*
* Supports 0x for hexa & 0 for octal notation.
* Does not check for overflows, does not support negative numbers
*
* @param text Textual representation of number.
* @return Converted number or 0 if no valid number found.
* @param text Textual representation of number
* @return Converted number or 0 if no valid number ofund
*/
unative_t atoi(const char *text)
{
154,9 → 152,9
base = 8;
 
while (*text) {
if (base != 16 &&
((*text >= 'A' && *text <= 'F') ||
(*text >='a' && *text <='f')))
if (base != 16 && \
((*text >= 'A' && *text <= 'F' )
|| (*text >='a' && *text <='f')))
break;
if (base == 8 && *text >='8')
break;
178,28 → 176,5
return result;
}
 
/** Move piece of memory to another, possibly overlapping, location.
*
* @param dst Destination address.
* @param src Source address.
* @param len Number of bytes to move.
*
* @return Destination address.
*/
void *memmove(void *dst, const void *src, size_t len)
{
char *d = dst;
const char *s = src;
if (s < d) {
while (len--)
*(d + len) = *(s + len);
} else {
while (len--)
*d++ = *s++;
}
return dst;
}
 
/** @}
*/
/branches/network/boot/generic/string.h
42,7 → 42,6
extern int strncmp(const char *src, const char *dst, size_t len);
extern void strncpy(char *dest, const char *src, size_t len);
extern unative_t atoi(const char *text);
extern void *memmove(void *dst, const void *src, size_t len);
 
#endif
 
/branches/network/boot/Makefile
29,8 → 29,7
## Include configuration
#
 
-include ../Makefile.config
-include ../config.defs
-include Makefile.config
 
## Paths
#
39,11 → 38,31
KERNELDIR = $(BASE)/kernel
USPACEDIR = $(BASE)/uspace
 
.PHONY: all build clean generic_clean
ifeq ($(CONFIG_DEBUG),y)
DEFS += -DCONFIG_DEBUG
endif
 
all: ../Makefile.config ../config.h ../config.defs build
ifeq ($(CONFIG_BAT),y)
DEFS += -DCONFIG_BAT
endif
 
-include arch/$(BARCH)/Makefile.inc
ifeq ($(CONFIG_SMP),y)
DEFS += -DCONFIG_SMP
endif
 
.PHONY: all build config distclean clean generic_clean
 
all:
../tools/config.py boot.config default $(ARCH) $(COMPILER) $(CONFIG_DEBUG) $(IMAGE)
$(MAKE) -C . build
 
-include arch/$(ARCH)/Makefile.inc
 
config:
../tools/config.py boot.config
 
distclean: clean
-rm Makefile.config
 
generic_clean:
-rm generic/*.o genarch/*.o
/branches/network/Makefile
29,21 → 29,112
## Include configuration
#
 
.PHONY: all config distclean clean cscope
-include Makefile.config
 
all: Makefile.config config.h config.defs
$(MAKE) -C kernel
$(MAKE) -C uspace
$(MAKE) -C boot
## Setup platform configuration
#
 
Makefile.config config.h config.defs: HelenOS.config
tools/config.py HelenOS.config default
ifeq ($(PLATFORM),amd64)
KARCH = amd64
MACHINE = opteron
UARCH = amd64
BARCH = amd64
endif
 
ifeq ($(PLATFORM),arm32)
KARCH = arm32
UARCH = arm32
BARCH = arm32
endif
 
ifeq ($(PLATFORM),ia32)
KARCH = ia32
UARCH = ia32
BARCH = ia32
endif
 
ifeq ($(PLATFORM),ia64)
KARCH = ia64
UARCH = ia64
BARCH = ia64
endif
 
ifeq ($(PLATFORM),mips32)
KARCH = mips32
BARCH = mips32
ifeq ($(MACHINE),msim)
UARCH = mips32
IMAGE = binary
endif
ifeq ($(MACHINE),simics)
UARCH = mips32
IMAGE = ecoff
endif
ifeq ($(MACHINE),bgxemul)
UARCH = mips32eb
IMAGE = ecoff
endif
ifeq ($(MACHINE),lgxemul)
UARCH = mips32
IMAGE = ecoff
endif
endif
 
ifeq ($(PLATFORM),ppc32)
KARCH = ppc32
UARCH = ppc32
BARCH = ppc32
endif
 
ifeq ($(PLATFORM),ppc64)
KARCH = ppc64
UARCH = ppc64
BARCH = ppc64
endif
 
ifeq ($(PLATFORM),sparc64)
KARCH = sparc64
UARCH = sparc64
BARCH = sparc64
endif
 
ifeq ($(PLATFORM),ia32xen)
KARCH = ia32xen
UARCH = ia32
BARCH = ia32xen
endif
 
.PHONY: all build config distclean clean cscope
 
all:
tools/config.py HelenOS.config default $(PLATFORM) $(COMPILER) $(CONFIG_DEBUG)
$(MAKE) -C . build
 
build:
ifneq ($(MACHINE),)
$(MAKE) -C kernel ARCH=$(KARCH) COMPILER=$(COMPILER) CONFIG_DEBUG=$(CONFIG_DEBUG) MACHINE=$(MACHINE)
else
$(MAKE) -C kernel ARCH=$(KARCH) COMPILER=$(COMPILER) CONFIG_DEBUG=$(CONFIG_DEBUG) NETWORKING=$(NETWORKING)
endif
$(MAKE) -C uspace ARCH=$(UARCH) COMPILER=$(COMPILER) CONFIG_DEBUG=$(CONFIG_DEBUG) NETWORKING=$(NETWORKING)
ifneq ($(IMAGE),)
$(MAKE) -C boot ARCH=$(BARCH) COMPILER=$(COMPILER) CONFIG_DEBUG=$(CONFIG_DEBUG) NETWORKING=$(NETWORKING) IMAGE=$(IMAGE)
else
$(MAKE) -C boot ARCH=$(BARCH) COMPILER=$(COMPILER) CONFIG_DEBUG=$(CONFIG_DEBUG) NETWORKING=$(NETWORKING)
endif
 
config:
tools/config.py HelenOS.config
 
distclean: clean
rm -f Makefile.config config.h config.defs tools/*.pyc
distclean:
-$(MAKE) -C kernel distclean
-$(MAKE) -C uspace distclean
-$(MAKE) -C boot distclean
rm -f Makefile.config tools/*.pyc
 
clean:
-$(MAKE) -C kernel clean
/branches/network/HelenOS.config
1,6 → 1,5
#
# Copyright (c) 2006 Ondrej Palkovsky
# Copyright (c) 2009 Martin Decky
# Copyright (c) 2006 Ondrej Palkovsky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
27,443 → 26,60
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
## General platform options
## General configuration directives
 
% Platform
# Platform
@ "amd64" AMD64/Intel EM64T (PC)
@ "arm32" ARM 32-bit
@ "ia32" Intel IA-32 (PC)
@ "ia32xen" Intel IA-32 on Xen hypervisor
@ "ia64" Intel IA-64
@ "mips32" MIPS 32-bit
@ "ppc32" PowerPC 32-bit (iMac G4)
@ "ppc64" PowerPC 64-bit (iMac G5)
@ "sparc64" Sun UltraSPARC 64-bit
! PLATFORM (choice)
 
% Machine type
# Machine
@ "msim" MSIM
@ "simics" Simics
@ "bgxemul" GXEmul big endian
@ "lgxemul" GXEmul little endian
! [PLATFORM=mips32] MACHINE (choice)
 
% Machine type
# Machine type
@ "ski" Ski ia64 simulator
@ "i460GX" i460GX chipset machine
@ "ski" Ski ia64 simulator
! [PLATFORM=ia64] MACHINE (choice)
 
% Machine type
@ "generic" Generic Sun workstation or server
@ "serengeti" Serengeti system
! [PLATFORM=sparc64] MACHINE (choice)
 
% CPU type
@ "pentium4" Pentium 4
@ "pentium3" Pentium 3
@ "core" Core Solo/Duo
@ "athlon_xp" Athlon XP
@ "athlon_mp" Athlon MP
! [PLATFORM=ia32] PROCESSOR (choice)
 
% CPU type
@ "opteron" Opteron
! [PLATFORM=amd64] PROCESSOR (choice)
 
% CPU type
@ "us" UltraSPARC I-II subarchitecture
@ "us3" UltraSPARC III-IV subarchitecture
! [PLATFORM=sparc64&MACHINE=generic] PROCESSOR (choice)
 
% CPU type
@ "us3"
! [PLATFORM=sparc64&MACHINE=serengeti] PROCESSOR (choice)
 
% Ramdisk format
@ "tmpfs" TMPFS image
@ "fat" FAT16 image
! RDFMT (choice)
 
 
## Mapping between platform and kernel architecture
 
% Kernel architecture
@ "amd64"
! [PLATFORM=amd64] KARCH (choice)
 
% Kernel architecture
@ "arm32"
! [PLATFORM=arm32] KARCH (choice)
 
% Kernel architecture
@ "ia32"
! [PLATFORM=ia32] KARCH (choice)
 
% Kernel architecture
@ "ia32xen"
! [PLATFORM=ia32xen] KARCH (choice)
 
% Kernel architecture
@ "ia64"
! [PLATFORM=ia64] KARCH (choice)
 
% Kernel architecture
@ "mips32"
! [PLATFORM=mips32] KARCH (choice)
 
% Kernel architecture
@ "ppc32"
! [PLATFORM=ppc32] KARCH (choice)
 
% Kernel architecture
@ "ppc64"
! [PLATFORM=ppc64] KARCH (choice)
 
% Kernel architecture
@ "sparc64"
! [PLATFORM=sparc64] KARCH (choice)
 
 
## Mapping between platform and user space architecture
 
% User space architecture
@ "amd64"
! [PLATFORM=amd64] UARCH (choice)
 
% User space architecture
@ "arm32"
! [PLATFORM=arm32] UARCH (choice)
 
% User space architecture
@ "ia32"
! [PLATFORM=ia32|PLATFORM=ia32xen] UARCH (choice)
 
% User space architecture
@ "ia64"
! [PLATFORM=ia64] UARCH (choice)
 
% User space architecture
@ "mips32"
! [PLATFORM=mips32&(MACHINE=msim|MACHINE=lgxemul)] UARCH (choice)
 
% User space architecture
@ "mips32eb"
! [PLATFORM=mips32&MACHINE=bgxemul] UARCH (choice)
 
% User space architecture
@ "ppc32"
! [PLATFORM=ppc32] UARCH (choice)
 
% User space architecture
@ "ppc64"
! [PLATFORM=ppc64] UARCH (choice)
 
% User space architecture
@ "sparc64"
! [PLATFORM=sparc64] UARCH (choice)
 
 
## Mapping between platform and boot architecture
 
% Boot architecture
@ "amd64"
! [PLATFORM=amd64] BARCH (choice)
 
% Boot architecture
@ "arm32"
! [PLATFORM=arm32] BARCH (choice)
 
% Boot architecture
@ "ia32"
! [PLATFORM=ia32] BARCH (choice)
 
% Boot architecture
@ "ia32xen"
! [PLATFORM=ia32xen] BARCH (choice)
 
% Boot architecture
@ "ia64"
! [PLATFORM=ia64] BARCH (choice)
 
% Boot architecture
@ "mips32"
! [PLATFORM=mips32] BARCH (choice)
 
% Boot architecture
@ "ppc32"
! [PLATFORM=ppc32] BARCH (choice)
 
% Boot architecture
@ "ppc64"
! [PLATFORM=ppc64] BARCH (choice)
 
% Boot architecture
@ "sparc64"
! [PLATFORM=sparc64] BARCH (choice)
 
 
## Mapping between platform and image format
 
% Image format
@ "binary"
! [PLATFORM=mips32&MACHINE=msim] IMAGE (choice)
 
% Image format
@ "ecoff"
! [PLATFORM=mips32&(MACHINE=bgxemul|MACHINE=lgxemul)] IMAGE (choice)
 
 
## Compiler options
 
% Compiler
# Compiler
@ "gcc_cross" GCC Cross-compiler
@ "gcc_native" GCC Native
@ "icc_native" ICC Native
@ "suncc_native" Sun Studio C Compiler
! [PLATFORM=amd64|PLATFORM=ia32] COMPILER (choice)
! [PLATFORM=amd64|PLATFORM=ia32|PLATFORM=ia32xen] COMPILER (choice)
 
% Compiler
# Compiler
@ "gcc_cross" GCC Cross-compiler
@ "gcc_native" GCC Native
@ "icc_native" ICC Native
! [PLATFORM=ia64] COMPILER (choice)
 
% Compiler
# Compiler
@ "gcc_cross" GCC Cross-compiler
@ "gcc_native" GCC Native
@ "suncc_native" Sun Studio C Compiler
! [PLATFORM=sparc64] COMPILER (choice)
 
% Compiler
# Compiler
@ "gcc_cross" GCC Cross-compiler
@ "gcc_native" GCC Native
! [PLATFORM=arm32|PLATFORM=mips32|PLATFORM=ppc32] COMPILER (choice)
! [PLATFORM=arm32|PLATFORM=mips32|PLATFORM=ppc32|PLATFORM=ppc64] COMPILER (choice)
 
 
## Kernel configuration
 
% Fences
! [PLATFORM=ia32&(PROCESSOR=athlon_xp|PROCESSOR=athlon_mp|PROCESSOR=pentium3)] CONFIG_FENCES_P3 (y)
 
% Fences
! [PLATFORM=ia32&(PROCESSOR=pentium4|PROCESSOR=core)] CONFIG_FENCES_P4 (y)
 
% Fences
! [PLATFORM=amd64] CONFIG_FENCES_P4 (y)
 
% ACPI support
! [PLATFORM=ia32|PLATFORM=amd64] CONFIG_ACPI (y)
 
% Hierarchical page tables support
! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=arm32|PLATFORM=mips32|PLATFORM=ppc32] CONFIG_PAGE_PT (y)
 
% Page hash table support
! [PLATFORM=ia64|PLATFORM=sparc64] CONFIG_PAGE_HT (y)
 
% Software integer division support
! [PLATFORM=ia32|PLATFORM=arm32|PLATFORM=ia64|PLATFORM=mips32|PLATFORM=ppc32] CONFIG_SOFTINT (y)
 
% ASID support
! [PLATFORM=ia64|PLATFORM=mips32|PLATFORM=ppc32|PLATFORM=sparc64] CONFIG_ASID (y)
 
% ASID FIFO support
! [PLATFORM=ia64|PLATFORM=mips32|PLATFORM=ppc32|PLATFORM=sparc64] CONFIG_ASID_FIFO (y)
 
% OpenFirmware tree support
! [PLATFORM=sparc64] CONFIG_OFW_TREE (y)
 
% Multiboot standard support
! [PLATFORM=ia32|PLATFORM=amd64] CONFIG_MULTIBOOT (y)
 
% FPU support
! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=ia64|PLATFORM=sparc64] CONFIG_FPU (y)
 
% FPU support
! [PLATFORM=mips32&(MACHINE=lgxemul|MACHINE=bgxemul)] CONFIG_FPU (y)
 
 
## Kernel features options
 
% Support for SMP
! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ia64|(PLATFORM=mips32&MACHINE=msim)] CONFIG_SMP (y/n)
 
% Debug build
# Debug build
! CONFIG_DEBUG (y/n)
 
% Deadlock detection support for spinlocks
! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n)
 
% Improved support for hyperthreading
! [PLATFORM=amd64&CONFIG_SMP=y] CONFIG_HT (y/n)
 
% Improved support for hyperthreading
! [PLATFORM=ia32&PROCESSOR!=athlon_xp&PROCESSOR!=athlon_mp&PROCESSOR!=pentium3&CONFIG_SMP=y] CONFIG_HT (y/n)
 
% Lazy FPU context switching
! [CONFIG_FPU=y] CONFIG_FPU_LAZY (y/n)
 
% Use VHPT
! [PLATFORM=ia64] CONFIG_VHPT (n/y)
 
% Use TSB
! [PLATFORM=sparc64] CONFIG_TSB (y/n)
 
% IO SAPIC on default address support
! [PLATFORM=ia64&MACHINE!=ski] CONFIG_IOSAPIC (y/n)
 
% Virtually indexed D-cache support
! [PLATFORM=sparc64] CONFIG_VIRT_IDX_DCACHE (y/n)
 
% Support for userspace debuggers
! CONFIG_UDEBUG (y/n)
 
% Kernel console support
! CONFIG_KCONSOLE (y/n)
 
% Kernel symbol information
! CONFIG_SYMTAB (y/n)
 
% Detailed kernel logging
! CONFIG_LOG (n/y)
 
% Compile kernel tests
! CONFIG_TEST (y/n)
 
 
## Hardware support
 
% Input device class
@ "generic" Keyboard or serial line
@ "none" No input device
! [PLATFORM=ia32|PLATFORM=arm32|PLATFORM=amd64|PLATFORM=mips32|PLATFORM=sparc64] CONFIG_HID_IN (choice)
 
% Input device class
@ "generic" Keyboard or serial line
@ "keyboard" Keyboard
@ "serial" Serial line
@ "none" No input device
! [PLATFORM=ia64&MACHINE=i460GX] CONFIG_HID_IN (choice)
 
% Output device class
@ "generic" Monitor or serial line
@ "none" No output device
! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ppc32|(PLATFORM=ia64&MACHINE=i460GX)|(PLATFORM=mips32&MACHINE=msim)] CONFIG_HID_OUT (choice)
 
% Output device class
@ "generic" Monitor or serial line
@ "monitor" Monitor
@ "serial" Serial line
@ "none" No output device
! [PLATFORM=mips32&(MACHINE=bgxemul|MACHINE=lgxemul)] CONFIG_HID_OUT (choice)
 
% Output device class
@ "generic" Monitor or serial line
@ "monitor" Monitor
@ "serial" Serial line
@ "none" No output device
! [PLATFORM=arm32] CONFIG_HID_OUT (choice)
 
% PC keyboard support
! [CONFIG_HID_IN=generic&(PLATFORM=ia32|PLATFORM=amd64)] CONFIG_PC_KBD (y/n)
 
% PC keyboard support
! [(CONFIG_HID_IN=generic|CONFIG_HID_IN=keyboard)&PLATFORM=ia64&MACHINE=i460GX] CONFIG_PC_KBD (y/n)
 
% Support for msim/GXemul keyboard
! [CONFIG_HID_IN=generic&PLATFORM=mips32] CONFIG_MIPS_KBD (y/n)
 
% Support for msim/GXemul printer
! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&PLATFORM=mips32] CONFIG_MIPS_PRN (y/n)
 
% Support for GXemul keyboard
! [CONFIG_HID_IN=generic&PLATFORM=arm32] CONFIG_ARM_KBD (y/n)
 
% Support for GXemul printer
! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&PLATFORM=arm32] CONFIG_ARM_PRN (y/n)
 
% Support for NS16550 controller
! [(CONFIG_HID_IN=generic|CONFIG_HID_IN=keyboard)&PLATFORM=sparc64&MACHINE=generic] CONFIG_NS16550 (y/n)
 
% Support for NS16550 controller
! [(CONFIG_HID_IN=generic|CONFIG_HID_IN=serial)&PLATFORM=ia64&MACHINE=i460GX] CONFIG_NS16550 (y/n)
 
% Support for Z8530 controller
! [(CONFIG_HID_IN=generic|CONFIG_HID_IN=keyboardl)&PLATFORM=sparc64&MACHINE=generic] CONFIG_Z8530 (y/n)
 
% Support for Serengeti console
! [(CONFIG_HID_IN=generic|CONFIG_HID_OUT=generic)&PLATFORM=sparc64&MACHINE=serengeti] CONFIG_SGCN (y/n)
 
% i8042 controller support
! [CONFIG_PC_KBD=y] CONFIG_I8042 (y)
 
% Sun keyboard support
! [PLATFORM=sparc64&(CONFIG_NS16550=y|CONFIG_Z8530=y)] CONFIG_SUN_KBD (y)
 
% Dummy serial line input
! [CONFIG_MIPS_KBD=y|CONFIG_ARM_KBD=y] CONFIG_DSRLNIN (y)
 
% Dummy serial line output
! [CONFIG_MIPS_PRN=y|CONFIG_ARM_PRN=y] CONFIG_DSRLNOUT (y)
 
% Serial line input module
! [CONFIG_DSRLNIN=y|(PLATFORM=ia64&MACHINE=i460GX&CONFIG_NS16550=y)|(PLATFORM=ia64&MACHINE=ski)] CONFIG_SRLN (y)
 
% EGA support
! [CONFIG_HID_OUT=generic&(PLATFORM=ia32|PLATFORM=amd64)] CONFIG_EGA (y/n)
 
% EGA support
! [CONFIG_HID_OUT=generic&PLATFORM=ia64&MACHINE=i460GX] CONFIG_EGA (y/n)
 
% Framebuffer support
! [CONFIG_HID_OUT=generic&(PLATFORM=ia32|PLATFORM=amd64|PLATFORM=ppc32)] CONFIG_FB (y/n)
 
% Framebuffer support
! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=monitor)&PLATFORM=mips32&(MACHINE=lgxemul|MACHINE=bgxemul)] CONFIG_FB (y/n)
 
% Framebuffer support
! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=monitor)&PLATFORM=arm32] CONFIG_FB (y/n)
 
% Framebuffer support
! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=monitor)&PLATFORM=sparc64&MACHINE=generic] CONFIG_FB (y/n)
 
% Default framebuffer mode
@ "640x480"
@ "800x600"
@ "1024x768"
@ "1152x720"
@ "1152x864"
@ "1280x960"
@ "1280x1024"
@ "1400x1050"
@ "1440x900"
@ "1440x1050"
@ "1600x1200"
@ "1920x1080"
@ "1920x1200"
! [(PLATFORM=ia32|PLATFORM=amd64)&CONFIG_HID_OUT!=none&CONFIG_FB=y] CONFIG_VESA_MODE (choice)
 
% Default framebuffer depth
@ "8"
@ "16"
@ "24"
! [(PLATFORM=ia32|PLATFORM=amd64)&CONFIG_HID_OUT!=none&CONFIG_FB=y] CONFIG_VESA_BPP (choice)
 
% Start AP processors by the loader
! [PLATFORM=sparc64&CONFIG_SMP=y] CONFIG_AP (y/n)
 
% Use Block Address Translation by the loader
! [PLATFORM=ppc32] CONFIG_BAT (y/n)
 
% Preserve A.OUT header in isofs.b
! [PLATFORM=sparc64&MACHINE=generic] CONFIG_AOUT_ISOFS_B (y)
 
% External ramdisk
! [PLATFORM=sparc64] CONFIG_RD_EXTERNAL (y/n)
 
% Keyboard layout
@ "us_qwerty" US QWERTY
@ "us_dvorak" US Dvorak
! KBD_LAYOUT (choice)
 
% Networking architecture
# Networking architecture
@ "modular" Modular
@ "module" One module
! [PLATFORM=ia32] NETWORKING (choice)
 
/branches/network/kernel/generic/src/udebug/udebug.c
File deleted
/branches/network/kernel/generic/src/udebug/udebug_ops.c
File deleted
/branches/network/kernel/generic/src/udebug/udebug_ipc.c
File deleted
/branches/network/kernel/generic/src/mm/as.c
122,7 → 122,7
int rc;
 
link_initialize(&as->inactive_as_with_asid_link);
mutex_initialize(&as->lock, MUTEX_PASSIVE);
mutex_initialize(&as->lock, MUTEX_PASSIVE);
rc = as_constructor_arch(as, flags);
146,12 → 146,8
AS_KERNEL = as_create(FLAG_AS_KERNEL);
if (!AS_KERNEL)
panic("Cannot create kernel address space.");
panic("can't create kernel address space\n");
/* Make sure the kernel address space
* reference count never drops to zero.
*/
atomic_set(&AS_KERNEL->refcount, 1);
}
 
/** Create address space.
180,7 → 176,7
#else
page_table_create(flags);
#endif
 
return as;
}
 
389,7 → 385,7
if (pages < area->pages) {
bool cond;
uintptr_t start_free = area->base + pages * PAGE_SIZE;
uintptr_t start_free = area->base + pages*PAGE_SIZE;
 
/*
* Shrinking the area.
399,7 → 395,7
/*
* Start TLB shootdown sequence.
*/
tlb_shootdown_start(TLB_INVL_PAGES, as->asid, area->base +
tlb_shootdown_start(TLB_INVL_PAGES, AS->asid, area->base +
pages * PAGE_SIZE, area->pages - pages);
 
/*
444,8 → 440,8
i = (start_free - b) >> PAGE_WIDTH;
if (!used_space_remove(area, start_free,
c - i))
panic("Cannot remove used "
"space.");
panic("Could not remove used "
"space.\n");
} else {
/*
* The interval of used space can be
452,8 → 448,8
* completely removed.
*/
if (!used_space_remove(area, b, c))
panic("Cannot remove used "
"space.");
panic("Could not remove used "
"space.\n");
}
for (; i < c; i++) {
773,12 → 769,11
* In order for this to work properly, this may copy the data
* into private anonymous memory (unless it's already there).
*
* @param as Address space.
* @param flags Flags of the area memory.
* @param address Address within the area to be changed.
* @param as Address space.
* @param flags Flags of the area memory.
* @param address Address withing the area to be changed.
*
* @return Zero on success or a value from @ref errno.h on failure.
*
* @return Zero on success or a value from @ref errno.h on failure.
*/
int as_area_change_flags(as_t *as, int flags, uintptr_t address)
{
790,7 → 785,7
uintptr_t *old_frame;
index_t frame_idx;
count_t used_pages;
 
/* Flags for the new memory mapping */
page_flags = area_flags_to_page_flags(flags);
 
804,7 → 799,7
return ENOENT;
}
 
if ((area->sh_info) || (area->backend != &anon_backend)) {
if (area->sh_info || area->backend != &anon_backend) {
/* Copying shared areas not supported yet */
/* Copying non-anonymous memory not supported yet */
mutex_unlock(&area->lock);
875,7 → 870,6
*/
 
tlb_invalidate_pages(as->asid, area->base, area->pages);
/*
* Invalidate potential software translation caches (e.g. TSB on
* sparc64).
1666,7 → 1660,7
}
 
panic("Inconsistency detected while adding %" PRIc " pages of used "
"space at %p.", count, page);
"space at %p.\n", count, page);
}
 
/** Mark portion of address space area as unused.
1845,7 → 1839,7
 
error:
panic("Inconsistency detected while removing %" PRIc " pages of used "
"space from %p.", count, page);
"space from %p.\n", count, page);
}
 
/** Remove reference to address space area share info.
/branches/network/kernel/generic/src/mm/backend_anon.c
152,7 → 152,7
*/
page_mapping_insert(AS, addr, frame, as_area_get_flags(area));
if (!used_space_insert(area, ALIGN_DOWN(addr, PAGE_SIZE), 1))
panic("Cannot insert used space.");
panic("Could not insert used space.\n");
return AS_PF_OK;
}
/branches/network/kernel/generic/src/mm/backend_elf.c
129,7 → 129,7
page_mapping_insert(AS, addr, frame,
as_area_get_flags(area));
if (!used_space_insert(area, page, 1))
panic("Cannot insert used space.");
panic("Could not insert used space.\n");
mutex_unlock(&area->sh_info->lock);
return AS_PF_OK;
}
214,7 → 214,7
 
page_mapping_insert(AS, addr, frame, as_area_get_flags(area));
if (!used_space_insert(area, page, 1))
panic("Cannot insert used space.");
panic("Could not insert used space.\n");
 
return AS_PF_OK;
}
/branches/network/kernel/generic/src/mm/frame.c
1,7 → 1,6
/*
* Copyright (c) 2001-2005 Jakub Jermar
* Copyright (c) 2005 Sergey Bondari
* Copyright (c) 2009 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
34,7 → 33,7
 
/**
* @file
* @brief Physical frame allocator.
* @brief Physical frame allocator.
*
* This file contains the physical frame allocator and memory zone management.
* The frame allocator is built on top of the buddy allocator.
42,6 → 41,16
* @see buddy.c
*/
 
/*
* Locking order
*
* In order to access particular zone, the process must first lock
* the zones.lock, then lock the zone and then unlock the zones.lock.
* This insures, that we can fiddle with the zones in runtime without
* affecting the processes.
*
*/
 
#include <arch/types.h>
#include <mm/frame.h>
#include <mm/as.h>
48,6 → 57,7
#include <panic.h>
#include <debug.h>
#include <adt/list.h>
#include <synch/spinlock.h>
#include <synch/mutex.h>
#include <synch/condvar.h>
#include <arch/asm.h>
59,16 → 69,50
#include <macros.h>
#include <config.h>
 
zones_t zones;
typedef struct {
count_t refcount; /**< tracking of shared frames */
uint8_t buddy_order; /**< buddy system block order */
link_t buddy_link; /**< link to the next free block inside one
order */
void *parent; /**< If allocated by slab, this points there */
} frame_t;
 
typedef struct {
SPINLOCK_DECLARE(lock); /**< this lock protects everything below */
pfn_t base; /**< frame_no of the first frame in the frames
array */
count_t count; /**< Size of zone */
 
frame_t *frames; /**< array of frame_t structures in this
zone */
count_t free_count; /**< number of free frame_t structures */
count_t busy_count; /**< number of busy frame_t structures */
buddy_system_t *buddy_system; /**< buddy system for the zone */
int flags;
} zone_t;
 
/*
* The zoneinfo.lock must be locked when accessing zoneinfo structure.
* Some of the attributes in zone_t structures are 'read-only'
*/
 
typedef struct {
SPINLOCK_DECLARE(lock);
unsigned int count;
zone_t *info[ZONES_MAX];
} zones_t;
 
static zones_t zones;
 
/*
* Synchronization primitives used to sleep when there is no memory
* available.
*/
mutex_t mem_avail_mtx;
condvar_t mem_avail_cv;
count_t mem_avail_req = 0; /**< Number of frames requested. */
count_t mem_avail_gen = 0; /**< Generation counter. */
unsigned long mem_avail_frames = 0; /**< Number of available frames. */
unsigned long mem_avail_gen = 0; /**< Generation counter. */
 
/********************/
/* Helper functions */
84,12 → 128,13
return (index_t) (frame - zone->frames) + zone->base;
}
 
static inline bool frame_index_valid(zone_t *zone, index_t index)
static inline int frame_index_valid(zone_t *zone, index_t index)
{
return (index < zone->count);
}
 
static inline index_t make_frame_index(zone_t *zone, frame_t *frame)
/** Compute pfn_t from frame_t pointer & zone pointer */
static index_t make_frame_index(zone_t *zone, frame_t *frame)
{
return (frame - zone->frames);
}
96,8 → 141,7
 
/** Initialize frame structure.
*
* @param frame Frame structure to be initialized.
*
* @param frame Frame structure to be initialized.
*/
static void frame_initialize(frame_t *frame)
{
105,145 → 149,153
frame->buddy_order = 0;
}
 
/*******************/
/* Zones functions */
/*******************/
/**********************/
/* Zoneinfo functions */
/**********************/
 
/** Insert-sort zone into zones list.
*
* Assume interrupts are disabled and zones lock is
* locked.
*
* @param base Base frame of the newly inserted zone.
* @param count Number of frames of the newly inserted zone.
*
* @return Zone number on success, -1 on error.
*
* @param newzone New zone to be inserted into zone list.
* @return Zone number on success, -1 on error.
*/
static count_t zones_insert_zone(pfn_t base, count_t count)
static int zones_add_zone(zone_t *newzone)
{
unsigned int i, j;
ipl_t ipl;
zone_t *z;
 
ipl = interrupts_disable();
spinlock_lock(&zones.lock);
/* Try to merge */
if (zones.count + 1 == ZONES_MAX) {
printf("Maximum zone count %u exceeded!\n", ZONES_MAX);
return (count_t) -1;
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
return -1;
}
count_t i;
for (i = 0; i < zones.count; i++) {
/* Check for overlap */
if (overlaps(base, count,
zones.info[i].base, zones.info[i].count)) {
/* Check for overflow */
z = zones.info[i];
if (overlaps(newzone->base, newzone->count, z->base,
z->count)) {
printf("Zones overlap!\n");
return (count_t) -1;
return -1;
}
if (base < zones.info[i].base)
if (newzone->base < z->base)
break;
}
/* Move other zones up */
count_t j;
for (j = zones.count; j > i; j--) {
zones.info[j] = zones.info[j - 1];
zones.info[j].buddy_system->data =
(void *) &zones.info[j - 1];
}
for (j = i; j < zones.count; j++)
zones.info[j + 1] = zones.info[j];
zones.info[i] = newzone;
zones.count++;
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
 
return i;
}
 
/** Get total available frames.
/** Try to find a zone where can we find the frame.
*
* Assume interrupts are disabled and zones lock is
* locked.
* Assume interrupts are disabled.
*
* @return Total number of available frames.
*
* @param frame Frame number contained in zone.
* @param pzone If not null, it is used as zone hint. Zone index is
* filled into the variable on success.
* @return Pointer to locked zone containing frame.
*/
#ifdef CONFIG_DEBUG
static count_t total_frames_free(void)
static zone_t *find_zone_and_lock(pfn_t frame, unsigned int *pzone)
{
count_t total = 0;
count_t i;
for (i = 0; i < zones.count; i++)
total += zones.info[i].free_count;
unsigned int i;
unsigned int hint = pzone ? *pzone : 0;
zone_t *z;
return total;
}
#endif
spinlock_lock(&zones.lock);
 
/** Find a zone with a given frames.
*
* Assume interrupts are disabled and zones lock is
* locked.
*
* @param frame Frame number contained in zone.
* @param count Number of frames to look for.
* @param hint Used as zone hint.
*
* @return Zone index or -1 if not found.
*
*/
count_t find_zone(pfn_t frame, count_t count, count_t hint)
{
if (hint >= zones.count)
hint = 0;
count_t i = hint;
i = hint;
do {
if ((zones.info[i].base <= frame)
&& (zones.info[i].base + zones.info[i].count >= frame + count))
return i;
z = zones.info[i];
spinlock_lock(&z->lock);
if (z->base <= frame && z->base + z->count > frame) {
/* Unlock the global lock */
spinlock_unlock(&zones.lock);
if (pzone)
*pzone = i;
return z;
}
spinlock_unlock(&z->lock);
 
i++;
if (i >= zones.count)
i = 0;
} while (i != hint);
return (count_t) -1;
 
spinlock_unlock(&zones.lock);
return NULL;
}
 
/** @return True if zone can allocate specified order */
static bool zone_can_alloc(zone_t *zone, uint8_t order)
static int zone_can_alloc(zone_t *z, uint8_t order)
{
return (zone_flags_available(zone->flags)
&& buddy_system_can_alloc(zone->buddy_system, order));
return buddy_system_can_alloc(z->buddy_system, order);
}
 
/** Find a zone that can allocate order frames.
/** Find and lock zone that can allocate order frames.
*
* Assume interrupts are disabled and zones lock is
* locked.
* Assume interrupts are disabled.
*
* @param order Size (2^order) of free space we are trying to find.
* @param flags Required flags of the target zone.
* @param hind Preferred zone.
*
* @param order Size (2^order) of free space we are trying to find.
* @param flags Required flags of the target zone.
* @param pzone Pointer to preferred zone or NULL, on return contains
* zone number.
*/
static count_t find_free_zone(uint8_t order, zone_flags_t flags, count_t hint)
static zone_t *
find_free_zone_and_lock(uint8_t order, int flags, unsigned int *pzone)
{
unsigned int i;
zone_t *z;
unsigned int hint = pzone ? *pzone : 0;
/* Mask off flags that are not applicable. */
flags &= FRAME_LOW_4_GiB;
 
spinlock_lock(&zones.lock);
if (hint >= zones.count)
hint = 0;
count_t i = hint;
i = hint;
do {
z = zones.info[i];
spinlock_lock(&z->lock);
 
/*
* Check whether the zone meets the search criteria.
*/
if ((zones.info[i].flags & flags) == flags) {
if ((z->flags & flags) == flags) {
/*
* Check if the zone has 2^order frames area available.
*/
if (zone_can_alloc(&zones.info[i], order))
return i;
if (zone_can_alloc(z, order)) {
spinlock_unlock(&zones.lock);
if (pzone)
*pzone = i;
return z;
}
}
i++;
if (i >= zones.count)
spinlock_unlock(&z->lock);
if (++i >= zones.count)
i = 0;
} while (i != hint);
return (count_t) -1;
spinlock_unlock(&zones.lock);
return NULL;
}
 
/**************************/
255,73 → 307,82
* Find block that is parent of current list.
* That means go to lower addresses, until such block is found
*
* @param order Order of parent must be different then this
* parameter!!
*
* @param order Order of parent must be different then this
* parameter!!
*/
static link_t *zone_buddy_find_block(buddy_system_t *buddy, link_t *child,
static link_t *zone_buddy_find_block(buddy_system_t *b, link_t *child,
uint8_t order)
{
frame_t *frame = list_get_instance(child, frame_t, buddy_link);
zone_t *zone = (zone_t *) buddy->data;
frame_t *frame;
zone_t *zone;
index_t index;
index_t index = frame_index(zone, frame);
frame = list_get_instance(child, frame_t, buddy_link);
zone = (zone_t *) b->data;
 
index = frame_index(zone, frame);
do {
if (zone->frames[index].buddy_order != order)
if (zone->frames[index].buddy_order != order) {
return &zone->frames[index].buddy_link;
} while (index-- > 0);
}
} while(index-- > 0);
return NULL;
}
 
/** Buddy system find_buddy implementation.
*
* @param buddy Buddy system.
* @param block Block for which buddy should be found.
* @param b Buddy system.
* @param block Block for which buddy should be found.
*
* @return Buddy for given block if found.
*
* @return Buddy for given block if found.
*/
static link_t *zone_buddy_find_buddy(buddy_system_t *buddy, link_t *block)
static link_t *zone_buddy_find_buddy(buddy_system_t *b, link_t *block)
{
frame_t *frame = list_get_instance(block, frame_t, buddy_link);
zone_t *zone = (zone_t *) buddy->data;
frame_t *frame;
zone_t *zone;
index_t index;
bool is_left, is_right;
 
frame = list_get_instance(block, frame_t, buddy_link);
zone = (zone_t *) b->data;
ASSERT(IS_BUDDY_ORDER_OK(frame_index_abs(zone, frame),
frame->buddy_order));
bool is_left = IS_BUDDY_LEFT_BLOCK_ABS(zone, frame);
index_t index;
is_left = IS_BUDDY_LEFT_BLOCK_ABS(zone, frame);
is_right = IS_BUDDY_RIGHT_BLOCK_ABS(zone, frame);
 
ASSERT(is_left ^ is_right);
if (is_left) {
index = (frame_index(zone, frame)) +
(1 << frame->buddy_order);
} else { /* is_right */
} else { /* if (is_right) */
index = (frame_index(zone, frame)) -
(1 << frame->buddy_order);
}
if (frame_index_valid(zone, index)) {
if ((zone->frames[index].buddy_order == frame->buddy_order) &&
(zone->frames[index].refcount == 0)) {
if (zone->frames[index].buddy_order == frame->buddy_order &&
zone->frames[index].refcount == 0) {
return &zone->frames[index].buddy_link;
}
}
return NULL;
 
return NULL;
}
 
/** Buddy system bisect implementation.
*
* @param buddy Buddy system.
* @param block Block to bisect.
* @param b Buddy system.
* @param block Block to bisect.
*
* @return Right block.
*
* @return Right block.
*/
static link_t *zone_buddy_bisect(buddy_system_t *buddy, link_t *block)
static link_t *zone_buddy_bisect(buddy_system_t *b, link_t *block)
{
frame_t *frame_l = list_get_instance(block, frame_t, buddy_link);
frame_t *frame_r = (frame_l + (1 << (frame_l->buddy_order - 1)));
frame_t *frame_l, *frame_r;
 
frame_l = list_get_instance(block, frame_t, buddy_link);
frame_r = (frame_l + (1 << (frame_l->buddy_order - 1)));
return &frame_r->buddy_link;
}
328,68 → 389,75
 
/** Buddy system coalesce implementation.
*
* @param buddy Buddy system.
* @param block_1 First block.
* @param block_2 First block's buddy.
* @param b Buddy system.
* @param block_1 First block.
* @param block_2 First block's buddy.
*
* @return Coalesced block (actually block that represents lower
* address).
*
* @return Coalesced block (actually block that represents lower
* address).
*/
static link_t *zone_buddy_coalesce(buddy_system_t *buddy, link_t *block_1,
link_t *block_2)
static link_t *zone_buddy_coalesce(buddy_system_t *b, link_t *block_1,
link_t *block_2)
{
frame_t *frame1 = list_get_instance(block_1, frame_t, buddy_link);
frame_t *frame2 = list_get_instance(block_2, frame_t, buddy_link);
frame_t *frame1, *frame2;
return ((frame1 < frame2) ? block_1 : block_2);
frame1 = list_get_instance(block_1, frame_t, buddy_link);
frame2 = list_get_instance(block_2, frame_t, buddy_link);
return frame1 < frame2 ? block_1 : block_2;
}
 
/** Buddy system set_order implementation.
*
* @param buddy Buddy system.
* @param block Buddy system block.
* @param order Order to set.
*
* @param b Buddy system.
* @param block Buddy system block.
* @param order Order to set.
*/
static void zone_buddy_set_order(buddy_system_t *buddy, link_t *block,
static void zone_buddy_set_order(buddy_system_t *b, link_t *block,
uint8_t order)
{
list_get_instance(block, frame_t, buddy_link)->buddy_order = order;
frame_t *frame;
frame = list_get_instance(block, frame_t, buddy_link);
frame->buddy_order = order;
}
 
/** Buddy system get_order implementation.
*
* @param buddy Buddy system.
* @param block Buddy system block.
* @param b Buddy system.
* @param block Buddy system block.
*
* @return Order of block.
*
* @return Order of block.
*/
static uint8_t zone_buddy_get_order(buddy_system_t *buddy, link_t *block)
static uint8_t zone_buddy_get_order(buddy_system_t *b, link_t *block)
{
return list_get_instance(block, frame_t, buddy_link)->buddy_order;
frame_t *frame;
frame = list_get_instance(block, frame_t, buddy_link);
return frame->buddy_order;
}
 
/** Buddy system mark_busy implementation.
*
* @param buddy Buddy system.
* @param block Buddy system block.
*
* @param b Buddy system.
* @param block Buddy system block.
*/
static void zone_buddy_mark_busy(buddy_system_t *buddy, link_t * block)
static void zone_buddy_mark_busy(buddy_system_t *b, link_t * block)
{
list_get_instance(block, frame_t, buddy_link)->refcount = 1;
frame_t * frame;
 
frame = list_get_instance(block, frame_t, buddy_link);
frame->refcount = 1;
}
 
/** Buddy system mark_available implementation.
*
* @param buddy Buddy system.
* @param block Buddy system block.
* @param b Buddy system.
* @param block Buddy system block.
*/
static void zone_buddy_mark_available(buddy_system_t *buddy, link_t *block)
static void zone_buddy_mark_available(buddy_system_t *b, link_t *block)
{
list_get_instance(block, frame_t, buddy_link)->refcount = 0;
frame_t *frame;
frame = list_get_instance(block, frame_t, buddy_link);
frame->refcount = 0;
}
 
static buddy_system_operations_t zone_buddy_system_operations = {
409,57 → 477,60
 
/** Allocate frame in particular zone.
*
* Assume zone is locked and is available for allocation.
* Assume zone is locked.
* Panics if allocation is impossible.
*
* @param zone Zone to allocate from.
* @param order Allocate exactly 2^order frames.
* @param zone Zone to allocate from.
* @param order Allocate exactly 2^order frames.
*
* @return Frame index in zone.
* @return Frame index in zone.
*
*/
static pfn_t zone_frame_alloc(zone_t *zone, uint8_t order)
{
ASSERT(zone_flags_available(zone->flags));
pfn_t v;
link_t *tmp;
frame_t *frame;
 
/* Allocate frames from zone buddy system */
link_t *link = buddy_system_alloc(zone->buddy_system, order);
tmp = buddy_system_alloc(zone->buddy_system, order);
ASSERT(link);
ASSERT(tmp);
/* Update zone information. */
zone->free_count -= (1 << order);
zone->busy_count += (1 << order);
 
/* Frame will be actually a first frame of the block. */
frame_t *frame = list_get_instance(link, frame_t, buddy_link);
frame = list_get_instance(tmp, frame_t, buddy_link);
/* Get frame address */
return make_frame_index(zone, frame);
/* get frame address */
v = make_frame_index(zone, frame);
return v;
}
 
/** Free frame from zone.
*
* Assume zone is locked and is available for deallocation.
* Assume zone is locked.
*
* @param zone Pointer to zone from which the frame is to be freed.
* @param frame_idx Frame index relative to zone.
*
* @param zone Pointer to zone from which the frame is to be freed.
* @param frame_idx Frame index relative to zone.
*/
static void zone_frame_free(zone_t *zone, index_t frame_idx)
{
ASSERT(zone_flags_available(zone->flags));
frame_t *frame;
uint8_t order;
 
frame = &zone->frames[frame_idx];
frame_t *frame = &zone->frames[frame_idx];
/* Remember frame order */
uint8_t order = frame->buddy_order;
/* remember frame order */
order = frame->buddy_order;
 
ASSERT(frame->refcount);
 
if (!--frame->refcount) {
buddy_system_free(zone->buddy_system, &frame->buddy_link);
/* Update zone information. */
zone->free_count += (1 << order);
zone->busy_count -= (1 << order);
476,633 → 547,567
/** Mark frame in zone unavailable to allocation. */
static void zone_mark_unavailable(zone_t *zone, index_t frame_idx)
{
ASSERT(zone_flags_available(zone->flags));
frame_t *frame = zone_get_frame(zone, frame_idx);
frame_t *frame;
link_t *link;
 
frame = zone_get_frame(zone, frame_idx);
if (frame->refcount)
return;
link_t *link __attribute__ ((unused));
link = buddy_system_alloc_block(zone->buddy_system,
&frame->buddy_link);
ASSERT(link);
zone->free_count--;
 
mutex_lock(&mem_avail_mtx);
mem_avail_frames--;
mutex_unlock(&mem_avail_mtx);
}
 
/** Merge two zones.
/** Join two zones.
*
* Expect buddy to point to space at least zone_conf_size large.
* Assume z1 & z2 are locked and compatible and zones lock is
* locked.
* Expect zone_t *z to point to space at least zone_conf_size large.
*
* @param z1 First zone to merge.
* @param z2 Second zone to merge.
* @param old_z1 Original date of the first zone.
* @param buddy Merged zone buddy.
* Assume z1 & z2 are locked.
*
* @param z Target zone structure pointer.
* @param z1 Zone to merge.
* @param z2 Zone to merge.
*/
static void zone_merge_internal(count_t z1, count_t z2, zone_t *old_z1, buddy_system_t *buddy)
static void _zone_merge(zone_t *z, zone_t *z1, zone_t *z2)
{
ASSERT(zone_flags_available(zones.info[z1].flags));
ASSERT(zone_flags_available(zones.info[z2].flags));
ASSERT(zones.info[z1].flags == zones.info[z2].flags);
ASSERT(zones.info[z1].base < zones.info[z2].base);
ASSERT(!overlaps(zones.info[z1].base, zones.info[z1].count,
zones.info[z2].base, zones.info[z2].count));
uint8_t max_order;
unsigned int i;
int z2idx;
pfn_t frame_idx;
frame_t *frame;
 
ASSERT(!overlaps(z1->base, z1->count, z2->base, z2->count));
ASSERT(z1->base < z2->base);
 
spinlock_initialize(&z->lock, "zone_lock");
z->base = z1->base;
z->count = z2->base + z2->count - z1->base;
z->flags = z1->flags & z2->flags;
 
z->free_count = z1->free_count + z2->free_count;
z->busy_count = z1->busy_count + z2->busy_count;
/* Difference between zone bases */
pfn_t base_diff = zones.info[z2].base - zones.info[z1].base;
zones.info[z1].count = base_diff + zones.info[z2].count;
zones.info[z1].free_count += zones.info[z2].free_count;
zones.info[z1].busy_count += zones.info[z2].busy_count;
zones.info[z1].buddy_system = buddy;
uint8_t order = fnzb(zones.info[z1].count);
buddy_system_create(zones.info[z1].buddy_system, order,
&zone_buddy_system_operations, (void *) &zones.info[z1]);
zones.info[z1].frames =
(frame_t *) ((uint8_t *) zones.info[z1].buddy_system
+ buddy_conf_size(order));
/* This marks all frames busy */
count_t i;
for (i = 0; i < zones.info[z1].count; i++)
frame_initialize(&zones.info[z1].frames[i]);
max_order = fnzb(z->count);
 
z->buddy_system = (buddy_system_t *) &z[1];
buddy_system_create(z->buddy_system, max_order,
&zone_buddy_system_operations, (void *) z);
 
z->frames = (frame_t *)((uint8_t *) z->buddy_system +
buddy_conf_size(max_order));
for (i = 0; i < z->count; i++) {
/* This marks all frames busy */
frame_initialize(&z->frames[i]);
}
/* Copy frames from both zones to preserve full frame orders,
* parents etc. Set all free frames with refcount = 0 to 1, because
* we add all free frames to buddy allocator later again, clearing
* order to 0. Don't set busy frames with refcount = 0, as they
* parents etc. Set all free frames with refcount=0 to 1, because
* we add all free frames to buddy allocator later again, clear
* order to 0. Don't set busy frames with refcount=0, as they
* will not be reallocated during merge and it would make later
* problems with allocation/free.
*/
for (i = 0; i < old_z1->count; i++)
zones.info[z1].frames[i] = old_z1->frames[i];
for (i = 0; i < zones.info[z2].count; i++)
zones.info[z1].frames[base_diff + i]
= zones.info[z2].frames[i];
for (i = 0; i < z1->count; i++)
z->frames[i] = z1->frames[i];
for (i = 0; i < z2->count; i++) {
z2idx = i + (z2->base - z1->base);
z->frames[z2idx] = z2->frames[i];
}
i = 0;
while (i < zones.info[z1].count) {
if (zones.info[z1].frames[i].refcount) {
/* Skip busy frames */
i += 1 << zones.info[z1].frames[i].buddy_order;
} else {
/* Free frames, set refcount = 1
* (all free frames have refcount == 0, we need not
* to check the order)
*/
zones.info[z1].frames[i].refcount = 1;
zones.info[z1].frames[i].buddy_order = 0;
while (i < z->count) {
if (z->frames[i].refcount) {
/* skip busy frames */
i += 1 << z->frames[i].buddy_order;
} else { /* Free frames, set refcount=1 */
/* All free frames have refcount=0, we need not
* to check the order */
z->frames[i].refcount = 1;
z->frames[i].buddy_order = 0;
i++;
}
}
/* Add free blocks from the original zone z1 */
while (zone_can_alloc(old_z1, 0)) {
/* Allocate from the original zone */
pfn_t frame_idx = zone_frame_alloc(old_z1, 0);
/* Free the frame from the merged zone */
frame_t *frame = &zones.info[z1].frames[frame_idx];
/* Add free blocks from the 2 original zones */
while (zone_can_alloc(z1, 0)) {
frame_idx = zone_frame_alloc(z1, 0);
frame = &z->frames[frame_idx];
frame->refcount = 0;
buddy_system_free(zones.info[z1].buddy_system, &frame->buddy_link);
buddy_system_free(z->buddy_system, &frame->buddy_link);
}
/* Add free blocks from the original zone z2 */
while (zone_can_alloc(&zones.info[z2], 0)) {
/* Allocate from the original zone */
pfn_t frame_idx = zone_frame_alloc(&zones.info[z2], 0);
/* Free the frame from the merged zone */
frame_t *frame = &zones.info[z1].frames[base_diff + frame_idx];
while (zone_can_alloc(z2, 0)) {
frame_idx = zone_frame_alloc(z2, 0);
frame = &z->frames[frame_idx + (z2->base - z1->base)];
frame->refcount = 0;
buddy_system_free(zones.info[z1].buddy_system, &frame->buddy_link);
buddy_system_free(z->buddy_system, &frame->buddy_link);
}
}
 
/** Return old configuration frames into the zone.
*
* We have two cases:
* - The configuration data is outside the zone
* -> do nothing (perhaps call frame_free?)
* - The configuration data was created by zone_create
* or updated by reduce_region -> free every frame
* We have several cases
* - the conf. data is outside of zone -> exit, shall we call frame_free??
* - the conf. data was created by zone_create or
* updated with reduce_region -> free every frame
*
* @param znum The actual zone where freeing should occur.
* @param pfn Old zone configuration frame.
* @param count Old zone frame count.
*
* @param newzone The actual zone where freeing should occur.
* @param oldzone Pointer to old zone configuration data that should
* be freed from new zone.
*/
static void return_config_frames(count_t znum, pfn_t pfn, count_t count)
static void return_config_frames(zone_t *newzone, zone_t *oldzone)
{
ASSERT(zone_flags_available(zones.info[znum].flags));
pfn_t pfn;
frame_t *frame;
count_t cframes;
unsigned int i;
 
pfn = ADDR2PFN((uintptr_t)KA2PA(oldzone));
cframes = SIZE2FRAMES(zone_conf_size(oldzone->count));
count_t cframes = SIZE2FRAMES(zone_conf_size(count));
if ((pfn < zones.info[znum].base)
|| (pfn >= zones.info[znum].base + zones.info[znum].count))
if (pfn < newzone->base || pfn >= newzone->base + newzone->count)
return;
frame_t *frame __attribute__ ((unused));
 
frame = &zones.info[znum].frames[pfn - zones.info[znum].base];
frame = &newzone->frames[pfn - newzone->base];
ASSERT(!frame->buddy_order);
count_t i;
 
for (i = 0; i < cframes; i++) {
zones.info[znum].busy_count++;
zone_frame_free(&zones.info[znum],
pfn - zones.info[znum].base + i);
newzone->busy_count++;
zone_frame_free(newzone, pfn+i-newzone->base);
}
}
 
/** Reduce allocated block to count of order 0 frames.
*
* The allocated block needs 2^order frames. Reduce all frames
* in the block to order 0 and free the unneeded frames. This means that
* when freeing the previously allocated block starting with frame_idx,
* The allocated block need 2^order frames of space. Reduce all frames
* in block to order 0 and free the unneeded frames. This means, that
* when freeing the previously allocated block starting with frame_idx,
* you have to free every frame.
*
* @param znum Zone.
* @param frame_idx Index the first frame of the block.
* @param count Allocated frames in block.
*
* @param zone
* @param frame_idx Index to block.
* @param count Allocated space in block.
*/
static void zone_reduce_region(count_t znum, pfn_t frame_idx, count_t count)
static void zone_reduce_region(zone_t *zone, pfn_t frame_idx, count_t count)
{
ASSERT(zone_flags_available(zones.info[znum].flags));
ASSERT(frame_idx + count < zones.info[znum].count);
count_t i;
uint8_t order;
frame_t *frame;
uint8_t order = zones.info[znum].frames[frame_idx].buddy_order;
ASSERT(frame_idx + count < zone->count);
 
order = zone->frames[frame_idx].buddy_order;
ASSERT((count_t) (1 << order) >= count);
 
/* Reduce all blocks to order 0 */
count_t i;
for (i = 0; i < (count_t) (1 << order); i++) {
frame_t *frame = &zones.info[znum].frames[i + frame_idx];
frame = &zone->frames[i + frame_idx];
frame->buddy_order = 0;
if (!frame->refcount)
frame->refcount = 1;
ASSERT(frame->refcount == 1);
}
/* Free unneeded frames */
for (i = count; i < (count_t) (1 << order); i++)
zone_frame_free(&zones.info[znum], i + frame_idx);
for (i = count; i < (count_t) (1 << order); i++) {
zone_frame_free(zone, i + frame_idx);
}
}
 
/** Merge zones z1 and z2.
*
* The merged zones must be 2 zones with no zone existing in between
* (which means that z2 = z1 + 1). Both zones must be available zones
* with the same flags.
* - the zones must be 2 zones with no zone existing in between,
* which means that z2 = z1+1
*
* When you create a new zone, the frame allocator configuration does
* not to be 2^order size. Once the allocator is running it is no longer
* possible, merged configuration data occupies more space :-/
*
* The function uses
*
* - When you create a new zone, the frame allocator configuration does
* not to be 2^order size. Once the allocator is running it is no longer
* possible, merged configuration data occupies more space :-/
*/
bool zone_merge(count_t z1, count_t z2)
void zone_merge(unsigned int z1, unsigned int z2)
{
ipl_t ipl = interrupts_disable();
ipl_t ipl;
zone_t *zone1, *zone2, *newzone;
unsigned int cframes;
uint8_t order;
unsigned int i;
pfn_t pfn;
 
ipl = interrupts_disable();
spinlock_lock(&zones.lock);
bool ret = true;
/* We can join only 2 zones with none existing inbetween,
* the zones have to be available and with the same
* set of flags
*/
if ((z1 >= zones.count) || (z2 >= zones.count)
|| (z2 - z1 != 1)
|| (!zone_flags_available(zones.info[z1].flags))
|| (!zone_flags_available(zones.info[z2].flags))
|| (zones.info[z1].flags != zones.info[z2].flags)) {
ret = false;
 
if ((z1 >= zones.count) || (z2 >= zones.count))
goto errout;
}
pfn_t cframes = SIZE2FRAMES(zone_conf_size(
zones.info[z2].base - zones.info[z1].base
+ zones.info[z2].count));
uint8_t order;
/* We can join only 2 zones with none existing inbetween */
if (z2 - z1 != 1)
goto errout;
 
zone1 = zones.info[z1];
zone2 = zones.info[z2];
spinlock_lock(&zone1->lock);
spinlock_lock(&zone2->lock);
 
cframes = SIZE2FRAMES(zone_conf_size(zone2->base + zone2->count -
zone1->base));
if (cframes == 1)
order = 0;
else
order = fnzb(cframes - 1) + 1;
 
/* Allocate zonedata inside one of the zones */
if (zone_can_alloc(zone1, order))
pfn = zone1->base + zone_frame_alloc(zone1, order);
else if (zone_can_alloc(zone2, order))
pfn = zone2->base + zone_frame_alloc(zone2, order);
else
order = fnzb(cframes - 1) + 1;
/* Allocate merged zone data inside one of the zones */
pfn_t pfn;
if (zone_can_alloc(&zones.info[z1], order)) {
pfn = zones.info[z1].base + zone_frame_alloc(&zones.info[z1], order);
} else if (zone_can_alloc(&zones.info[z2], order)) {
pfn = zones.info[z2].base + zone_frame_alloc(&zones.info[z2], order);
} else {
ret = false;
goto errout;
}
/* Preserve original data from z1 */
zone_t old_z1 = zones.info[z1];
old_z1.buddy_system->data = (void *) &old_z1;
/* Do zone merging */
buddy_system_t *buddy = (buddy_system_t *) PA2KA(PFN2ADDR(pfn));
zone_merge_internal(z1, z2, &old_z1, buddy);
goto errout2;
 
newzone = (zone_t *) PA2KA(PFN2ADDR(pfn));
 
_zone_merge(newzone, zone1, zone2);
 
/* Free unneeded config frames */
zone_reduce_region(z1, pfn - zones.info[z1].base, cframes);
zone_reduce_region(newzone, pfn - newzone->base, cframes);
/* Subtract zone information from busy frames */
zones.info[z1].busy_count -= cframes;
/* Free old zone information */
return_config_frames(z1,
ADDR2PFN(KA2PA((uintptr_t) old_z1.frames)), old_z1.count);
return_config_frames(z1,
ADDR2PFN(KA2PA((uintptr_t) zones.info[z2].frames)),
zones.info[z2].count);
/* Move zones down */
count_t i;
for (i = z2 + 1; i < zones.count; i++) {
newzone->busy_count -= cframes;
 
/* Replace existing zones in zoneinfo list */
zones.info[z1] = newzone;
for (i = z2 + 1; i < zones.count; i++)
zones.info[i - 1] = zones.info[i];
zones.info[i - 1].buddy_system->data =
(void *) &zones.info[i - 1];
}
zones.count--;
 
/* Free old zone information */
return_config_frames(newzone, zone1);
return_config_frames(newzone, zone2);
errout2:
/* Nobody is allowed to enter to zone, so we are safe
* to touch the spinlocks last time */
spinlock_unlock(&zone1->lock);
spinlock_unlock(&zone2->lock);
errout:
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
return ret;
}
 
/** Merge all mergeable zones into one big zone.
/** Merge all zones into one big zone.
*
* It is reasonable to do this on systems where
* BIOS reports parts in chunks, so that we could
* have 1 zone (it's faster).
*
* It is reasonable to do this on systems whose bios reports parts in chunks,
* so that we could have 1 zone (it's faster).
*/
void zone_merge_all(void)
{
count_t i = 0;
while (i < zones.count) {
if (!zone_merge(i, i + 1))
i++;
int count = zones.count;
 
while (zones.count > 1 && --count) {
zone_merge(0, 1);
break;
}
}
 
/** Create new frame zone.
*
* @param zone Zone to construct.
* @param buddy Address of buddy system configuration information.
* @param start Physical address of the first frame within the zone.
* @param count Count of frames in zone.
* @param flags Zone flags.
* @param start Physical address of the first frame within the zone.
* @param count Count of frames in zone.
* @param z Address of configuration information of zone.
* @param flags Zone flags.
*
* @return Initialized zone.
*
* @return Initialized zone.
*/
static void zone_construct(zone_t *zone, buddy_system_t *buddy, pfn_t start, count_t count, zone_flags_t flags)
static void zone_construct(pfn_t start, count_t count, zone_t *z, int flags)
{
zone->base = start;
zone->count = count;
zone->flags = flags;
zone->free_count = count;
zone->busy_count = 0;
zone->buddy_system = buddy;
unsigned int i;
uint8_t max_order;
 
spinlock_initialize(&z->lock, "zone_lock");
z->base = start;
z->count = count;
 
/* Mask off flags that are calculated automatically. */
flags &= ~FRAME_LOW_4_GiB;
/* Determine calculated flags. */
if (z->base + count < (1ULL << (32 - FRAME_WIDTH))) /* 4 GiB */
flags |= FRAME_LOW_4_GiB;
 
z->flags = flags;
 
z->free_count = count;
z->busy_count = 0;
 
/*
* Compute order for buddy system, initialize
*/
max_order = fnzb(count);
z->buddy_system = (buddy_system_t *)&z[1];
if (zone_flags_available(flags)) {
/*
* Compute order for buddy system and initialize
*/
uint8_t order = fnzb(count);
buddy_system_create(zone->buddy_system, order,
&zone_buddy_system_operations, (void *) zone);
/* Allocate frames _after_ the confframe */
/* Check sizes */
zone->frames = (frame_t *) ((uint8_t *) zone->buddy_system +
buddy_conf_size(order));
count_t i;
for (i = 0; i < count; i++)
frame_initialize(&zone->frames[i]);
/* Stuffing frames */
for (i = 0; i < count; i++) {
zone->frames[i].refcount = 0;
buddy_system_free(zone->buddy_system, &zone->frames[i].buddy_link);
}
} else
zone->frames = NULL;
buddy_system_create(z->buddy_system, max_order,
&zone_buddy_system_operations, (void *) z);
/* Allocate frames _after_ the conframe */
/* Check sizes */
z->frames = (frame_t *)((uint8_t *) z->buddy_system +
buddy_conf_size(max_order));
for (i = 0; i < count; i++) {
frame_initialize(&z->frames[i]);
}
/* Stuffing frames */
for (i = 0; i < count; i++) {
z->frames[i].refcount = 0;
buddy_system_free(z->buddy_system, &z->frames[i].buddy_link);
}
}
 
/** Compute configuration data size for zone.
*
* @param count Size of zone in frames.
*
* @return Size of zone configuration info (in bytes).
*
* @param count Size of zone in frames.
* @return Size of zone configuration info (in bytes).
*/
uintptr_t zone_conf_size(count_t count)
{
return (count * sizeof(frame_t) + buddy_conf_size(fnzb(count)));
int size = sizeof(zone_t) + count * sizeof(frame_t);
int max_order;
 
max_order = fnzb(count);
size += buddy_conf_size(max_order);
return size;
}
 
/** Create and add zone to system.
*
* @param start First frame number (absolute).
* @param count Size of zone in frames.
* @param confframe Where configuration frames are supposed to be.
* Automatically checks, that we will not disturb the
* kernel and possibly init. If confframe is given
* _outside_ this zone, it is expected, that the area is
* already marked BUSY and big enough to contain
* zone_conf_size() amount of data. If the confframe is
* inside the area, the zone free frame information is
* modified not to include it.
* @param start First frame number (absolute).
* @param count Size of zone in frames.
* @param confframe Where configuration frames are supposed to be.
* Automatically checks, that we will not disturb the
* kernel and possibly init. If confframe is given
* _outside_ this zone, it is expected, that the area is
* already marked BUSY and big enough to contain
* zone_conf_size() amount of data. If the confframe is
* inside the area, the zone free frame information is
* modified not to include it.
*
* @return Zone number or -1 on error.
*
* @return Zone number or -1 on error.
*/
count_t zone_create(pfn_t start, count_t count, pfn_t confframe, zone_flags_t flags)
int zone_create(pfn_t start, count_t count, pfn_t confframe, int flags)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&zones.lock);
if (zone_flags_available(flags)) { /* Create available zone */
/* Theoretically we could have NULL here, practically make sure
* nobody tries to do that. If some platform requires, remove
* the assert
*/
ASSERT(confframe != NULL);
/* If confframe is supposed to be inside our zone, then make sure
* it does not span kernel & init
*/
count_t confcount = SIZE2FRAMES(zone_conf_size(count));
if ((confframe >= start) && (confframe < start + count)) {
for (; confframe < start + count; confframe++) {
uintptr_t addr = PFN2ADDR(confframe);
zone_t *z;
uintptr_t addr;
count_t confcount;
unsigned int i;
int znum;
 
/* Theoretically we could have here 0, practically make sure
* nobody tries to do that. If some platform requires, remove
* the assert
*/
ASSERT(confframe);
/* If conframe is supposed to be inside our zone, then make sure
* it does not span kernel & init
*/
confcount = SIZE2FRAMES(zone_conf_size(count));
if (confframe >= start && confframe < start + count) {
for (; confframe < start + count; confframe++) {
addr = PFN2ADDR(confframe);
if (overlaps(addr, PFN2ADDR(confcount),
KA2PA(config.base), config.kernel_size))
continue;
if (overlaps(addr, PFN2ADDR(confcount),
KA2PA(config.stack_base), config.stack_size))
continue;
bool overlap = false;
count_t i;
for (i = 0; i < init.cnt; i++)
if (overlaps(addr, PFN2ADDR(confcount),
KA2PA(config.base), config.kernel_size))
continue;
if (overlaps(addr, PFN2ADDR(confcount),
KA2PA(config.stack_base), config.stack_size))
continue;
bool overlap = false;
count_t i;
for (i = 0; i < init.cnt; i++)
if (overlaps(addr, PFN2ADDR(confcount),
KA2PA(init.tasks[i].addr),
init.tasks[i].size)) {
overlap = true;
break;
}
if (overlap)
continue;
break;
}
KA2PA(init.tasks[i].addr),
init.tasks[i].size)) {
overlap = true;
break;
}
if (overlap)
continue;
if (confframe >= start + count)
panic("Cannot find configuration data for zone.");
break;
}
count_t znum = zones_insert_zone(start, count);
if (znum == (count_t) -1) {
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
return (count_t) -1;
if (confframe >= start + count)
panic("Cannot find configuration data for zone.");
}
 
z = (zone_t *) PA2KA(PFN2ADDR(confframe));
zone_construct(start, count, z, flags);
znum = zones_add_zone(z);
if (znum == -1)
return -1;
 
mutex_lock(&mem_avail_mtx);
mem_avail_frames += count;
mutex_unlock(&mem_avail_mtx);
 
/* If confdata in zone, mark as unavailable */
if (confframe >= start && confframe < start + count)
for (i = confframe; i < confframe + confcount; i++) {
zone_mark_unavailable(z, i - z->base);
}
buddy_system_t *buddy = (buddy_system_t *) PA2KA(PFN2ADDR(confframe));
zone_construct(&zones.info[znum], buddy, start, count, flags);
/* If confdata in zone, mark as unavailable */
if ((confframe >= start) && (confframe < start + count)) {
count_t i;
for (i = confframe; i < confframe + confcount; i++)
zone_mark_unavailable(&zones.info[znum],
i - zones.info[znum].base);
}
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
return znum;
}
/* Non-available zone */
count_t znum = zones_insert_zone(start, count);
if (znum == (count_t) -1) {
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
return (count_t) -1;
}
zone_construct(&zones.info[znum], NULL, start, count, flags);
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
return znum;
}
 
/*******************/
/***************************************/
/* Frame functions */
/*******************/
 
/** Set parent of frame. */
void frame_set_parent(pfn_t pfn, void *data, count_t hint)
void frame_set_parent(pfn_t pfn, void *data, unsigned int hint)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&zones.lock);
count_t znum = find_zone(pfn, 1, hint);
ASSERT(znum != (count_t) -1);
zone_get_frame(&zones.info[znum],
pfn - zones.info[znum].base)->parent = data;
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
zone_t *zone = find_zone_and_lock(pfn, &hint);
 
ASSERT(zone);
 
zone_get_frame(zone, pfn - zone->base)->parent = data;
spinlock_unlock(&zone->lock);
}
 
void *frame_get_parent(pfn_t pfn, count_t hint)
void *frame_get_parent(pfn_t pfn, unsigned int hint)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&zones.lock);
zone_t *zone = find_zone_and_lock(pfn, &hint);
void *res;
 
ASSERT(zone);
res = zone_get_frame(zone, pfn - zone->base)->parent;
count_t znum = find_zone(pfn, 1, hint);
ASSERT(znum != (count_t) -1);
void *res = zone_get_frame(&zones.info[znum],
pfn - zones.info[znum].base)->parent;
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
spinlock_unlock(&zone->lock);
return res;
}
 
/** Allocate power-of-two frames of physical memory.
*
* @param order Allocate exactly 2^order frames.
* @param flags Flags for host zone selection and address processing.
* @param pzone Preferred zone.
* @param order Allocate exactly 2^order frames.
* @param flags Flags for host zone selection and address processing.
* @param pzone Preferred zone.
*
* @return Physical address of the allocated frame.
* @return Physical address of the allocated frame.
*
*/
void *frame_alloc_generic(uint8_t order, frame_flags_t flags, count_t *pzone)
void *frame_alloc_generic(uint8_t order, int flags, unsigned int *pzone)
{
count_t size = ((count_t) 1) << order;
ipl_t ipl;
count_t hint = pzone ? (*pzone) : 0;
int freed;
pfn_t v;
zone_t *zone;
unsigned long gen = 0;
loop:
ipl = interrupts_disable();
spinlock_lock(&zones.lock);
/*
* First, find suitable frame zone.
*/
count_t znum = find_free_zone(order,
FRAME_TO_ZONE_FLAGS(flags), hint);
zone = find_free_zone_and_lock(order, flags, pzone);
/* If no memory, reclaim some slab memory,
if it does not help, reclaim all */
if ((znum == (count_t) -1) && (!(flags & FRAME_NO_RECLAIM))) {
count_t freed = slab_reclaim(0);
if (freed > 0)
znum = find_free_zone(order,
FRAME_TO_ZONE_FLAGS(flags), hint);
if (znum == (count_t) -1) {
if (!zone && !(flags & FRAME_NO_RECLAIM)) {
freed = slab_reclaim(0);
if (freed)
zone = find_free_zone_and_lock(order, flags, pzone);
if (!zone) {
freed = slab_reclaim(SLAB_RECLAIM_ALL);
if (freed > 0)
znum = find_free_zone(order,
FRAME_TO_ZONE_FLAGS(flags), hint);
if (freed)
zone = find_free_zone_and_lock(order, flags,
pzone);
}
}
if (znum == (count_t) -1) {
if (!zone) {
/*
* Sleep until some frames are available again.
*/
if (flags & FRAME_ATOMIC) {
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
return NULL;
return 0;
}
#ifdef CONFIG_DEBUG
count_t avail = total_frames_free();
unsigned long avail;
 
mutex_lock(&mem_avail_mtx);
avail = mem_avail_frames;
mutex_unlock(&mem_avail_mtx);
 
printf("Thread %" PRIu64 " waiting for %u frames, "
"%u available.\n", THREAD->tid, 1ULL << order, avail);
#endif
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
/*
* Sleep until some frames are available again.
*/
#ifdef CONFIG_DEBUG
printf("Thread %" PRIu64 " waiting for %" PRIc " frames, "
"%" PRIc " available.\n", THREAD->tid, size, avail);
#endif
 
mutex_lock(&mem_avail_mtx);
if (mem_avail_req > 0)
mem_avail_req = min(mem_avail_req, size);
else
mem_avail_req = size;
count_t gen = mem_avail_gen;
while (gen == mem_avail_gen)
while ((mem_avail_frames < (1ULL << order)) ||
gen == mem_avail_gen)
condvar_wait(&mem_avail_cv, &mem_avail_mtx);
gen = mem_avail_gen;
mutex_unlock(&mem_avail_mtx);
 
#ifdef CONFIG_DEBUG
printf("Thread %" PRIu64 " woken up.\n", THREAD->tid);
mutex_lock(&mem_avail_mtx);
avail = mem_avail_frames;
mutex_unlock(&mem_avail_mtx);
 
printf("Thread %" PRIu64 " woken up, %u frames available.\n",
THREAD->tid, avail);
#endif
 
interrupts_restore(ipl);
goto loop;
}
pfn_t pfn = zone_frame_alloc(&zones.info[znum], order)
+ zones.info[znum].base;
v = zone_frame_alloc(zone, order);
v += zone->base;
 
spinlock_unlock(&zone->lock);
spinlock_unlock(&zones.lock);
mutex_lock(&mem_avail_mtx);
mem_avail_frames -= (1ULL << order);
mutex_unlock(&mem_avail_mtx);
 
interrupts_restore(ipl);
if (pzone)
*pzone = znum;
 
if (flags & FRAME_KA)
return (void *) PA2KA(PFN2ADDR(pfn));
return (void *) PFN2ADDR(pfn);
return (void *)PA2KA(PFN2ADDR(v));
return (void *)PFN2ADDR(v);
}
 
/** Free a frame.
*
* Find respective frame structure for supplied physical frame address.
* Decrement frame reference count. If it drops to zero, move the frame
* structure to free list.
* Decrement frame reference count.
* If it drops to zero, move the frame structure to free list.
*
* @param frame Physical Address of of the frame to be freed.
*
* @param frame Physical Address of of the frame to be freed.
*/
void frame_free(uintptr_t frame)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&zones.lock);
ipl_t ipl;
zone_t *zone;
pfn_t pfn = ADDR2PFN(frame);
 
ipl = interrupts_disable();
 
/*
* First, find host frame zone for addr.
*/
pfn_t pfn = ADDR2PFN(frame);
count_t znum = find_zone(pfn, 1, NULL);
zone = find_zone_and_lock(pfn, NULL);
ASSERT(zone);
ASSERT(znum != (count_t) -1);
zone_frame_free(zone, pfn - zone->base);
zone_frame_free(&zones.info[znum], pfn - zones.info[znum].base);
spinlock_unlock(&zone->lock);
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
/*
* Signal that some memory has been freed.
*/
mutex_lock(&mem_avail_mtx);
if (mem_avail_req > 0)
mem_avail_req--;
if (mem_avail_req == 0) {
mem_avail_gen++;
condvar_broadcast(&mem_avail_cv);
}
mem_avail_frames++;
mem_avail_gen++;
condvar_broadcast(&mem_avail_cv);
mutex_unlock(&mem_avail_mtx);
 
interrupts_restore(ipl);
}
 
/** Add reference to frame.
1110,24 → 1115,26
* Find respective frame structure for supplied PFN and
* increment frame reference count.
*
* @param pfn Frame number of the frame to be freed.
*
* @param pfn Frame number of the frame to be freed.
*/
void frame_reference_add(pfn_t pfn)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&zones.lock);
ipl_t ipl;
zone_t *zone;
frame_t *frame;
 
ipl = interrupts_disable();
/*
* First, find host frame zone for addr.
*/
count_t znum = find_zone(pfn, 1, NULL);
zone = find_zone_and_lock(pfn, NULL);
ASSERT(zone);
ASSERT(znum != (count_t) -1);
frame = &zone->frames[pfn - zone->base];
frame->refcount++;
zones.info[znum].frames[pfn - zones.info[znum].base].refcount++;
spinlock_unlock(&zones.lock);
spinlock_unlock(&zone->lock);
interrupts_restore(ipl);
}
 
1134,21 → 1141,18
/** Mark given range unavailable in frame zones. */
void frame_mark_unavailable(pfn_t start, count_t count)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&zones.lock);
unsigned int i;
zone_t *zone;
unsigned int prefzone = 0;
count_t i;
for (i = 0; i < count; i++) {
count_t znum = find_zone(start + i, 1, 0);
if (znum == (count_t) -1) /* PFN not found */
zone = find_zone_and_lock(start + i, &prefzone);
if (!zone) /* PFN not found */
continue;
zone_mark_unavailable(&zones.info[znum],
start + i - zones.info[znum].base);
zone_mark_unavailable(zone, start + i - zone->base);
 
spinlock_unlock(&zone->lock);
}
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
}
 
/** Initialize physical memory management. */
1160,7 → 1164,6
mutex_initialize(&mem_avail_mtx, MUTEX_ACTIVE);
condvar_initialize(&mem_avail_cv);
}
/* Tell the architecture to create some memory */
frame_arch_init();
if (config.cpu_active == 1) {
1175,28 → 1178,35
frame_mark_unavailable(pfn,
SIZE2FRAMES(init.tasks[i].size));
}
 
if (ballocs.size)
frame_mark_unavailable(ADDR2PFN(KA2PA(ballocs.base)),
SIZE2FRAMES(ballocs.size));
 
/* Black list first frame, as allocating NULL would
* fail in some places
*/
* fail in some places */
frame_mark_unavailable(0, 1);
}
}
 
 
/** Return total size of all zones. */
uint64_t zone_total_size(void)
{
ipl_t ipl = interrupts_disable();
zone_t *zone = NULL;
unsigned int i;
ipl_t ipl;
uint64_t total = 0;
 
ipl = interrupts_disable();
spinlock_lock(&zones.lock);
uint64_t total = 0;
count_t i;
for (i = 0; i < zones.count; i++)
total += (uint64_t) FRAMES2SIZE(zones.info[i].count);
for (i = 0; i < zones.count; i++) {
zone = zones.info[i];
spinlock_lock(&zone->lock);
total += (uint64_t) FRAMES2SIZE(zone->count);
spinlock_unlock(&zone->lock);
}
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
1207,14 → 1217,18
/** Prints list of zones. */
void zone_print_list(void)
{
#ifdef __32_BITS__
printf("# base address frames flags free frames busy frames\n");
printf("-- ------------ ------------ -------- ------------ ------------\n");
zone_t *zone = NULL;
unsigned int i;
ipl_t ipl;
 
#ifdef __32_BITS__
printf("# base address free frames busy frames\n");
printf("-- ------------ ------------ ------------\n");
#endif
 
#ifdef __64_BITS__
printf("# base address frames flags free frames busy frames\n");
printf("-- -------------------- ------------ -------- ------------ ------------\n");
printf("# base address free frames busy frames\n");
printf("-- -------------------- ------------ ------------\n");
#endif
/*
1227,10 → 1241,13
* we may end up with inaccurate output (e.g. a zone being skipped from
* the listing).
*/
count_t i;
for (i = 0;; i++) {
ipl_t ipl = interrupts_disable();
 
for (i = 0; ; i++) {
uintptr_t base;
count_t free_count;
count_t busy_count;
 
ipl = interrupts_disable();
spinlock_lock(&zones.lock);
if (i >= zones.count) {
1238,61 → 1255,56
interrupts_restore(ipl);
break;
}
 
zone = zones.info[i];
spinlock_lock(&zone->lock);
 
base = PFN2ADDR(zone->base);
free_count = zone->free_count;
busy_count = zone->busy_count;
 
spinlock_unlock(&zone->lock);
uintptr_t base = PFN2ADDR(zones.info[i].base);
count_t count = zones.info[i].count;
zone_flags_t flags = zones.info[i].flags;
count_t free_count = zones.info[i].free_count;
count_t busy_count = zones.info[i].busy_count;
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
bool available = zone_flags_available(flags);
printf("%-2" PRIc, i);
 
#ifdef __32_BITS__
printf(" %10p", base);
printf("%-2u %10p %12" PRIc " %12" PRIc "\n", i, base,
free_count, busy_count);
#endif
 
#ifdef __64_BITS__
printf(" %18p", base);
printf("%-2u %18p %12" PRIc " %12" PRIc "\n", i, base,
free_count, busy_count);
#endif
printf(" %12" PRIc " %c%c%c ", count,
available ? 'A' : ' ',
(flags & ZONE_RESERVED) ? 'R' : ' ',
(flags & ZONE_FIRMWARE) ? 'F' : ' ');
if (available)
printf("%12" PRIc " %12" PRIc,
free_count, busy_count);
printf("\n");
}
}
 
/** Prints zone details.
*
* @param num Zone base address or zone number.
*
* @param num Zone base address or zone number.
*/
void zone_print_one(count_t num)
void zone_print_one(unsigned int num)
{
ipl_t ipl = interrupts_disable();
zone_t *zone = NULL;
ipl_t ipl;
unsigned int i;
uintptr_t base;
count_t count;
count_t busy_count;
count_t free_count;
 
ipl = interrupts_disable();
spinlock_lock(&zones.lock);
count_t znum = (count_t) -1;
count_t i;
 
for (i = 0; i < zones.count; i++) {
if ((i == num) || (PFN2ADDR(zones.info[i].base) == num)) {
znum = i;
if ((i == num) || (PFN2ADDR(zones.info[i]->base) == num)) {
zone = zones.info[i];
break;
}
}
if (znum == (count_t) -1) {
if (!zone) {
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
printf("Zone not found.\n");
1299,33 → 1311,24
return;
}
uintptr_t base = PFN2ADDR(zones.info[i].base);
zone_flags_t flags = zones.info[i].flags;
count_t count = zones.info[i].count;
count_t free_count = zones.info[i].free_count;
count_t busy_count = zones.info[i].busy_count;
spinlock_lock(&zone->lock);
base = PFN2ADDR(zone->base);
count = zone->count;
busy_count = zone->busy_count;
free_count = zone->free_count;
spinlock_unlock(&zone->lock);
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
bool available = zone_flags_available(flags);
printf("Zone number: %" PRIc "\n", znum);
 
printf("Zone base address: %p\n", base);
printf("Zone size: %" PRIc " frames (%" PRIs " KiB)\n", count,
printf("Zone size: %" PRIc " frames (%" PRIs " KiB)\n", count,
SIZE2KB(FRAMES2SIZE(count)));
printf("Zone flags: %c%c%c\n",
available ? 'A' : ' ',
(flags & ZONE_RESERVED) ? 'R' : ' ',
(flags & ZONE_FIRMWARE) ? 'F' : ' ');
if (available) {
printf("Allocated space: %" PRIc " frames (%" PRIs " KiB)\n",
busy_count, SIZE2KB(FRAMES2SIZE(busy_count)));
printf("Available space: %" PRIc " frames (%" PRIs " KiB)\n",
free_count, SIZE2KB(FRAMES2SIZE(free_count)));
}
printf("Allocated space: %" PRIc " frames (%" PRIs " KiB)\n",
busy_count, SIZE2KB(FRAMES2SIZE(busy_count)));
printf("Available space: %" PRIc " frames (%" PRIs " KiB)\n",
free_count, SIZE2KB(FRAMES2SIZE(free_count)));
}
 
/** @}
*/
 
/branches/network/kernel/generic/src/mm/buddy.c
46,7 → 46,7
#include <macros.h>
 
/** Return size needed for the buddy configuration data. */
size_t buddy_conf_size(size_t max_order)
size_t buddy_conf_size(int max_order)
{
return sizeof(buddy_system_t) + (max_order + 1) * sizeof(link_t);
}
/branches/network/kernel/generic/src/mm/slab.c
173,7 → 173,7
slab_t *slab;
size_t fsize;
unsigned int i;
count_t zone = 0;
unsigned int zone = 0;
data = frame_alloc_generic(cache->order, FRAME_KA | flags, &zone);
if (!data) {
/branches/network/kernel/generic/src/mm/tlb.c
173,7 → 173,7
tlb_invalidate_pages(asid, page, count);
break;
default:
panic("Unknown type (%d).", type);
panic("unknown type (%d)\n", type);
break;
}
if (type == TLB_INVL_ALL)
/branches/network/kernel/generic/src/mm/backend_phys.c
77,7 → 77,7
page_mapping_insert(AS, addr, base + (addr - area->base),
as_area_get_flags(area));
if (!used_space_insert(area, ALIGN_DOWN(addr, PAGE_SIZE), 1))
panic("Cannot insert used space.");
panic("Could not insert used space.\n");
 
return AS_PF_OK;
}
/branches/network/kernel/generic/src/ipc/kbox.c
File deleted
/branches/network/kernel/generic/src/ipc/sysipc.c
42,9 → 42,8
#include <ipc/sysipc.h>
#include <ipc/irq.h>
#include <ipc/ipcrsc.h>
#include <ipc/kbox.h>
#include <udebug/udebug_ipc.h>
#include <arch/interrupt.h>
#include <print.h>
#include <syscall/copy.h>
#include <security/cap.h>
#include <mm/as.h>
296,11 → 295,10
/** Called before the request is sent.
*
* @param call Call structure with the request.
* @param phone Phone that the call will be sent through.
*
* @return Return 0 on success, ELIMIT or EPERM on error.
*/
static int request_preprocess(call_t *call, phone_t *phone)
static int request_preprocess(call_t *call)
{
int newphid;
size_t size;
342,10 → 340,6
return rc;
}
break;
#ifdef CONFIG_UDEBUG
case IPC_M_DEBUG_ALL:
return udebug_request_preprocess(call, phone);
#endif
default:
break;
}
375,7 → 369,6
 
if (call->buffer) {
/* This must be an affirmative answer to IPC_M_DATA_READ. */
/* or IPC_M_DEBUG_ALL/UDEBUG_M_MEM_READ... */
uintptr_t dst = IPC_GET_ARG1(call->data);
size_t size = IPC_GET_ARG2(call->data);
int rc = copy_to_uspace((void *) dst, call->buffer, size);
406,13 → 399,7
return -1;
}
IPC_SET_ARG5(call->data, phoneid);
}
switch (IPC_GET_METHOD(call->data)) {
case IPC_M_DEBUG_ALL:
return -1;
default:
break;
}
}
return 0;
}
 
454,18 → 441,11
IPC_SET_ARG4(call.data, 0);
IPC_SET_ARG5(call.data, 0);
 
if (!(res = request_preprocess(&call, phone))) {
#ifdef CONFIG_UDEBUG
udebug_stoppable_begin();
#endif
if (!(res = request_preprocess(&call))) {
rc = ipc_call_sync(phone, &call);
#ifdef CONFIG_UDEBUG
udebug_stoppable_end();
#endif
if (rc != EOK)
return rc;
process_answer(&call);
 
} else {
IPC_SET_RETVAL(call.data, res);
}
501,14 → 481,8
 
GET_CHECK_PHONE(phone, phoneid, return ENOENT);
 
if (!(res = request_preprocess(&call, phone))) {
#ifdef CONFIG_UDEBUG
udebug_stoppable_begin();
#endif
if (!(res = request_preprocess(&call))) {
rc = ipc_call_sync(phone, &call);
#ifdef CONFIG_UDEBUG
udebug_stoppable_end();
#endif
if (rc != EOK)
return rc;
process_answer(&call);
576,7 → 550,7
*/
IPC_SET_ARG5(call->data, 0);
 
if (!(res = request_preprocess(call, phone)))
if (!(res = request_preprocess(call)))
ipc_call(phone, call);
else
ipc_backsend_err(phone, call, res);
610,7 → 584,7
ipc_call_free(call);
return (unative_t) rc;
}
if (!(res = request_preprocess(call, phone)))
if (!(res = request_preprocess(call)))
ipc_call(phone, call);
else
ipc_backsend_err(phone, call, res);
618,8 → 592,7
return (unative_t) call;
}
 
/** Forward a received call to another destination - common code for both the
* fast and the slow version.
/** Forward a received call to another destination.
*
* @param callid Hash of the call to forward.
* @param phoneid Phone handle to use for forwarding.
626,21 → 599,23
* @param method New method to use for the forwarded call.
* @param arg1 New value of the first argument for the forwarded call.
* @param arg2 New value of the second argument for the forwarded call.
* @param arg3 New value of the third argument for the forwarded call.
* @param arg4 New value of the fourth argument for the forwarded call.
* @param arg5 New value of the fifth argument for the forwarded call.
* @param mode Flags that specify mode of the forward operation.
* @param slow If true, arg3, arg4 and arg5 are considered. Otherwise
* the function considers only the fast version arguments:
* i.e. arg1 and arg2.
*
* @return Return 0 on succes, otherwise return an error code.
*
* Warning: Make sure that ARG5 is not rewritten for certain system IPC
* In case the original method is a system method, ARG1, ARG2 and ARG3 are
* overwritten in the forwarded message with the new method and the new arg1 and
* arg2, respectively. Otherwise the METHOD, ARG1 and ARG2 are rewritten with
* the new method, arg1 and arg2, respectively. Also note there is a set of
* immutable methods, for which the new method and argument is not set and
* these values are ignored.
*
* Warning: When implementing support for changing additional payload
* arguments, make sure that ARG5 is not rewritten for certain
* system IPC
*/
static unative_t sys_ipc_forward_common(unative_t callid, unative_t phoneid,
unative_t method, unative_t arg1, unative_t arg2, unative_t arg3,
unative_t arg4, unative_t arg5, int mode, bool slow)
unative_t sys_ipc_forward_fast(unative_t callid, unative_t phoneid,
unative_t method, unative_t arg1, unative_t arg2, int mode)
{
call_t *call;
phone_t *phone;
648,7 → 623,7
call = get_call(callid);
if (!call)
return ENOENT;
 
call->flags |= IPC_CALL_FORWARDED;
 
GET_CHECK_PHONE(phone, phoneid, {
665,8 → 640,8
 
/*
* Userspace is not allowed to change method of system methods on
* forward, allow changing ARG1, ARG2, ARG3 and ARG4 by means of method,
* arg1, arg2 and arg3.
* forward, allow changing ARG1, ARG2 and ARG3 by means of method,
* arg1 and arg2.
* If the method is immutable, don't change anything.
*/
if (!method_is_immutable(IPC_GET_METHOD(call->data))) {
677,22 → 652,10
IPC_SET_ARG1(call->data, method);
IPC_SET_ARG2(call->data, arg1);
IPC_SET_ARG3(call->data, arg2);
if (slow) {
IPC_SET_ARG4(call->data, arg3);
/*
* For system methods we deliberately don't
* overwrite ARG5.
*/
}
} else {
IPC_SET_METHOD(call->data, method);
IPC_SET_ARG1(call->data, arg1);
IPC_SET_ARG2(call->data, arg2);
if (slow) {
IPC_SET_ARG3(call->data, arg3);
IPC_SET_ARG4(call->data, arg4);
IPC_SET_ARG5(call->data, arg5);
}
}
}
 
699,64 → 662,6
return ipc_forward(call, phone, &TASK->answerbox, mode);
}
 
/** Forward a received call to another destination - fast version.
*
* @param callid Hash of the call to forward.
* @param phoneid Phone handle to use for forwarding.
* @param method New method to use for the forwarded call.
* @param arg1 New value of the first argument for the forwarded call.
* @param arg2 New value of the second argument for the forwarded call.
* @param mode Flags that specify mode of the forward operation.
*
* @return Return 0 on succes, otherwise return an error code.
*
* In case the original method is a system method, ARG1, ARG2 and ARG3 are
* overwritten in the forwarded message with the new method and the new
* arg1 and arg2, respectively. Otherwise the METHOD, ARG1 and ARG2 are
* rewritten with the new method, arg1 and arg2, respectively. Also note there
* is a set of immutable methods, for which the new method and arguments are not
* set and these values are ignored.
*/
unative_t sys_ipc_forward_fast(unative_t callid, unative_t phoneid,
unative_t method, unative_t arg1, unative_t arg2, int mode)
{
return sys_ipc_forward_common(callid, phoneid, method, arg1, arg2, 0, 0,
0, mode, false);
}
 
/** Forward a received call to another destination - slow version.
*
* @param callid Hash of the call to forward.
* @param phoneid Phone handle to use for forwarding.
* @param data Userspace address of the new IPC data.
* @param mode Flags that specify mode of the forward operation.
*
* @return Return 0 on succes, otherwise return an error code.
*
* This function is the slow verision of the sys_ipc_forward_fast interface.
* It can copy all five new arguments and the new method from the userspace.
* It naturally extends the functionality of the fast version. For system
* methods, it additionally stores the new value of arg3 to ARG4. For non-system
* methods, it additionally stores the new value of arg3, arg4 and arg5,
* respectively, to ARG3, ARG4 and ARG5, respectively.
*/
unative_t sys_ipc_forward_slow(unative_t callid, unative_t phoneid,
ipc_data_t *data, int mode)
{
ipc_data_t newdata;
int rc;
 
rc = copy_from_uspace(&newdata.args, &data->args,
sizeof(newdata.args));
if (rc != 0)
return (unative_t) rc;
 
return sys_ipc_forward_common(callid, phoneid,
IPC_GET_METHOD(newdata), IPC_GET_ARG1(newdata),
IPC_GET_ARG2(newdata), IPC_GET_ARG3(newdata),
IPC_GET_ARG4(newdata), IPC_GET_ARG5(newdata), mode, true);
}
 
/** Answer an IPC call - fast version.
*
* This function can handle only two return arguments of payload, but is faster
880,17 → 785,9
{
call_t *call;
 
restart:
 
#ifdef CONFIG_UDEBUG
udebug_stoppable_begin();
#endif
restart:
call = ipc_wait_for_call(&TASK->answerbox, usec,
flags | SYNCH_FLAGS_INTERRUPTIBLE);
 
#ifdef CONFIG_UDEBUG
udebug_stoppable_end();
#endif
if (!call)
return 0;
 
912,16 → 809,11
 
ASSERT(! (call->flags & IPC_CALL_STATIC_ALLOC));
 
atomic_dec(&TASK->active_calls);
 
if (call->flags & IPC_CALL_DISCARD_ANSWER) {
ipc_call_free(call);
goto restart;
} else {
/*
* Decrement the counter of active calls only if the
* call is not an answer to IPC_M_PHONE_HUNGUP,
* which doesn't contribute to the counter.
*/
atomic_dec(&TASK->active_calls);
}
 
STRUCT_TO_USPACE(&calldata->args, &call->data.args);
936,21 → 828,6
/* Include phone address('id') of the caller in the request,
* copy whole call->data, not only call->data.args */
if (STRUCT_TO_USPACE(calldata, &call->data)) {
/*
* The callee will not receive this call and no one else has
* a chance to answer it. Reply with the EPARTY error code.
*/
ipc_data_t saved_data;
int saveddata = 0;
 
if (answer_need_old(call)) {
memcpy(&saved_data, &call->data, sizeof(call->data));
saveddata = 1;
}
IPC_SET_RETVAL(call->data, EPARTY);
(void) answer_preprocess(call, saveddata ? &saved_data : NULL);
ipc_answer(&TASK->answerbox, call);
return 0;
}
return (unative_t)call;
991,30 → 868,5
return 0;
}
 
#include <console/console.h>
 
/**
* Syscall connect to a task by id.
*
* @return Phone id on success, or negative error code.
*/
unative_t sys_ipc_connect_kbox(sysarg64_t *uspace_taskid_arg)
{
#ifdef CONFIG_UDEBUG
sysarg64_t taskid_arg;
int rc;
rc = copy_from_uspace(&taskid_arg, uspace_taskid_arg, sizeof(sysarg64_t));
if (rc != 0)
return (unative_t) rc;
 
LOG("sys_ipc_connect_kbox(%" PRIu64 ")\n", taskid_arg.value);
 
return ipc_connect_kbox(taskid_arg.value);
#else
return (unative_t) ENOTSUP;
#endif
}
 
/** @}
*/
/branches/network/kernel/generic/src/ipc/ipc.c
43,7 → 43,6
#include <synch/waitq.h>
#include <synch/synch.h>
#include <ipc/ipc.h>
#include <ipc/kbox.h>
#include <errno.h>
#include <mm/slab.h>
#include <arch.h>
52,7 → 51,6
#include <debug.h>
 
#include <print.h>
#include <console/console.h>
#include <proc/thread.h>
#include <arch/interrupt.h>
#include <ipc/irq.h>
203,9 → 201,9
call->flags |= IPC_CALL_ANSWERED;
 
if (call->flags & IPC_CALL_FORWARDED) {
if (call->caller_phone) {
if (call->data.caller_phone) {
/* Demasquerade the caller phone. */
call->data.phone = call->caller_phone;
call->data.phone = call->data.caller_phone;
}
}
 
362,8 → 360,8
spinlock_unlock(&oldbox->lock);
 
if (mode & IPC_FF_ROUTE_FROM_ME) {
if (!call->caller_phone)
call->caller_phone = call->data.phone;
if (!call->data.caller_phone)
call->data.caller_phone = call->data.phone;
call->data.phone = newphone;
}
 
429,7 → 427,7
*
* @param lst Head of the list to be cleaned up.
*/
void ipc_cleanup_call_list(link_t *lst)
static void ipc_cleanup_call_list(link_t *lst)
{
call_t *call;
 
444,31 → 442,33
}
}
 
/** Disconnects all phones connected to an answerbox.
/** Cleans up all IPC communication of the current task.
*
* @param box Answerbox to disconnect phones from.
* @param notify_box If true, the answerbox will get a hangup message for
* each disconnected phone.
* Note: ipc_hangup sets returning answerbox to TASK->answerbox, you
* have to change it as well if you want to cleanup other tasks than TASK.
*/
void ipc_answerbox_slam_phones(answerbox_t *box, bool notify_box)
void ipc_cleanup(void)
{
int i;
call_t *call;
phone_t *phone;
DEADLOCK_PROBE_INIT(p_phonelck);
ipl_t ipl;
call_t *call;
 
call = notify_box ? ipc_call_alloc(0) : NULL;
/* Disconnect all our phones ('ipc_phone_hangup') */
for (i = 0; i < IPC_MAX_PHONES; i++)
ipc_phone_hangup(&TASK->phones[i]);
 
/* Disconnect all connected irqs */
ipc_irq_cleanup(&TASK->answerbox);
 
/* Disconnect all phones connected to our answerbox */
restart_phones:
ipl = interrupts_disable();
spinlock_lock(&box->lock);
while (!list_empty(&box->connected_phones)) {
phone = list_get_instance(box->connected_phones.next,
spinlock_lock(&TASK->answerbox.lock);
while (!list_empty(&TASK->answerbox.connected_phones)) {
phone = list_get_instance(TASK->answerbox.connected_phones.next,
phone_t, link);
if (SYNCH_FAILED(mutex_trylock(&phone->lock))) {
spinlock_unlock(&box->lock);
interrupts_restore(ipl);
spinlock_unlock(&TASK->answerbox.lock);
DEADLOCK_PROBE(p_phonelck, DEADLOCK_THRESHOLD);
goto restart_phones;
}
475,70 → 475,13
/* Disconnect phone */
ASSERT(phone->state == IPC_PHONE_CONNECTED);
 
phone->state = IPC_PHONE_SLAMMED;
list_remove(&phone->link);
phone->state = IPC_PHONE_SLAMMED;
 
if (notify_box) {
mutex_unlock(&phone->lock);
spinlock_unlock(&box->lock);
interrupts_restore(ipl);
 
/*
* Send one message to the answerbox for each
* phone. Used to make sure the kbox thread
* wakes up after the last phone has been
* disconnected.
*/
IPC_SET_METHOD(call->data, IPC_M_PHONE_HUNGUP);
call->flags |= IPC_CALL_DISCARD_ANSWER;
_ipc_call(phone, box, call);
 
/* Allocate another call in advance */
call = ipc_call_alloc(0);
 
/* Must start again */
goto restart_phones;
}
 
mutex_unlock(&phone->lock);
}
 
spinlock_unlock(&box->lock);
interrupts_restore(ipl);
 
/* Free unused call */
if (call)
ipc_call_free(call);
}
 
/** Cleans up all IPC communication of the current task.
*
* Note: ipc_hangup sets returning answerbox to TASK->answerbox, you
* have to change it as well if you want to cleanup other tasks than TASK.
*/
void ipc_cleanup(void)
{
int i;
call_t *call;
 
/* Disconnect all our phones ('ipc_phone_hangup') */
for (i = 0; i < IPC_MAX_PHONES; i++)
ipc_phone_hangup(&TASK->phones[i]);
 
/* Disconnect all connected irqs */
ipc_irq_cleanup(&TASK->answerbox);
 
/* Disconnect all phones connected to our regular answerbox */
ipc_answerbox_slam_phones(&TASK->answerbox, false);
 
#ifdef CONFIG_UDEBUG
/* Clean up kbox thread and communications */
ipc_kbox_cleanup();
#endif
 
/* Answer all messages in 'calls' and 'dispatched_calls' queues */
spinlock_lock(&TASK->answerbox.lock);
ipc_cleanup_call_list(&TASK->answerbox.dispatched_calls);
ipc_cleanup_call_list(&TASK->answerbox.calls);
spinlock_unlock(&TASK->answerbox.lock);
574,13 → 517,7
(call->flags & IPC_CALL_NOTIF));
ASSERT(!(call->flags & IPC_CALL_STATIC_ALLOC));
/*
* Record the receipt of this call in the current task's counter
* of active calls. IPC_M_PHONE_HUNGUP calls do not contribute
* to this counter so do not record answers to them either.
*/
if (!(call->flags & IPC_CALL_DISCARD_ANSWER))
atomic_dec(&TASK->active_calls);
atomic_dec(&TASK->active_calls);
ipc_call_free(call);
}
}
655,9 → 592,8
tmp = tmp->next) {
call = list_get_instance(tmp, call_t, link);
printf("Callid: %p Srctask:%" PRIu64 " M:%" PRIun
" A1:%" PRIun " A2:%" PRIun " A3:%" PRIun
" A4:%" PRIun " A5:%" PRIun " Flags:%x\n", call,
call->sender->taskid,
" A1:%" PRIun " A2:%" PRIun " A3:%" PRIun
" A4:%" PRIun " A5:%" PRIun " Flags:%x\n", call, call->sender->taskid,
IPC_GET_METHOD(call->data), IPC_GET_ARG1(call->data),
IPC_GET_ARG2(call->data), IPC_GET_ARG3(call->data),
IPC_GET_ARG4(call->data), IPC_GET_ARG5(call->data),
670,9 → 606,8
tmp = tmp->next) {
call = list_get_instance(tmp, call_t, link);
printf("Callid: %p Srctask:%" PRIu64 " M:%" PRIun
" A1:%" PRIun " A2:%" PRIun " A3:%" PRIun
" A4:%" PRIun " A5:%" PRIun " Flags:%x\n", call,
call->sender->taskid,
" A1:%" PRIun " A2:%" PRIun " A3:%" PRIun
" A4:%" PRIun " A5:%" PRIun " Flags:%x\n", call, call->sender->taskid,
IPC_GET_METHOD(call->data), IPC_GET_ARG1(call->data),
IPC_GET_ARG2(call->data), IPC_GET_ARG3(call->data),
IPC_GET_ARG4(call->data), IPC_GET_ARG5(call->data),
680,12 → 615,11
}
/* Print answerbox - calls */
printf("ABOX - ANSWERS:\n");
for (tmp = task->answerbox.answers.next;
tmp != &task->answerbox.answers;
for (tmp = task->answerbox.answers.next; tmp != &task->answerbox.answers;
tmp = tmp->next) {
call = list_get_instance(tmp, call_t, link);
printf("Callid:%p M:%" PRIun " A1:%" PRIun " A2:%" PRIun
" A3:%" PRIun " A4:%" PRIun " A5:%" PRIun " Flags:%x\n",
" A3:%" PRIun " A4:%" PRIun " A5:%" PRIun " Flags:%x\n",
call, IPC_GET_METHOD(call->data), IPC_GET_ARG1(call->data),
IPC_GET_ARG2(call->data), IPC_GET_ARG3(call->data),
IPC_GET_ARG4(call->data), IPC_GET_ARG5(call->data),
/branches/network/kernel/generic/src/ipc/irq.c
44,28 → 44,8
* - ARG1: payload modified by a 'top-half' handler
* - ARG2: payload modified by a 'top-half' handler
* - ARG3: payload modified by a 'top-half' handler
* - ARG4: payload modified by a 'top-half' handler
* - ARG5: payload modified by a 'top-half' handler
* - in_phone_hash: interrupt counter (may be needed to assure correct order
* in multithreaded drivers)
*
* Note on synchronization for ipc_irq_register(), ipc_irq_unregister(),
* ipc_irq_cleanup() and IRQ handlers:
*
* By always taking all of the uspace IRQ hash table lock, IRQ structure lock
* and answerbox lock, we can rule out race conditions between the
* registration functions and also the cleanup function. Thus the observer can
* either see the IRQ structure present in both the hash table and the
* answerbox list or absent in both. Views in which the IRQ structure would be
* linked in the hash table but not in the answerbox list, or vice versa, are
* not possible.
*
* By always taking the hash table lock and the IRQ structure lock, we can
* rule out a scenario in which we would free up an IRQ structure, which is
* still referenced by, for example, an IRQ handler. The locking scheme forces
* us to lock the IRQ structure only after any progressing IRQs on that
* structure are finished. Because we hold the hash table lock, we prevent new
* IRQs from taking new references to the IRQ structure.
*/
 
#include <arch.h>
78,8 → 58,78
#include <console/console.h>
#include <print.h>
 
/** Free the top-half pseudocode.
/** Execute code associated with IRQ notification.
*
* @param call Notification call.
* @param code Top-half pseudocode.
*/
static void code_execute(call_t *call, irq_code_t *code)
{
unsigned int i;
unative_t dstval = 0;
if (!code)
return;
for (i = 0; i < code->cmdcount; i++) {
switch (code->cmds[i].cmd) {
case CMD_MEM_READ_1:
dstval = *((uint8_t *) code->cmds[i].addr);
break;
case CMD_MEM_READ_2:
dstval = *((uint16_t *) code->cmds[i].addr);
break;
case CMD_MEM_READ_4:
dstval = *((uint32_t *) code->cmds[i].addr);
break;
case CMD_MEM_READ_8:
dstval = *((uint64_t *) code->cmds[i].addr);
break;
case CMD_MEM_WRITE_1:
*((uint8_t *) code->cmds[i].addr) = code->cmds[i].value;
break;
case CMD_MEM_WRITE_2:
*((uint16_t *) code->cmds[i].addr) =
code->cmds[i].value;
break;
case CMD_MEM_WRITE_4:
*((uint32_t *) code->cmds[i].addr) =
code->cmds[i].value;
break;
case CMD_MEM_WRITE_8:
*((uint64_t *) code->cmds[i].addr) =
code->cmds[i].value;
break;
#if defined(ia32) || defined(amd64)
case CMD_PORT_READ_1:
dstval = inb((long) code->cmds[i].addr);
break;
case CMD_PORT_WRITE_1:
outb((long) code->cmds[i].addr, code->cmds[i].value);
break;
#endif
#if defined(ia64) && defined(SKI)
case CMD_IA64_GETCHAR:
dstval = _getc(&ski_uconsole);
break;
#endif
#if defined(ppc32)
case CMD_PPC32_GETCHAR:
dstval = cuda_get_scancode();
break;
#endif
default:
break;
}
if (code->cmds[i].dstarg && code->cmds[i].dstarg <
IPC_CALL_LEN) {
call->data.args[code->cmds[i].dstarg] = dstval;
}
}
}
 
/** Free top-half pseudocode.
*
* @param code Pointer to the top-half pseudocode.
*/
static void code_free(irq_code_t *code)
90,7 → 140,7
}
}
 
/** Copy the top-half pseudocode from userspace into the kernel.
/** Copy top-half pseudocode from userspace into the kernel.
*
* @param ucode Userspace address of the top-half pseudocode.
*
126,6 → 176,38
return code;
}
 
/** Unregister task from IRQ notification.
*
* @param box Answerbox associated with the notification.
* @param inr IRQ number.
* @param devno Device number.
*/
void ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno)
{
ipl_t ipl;
irq_t *irq;
 
ipl = interrupts_disable();
irq = irq_find_and_lock(inr, devno);
if (irq) {
if (irq->notif_cfg.answerbox == box) {
code_free(irq->notif_cfg.code);
irq->notif_cfg.notify = false;
irq->notif_cfg.answerbox = NULL;
irq->notif_cfg.code = NULL;
irq->notif_cfg.method = 0;
irq->notif_cfg.counter = 0;
 
spinlock_lock(&box->irq_lock);
list_remove(&irq->notif_cfg.link);
spinlock_unlock(&box->irq_lock);
spinlock_unlock(&irq->lock);
}
}
interrupts_restore(ipl);
}
 
/** Register an answerbox as a receiving end for IRQ notifications.
*
* @param box Receiving answerbox.
142,10 → 224,6
ipl_t ipl;
irq_code_t *code;
irq_t *irq;
unative_t key[] = {
(unative_t) inr,
(unative_t) devno
};
 
if (ucode) {
code = code_from_uspace(ucode);
155,15 → 233,21
code = NULL;
}
 
/*
* Allocate and populate the IRQ structure.
*/
irq = malloc(sizeof(irq_t), 0);
irq_initialize(irq);
irq->devno = devno;
irq->inr = inr;
irq->claim = ipc_irq_top_half_claim;
irq->handler = ipc_irq_top_half_handler;
ipl = interrupts_disable();
irq = irq_find_and_lock(inr, devno);
if (!irq) {
interrupts_restore(ipl);
code_free(code);
return ENOENT;
}
if (irq->notif_cfg.answerbox) {
spinlock_unlock(&irq->lock);
interrupts_restore(ipl);
code_free(code);
return EEXISTS;
}
irq->notif_cfg.notify = true;
irq->notif_cfg.answerbox = box;
irq->notif_cfg.method = method;
170,140 → 254,14
irq->notif_cfg.code = code;
irq->notif_cfg.counter = 0;
 
/*
* Enlist the IRQ structure in the uspace IRQ hash table and the
* answerbox's list.
*/
ipl = interrupts_disable();
spinlock_lock(&irq_uspace_hash_table_lock);
spinlock_lock(&irq->lock);
spinlock_lock(&box->irq_lock);
if (hash_table_find(&irq_uspace_hash_table, key)) {
code_free(code);
spinlock_unlock(&box->irq_lock);
spinlock_unlock(&irq->lock);
spinlock_unlock(&irq_uspace_hash_table_lock);
free(irq);
interrupts_restore(ipl);
return EEXISTS;
}
hash_table_insert(&irq_uspace_hash_table, key, &irq->link);
list_append(&irq->notif_cfg.link, &box->irq_head);
spinlock_unlock(&box->irq_lock);
spinlock_unlock(&irq->lock);
spinlock_unlock(&irq_uspace_hash_table_lock);
 
interrupts_restore(ipl);
return EOK;
}
 
/** Unregister task from IRQ notification.
*
* @param box Answerbox associated with the notification.
* @param inr IRQ number.
* @param devno Device number.
*/
int ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno)
{
ipl_t ipl;
unative_t key[] = {
(unative_t) inr,
(unative_t) devno
};
link_t *lnk;
irq_t *irq;
 
ipl = interrupts_disable();
spinlock_lock(&irq_uspace_hash_table_lock);
lnk = hash_table_find(&irq_uspace_hash_table, key);
if (!lnk) {
spinlock_unlock(&irq_uspace_hash_table_lock);
interrupts_restore(ipl);
return ENOENT;
}
irq = hash_table_get_instance(lnk, irq_t, link);
spinlock_lock(&irq->lock);
spinlock_lock(&box->irq_lock);
ASSERT(irq->notif_cfg.answerbox == box);
/* Free up the pseudo code and associated structures. */
code_free(irq->notif_cfg.code);
 
/* Remove the IRQ from the answerbox's list. */
list_remove(&irq->notif_cfg.link);
 
/* Remove the IRQ from the uspace IRQ hash table. */
hash_table_remove(&irq_uspace_hash_table, key, 2);
spinlock_unlock(&irq_uspace_hash_table_lock);
spinlock_unlock(&irq->lock);
spinlock_unlock(&box->irq_lock);
/* Free up the IRQ structure. */
free(irq);
interrupts_restore(ipl);
return EOK;
}
 
 
/** Disconnect all IRQ notifications from an answerbox.
*
* This function is effective because the answerbox contains
* list of all irq_t structures that are registered to
* send notifications to it.
*
* @param box Answerbox for which we want to carry out the cleanup.
*/
void ipc_irq_cleanup(answerbox_t *box)
{
ipl_t ipl;
loop:
ipl = interrupts_disable();
spinlock_lock(&irq_uspace_hash_table_lock);
spinlock_lock(&box->irq_lock);
while (box->irq_head.next != &box->irq_head) {
link_t *cur = box->irq_head.next;
irq_t *irq;
DEADLOCK_PROBE_INIT(p_irqlock);
unative_t key[2];
irq = list_get_instance(cur, irq_t, notif_cfg.link);
if (!spinlock_trylock(&irq->lock)) {
/*
* Avoid deadlock by trying again.
*/
spinlock_unlock(&box->irq_lock);
spinlock_unlock(&irq_uspace_hash_table_lock);
interrupts_restore(ipl);
DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD);
goto loop;
}
key[0] = irq->inr;
key[1] = irq->devno;
ASSERT(irq->notif_cfg.answerbox == box);
/* Unlist from the answerbox. */
list_remove(&irq->notif_cfg.link);
/* Remove from the hash table. */
hash_table_remove(&irq_uspace_hash_table, key, 2);
/* Free up the pseudo code and associated structures. */
code_free(irq->notif_cfg.code);
spinlock_unlock(&irq->lock);
free(irq);
}
spinlock_unlock(&box->irq_lock);
spinlock_unlock(&irq_uspace_hash_table_lock);
interrupts_restore(ipl);
return 0;
}
 
/** Add a call to the proper answerbox queue.
322,158 → 280,125
waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST);
}
 
/** Apply the top-half pseudo code to find out whether to accept the IRQ or not.
/** Send notification message.
*
* @param irq IRQ structure.
*
* @return IRQ_ACCEPT if the interrupt is accepted by the
* pseudocode. IRQ_DECLINE otherwise.
* @param a1 Driver-specific payload argument.
* @param a2 Driver-specific payload argument.
* @param a3 Driver-specific payload argument.
* @param a4 Driver-specific payload argument.
* @param a5 Driver-specific payload argument.
*/
irq_ownership_t ipc_irq_top_half_claim(irq_t *irq)
void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3,
unative_t a4, unative_t a5)
{
unsigned int i;
unative_t dstval;
irq_code_t *code = irq->notif_cfg.code;
unative_t *scratch = irq->notif_cfg.scratch;
call_t *call;
 
if (!irq->notif_cfg.notify)
return IRQ_DECLINE;
if (!code)
return IRQ_DECLINE;
for (i = 0; i < code->cmdcount; i++) {
unsigned int srcarg = code->cmds[i].srcarg;
unsigned int dstarg = code->cmds[i].dstarg;
spinlock_lock(&irq->lock);
 
if (irq->notif_cfg.answerbox) {
call = ipc_call_alloc(FRAME_ATOMIC);
if (!call) {
spinlock_unlock(&irq->lock);
return;
}
call->flags |= IPC_CALL_NOTIF;
IPC_SET_METHOD(call->data, irq->notif_cfg.method);
IPC_SET_ARG1(call->data, a1);
IPC_SET_ARG2(call->data, a2);
IPC_SET_ARG3(call->data, a3);
IPC_SET_ARG4(call->data, a4);
IPC_SET_ARG5(call->data, a5);
/* Put a counter to the message */
call->priv = ++irq->notif_cfg.counter;
if (srcarg >= IPC_CALL_LEN)
break;
if (dstarg >= IPC_CALL_LEN)
break;
switch (code->cmds[i].cmd) {
case CMD_PIO_READ_8:
dstval = pio_read_8((ioport8_t *) code->cmds[i].addr);
if (dstarg)
scratch[dstarg] = dstval;
break;
case CMD_PIO_READ_16:
dstval = pio_read_16((ioport16_t *) code->cmds[i].addr);
if (dstarg)
scratch[dstarg] = dstval;
break;
case CMD_PIO_READ_32:
dstval = pio_read_32((ioport32_t *) code->cmds[i].addr);
if (dstarg)
scratch[dstarg] = dstval;
break;
case CMD_PIO_WRITE_8:
pio_write_8((ioport8_t *) code->cmds[i].addr,
(uint8_t) code->cmds[i].value);
break;
case CMD_PIO_WRITE_16:
pio_write_16((ioport16_t *) code->cmds[i].addr,
(uint16_t) code->cmds[i].value);
break;
case CMD_PIO_WRITE_32:
pio_write_32((ioport32_t *) code->cmds[i].addr,
(uint32_t) code->cmds[i].value);
break;
case CMD_BTEST:
if (srcarg && dstarg) {
dstval = scratch[srcarg] & code->cmds[i].value;
scratch[dstarg] = dstval;
}
break;
case CMD_PREDICATE:
if (srcarg && !scratch[srcarg]) {
i += code->cmds[i].value;
continue;
}
break;
case CMD_ACCEPT:
return IRQ_ACCEPT;
break;
case CMD_DECLINE:
default:
return IRQ_DECLINE;
}
send_call(irq, call);
}
return IRQ_DECLINE;
spinlock_unlock(&irq->lock);
}
 
 
/* IRQ top-half handler.
/** Notify a task that an IRQ had occurred.
*
* We expect interrupts to be disabled and the irq->lock already held.
*
* @param irq IRQ structure.
*/
void ipc_irq_top_half_handler(irq_t *irq)
void ipc_irq_send_notif(irq_t *irq)
{
call_t *call;
 
ASSERT(irq);
 
if (irq->notif_cfg.answerbox) {
call_t *call;
 
call = ipc_call_alloc(FRAME_ATOMIC);
if (!call)
if (!call) {
return;
}
call->flags |= IPC_CALL_NOTIF;
/* Put a counter to the message */
call->priv = ++irq->notif_cfg.counter;
 
/* Set up args */
IPC_SET_METHOD(call->data, irq->notif_cfg.method);
IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]);
IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]);
IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]);
IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]);
IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]);
 
/* Execute code to handle irq */
code_execute(call, irq->notif_cfg.code);
send_call(irq, call);
}
}
 
/** Send notification message.
/** Disconnect all IRQ notifications from an answerbox.
*
* @param irq IRQ structure.
* @param a1 Driver-specific payload argument.
* @param a2 Driver-specific payload argument.
* @param a3 Driver-specific payload argument.
* @param a4 Driver-specific payload argument.
* @param a5 Driver-specific payload argument.
* This function is effective because the answerbox contains
* list of all irq_t structures that are registered to
* send notifications to it.
*
* @param box Answerbox for which we want to carry out the cleanup.
*/
void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3,
unative_t a4, unative_t a5)
void ipc_irq_cleanup(answerbox_t *box)
{
call_t *call;
 
spinlock_lock(&irq->lock);
 
if (irq->notif_cfg.answerbox) {
call = ipc_call_alloc(FRAME_ATOMIC);
if (!call) {
spinlock_unlock(&irq->lock);
return;
ipl_t ipl;
loop:
ipl = interrupts_disable();
spinlock_lock(&box->irq_lock);
while (box->irq_head.next != &box->irq_head) {
link_t *cur = box->irq_head.next;
irq_t *irq;
DEADLOCK_PROBE_INIT(p_irqlock);
irq = list_get_instance(cur, irq_t, notif_cfg.link);
if (!spinlock_trylock(&irq->lock)) {
/*
* Avoid deadlock by trying again.
*/
spinlock_unlock(&box->irq_lock);
interrupts_restore(ipl);
DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD);
goto loop;
}
call->flags |= IPC_CALL_NOTIF;
/* Put a counter to the message */
call->priv = ++irq->notif_cfg.counter;
ASSERT(irq->notif_cfg.answerbox == box);
list_remove(&irq->notif_cfg.link);
/*
* Don't forget to free any top-half pseudocode.
*/
code_free(irq->notif_cfg.code);
irq->notif_cfg.notify = false;
irq->notif_cfg.answerbox = NULL;
irq->notif_cfg.code = NULL;
irq->notif_cfg.method = 0;
irq->notif_cfg.counter = 0;
 
IPC_SET_METHOD(call->data, irq->notif_cfg.method);
IPC_SET_ARG1(call->data, a1);
IPC_SET_ARG2(call->data, a2);
IPC_SET_ARG3(call->data, a3);
IPC_SET_ARG4(call->data, a4);
IPC_SET_ARG5(call->data, a5);
send_call(irq, call);
spinlock_unlock(&irq->lock);
}
spinlock_unlock(&irq->lock);
spinlock_unlock(&box->irq_lock);
interrupts_restore(ipl);
}
 
/** @}
/branches/network/kernel/generic/src/main/kinit.c
32,7 → 32,7
 
/**
* @file
* @brief Kernel initialization thread.
* @brief Kernel initialization thread.
*
* This file contains kinit kernel thread which carries out
* high level system initialization.
64,8 → 64,6
#include <security/cap.h>
#include <lib/rd.h>
#include <ipc/ipc.h>
#include <debug.h>
#include <string.h>
 
#ifdef CONFIG_SMP
#include <smp/smp.h>
74,15 → 72,6
#include <synch/waitq.h>
#include <synch/spinlock.h>
 
#define ALIVE_CHARS 4
 
#ifdef CONFIG_KCONSOLE
static char alive[ALIVE_CHARS] = "-\\|/";
#endif
 
#define INIT_PREFIX "init:"
#define INIT_PREFIX_LEN 5
 
/** Kernel initialization thread.
*
* kinit takes care of higher level kernel
93,19 → 82,16
*/
void kinit(void *arg)
{
thread_t *t;
 
#if defined(CONFIG_SMP) || defined(CONFIG_KCONSOLE)
thread_t *thread;
#endif
/*
* Detach kinit as nobody will call thread_join_timeout() on it.
*/
thread_detach(THREAD);
 
interrupts_disable();
#ifdef CONFIG_SMP
 
#ifdef CONFIG_SMP
if (config.cpu_count > 1) {
waitq_initialize(&ap_completion_wq);
/*
114,18 → 100,24
* not mess together with kcpulb threads.
* Just a beautification.
*/
thread = thread_create(kmp, NULL, TASK, THREAD_FLAG_WIRED, "kmp", true);
if (thread != NULL) {
spinlock_lock(&thread->lock);
thread->cpu = &cpus[0];
spinlock_unlock(&thread->lock);
thread_ready(thread);
if ((t = thread_create(kmp, NULL, TASK, THREAD_FLAG_WIRED,
"kmp", true))) {
spinlock_lock(&t->lock);
t->cpu = &cpus[0];
spinlock_unlock(&t->lock);
thread_ready(t);
} else
panic("Unable to create kmp thread.");
thread_join(thread);
thread_detach(thread);
panic("thread_create/kmp\n");
thread_join(t);
thread_detach(t);
}
#endif /* CONFIG_SMP */
/*
* Now that all CPUs are up, we can report what we've found.
*/
cpu_list();
 
#ifdef CONFIG_SMP
if (config.cpu_count > 1) {
count_t i;
133,36 → 125,35
* For each CPU, create its load balancing thread.
*/
for (i = 0; i < config.cpu_count; i++) {
thread = thread_create(kcpulb, NULL, TASK, THREAD_FLAG_WIRED, "kcpulb", true);
if (thread != NULL) {
spinlock_lock(&thread->lock);
thread->cpu = &cpus[i];
spinlock_unlock(&thread->lock);
thread_ready(thread);
 
if ((t = thread_create(kcpulb, NULL, TASK,
THREAD_FLAG_WIRED, "kcpulb", true))) {
spinlock_lock(&t->lock);
t->cpu = &cpus[i];
spinlock_unlock(&t->lock);
thread_ready(t);
} else
printf("Unable to create kcpulb thread for cpu" PRIc "\n", i);
panic("thread_create/kcpulb\n");
 
}
}
#endif /* CONFIG_SMP */
 
/*
* At this point SMP, if present, is configured.
*/
arch_post_smp_init();
#ifdef CONFIG_KCONSOLE
if (stdin) {
/*
* Create kernel console.
*/
thread = thread_create(kconsole_thread, NULL, TASK, 0, "kconsole", false);
if (thread != NULL)
thread_ready(thread);
else
printf("Unable to create kconsole thread\n");
}
#endif /* CONFIG_KCONSOLE */
 
/*
* Create kernel console.
*/
t = thread_create(kconsole, (void *) "kconsole", TASK, 0, "kconsole",
false);
if (t)
thread_ready(t);
else
panic("thread_create/kconsole\n");
 
interrupts_enable();
/*
173,31 → 164,14
for (i = 0; i < init.cnt; i++) {
if (init.tasks[i].addr % FRAME_SIZE) {
printf("init[%" PRIc "].addr is not frame aligned\n", i);
printf("init[%" PRIc "].addr is not frame aligned", i);
continue;
}
/*
* Construct task name from the 'init:' prefix and the
* name stored in the init structure (if any).
*/
char namebuf[TASK_NAME_BUFLEN];
char *name;
name = init.tasks[i].name;
if (name[0] == '\0')
name = "<unknown>";
ASSERT(TASK_NAME_BUFLEN >= INIT_PREFIX_LEN);
strncpy(namebuf, INIT_PREFIX, TASK_NAME_BUFLEN);
strncpy(namebuf + INIT_PREFIX_LEN, name,
TASK_NAME_BUFLEN - INIT_PREFIX_LEN);
 
int rc = program_create_from_image((void *) init.tasks[i].addr,
namebuf, &programs[i]);
if ((rc == 0) && (programs[i].task != NULL)) {
&programs[i]);
 
if (rc == 0 && programs[i].task != NULL) {
/*
* Set capabilities to init userspace tasks.
*/
210,42 → 184,31
/* It was the program loader and was registered */
} else {
/* RAM disk image */
int rd = init_rd((rd_header_t *) init.tasks[i].addr, init.tasks[i].size);
int rd = init_rd((rd_header_t *) init.tasks[i].addr,
init.tasks[i].size);
if (rd != RE_OK)
printf("Init binary %" PRIc " not used (error %d)\n", i, rd);
printf("Init binary %" PRIc " not used, error "
"code %d.\n", i, rd);
}
}
/*
* Run user tasks with small delays
* to avoid intermixed klog output.
*
* TODO: This certainly does not guarantee
* anything, it just works in most of the
* cases. Some better way how to achieve
* nice klog output should be found.
* Run user tasks with reasonable delays
*/
for (i = 0; i < init.cnt; i++) {
if (programs[i].task != NULL) {
thread_usleep(50000);
program_ready(&programs[i]);
thread_usleep(10000);
}
}
#ifdef CONFIG_KCONSOLE
 
if (!stdin) {
thread_sleep(10);
printf("kinit: No stdin\nKernel alive: .");
unsigned int i = 0;
while (true) {
printf("\b%c", alive[i % ALIVE_CHARS]);
while (1) {
thread_sleep(1);
i++;
printf("kinit... ");
}
}
#endif /* CONFIG_KCONSOLE */
}
 
/** @}
/branches/network/kernel/generic/src/main/main.c
81,8 → 81,8
#include <adt/btree.h>
#include <smp/smp.h>
#include <ddi/ddi.h>
#include <main/main.h>
 
 
/** Global configuration structure. */
config_t config;
 
105,15 → 105,18
* appropriate sizes and addresses.
*/
 
/** Virtual address of where the kernel is loaded. */
/**< Virtual address of where the kernel is loaded. */
uintptr_t hardcoded_load_address = 0;
/** Size of the kernel code in bytes. */
/**< Size of the kernel code in bytes. */
size_t hardcoded_ktext_size = 0;
/** Size of the kernel data in bytes. */
/**< Size of the kernel data in bytes. */
size_t hardcoded_kdata_size = 0;
/** Lowest safe stack virtual address. */
/**< Lowest safe stack virtual address. */
uintptr_t stack_safe = 0;
 
void main_bsp(void);
void main_ap(void);
 
/*
* These two functions prevent stack from underflowing during the
* kernel boot phase when SP is set to the very top of the reserved
188,6 → 191,8
{
/* Keep this the first thing. */
the_initialize(THE);
 
LOG();
version_print();
196,7 → 201,7
config.base, config.kernel_size, config.stack_base,
config.stack_size);
#ifdef CONFIG_KCONSOLE
 
/*
* kconsole data structures must be initialized very early
* because other subsystems will register their respective
203,7 → 208,6
* commands.
*/
LOG_EXEC(kconsole_init());
#endif
/*
* Exception handler initialization, before architecture
210,7 → 214,7
* starts adding its own handlers
*/
LOG_EXEC(exc_init());
 
/*
* Memory management subsystems initialization.
*/
248,7 → 252,7
if (init.cnt > 0) {
count_t i;
for (i = 0; i < init.cnt; i++)
LOG("init[%" PRIc "].addr=%#" PRIp ", init[%" PRIc
printf("init[%" PRIc "].addr=%#" PRIp ", init[%" PRIc
"].size=%#" PRIs "\n", i, init.tasks[i].addr, i,
init.tasks[i].size);
} else
256,25 → 260,21
LOG_EXEC(ipc_init());
LOG_EXEC(klog_init());
#ifdef CONFIG_KCONSOLE
LOG_EXEC(kconsole_notify_init());
#endif
 
/*
* Create kernel task.
*/
task_t *kernel = task_create(AS_KERNEL, "kernel");
if (!kernel)
panic("Cannot create kernel task.");
panic("Can't create kernel task\n");
/*
* Create the first thread.
*/
thread_t *kinit_thread
= thread_create(kinit, NULL, kernel, 0, "kinit", true);
thread_t *kinit_thread = thread_create(kinit, NULL, kernel, 0, "kinit",
true);
if (!kinit_thread)
panic("Cannot create kinit thread.");
panic("Can't create kinit thread\n");
LOG_EXEC(thread_ready(kinit_thread));
/*
328,7 → 328,6
* collide with another CPU coming up. To prevent this, we
* switch to this cpu's private stack prior to waking kmp up.
*/
context_save(&CPU->saved_context);
context_set(&CPU->saved_context, FADDR(main_ap_separated_stack),
(uintptr_t) CPU->stack, CPU_STACK_SIZE);
context_restore(&CPU->saved_context);
/branches/network/kernel/generic/src/main/version.c
34,22 → 34,21
 
#include <main/version.h>
#include <print.h>
#include <macros.h>
 
char *project = "SPARTAN kernel";
char *copyright = "Copyright (c) 2001-2009 HelenOS project";
char *release = STRING(RELEASE);
char *name = STRING(NAME);
char *arch = STRING(KARCH);
char *copyright = "Copyright (c) 2001-2008 HelenOS project";
char *release = RELEASE;
char *name = NAME;
char *arch = ARCH;
 
#ifdef REVISION
char *revision = ", revision " STRING(REVISION);
char *revision = ", revision " REVISION;
#else
char *revision = "";
#endif
 
#ifdef TIMESTAMP
char *timestamp = " on " STRING(TIMESTAMP);
char *timestamp = " on " TIMESTAMP;
#else
char *timestamp = "";
#endif
/branches/network/kernel/generic/src/main/uinit.c
46,9 → 46,7
#include <userspace.h>
#include <mm/slab.h>
#include <arch.h>
#include <udebug/udebug.h>
 
 
/** Thread used to bring up userspace thread.
*
* @param arg Pointer to structure containing userspace entry and stack
67,10 → 65,6
* deployed for the event of forceful task termination.
*/
thread_detach(THREAD);
 
#ifdef CONFIG_UDEBUG
udebug_stoppable_end();
#endif
uarg.uspace_entry = ((uspace_arg_t *) arg)->uspace_entry;
uarg.uspace_stack = ((uspace_arg_t *) arg)->uspace_stack;
/branches/network/kernel/generic/src/proc/task.c
52,7 → 52,6
#include <print.h>
#include <errno.h>
#include <func.h>
#include <string.h>
#include <syscall/copy.h>
 
/** Spinlock protecting the tasks_tree AVL tree. */
131,7 → 130,7
/** Create new task with no threads.
*
* @param as Task's address space.
* @param name Symbolic name (a copy is made).
* @param name Symbolic name.
*
* @return New task's structure.
*
149,10 → 148,7
spinlock_initialize(&ta->lock, "task_ta_lock");
list_initialize(&ta->th_head);
ta->as = as;
 
memcpy(ta->name, name, TASK_NAME_BUFLEN);
ta->name[TASK_NAME_BUFLEN - 1] = '\0';
 
ta->name = name;
atomic_set(&ta->refcount, 0);
atomic_set(&ta->lifecount, 0);
ta->context = CONTEXT;
159,18 → 155,7
 
ta->capabilities = 0;
ta->cycles = 0;
 
#ifdef CONFIG_UDEBUG
/* Init debugging stuff */
udebug_task_init(&ta->udebug);
 
/* Init kbox stuff */
ipc_answerbox_init(&ta->kb.box, ta);
ta->kb.thread = NULL;
mutex_initialize(&ta->kb.cleanup_lock, MUTEX_PASSIVE);
ta->kb.finished = false;
#endif
 
ipc_answerbox_init(&ta->answerbox, ta);
for (i = 0; i < IPC_MAX_PHONES; i++)
ipc_phone_init(&ta->phones[i]);
250,35 → 235,6
sizeof(TASK->taskid));
}
 
/** Syscall for setting the task name.
*
* The name simplifies identifying the task in the task list.
*
* @param name The new name for the task. (typically the same
* as the command used to execute it).
*
* @return 0 on success or an error code from @ref errno.h.
*/
unative_t sys_task_set_name(const char *uspace_name, size_t name_len)
{
int rc;
char namebuf[TASK_NAME_BUFLEN];
 
/* Cap length of name and copy it from userspace. */
 
if (name_len > TASK_NAME_BUFLEN - 1)
name_len = TASK_NAME_BUFLEN - 1;
 
rc = copy_from_uspace(namebuf, uspace_name, name_len);
if (rc != 0)
return (unative_t) rc;
 
namebuf[name_len] = '\0';
strncpy(TASK->name, namebuf, TASK_NAME_BUFLEN);
 
return EOK;
}
 
/** Find task structure corresponding to task ID.
*
* The tasks_lock must be already held by the caller of this function and
369,7 → 325,7
bool sleeping = false;
thr = list_get_instance(cur, thread_t, th_link);
spinlock_lock(&thr->lock);
thr->interrupted = true;
if (thr->state == Sleeping)
397,13 → 353,13
order(task_get_accounting(t), &cycles, &suffix);
 
#ifdef __32_BITS__
printf("%-6" PRIu64 " %-12s %-3" PRIu32 " %10p %10p %9" PRIu64
printf("%-6" PRIu64 " %-10s %-3" PRIu32 " %10p %10p %9" PRIu64
"%c %7ld %6ld", t->taskid, t->name, t->context, t, t->as, cycles,
suffix, atomic_get(&t->refcount), atomic_get(&t->active_calls));
#endif
 
#ifdef __64_BITS__
printf("%-6" PRIu64 " %-12s %-3" PRIu32 " %18p %18p %9" PRIu64
printf("%-6" PRIu64 " %-10s %-3" PRIu32 " %18p %18p %9" PRIu64
"%c %7ld %6ld", t->taskid, t->name, t->context, t, t->as, cycles,
suffix, atomic_get(&t->refcount), atomic_get(&t->active_calls));
#endif
428,16 → 384,16
spinlock_lock(&tasks_lock);
 
#ifdef __32_BITS__
printf("taskid name ctx address as "
printf("taskid name ctx address as "
"cycles threads calls callee\n");
printf("------ ------------ --- ---------- ---------- "
printf("------ ---------- --- ---------- ---------- "
"---------- ------- ------ ------>\n");
#endif
 
#ifdef __64_BITS__
printf("taskid name ctx address as "
printf("taskid name ctx address as "
"cycles threads calls callee\n");
printf("------ ------------ --- ------------------ ------------------ "
printf("------ ---------- --- ------------------ ------------------ "
"---------- ------- ------ ------>\n");
#endif
 
/branches/network/kernel/generic/src/proc/thread.c
102,7 → 102,7
thread_id_t last_tid = 0;
 
static slab_cache_t *thread_slab;
#ifdef CONFIG_FPU
#ifdef ARCH_HAS_FPU
slab_cache_t *fpu_context_slab;
#endif
 
161,7 → 161,7
/* call the architecture-specific part of the constructor */
thr_constructor_arch(t);
#ifdef CONFIG_FPU
#ifdef ARCH_HAS_FPU
#ifdef CONFIG_FPU_LAZY
t->saved_fpu_context = NULL;
#else
169,11 → 169,11
if (!t->saved_fpu_context)
return -1;
#endif
#endif
#endif
 
t->kstack = (uint8_t *) frame_alloc(STACK_FRAMES, FRAME_KA | kmflags);
if (!t->kstack) {
#ifdef CONFIG_FPU
#ifdef ARCH_HAS_FPU
if (t->saved_fpu_context)
slab_free(fpu_context_slab, t->saved_fpu_context);
#endif
180,10 → 180,6
return -1;
}
 
#ifdef CONFIG_UDEBUG
mutex_initialize(&t->udebug.lock, MUTEX_PASSIVE);
#endif
 
return 0;
}
 
196,7 → 192,7
thr_destructor_arch(t);
 
frame_free(KA2PA(t->kstack));
#ifdef CONFIG_FPU
#ifdef ARCH_HAS_FPU
if (t->saved_fpu_context)
slab_free(fpu_context_slab, t->saved_fpu_context);
#endif
211,11 → 207,11
void thread_init(void)
{
THREAD = NULL;
atomic_set(&nrdy, 0);
atomic_set(&nrdy,0);
thread_slab = slab_cache_create("thread_slab", sizeof(thread_t), 0,
thr_constructor, thr_destructor, 0);
 
#ifdef CONFIG_FPU
#ifdef ARCH_HAS_FPU
fpu_context_slab = slab_cache_create("fpu_slab", sizeof(fpu_context_t),
FPU_CONTEXT_ALIGN, NULL, NULL, 0);
#endif
279,7 → 275,7
* guarantee that the task won't cease to exist during the
* call. The task's lock may not be held.
* @param flags Thread flags.
* @param name Symbolic name (a copy is made).
* @param name Symbolic name.
* @param uncounted Thread's accounting doesn't affect accumulated task
* accounting.
*
316,7 → 312,6
interrupts_restore(ipl);
memcpy(t->name, name, THREAD_NAME_BUFLEN);
t->name[THREAD_NAME_BUFLEN - 1] = '\0';
t->thread_code = func;
t->thread_arg = arg;
352,11 → 347,6
avltree_node_initialize(&t->threads_tree_node);
t->threads_tree_node.key = (uintptr_t) t;
 
#ifdef CONFIG_UDEBUG
/* Init debugging stuff */
udebug_thread_initialize(&t->udebug);
#endif
 
/* might depend on previous initialization */
thread_create_arch(t);
 
419,17 → 409,12
ipl_t ipl;
 
/*
* Attach to the specified task.
* Attach to the current task.
*/
ipl = interrupts_disable();
spinlock_lock(&task->lock);
 
atomic_inc(&task->refcount);
 
/* Must not count kbox thread into lifecount */
if (t->flags & THREAD_FLAG_USPACE)
atomic_inc(&task->lifecount);
 
atomic_inc(&task->lifecount);
list_append(&t->th_link, &task->th_head);
spinlock_unlock(&task->lock);
 
452,19 → 437,14
{
ipl_t ipl;
 
if (THREAD->flags & THREAD_FLAG_USPACE) {
#ifdef CONFIG_UDEBUG
/* Generate udebug THREAD_E event */
udebug_thread_e_event();
#endif
if (atomic_predec(&TASK->lifecount) == 0) {
/*
* We are the last userspace thread in the task that
* still has not exited. With the exception of the
* moment the task was created, new userspace threads
* can only be created by threads of the same task.
* We are safe to perform cleanup.
*/
if (atomic_predec(&TASK->lifecount) == 0) {
/*
* We are the last thread in the task that still has not exited.
* With the exception of the moment the task was created, new
* threads can only be created by threads of the same task.
* We are safe to perform cleanup.
*/
if (THREAD->flags & THREAD_FLAG_USPACE) {
ipc_cleanup();
futex_cleanup();
LOG("Cleanup of task %" PRIu64" completed.", TASK->taskid);
709,7 → 689,7
*
*/
unative_t sys_thread_create(uspace_arg_t *uspace_uarg, char *uspace_name,
size_t name_len, thread_id_t *uspace_thread_id)
thread_id_t *uspace_thread_id)
{
thread_t *t;
char namebuf[THREAD_NAME_BUFLEN];
716,15 → 696,10
uspace_arg_t *kernel_uarg;
int rc;
 
if (name_len > THREAD_NAME_BUFLEN - 1)
name_len = THREAD_NAME_BUFLEN - 1;
 
rc = copy_from_uspace(namebuf, uspace_name, name_len);
rc = copy_from_uspace(namebuf, uspace_name, THREAD_NAME_BUFLEN);
if (rc != 0)
return (unative_t) rc;
 
namebuf[name_len] = '\0';
 
/*
* In case of failure, kernel_uarg will be deallocated in this function.
* In case of success, kernel_uarg will be freed in uinit().
763,18 → 738,7
return (unative_t) rc;
}
}
#ifdef CONFIG_UDEBUG
/*
* Generate udebug THREAD_B event and attach the thread.
* This must be done atomically (with the debug locks held),
* otherwise we would either miss some thread or receive
* THREAD_B events for threads that already existed
* and could be detected with THREAD_READ before.
*/
udebug_thread_b_event_attach(t, TASK);
#else
thread_attach(t, TASK);
#endif
thread_ready(t);
 
return 0;
/branches/network/kernel/generic/src/proc/program.c
67,10 → 67,9
*
* @param as Address space containing a binary program image.
* @param entry_addr Program entry-point address in program address space.
* @param name Name to set for the program's task.
* @param p Buffer for storing program information.
*/
void program_create(as_t *as, uintptr_t entry_addr, char *name, program_t *p)
void program_create(as_t *as, uintptr_t entry_addr, program_t *p)
{
as_area_t *a;
uspace_arg_t *kernel_uarg;
82,7 → 81,7
kernel_uarg->uspace_thread_arg = NULL;
kernel_uarg->uspace_uarg = NULL;
p->task = task_create(as, name);
p->task = task_create(as, "app");
ASSERT(p->task);
 
/*
107,7 → 106,6
* executable image. The task is returned in *task.
*
* @param image_addr Address of an executable program image.
* @param name Name to set for the program's task.
* @param p Buffer for storing program info. If image_addr
* points to a loader image, p->task will be set to
* NULL and EOK will be returned.
114,7 → 112,7
*
* @return EOK on success or negative error code.
*/
int program_create_from_image(void *image_addr, char *name, program_t *p)
int program_create_from_image(void *image_addr, program_t *p)
{
as_t *as;
unsigned int rc;
138,7 → 136,7
return EOK;
}
 
program_create(as, ((elf_header_t *) image_addr)->e_entry, name, p);
program_create(as, ((elf_header_t *) image_addr)->e_entry, p);
 
return EOK;
}
145,12 → 143,10
 
/** Create a task from the program loader image.
*
* @param p Buffer for storing program info.
* @param name Name to set for the program's task.
*
* @param p Buffer for storing program info.
* @return EOK on success or negative error code.
*/
int program_create_loader(program_t *p, char *name)
int program_create_loader(program_t *p)
{
as_t *as;
unsigned int rc;
171,8 → 167,7
return ENOENT;
}
 
program_create(as, ((elf_header_t *) program_loader)->e_entry,
name, p);
program_create(as, ((elf_header_t *) program_loader)->e_entry, p);
 
return EOK;
}
190,37 → 185,48
 
/** Syscall for creating a new loader instance from userspace.
*
* Creates a new task from the program loader image and sets
* the task name.
* Creates a new task from the program loader image, connects a phone
* to it and stores the phone id into the provided buffer.
*
* @param name Name to set on the new task (typically the same
* as the command used to execute it).
* @param uspace_phone_id Userspace address where to store the phone id.
*
* @return 0 on success or an error code from @ref errno.h.
*/
unative_t sys_program_spawn_loader(char *uspace_name, size_t name_len)
unative_t sys_program_spawn_loader(int *uspace_phone_id)
{
program_t p;
int fake_id;
int rc;
char namebuf[TASK_NAME_BUFLEN];
int phone_id;
 
/* Cap length of name and copy it from userspace. */
fake_id = 0;
 
if (name_len > TASK_NAME_BUFLEN - 1)
name_len = TASK_NAME_BUFLEN - 1;
 
rc = copy_from_uspace(namebuf, uspace_name, name_len);
/* Before we even try creating the task, see if we can write the id */
rc = (unative_t) copy_to_uspace(uspace_phone_id, &fake_id,
sizeof(fake_id));
if (rc != 0)
return (unative_t) rc;
return rc;
 
namebuf[name_len] = '\0';
phone_id = phone_alloc();
if (phone_id < 0)
return ELIMIT;
 
/* Spawn the new task. */
 
rc = program_create_loader(&p, namebuf);
rc = program_create_loader(&p);
if (rc != 0)
return rc;
 
phone_connect(phone_id, &p.task->answerbox);
 
/* No need to aquire lock before task_ready() */
rc = (unative_t) copy_to_uspace(uspace_phone_id, &phone_id,
sizeof(phone_id));
if (rc != 0) {
/* Ooops */
ipc_phone_hangup(&TASK->phones[phone_id]);
task_kill(p.task->taskid);
return rc;
}
 
// FIXME: control the capabilities
cap_set(p.task, cap_get(TASK));
 
/branches/network/kernel/generic/src/proc/scheduler.c
451,7 → 451,7
/*
* Entering state is unexpected.
*/
panic("tid%" PRIu64 ": unexpected state %s.",
panic("tid%" PRIu64 ": unexpected state %s\n",
THREAD->tid, thread_states[THREAD->state]);
break;
}
/branches/network/kernel/generic/src/proc/tasklet.c
51,7 → 51,7
tasklet_list = malloc(sizeof(tasklet_descriptor_t *) * config.cpu_count, 0);
if (!tasklet_list)
panic("Error initializing tasklets.");
panic("Error initializing tasklets");
for (i = 0; i < config.cpu_count; i++)
tasklet_list[i] = NULL;
/branches/network/kernel/generic/src/lib/string.c
File deleted
/branches/network/kernel/generic/src/lib/memstr.c
1,6 → 1,5
/*
* Copyright (c) 2001-2004 Jakub Jermar
* Copyright (c) 2008 Jiri Svoboda
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
35,10 → 34,12
* @file
* @brief Memory string operations.
*
* This file provides architecture independent functions to manipulate blocks of
* memory. These functions are optimized as much as generic functions of this
* type can be. However, architectures are free to provide even more optimized
* versions of these functions.
* This file provides architecture independent functions
* to manipulate blocks of memory. These functions
* are optimized as much as generic functions of
* this type can be. However, architectures are
* free to provide even more optimized versions of these
* functions.
*/
 
#include <memstr.h>
45,91 → 46,45
#include <arch/types.h>
#include <align.h>
 
/** Copy block of memory.
/** Copy block of memory
*
* Copy cnt bytes from src address to dst address. The copying is done
* word-by-word and then byte-by-byte. The source and destination memory areas
* cannot overlap.
* Copy cnt bytes from src address to dst address.
* The copying is done word-by-word and then byte-by-byte.
* The source and destination memory areas cannot overlap.
*
* @param src Source address to copy from.
* @param dst Destination address to copy to.
* @param cnt Number of bytes to copy.
* @param src Origin address to copy from.
* @param dst Origin address to copy to.
* @param cnt Number of bytes to copy.
*
* @return Destination address.
*/
void *_memcpy(void *dst, const void *src, size_t cnt)
void *_memcpy(void * dst, const void *src, size_t cnt)
{
unsigned int i, j;
if (ALIGN_UP((uintptr_t) src, sizeof(unative_t)) != (uintptr_t) src ||
ALIGN_UP((uintptr_t) dst, sizeof(unative_t)) != (uintptr_t) dst) {
ALIGN_UP((uintptr_t) dst, sizeof(unative_t)) != (uintptr_t) dst) {
for (i = 0; i < cnt; i++)
((uint8_t *) dst)[i] = ((uint8_t *) src)[i];
} else {
for (i = 0; i < cnt / sizeof(unative_t); i++)
((unative_t *) dst)[i] = ((unative_t *) src)[i];
for (j = 0; j < cnt % sizeof(unative_t); j++)
((uint8_t *)(((unative_t *) dst) + i))[j] =
((uint8_t *)(((unative_t *) src) + i))[j];
((uint8_t *)(((unative_t *) dst) + i))[j] = ((uint8_t *)(((unative_t *) src) + i))[j];
}
return (char *) dst;
}
 
/** Move memory block with possible overlapping.
*
* Copy cnt bytes from src address to dst address. The source and destination
* memory areas may overlap.
*
* @param src Source address to copy from.
* @param dst Destination address to copy to.
* @param cnt Number of bytes to copy.
*
* @return Destination address.
*/
void *memmove(void *dst, const void *src, size_t n)
{
const uint8_t *sp;
uint8_t *dp;
 
/* Nothing to do? */
if (src == dst)
return dst;
 
/* Non-overlapping? */
if (dst >= src + n || src >= dst + n) {
return memcpy(dst, src, n);
}
 
/* Which direction? */
if (src > dst) {
/* Forwards. */
sp = src;
dp = dst;
 
while (n-- != 0)
*dp++ = *sp++;
} else {
/* Backwards. */
sp = src + (n - 1);
dp = dst + (n - 1);
 
while (n-- != 0)
*dp-- = *sp--;
}
 
return dst;
}
 
/** Fill block of memory
*
* Fill cnt bytes at dst address with the value x. The filling is done
* byte-by-byte.
* Fill cnt bytes at dst address with the value x.
* The filling is done byte-by-byte.
*
* @param dst Destination address to fill.
* @param cnt Number of bytes to fill.
* @param x Value to fill.
* @param dst Origin address to fill.
* @param cnt Number of bytes to fill.
* @param x Value to fill.
*
*/
void _memsetb(void *dst, size_t cnt, uint8_t x)
141,14 → 96,14
p[i] = x;
}
 
/** Fill block of memory.
/** Fill block of memory
*
* Fill cnt words at dst address with the value x. The filling is done
* word-by-word.
* Fill cnt words at dst address with the value x.
* The filling is done word-by-word.
*
* @param dst Destination address to fill.
* @param cnt Number of words to fill.
* @param x Value to fill.
* @param dst Origin address to fill.
* @param cnt Number of words to fill.
* @param x Value to fill.
*
*/
void _memsetw(void *dst, size_t cnt, uint16_t x)
160,5 → 115,25
p[i] = x;
}
 
/** Copy string
*
* Copy string from src address to dst address.
* The copying is done char-by-char until the null
* character. The source and destination memory areas
* cannot overlap.
*
* @param src Origin string to copy from.
* @param dst Origin string to copy to.
*
*/
char *strcpy(char *dest, const char *src)
{
char *orig = dest;
while ((*(dest++) = *(src++)))
;
return orig;
}
 
/** @}
*/
/branches/network/kernel/generic/src/lib/rd.c
88,7 → 88,9
rd_parea.pbase = ALIGN_DOWN((uintptr_t) KA2PA((void *) header + hsize),
FRAME_SIZE);
rd_parea.vbase = (uintptr_t) ((void *) header + hsize);
rd_parea.frames = SIZE2FRAMES(dsize);
rd_parea.cacheable = true;
ddi_parea_register(&rd_parea);
 
sysinfo_set_item_val("rd", NULL, true);
/branches/network/kernel/generic/src/lib/func.c
47,7 → 47,7
 
/** Halt wrapper
*
* Set halt flag and halt the CPU.
* Set halt flag and halt the cpu.
*
*/
void halt()
54,7 → 54,9
{
#ifdef CONFIG_DEBUG
bool rundebugger = false;
 
// TODO test_and_set not defined on all arches
// if (!test_and_set(&haltstate))
if (!atomic_get(&haltstate)) {
atomic_set(&haltstate, 1);
rundebugger = true;
62,22 → 64,118
#else
atomic_set(&haltstate, 1);
#endif
 
interrupts_disable();
#if (defined(CONFIG_DEBUG)) && (defined(CONFIG_KCONSOLE))
if ((rundebugger) && (kconsole_check_poll()))
kconsole("panic", "\nLast resort kernel console ready.\n", false);
#endif
#ifdef CONFIG_DEBUG
if (rundebugger) {
printf("\n");
kconsole("panic"); /* Run kconsole as a last resort to user */
}
#endif
if (CPU)
printf("cpu%u: halted\n", CPU->id);
else
printf("cpu: halted\n");
cpu_halt();
}
 
/** Return number of characters in a string.
*
* @param str NULL terminated string.
*
* @return Number of characters in str.
*/
size_t strlen(const char *str)
{
int i;
for (i = 0; str[i]; i++)
;
return i;
}
 
/** Compare two NULL terminated strings
*
* Do a char-by-char comparison of two NULL terminated strings.
* The strings are considered equal iff they consist of the same
* characters on the minimum of their lengths.
*
* @param src First string to compare.
* @param dst Second string to compare.
*
* @return 0 if the strings are equal, -1 if first is smaller, 1 if second smaller.
*
*/
int strcmp(const char *src, const char *dst)
{
for (; *src && *dst; src++, dst++) {
if (*src < *dst)
return -1;
if (*src > *dst)
return 1;
}
if (*src == *dst)
return 0;
if (!*src)
return -1;
return 1;
}
 
 
/** Compare two NULL terminated strings
*
* Do a char-by-char comparison of two NULL terminated strings.
* The strings are considered equal iff they consist of the same
* characters on the minimum of their lengths and specified maximal
* length.
*
* @param src First string to compare.
* @param dst Second string to compare.
* @param len Maximal length for comparison.
*
* @return 0 if the strings are equal, -1 if first is smaller, 1 if second smaller.
*
*/
int strncmp(const char *src, const char *dst, size_t len)
{
unsigned int i;
for (i = 0; (*src) && (*dst) && (i < len); src++, dst++, i++) {
if (*src < *dst)
return -1;
if (*src > *dst)
return 1;
}
if (i == len || *src == *dst)
return 0;
if (!*src)
return -1;
return 1;
}
 
 
 
/** Copy NULL terminated string.
*
* Copy at most 'len' characters from string 'src' to 'dest'.
* If 'src' is shorter than 'len', '\0' is inserted behind the
* last copied character.
*
* @param src Source string.
* @param dest Destination buffer.
* @param len Size of destination buffer.
*/
void strncpy(char *dest, const char *src, size_t len)
{
unsigned int i;
for (i = 0; i < len; i++) {
if (!(dest[i] = src[i]))
return;
}
dest[i-1] = '\0';
}
 
/** Convert ascii representation to unative_t
*
* Supports 0x for hexa & 0 for octal notation.
/branches/network/kernel/generic/src/sysinfo/sysinfo.c
163,8 → 163,7
i = 0;
}
}
 
panic("Not reached.");
panic("Not reached\n");
return NULL;
}
 
/branches/network/kernel/generic/src/synch/rwlock.c
231,10 → 231,10
interrupts_restore(ipl);
break;
case ESYNCH_OK_ATOMIC:
panic("_mutex_lock_timeout() == ESYNCH_OK_ATOMIC.");
panic("_mutex_lock_timeout() == ESYNCH_OK_ATOMIC\n");
break;
default:
panic("Invalid ESYNCH.");
panic("invalid ESYNCH\n");
break;
}
return rc;
/branches/network/kernel/generic/src/synch/spinlock.c
76,6 → 76,7
void spinlock_lock_debug(spinlock_t *sl)
{
count_t i = 0;
char *symbol;
bool deadlock_reported = false;
 
preemption_disable();
105,10 → 106,12
continue;
#endif
if (i++ > DEADLOCK_THRESHOLD) {
printf("cpu%u: looping on spinlock %" PRIp ":%s, "
"caller=%" PRIp "(%s)", CPU->id, sl, sl->name,
CALLER, symtab_fmt_name_lookup(CALLER));
 
printf("cpu%u: looping on spinlock %" PRIp ":%s, caller=%" PRIp,
CPU->id, sl, sl->name, CALLER);
symbol = get_symtab_entry(CALLER);
if (symbol)
printf("(%s)", symbol);
printf("\n");
i = 0;
deadlock_reported = true;
}
/branches/network/kernel/generic/src/synch/futex.c
115,7 → 115,6
uintptr_t paddr;
pte_t *t;
ipl_t ipl;
int rc;
ipl = interrupts_disable();
 
135,17 → 134,9
interrupts_restore(ipl);
 
futex = futex_find(paddr);
 
#ifdef CONFIG_UDEBUG
udebug_stoppable_begin();
#endif
rc = waitq_sleep_timeout(&futex->wq, usec, flags |
return (unative_t) waitq_sleep_timeout(&futex->wq, usec, flags |
SYNCH_FLAGS_INTERRUPTIBLE);
 
#ifdef CONFIG_UDEBUG
udebug_stoppable_end();
#endif
return (unative_t) rc;
}
 
/** Wakeup one thread waiting in futex wait queue.
/branches/network/kernel/generic/src/syscall/syscall.c
32,9 → 32,9
 
/**
* @file
* @brief Syscall table and syscall wrappers.
* @brief Syscall table and syscall wrappers.
*/
 
#include <syscall/syscall.h>
#include <proc/thread.h>
#include <proc/task.h>
42,50 → 42,76
#include <mm/as.h>
#include <print.h>
#include <putchar.h>
#include <errno.h>
#include <arch.h>
#include <debug.h>
#include <ddi/device.h>
#include <ipc/sysipc.h>
#include <synch/futex.h>
#include <synch/smc.h>
#include <ddi/ddi.h>
#include <security/cap.h>
#include <syscall/copy.h>
#include <sysinfo/sysinfo.h>
#include <console/console.h>
#include <udebug/udebug.h>
 
/** Print using kernel facility
*
* Print to kernel log.
*
*/
static unative_t sys_klog(int fd, const void * buf, size_t count)
{
size_t i;
char *data;
int rc;
 
if (count > PAGE_SIZE)
return ELIMIT;
if (count > 0) {
data = (char *) malloc(count, 0);
if (!data)
return ENOMEM;
rc = copy_from_uspace(data, buf, count);
if (rc) {
free(data);
return rc;
}
for (i = 0; i < count; i++)
putchar(data[i]);
free(data);
} else
klog_update();
return count;
}
 
/** Tell kernel to get keyboard/console access again */
static unative_t sys_debug_enable_console(void)
{
arch_grab_console();
return 0;
}
 
/** Dispatch system call */
unative_t syscall_handler(unative_t a1, unative_t a2, unative_t a3,
unative_t a4, unative_t a5, unative_t a6, unative_t id)
{
unative_t rc;
#ifdef CONFIG_UDEBUG
udebug_syscall_event(a1, a2, a3, a4, a5, a6, id, 0, false);
#endif
if (id < SYSCALL_END) {
 
if (id < SYSCALL_END)
rc = syscall_table[id](a1, a2, a3, a4, a5, a6);
} else {
else {
printf("Task %" PRIu64": Unknown syscall %#" PRIxn, TASK->taskid, id);
task_kill(TASK->taskid);
thread_exit();
}
if (THREAD->interrupted)
thread_exit();
#ifdef CONFIG_UDEBUG
udebug_syscall_event(a1, a2, a3, a4, a5, a6, id, rc, true);
/*
* Stopping point needed for tasks that only invoke non-blocking
* system calls.
*/
udebug_stoppable_begin();
udebug_stoppable_end();
#endif
return rc;
}
 
99,7 → 125,6
(syshandler_t) sys_thread_get_id,
(syshandler_t) sys_task_get_id,
(syshandler_t) sys_task_set_name,
(syshandler_t) sys_program_spawn_loader,
/* Synchronization related syscalls. */
121,7 → 146,6
(syshandler_t) sys_ipc_answer_fast,
(syshandler_t) sys_ipc_answer_slow,
(syshandler_t) sys_ipc_forward_fast,
(syshandler_t) sys_ipc_forward_slow,
(syshandler_t) sys_ipc_wait_for_call,
(syshandler_t) sys_ipc_hangup,
(syshandler_t) sys_ipc_register_irq,
132,7 → 156,6
(syshandler_t) sys_cap_revoke,
/* DDI related syscalls. */
(syshandler_t) sys_device_assign_devno,
(syshandler_t) sys_physmem_map,
(syshandler_t) sys_iospace_enable,
(syshandler_t) sys_preempt_control,
142,10 → 165,7
(syshandler_t) sys_sysinfo_value,
/* Debug calls */
(syshandler_t) sys_debug_enable_console,
(syshandler_t) sys_debug_disable_console,
(syshandler_t) sys_ipc_connect_kbox
(syshandler_t) sys_debug_enable_console
};
 
/** @}
/branches/network/kernel/generic/src/console/kconsole.c
49,12 → 49,8
#include <macros.h>
#include <debug.h>
#include <func.h>
#include <string.h>
#include <symtab.h>
#include <macros.h>
#include <sysinfo/sysinfo.h>
#include <ddi/device.h>
#include <symtab.h>
#include <errno.h>
 
/** Simple kernel console.
*
87,39 → 83,10
index_t *end);
static char history[KCONSOLE_HISTORY][MAX_CMDLINE] = {};
 
/*
* For now, we use 0 as INR.
* However, it is therefore desirable to have architecture specific
* definition of KCONSOLE_VIRT_INR in the future.
*/
#define KCONSOLE_VIRT_INR 0
 
bool kconsole_notify = false;
irq_t kconsole_irq;
 
 
/** Allways refuse IRQ ownership.
*
* This is not a real IRQ, so we always decline.
*
* @return Always returns IRQ_DECLINE.
*
*/
static irq_ownership_t kconsole_claim(irq_t *irq)
{
return IRQ_DECLINE;
}
 
 
/** Initialize kconsole data structures
*
* This is the most basic initialization, almost no
* other kernel subsystem is ready yet.
*
*/
/** Initialize kconsole data structures. */
void kconsole_init(void)
{
unsigned int i;
int i;
 
cmd_init();
for (i = 0; i < KCONSOLE_HISTORY; i++)
127,26 → 94,6
}
 
 
/** Initialize kconsole notification mechanism
*
* Initialize the virtual IRQ notification mechanism.
*
*/
void kconsole_notify_init(void)
{
sysinfo_set_item_val("kconsole.present", NULL, true);
sysinfo_set_item_val("kconsole.inr", NULL, KCONSOLE_VIRT_INR);
irq_initialize(&kconsole_irq);
kconsole_irq.devno = device_assign_devno();
kconsole_irq.inr = KCONSOLE_VIRT_INR;
kconsole_irq.claim = kconsole_claim;
irq_register(&kconsole_irq);
kconsole_notify = true;
}
 
 
/** Register kconsole command.
*
* @param cmd Structure describing the command.
256,7 → 203,7
*/
static int cmdtab_compl(char *name)
{
static char output[/*MAX_SYMBOL_NAME*/128 + 1];
static char output[MAX_SYMBOL_NAME + 1];
link_t *startpos = NULL;
const char *foundtxt;
int found = 0;
288,11 → 235,12
startpos = startpos->next;
}
}
strncpy(name, output, 128/*MAX_SYMBOL_NAME*/);
strncpy(name, output, MAX_SYMBOL_NAME);
return found;
}
 
static char *clever_readline(const char *prompt, indev_t *input)
static char *clever_readline(const char *prompt, chardev_t *input)
{
static int histposition = 0;
 
453,71 → 401,42
return current;
}
 
bool kconsole_check_poll(void)
{
return check_poll(stdin);
}
 
/** Kernel console prompt.
/** Kernel console managing thread.
*
* @param prompt Kernel console prompt (e.g kconsole/panic).
* @param msg Message to display in the beginning.
* @param kcon Wait for keypress to show the prompt
* and never exit.
*
*/
void kconsole(char *prompt, char *msg, bool kcon)
void kconsole(void *prompt)
{
cmd_info_t *cmd_info;
count_t len;
char *cmdline;
 
if (!stdin) {
LOG("No stdin for kernel console");
printf("%s: no stdin\n", __func__);
return;
}
if (msg)
printf("%s", msg);
if (kcon)
_getc(stdin);
else
printf("Type \"exit\" to leave the console.\n");
while (true) {
cmdline = clever_readline((char *) prompt, stdin);
len = strlen(cmdline);
if (!len)
continue;
if ((!kcon) && (len == 4) && (strncmp(cmdline, "exit", 4) == 0))
break;
cmd_info = parse_cmdline(cmdline, len);
if (!cmd_info)
continue;
if (strncmp(cmd_info->name, "exit",
min(strlen(cmd_info->name), 5)) == 0)
break;
(void) cmd_info->func(cmd_info->argv);
}
}
 
/** Kernel console managing thread.
*
*/
void kconsole_thread(void *data)
{
kconsole("kconsole", "Kernel console ready (press any key to activate)\n", true);
}
 
static int parse_int_arg(char *text, size_t len, unative_t *result)
{
static char symname[MAX_SYMBOL_NAME];
uintptr_t symaddr;
bool isaddr = false;
bool isptr = false;
int rc;
 
static char symname[MAX_SYMBOL_NAME];
/* If we get a name, try to find it in symbol table */
if (text[0] == '&') {
531,20 → 450,16
}
if (text[0] < '0' || text[0] > '9') {
strncpy(symname, text, min(len + 1, MAX_SYMBOL_NAME));
rc = symtab_addr_lookup(symname, &symaddr);
switch (rc) {
case ENOENT:
symaddr = get_symbol_addr(symname);
if (!symaddr) {
printf("Symbol %s not found.\n", symname);
return -1;
case EOVERFLOW:
}
if (symaddr == (uintptr_t) -1) {
printf("Duplicate symbol %s.\n", symname);
symtab_print_search(symname);
return -1;
default:
printf("No symbol information available.\n");
return -1;
}
 
if (isaddr)
*result = (unative_t)symaddr;
else if (isptr)
/branches/network/kernel/generic/src/console/console.c
39,6 → 39,7
#include <synch/waitq.h>
#include <synch/spinlock.h>
#include <arch/types.h>
#include <ddi/device.h>
#include <ddi/irq.h>
#include <ddi/ddi.h>
#include <ipc/irq.h>
46,45 → 47,71
#include <func.h>
#include <print.h>
#include <atomic.h>
#include <syscall/copy.h>
#include <errno.h>
 
#define KLOG_SIZE PAGE_SIZE
#define KLOG_LATENCY 8
 
/** Kernel log cyclic buffer */
/**< Kernel log cyclic buffer */
static char klog[KLOG_SIZE] __attribute__ ((aligned (PAGE_SIZE)));
 
/** Kernel log initialized */
/**< Kernel log initialized */
static bool klog_inited = false;
/** First kernel log characters */
/**< First kernel log characters */
static index_t klog_start = 0;
/** Number of valid kernel log characters */
/**< Number of valid kernel log characters */
static size_t klog_len = 0;
/** Number of stored (not printed) kernel log characters */
/**< Number of stored (not printed) kernel log characters */
static size_t klog_stored = 0;
/** Number of stored kernel log characters for uspace */
/**< Number of stored kernel log characters for uspace */
static size_t klog_uspace = 0;
 
/** Silence output */
bool silent = false;
 
/** Kernel log spinlock */
/**< Kernel log spinlock */
SPINLOCK_INITIALIZE(klog_lock);
 
/** Physical memory area used for klog buffer */
static parea_t klog_parea;
/*
* For now, we use 0 as INR.
* However, it is therefore desirable to have architecture specific
* definition of KLOG_VIRT_INR in the future.
*/
#define KLOG_VIRT_INR 0
 
/** Standard input and output character devices */
indev_t *stdin = NULL;
outdev_t *stdout = NULL;
static irq_t klog_irq;
 
static chardev_operations_t null_stdout_ops = {
.suspend = NULL,
.resume = NULL,
.write = NULL,
.read = NULL
};
 
chardev_t null_stdout = {
.name = "null",
.op = &null_stdout_ops
};
 
/** Allways refuse IRQ ownership.
*
* This is not a real IRQ, so we always decline.
*
* @return Always returns IRQ_DECLINE.
*/
static irq_ownership_t klog_claim(void)
{
return IRQ_DECLINE;
}
 
/** Standard input character device */
chardev_t *stdin = NULL;
chardev_t *stdout = &null_stdout;
 
/** Initialize kernel logging facility
*
* The shared area contains kernel cyclic buffer. Userspace application may
* be notified on new data with indication of position and size
* of the data within the circular buffer.
*
*/
void klog_init(void)
{
92,122 → 119,89
ASSERT((uintptr_t) faddr % FRAME_SIZE == 0);
ASSERT(KLOG_SIZE % FRAME_SIZE == 0);
 
devno_t devno = device_assign_devno();
klog_parea.pbase = (uintptr_t) faddr;
klog_parea.vbase = (uintptr_t) klog;
klog_parea.frames = SIZE2FRAMES(KLOG_SIZE);
klog_parea.cacheable = true;
ddi_parea_register(&klog_parea);
 
sysinfo_set_item_val("klog.faddr", NULL, (unative_t) faddr);
sysinfo_set_item_val("klog.pages", NULL, SIZE2FRAMES(KLOG_SIZE));
sysinfo_set_item_val("klog.devno", NULL, devno);
sysinfo_set_item_val("klog.inr", NULL, KLOG_VIRT_INR);
 
irq_initialize(&klog_irq);
klog_irq.devno = devno;
klog_irq.inr = KLOG_VIRT_INR;
klog_irq.claim = klog_claim;
irq_register(&klog_irq);
//irq_initialize(&klog_irq);
//klog_irq.devno = devno;
//klog_irq.inr = KLOG_VIRT_INR;
//klog_irq.claim = klog_claim;
//irq_register(&klog_irq);
spinlock_lock(&klog_lock);
klog_inited = true;
spinlock_unlock(&klog_lock);
}
 
void grab_console(void)
{
silent = false;
arch_grab_console();
}
 
void release_console(void)
{
silent = true;
arch_release_console();
}
 
/** Tell kernel to get keyboard/console access again */
unative_t sys_debug_enable_console(void)
{
#ifdef CONFIG_KCONSOLE
grab_console();
return true;
#else
return false;
#endif
}
 
/** Tell kernel to relinquish keyboard/console access */
unative_t sys_debug_disable_console(void)
{
release_console();
return true;
}
 
bool check_poll(indev_t *indev)
{
if (indev == NULL)
return false;
if (indev->op == NULL)
return false;
return (indev->op->poll != NULL);
}
 
/** Get character from input character device. Do not echo character.
/** Get character from character device. Do not echo character.
*
* @param indev Input character device.
* @param chardev Character device.
*
* @return Character read.
*
*/
uint8_t _getc(indev_t *indev)
uint8_t _getc(chardev_t *chardev)
{
uint8_t ch;
ipl_t ipl;
 
if (atomic_get(&haltstate)) {
/* If we are here, we are hopefully on the processor that
/* If we are here, we are hopefully on the processor, that
* issued the 'halt' command, so proceed to read the character
* directly from input
*/
if (check_poll(indev))
return indev->op->poll(indev);
/* No other way of interacting with user */
interrupts_disable();
if (chardev->op->read)
return chardev->op->read(chardev);
/* no other way of interacting with user, halt */
if (CPU)
printf("cpu%u: ", CPU->id);
else
printf("cpu: ");
printf("halted (no polling input)\n");
printf("halted - no kconsole\n");
cpu_halt();
}
waitq_sleep(&indev->wq);
ipl_t ipl = interrupts_disable();
spinlock_lock(&indev->lock);
uint8_t ch = indev->buffer[(indev->index - indev->counter) % INDEV_BUFLEN];
indev->counter--;
spinlock_unlock(&indev->lock);
 
waitq_sleep(&chardev->wq);
ipl = interrupts_disable();
spinlock_lock(&chardev->lock);
ch = chardev->buffer[(chardev->index - chardev->counter) % CHARDEV_BUFLEN];
chardev->counter--;
spinlock_unlock(&chardev->lock);
interrupts_restore(ipl);
 
chardev->op->resume(chardev);
 
return ch;
}
 
/** Get string from input character device.
/** Get string from character device.
*
* Read characters from input character device until first occurrence
* Read characters from character device until first occurrence
* of newline character.
*
* @param indev Input character device.
* @param buf Buffer where to store string terminated by '\0'.
* @param chardev Character device.
* @param buf Buffer where to store string terminated by '\0'.
* @param buflen Size of the buffer.
*
* @return Number of characters read.
*
*/
count_t gets(indev_t *indev, char *buf, size_t buflen)
count_t gets(chardev_t *chardev, char *buf, size_t buflen)
{
index_t index = 0;
char ch;
 
while (index < buflen) {
char ch = _getc(indev);
ch = _getc(chardev);
if (ch == '\b') {
if (index > 0) {
index--;
219,7 → 213,7
continue;
}
putchar(ch);
 
if (ch == '\n') { /* end of string => write 0, return */
buf[index] = '\0';
return (count_t) index;
226,14 → 220,15
}
buf[index++] = ch;
}
return (count_t) index;
}
 
/** Get character from input device & echo it to screen */
uint8_t getc(indev_t *indev)
/** Get character from device & echo it to screen */
uint8_t getc(chardev_t *chardev)
{
uint8_t ch = _getc(indev);
uint8_t ch;
 
ch = _getc(chardev);
putchar(ch);
return ch;
}
242,10 → 237,10
{
spinlock_lock(&klog_lock);
// if ((klog_inited) && (klog_irq.notif_cfg.notify) && (klog_uspace > 0)) {
// ipc_irq_send_msg_3(&klog_irq, klog_start, klog_len, klog_uspace);
// klog_uspace = 0;
// }
if ((klog_inited) && (klog_irq.notif_cfg.notify) && (klog_uspace > 0)) {
ipc_irq_send_msg_3(&klog_irq, klog_start, klog_len, klog_uspace);
klog_uspace = 0;
}
spinlock_unlock(&klog_lock);
}
254,11 → 249,11
{
spinlock_lock(&klog_lock);
if ((klog_stored > 0) && (stdout) && (stdout->op->write)) {
if ((klog_stored > 0) && (stdout->op->write)) {
/* Print charaters stored in kernel log */
index_t i;
for (i = klog_len - klog_stored; i < klog_len; i++)
stdout->op->write(stdout, klog[(klog_start + i) % KLOG_SIZE], silent);
stdout->op->write(stdout, klog[(klog_start + i) % KLOG_SIZE]);
klog_stored = 0;
}
269,8 → 264,8
else
klog_start = (klog_start + 1) % KLOG_SIZE;
if ((stdout) && (stdout->op->write))
stdout->op->write(stdout, c, silent);
if (stdout->op->write)
stdout->op->write(stdout, c);
else {
/* The character is just in the kernel log */
if (klog_stored < klog_len)
294,38 → 289,5
klog_update();
}
 
/** Print using kernel facility
*
* Print to kernel log.
*
*/
unative_t sys_klog(int fd, const void * buf, size_t count)
{
char *data;
int rc;
 
if (count > PAGE_SIZE)
return ELIMIT;
if (count > 0) {
data = (char *) malloc(count + 1, 0);
if (!data)
return ENOMEM;
rc = copy_from_uspace(data, buf, count);
if (rc) {
free(data);
return rc;
}
data[count] = 0;
printf("%s", data);
free(data);
} else
klog_update();
return count;
}
 
/** @}
*/
/branches/network/kernel/generic/src/console/cmd.c
50,9 → 50,9
#include <arch.h>
#include <config.h>
#include <func.h>
#include <string.h>
#include <macros.h>
#include <debug.h>
#include <symtab.h>
#include <cpu.h>
#include <mm/tlb.h>
#include <arch/mm/tlb.h>
64,8 → 64,6
#include <proc/task.h>
#include <ipc/ipc.h>
#include <ipc/irq.h>
#include <symtab.h>
#include <errno.h>
 
#ifdef CONFIG_TEST
#include <test.h>
80,6 → 78,12
.argc = 0
};
 
static cmd_info_t exit_info = {
.name = "exit",
.description = "Exit kconsole.",
.argc = 0
};
 
static int cmd_reboot(cmd_arg_t *argv);
static cmd_info_t reboot_info = {
.name = "reboot",
394,17 → 398,17
.argc = 0
};
 
/* Data and methods for 'ipc' command */
static int cmd_ipc(cmd_arg_t *argv);
static cmd_arg_t ipc_argv = {
/* Data and methods for 'ipc_task' command */
static int cmd_ipc_task(cmd_arg_t *argv);
static cmd_arg_t ipc_task_argv = {
.type = ARG_TYPE_INT,
};
static cmd_info_t ipc_info = {
.name = "ipc",
.description = "ipc <taskid> Show IPC information of given task.",
.func = cmd_ipc,
static cmd_info_t ipc_task_info = {
.name = "ipc_task",
.description = "ipc_task <taskid> Show IPC information of given task.",
.func = cmd_ipc_task,
.argc = 1,
.argv = &ipc_argv
.argv = &ipc_task_argv
};
 
/* Data and methods for 'zone' command */
452,11 → 456,12
&continue_info,
&cpus_info,
&desc_info,
&exit_info,
&reboot_info,
&uptime_info,
&halt_info,
&help_info,
&ipc_info,
&ipc_task_info,
&set4_info,
&slabs_info,
&symaddr_info,
496,7 → 501,7
for (i = 0; basic_commands[i]; i++) {
cmd_initialize(basic_commands[i]);
if (!cmd_register(basic_commands[i]))
printf("Cannot register command %s\n", basic_commands[i]->name);
panic("could not register command %s\n", basic_commands[i]->name);
}
}
 
509,31 → 514,23
*/
int cmd_help(cmd_arg_t *argv)
{
link_t *cur;
 
spinlock_lock(&cmd_lock);
link_t *cur;
size_t len = 0;
for (cur = cmd_head.next; cur != &cmd_head; cur = cur->next) {
cmd_info_t *hlp;
hlp = list_get_instance(cur, cmd_info_t, link);
spinlock_lock(&hlp->lock);
if (strlen(hlp->name) > len)
len = strlen(hlp->name);
spinlock_unlock(&hlp->lock);
}
for (cur = cmd_head.next; cur != &cmd_head; cur = cur->next) {
cmd_info_t *hlp;
hlp = list_get_instance(cur, cmd_info_t, link);
spinlock_lock(&hlp->lock);
printf("%-*s %s\n", len, hlp->name, hlp->description);
printf("%s - %s\n", hlp->name, hlp->description);
 
spinlock_unlock(&hlp->lock);
}
spinlock_unlock(&cmd_lock);
spinlock_unlock(&cmd_lock);
 
return 1;
}
 
619,26 → 616,33
{
uintptr_t symaddr;
char *symbol;
unative_t (*fnc)(void);
fncptr_t fptr;
int rc;
unative_t (*f)(void);
#ifdef ia64
struct {
unative_t f;
unative_t gp;
} fptr;
#endif
 
symbol = (char *) argv->buffer;
rc = symtab_addr_lookup(symbol, &symaddr);
 
if (rc == ENOENT)
printf("Symbol %s not found.\n", symbol);
else if (rc == EOVERFLOW) {
symtab_print_search(symbol);
symaddr = get_symbol_addr((char *) argv->buffer);
if (!symaddr)
printf("Symbol %s not found.\n", argv->buffer);
else if (symaddr == (uintptr_t) -1) {
symtab_print_search((char *) argv->buffer);
printf("Duplicate symbol, be more specific.\n");
} else if (rc == EOK) {
fnc = (unative_t (*)(void)) arch_construct_function(&fptr,
(void *) symaddr, (void *) cmd_call0);
} else {
symbol = get_symtab_entry(symaddr);
printf("Calling %s() (%p)\n", symbol, symaddr);
printf("Result: %#" PRIxn "\n", fnc());
} else {
printf("No symbol information available.\n");
#ifdef ia64
fptr.f = symaddr;
fptr.gp = ((unative_t *)cmd_call2)[1];
f = (unative_t (*)(void)) &fptr;
#else
f = (unative_t (*)(void)) symaddr;
#endif
printf("Result: %#" PRIxn "\n", f());
}
return 1;
}
 
676,27 → 680,35
{
uintptr_t symaddr;
char *symbol;
unative_t (*fnc)(unative_t, ...);
unative_t (*f)(unative_t,...);
unative_t arg1 = argv[1].intval;
fncptr_t fptr;
int rc;
#ifdef ia64
struct {
unative_t f;
unative_t gp;
} fptr;
#endif
 
symbol = (char *) argv->buffer;
rc = symtab_addr_lookup(symbol, &symaddr);
symaddr = get_symbol_addr((char *) argv->buffer);
if (!symaddr)
printf("Symbol %s not found.\n", argv->buffer);
else if (symaddr == (uintptr_t) -1) {
symtab_print_search((char *) argv->buffer);
printf("Duplicate symbol, be more specific.\n");
} else {
symbol = get_symtab_entry(symaddr);
 
if (rc == ENOENT) {
printf("Symbol %s not found.\n", symbol);
} else if (rc == EOVERFLOW) {
symtab_print_search(symbol);
printf("Duplicate symbol, be more specific.\n");
} else if (rc == EOK) {
fnc = (unative_t (*)(unative_t, ...)) arch_construct_function(&fptr, (void *) symaddr, (void *) cmd_call1);
printf("Calling f(%#" PRIxn "): %p: %s\n", arg1, symaddr, symbol);
printf("Result: %#" PRIxn "\n", fnc(arg1));
} else {
printf("No symbol information available.\n");
#ifdef ia64
fptr.f = symaddr;
fptr.gp = ((unative_t *)cmd_call2)[1];
f = (unative_t (*)(unative_t,...)) &fptr;
#else
f = (unative_t (*)(unative_t,...)) symaddr;
#endif
printf("Result: %#" PRIxn "\n", f(arg1));
}
 
return 1;
}
 
705,28 → 717,36
{
uintptr_t symaddr;
char *symbol;
unative_t (*fnc)(unative_t, unative_t, ...);
unative_t (*f)(unative_t,unative_t,...);
unative_t arg1 = argv[1].intval;
unative_t arg2 = argv[2].intval;
fncptr_t fptr;
int rc;
#ifdef ia64
struct {
unative_t f;
unative_t gp;
}fptr;
#endif
 
symbol = (char *) argv->buffer;
rc = symtab_addr_lookup(symbol, &symaddr);
 
if (rc == ENOENT) {
printf("Symbol %s not found.\n", symbol);
} else if (rc == EOVERFLOW) {
symtab_print_search(symbol);
symaddr = get_symbol_addr((char *) argv->buffer);
if (!symaddr)
printf("Symbol %s not found.\n", argv->buffer);
else if (symaddr == (uintptr_t) -1) {
symtab_print_search((char *) argv->buffer);
printf("Duplicate symbol, be more specific.\n");
} else if (rc == EOK) {
fnc = (unative_t (*)(unative_t, unative_t, ...)) arch_construct_function(&fptr, (void *) symaddr, (void *) cmd_call2);
} else {
symbol = get_symtab_entry(symaddr);
printf("Calling f(%#" PRIxn ", %#" PRIxn "): %p: %s\n",
arg1, arg2, symaddr, symbol);
printf("Result: %#" PRIxn "\n", fnc(arg1, arg2));
} else {
printf("No symbol information available.\n");
#ifdef ia64
fptr.f = symaddr;
fptr.gp = ((unative_t *)cmd_call2)[1];
f = (unative_t (*)(unative_t,unative_t,...)) &fptr;
#else
f = (unative_t (*)(unative_t,unative_t,...)) symaddr;
#endif
printf("Result: %#" PRIxn "\n", f(arg1, arg2));
}
return 1;
}
 
735,29 → 755,37
{
uintptr_t symaddr;
char *symbol;
unative_t (*fnc)(unative_t, unative_t, unative_t, ...);
unative_t (*f)(unative_t,unative_t,unative_t,...);
unative_t arg1 = argv[1].intval;
unative_t arg2 = argv[2].intval;
unative_t arg3 = argv[3].intval;
fncptr_t fptr;
int rc;
symbol = (char *) argv->buffer;
rc = symtab_addr_lookup(symbol, &symaddr);
#ifdef ia64
struct {
unative_t f;
unative_t gp;
}fptr;
#endif
 
if (rc == ENOENT) {
printf("Symbol %s not found.\n", symbol);
} else if (rc == EOVERFLOW) {
symtab_print_search(symbol);
symaddr = get_symbol_addr((char *) argv->buffer);
if (!symaddr)
printf("Symbol %s not found.\n", argv->buffer);
else if (symaddr == (uintptr_t) -1) {
symtab_print_search((char *) argv->buffer);
printf("Duplicate symbol, be more specific.\n");
} else if (rc == EOK) {
fnc = (unative_t (*)(unative_t, unative_t, unative_t, ...)) arch_construct_function(&fptr, (void *) symaddr, (void *) cmd_call3);
} else {
symbol = get_symtab_entry(symaddr);
printf("Calling f(%#" PRIxn ",%#" PRIxn ", %#" PRIxn "): %p: %s\n",
arg1, arg2, arg3, symaddr, symbol);
printf("Result: %#" PRIxn "\n", fnc(arg1, arg2, arg3));
} else {
printf("No symbol information available.\n");
#ifdef ia64
fptr.f = symaddr;
fptr.gp = ((unative_t *)cmd_call2)[1];
f = (unative_t (*)(unative_t,unative_t,unative_t,...)) &fptr;
#else
f = (unative_t (*)(unative_t,unative_t,unative_t,...)) symaddr;
#endif
printf("Result: %#" PRIxn "\n", f(arg1, arg2, arg3));
}
return 1;
}
 
807,34 → 835,30
/** Write 4 byte value to address */
int cmd_set4(cmd_arg_t *argv)
{
uintptr_t addr;
uint32_t *addr;
uint32_t arg1 = argv[1].intval;
bool pointer = false;
int rc;
 
if (((char *)argv->buffer)[0] == '*') {
rc = symtab_addr_lookup((char *) argv->buffer + 1, &addr);
addr = (uint32_t *) get_symbol_addr((char *) argv->buffer + 1);
pointer = true;
} else if (((char *) argv->buffer)[0] >= '0' &&
((char *)argv->buffer)[0] <= '9') {
rc = EOK;
addr = atoi((char *)argv->buffer);
} else {
rc = symtab_addr_lookup((char *) argv->buffer, &addr);
}
((char *)argv->buffer)[0] <= '9')
addr = (uint32_t *)atoi((char *)argv->buffer);
else
addr = (uint32_t *)get_symbol_addr((char *) argv->buffer);
 
if (rc == ENOENT)
if (!addr)
printf("Symbol %s not found.\n", argv->buffer);
else if (rc == EOVERFLOW) {
else if (addr == (uint32_t *) -1) {
symtab_print_search((char *) argv->buffer);
printf("Duplicate symbol, be more specific.\n");
} else if (rc == EOK) {
} else {
if (pointer)
addr = *(uintptr_t *) addr;
addr = (uint32_t *)(*(unative_t *)addr);
printf("Writing %#" PRIx64 " -> %p\n", arg1, addr);
*(uint32_t *) addr = arg1;
} else {
printf("No symbol information available.\n");
*addr = arg1;
}
return 1;
913,7 → 937,7
*
* return Always 1
*/
int cmd_ipc(cmd_arg_t * argv) {
int cmd_ipc_task(cmd_arg_t * argv) {
ipc_print_task(argv[0].intval);
return 1;
}
952,11 → 976,8
int cmd_continue(cmd_arg_t *argv)
{
printf("The kernel will now relinquish the console.\n");
release_console();
if ((kconsole_notify) && (kconsole_irq.notif_cfg.notify))
ipc_irq_send_msg_0(&kconsole_irq);
printf("Use userspace controls to redraw the screen.\n");
arch_release_console();
return 1;
}
 
969,23 → 990,18
*/
int cmd_tests(cmd_arg_t *argv)
{
size_t len = 0;
test_t *test;
for (test = tests; test->name != NULL; test++) {
if (strlen(test->name) > len)
len = strlen(test->name);
}
for (test = tests; test->name != NULL; test++)
printf("%-*s %s%s\n", len, test->name, test->desc, (test->safe ? "" : " (unsafe)"));
printf("%s\t\t%s%s\n", test->name, test->desc, (test->safe ? "" : " (unsafe)"));
printf("%-*s Run all safe tests\n", len, "*");
printf("*\t\tRun all safe tests\n");
return 1;
}
 
static bool run_test(const test_t *test)
{
printf("%s (%s)\n", test->name, test->desc);
printf("%s\t\t%s\n", test->name, test->desc);
/* Update and read thread accounting
for benchmarking */
/branches/network/kernel/generic/src/console/chardev.c
37,62 → 37,42
#include <synch/waitq.h>
#include <synch/spinlock.h>
 
/** Initialize input character device.
/** Initialize character device.
*
* @param indev Input character device.
* @param op Implementation of input character device operations.
*
* @param chardev Character device.
* @param op Implementation of character device operations.
*/
void indev_initialize(char *name, indev_t *indev,
indev_operations_t *op)
void chardev_initialize(char *name, chardev_t *chardev,
chardev_operations_t *op)
{
indev->name = name;
waitq_initialize(&indev->wq);
spinlock_initialize(&indev->lock, "indev");
indev->counter = 0;
indev->index = 0;
indev->op = op;
chardev->name = name;
 
waitq_initialize(&chardev->wq);
spinlock_initialize(&chardev->lock, "chardev");
chardev->counter = 0;
chardev->index = 0;
chardev->op = op;
}
 
/** Push character read from input character device.
*
* @param indev Input character device.
* @param ch Character being pushed.
*
* @param chardev Character device.
* @param ch Character being pushed.
*/
void indev_push_character(indev_t *indev, uint8_t ch)
void chardev_push_character(chardev_t *chardev, uint8_t ch)
{
ASSERT(indev);
spinlock_lock(&indev->lock);
if (indev->counter == INDEV_BUFLEN - 1) {
/* Buffer full */
spinlock_unlock(&indev->lock);
return;
spinlock_lock(&chardev->lock);
chardev->counter++;
if (chardev->counter == CHARDEV_BUFLEN - 1) {
/* buffer full => disable device interrupt */
chardev->op->suspend(chardev);
}
indev->counter++;
indev->buffer[indev->index++] = ch;
/* Index modulo size of buffer */
indev->index = indev->index % INDEV_BUFLEN;
waitq_wakeup(&indev->wq, WAKEUP_FIRST);
spinlock_unlock(&indev->lock);
chardev->buffer[chardev->index++] = ch;
chardev->index = chardev->index % CHARDEV_BUFLEN; /* index modulo size of buffer */
waitq_wakeup(&chardev->wq, WAKEUP_FIRST);
spinlock_unlock(&chardev->lock);
}
 
/** Initialize output character device.
*
* @param outdev Output character device.
* @param op Implementation of output character device operations.
*
*/
void outdev_initialize(char *name, outdev_t *outdev,
outdev_operations_t *op)
{
outdev->name = name;
spinlock_initialize(&outdev->lock, "outdev");
outdev->op = op;
}
 
/** @}
*/
/branches/network/kernel/generic/src/cpu/cpu.c
64,7 → 64,7
cpus = (cpu_t *) malloc(sizeof(cpu_t) * config.cpu_count,
FRAME_ATOMIC);
if (!cpus)
panic("Cannot allocate CPU structures.");
panic("malloc/cpus");
 
/* initialize everything */
memsetb(cpus, sizeof(cpu_t) * config.cpu_count, 0);
86,7 → 86,7
}
#endif /* CONFIG_SMP */
 
CPU = &cpus[config.cpu_active - 1];
CPU = &cpus[config.cpu_active-1];
CPU->active = 1;
CPU->tlb_active = 1;
/branches/network/kernel/generic/src/adt/hash_table.c
61,7 → 61,7
h->entry = (link_t *) malloc(m * sizeof(link_t), 0);
if (!h->entry) {
panic("Cannot allocate memory for hash table.");
panic("cannot allocate memory for hash table\n");
}
memsetb(h->entry, m * sizeof(link_t), 0);
/branches/network/kernel/generic/src/adt/btree.c
124,7 → 124,7
lnode = leaf_node;
if (!lnode) {
if (btree_search(t, key, &lnode)) {
panic("B-tree %p already contains key %" PRIu64 ".", t, key);
panic("B-tree %p already contains key %" PRIu64 "\n", t, key);
}
}
224,7 → 224,7
lnode = leaf_node;
if (!lnode) {
if (!btree_search(t, key, &lnode)) {
panic("B-tree %p does not contain key %" PRIu64 ".", t, key);
panic("B-tree %p does not contain key %" PRIu64 "\n", t, key);
}
}
524,7 → 524,7
return;
}
}
panic("Node %p does not contain key %" PRIu64 ".", node, key);
panic("node %p does not contain key %" PRIu64 "\n", node, key);
}
 
/** Remove key and its right subtree pointer from B-tree node.
551,7 → 551,7
return;
}
}
panic("Node %p does not contain key %" PRIu64 ".", node, key);
panic("node %p does not contain key %" PRIu64 "\n", node, key);
}
 
/** Split full B-tree node and insert new key-value-right-subtree triplet.
693,7 → 693,7
if (subtree == node->subtree[i])
return i - (int) (right != false);
}
panic("Node %p does not contain subtree %p.", node, subtree);
panic("node %p does not contain subtree %p\n", node, subtree);
}
 
/** Rotate one key-value-rsubtree triplet from the left sibling to the right sibling.
/branches/network/kernel/generic/src/adt/avl.c
43,7 → 43,7
*
* Every node has a pointer to its parent which allows insertion of multiple
* identical keys into the tree.
*
*
* Be careful when using this tree because of the base atribute which is added
* to every inserted node key. There is no rule in which order nodes with the
* same key are visited.
/branches/network/kernel/generic/src/debug/symtab.c
37,23 → 37,22
 
#include <symtab.h>
#include <byteorder.h>
#include <string.h>
#include <func.h>
#include <print.h>
#include <arch/types.h>
#include <typedefs.h>
#include <errno.h>
 
/** Get name of symbol that seems most likely to correspond to address.
/** Return entry that seems most likely to correspond to argument.
*
* @param addr Address.
* @param name Place to store pointer to the symbol name.
* Return entry that seems most likely to correspond
* to address passed in the argument.
*
* @return Zero on success or negative error code, ENOENT if not found,
* ENOTSUP if symbol table not available.
* @param addr Address.
*
* @return Pointer to respective symbol string on success, NULL otherwise.
*/
int symtab_name_lookup(unative_t addr, char **name)
char * get_symtab_entry(unative_t addr)
{
#ifdef CONFIG_SYMTAB
count_t i;
 
for (i = 1; symbol_table[i].address_le; ++i) {
60,44 → 59,11
if (addr < uint64_t_le2host(symbol_table[i].address_le))
break;
}
if (addr >= uint64_t_le2host(symbol_table[i - 1].address_le)) {
*name = symbol_table[i - 1].symbol_name;
return EOK;
}
 
*name = NULL;
return ENOENT;
#else
*name = NULL;
return ENOTSUP;
#endif
if (addr >= uint64_t_le2host(symbol_table[i - 1].address_le))
return symbol_table[i - 1].symbol_name;
return NULL;
}
 
/** Lookup symbol by address and format for display.
*
* Returns name of closest corresponding symbol, "Not found" if none exists
* or "N/A" if no symbol information is available.
*
* @param addr Address.
* @param name Place to store pointer to the symbol name.
*
* @return Pointer to a human-readable string.
*/
char *symtab_fmt_name_lookup(unative_t addr)
{
int rc;
char *name;
 
rc = symtab_name_lookup(addr, &name);
switch (rc) {
case EOK: return name;
case ENOENT: return "Not found";
default: return "N/A";
}
}
 
#ifdef CONFIG_SYMTAB
 
/** Find symbols that match the parameter forward and print them.
*
* @param name - search string
136,22 → 102,17
return NULL;
}
 
#endif
 
/** Return address that corresponds to the entry
*
* Search symbol table, and if there is one match, return it
*
* @param name Name of the symbol
* @param addr Place to store symbol address
*
* @return Zero on success, ENOENT - not found, EOVERFLOW - duplicate
* symbol, ENOTSUP - no symbol information available.
* @param name Name of the symbol
* @return 0 - Not found, -1 - Duplicate symbol, other - address of symbol
*/
int symtab_addr_lookup(const char *name, uintptr_t *addr)
uintptr_t get_symbol_addr(const char *name)
{
#ifdef CONFIG_SYMTAB
count_t found = 0;
uintptr_t addr = NULL;
char *hint;
int i;
 
158,25 → 119,19
i = 0;
while ((hint = symtab_search_one(name, &i))) {
if (!strlen(hint)) {
*addr = uint64_t_le2host(symbol_table[i].address_le);
addr = uint64_t_le2host(symbol_table[i].address_le);
found++;
}
i++;
}
if (found > 1)
return EOVERFLOW;
if (found < 1)
return ENOENT;
return EOK;
#else
return ENOTSUP;
#endif
return ((uintptr_t) -1);
return addr;
}
 
/** Find symbols that match parameter and prints them */
void symtab_print_search(const char *name)
{
#ifdef CONFIG_SYMTAB
int i;
uintptr_t addr;
char *realname;
189,9 → 144,6
printf("%p: %s\n", addr, realname);
i++;
}
#else
printf("No symbol information available.\n");
#endif
}
 
/** Symtab completion
201,7 → 153,6
*/
int symtab_compl(char *input)
{
#ifdef CONFIG_SYMTAB
char output[MAX_SYMBOL_NAME + 1];
int startpos = 0;
char *foundtxt;
245,9 → 196,7
}
strncpy(input, output, MAX_SYMBOL_NAME);
return found;
#else
return 0;
#endif
}
 
/** @}
/branches/network/kernel/generic/src/printf/vprintf.c
62,13 → 62,13
{
struct printf_spec ps = {(int(*)(void *, size_t, void *)) vprintf_write, NULL};
ipl_t ipl = interrupts_disable();
int irqpri = interrupts_disable();
spinlock_lock(&printf_lock);
int ret = printf_core(fmt, &ps, ap);
spinlock_unlock(&printf_lock);
interrupts_restore(ipl);
interrupts_restore(irqpri);
return ret;
}
/branches/network/kernel/generic/src/printf/printf_core.c
40,7 → 40,7
#include <print.h>
#include <arch/arg.h>
#include <macros.h>
#include <string.h>
#include <func.h>
#include <arch.h>
 
/** show prefixes 0x or 0 */
/branches/network/kernel/generic/src/interrupt/interrupt.c
42,6 → 42,7
#include <debug.h>
#include <console/kconsole.h>
#include <console/console.h>
#include <console/chardev.h>
#include <console/cmd.h>
#include <panic.h>
#include <print.h>
67,13 → 68,13
iroutine old;
spinlock_lock(&exctbl_lock);
 
old = exc_table[n].f;
exc_table[n].f = f;
exc_table[n].name = name;
spinlock_unlock(&exctbl_lock);
 
spinlock_unlock(&exctbl_lock);
 
return old;
}
 
85,17 → 86,8
void exc_dispatch(int n, istate_t *istate)
{
ASSERT(n < IVT_ITEMS);
 
#ifdef CONFIG_UDEBUG
if (THREAD) THREAD->udebug.uspace_state = istate;
#endif
exc_table[n].f(n + IVT_FIRST, istate);
 
#ifdef CONFIG_UDEBUG
if (THREAD) THREAD->udebug.uspace_state = NULL;
#endif
 
/* This is a safe place to exit exiting thread */
if (THREAD && THREAD->interrupted && istate_from_uspace(istate))
thread_exit();
108,10 → 100,8
panic("Unhandled exception %d.", n);
}
 
#ifdef CONFIG_KCONSOLE
 
/** kconsole cmd - print all exceptions */
static int cmd_exc_print(cmd_arg_t *argv)
static int exc_print_cmd(cmd_arg_t *argv)
{
#if (IVT_ITEMS > 0)
unsigned int i;
130,7 → 120,9
#endif
for (i = 0; i < IVT_ITEMS; i++) {
symbol = symtab_fmt_name_lookup((unative_t) exc_table[i].f);
symbol = get_symtab_entry((unative_t) exc_table[i].f);
if (!symbol)
symbol = "not found";
 
#ifdef __32_BITS__
printf("%-3u %-20s %10p %s\n", i + IVT_FIRST, exc_table[i].name,
145,7 → 137,7
if (((i + 1) % 20) == 0) {
printf(" -- Press any key to continue -- ");
spinlock_unlock(&exctbl_lock);
_getc(stdin);
getc(stdin);
spinlock_lock(&exctbl_lock);
printf("\n");
}
157,18 → 149,15
return 1;
}
 
 
static cmd_info_t exc_info = {
.name = "exc",
.description = "Print exception table.",
.func = cmd_exc_print,
.func = exc_print_cmd,
.help = NULL,
.argc = 0,
.argv = NULL
};
 
#endif
 
/** Initialize generic exception handling support */
void exc_init(void)
{
177,11 → 166,9
for (i = 0; i < IVT_ITEMS; i++)
exc_register(i, "undef", (iroutine) exc_undef);
 
#ifdef CONFIG_KCONSOLE
cmd_initialize(&exc_info);
if (!cmd_register(&exc_info))
printf("Cannot register command %s\n", exc_info.name);
#endif
panic("could not register command %s\n", exc_info.name);
}
 
/** @}
/branches/network/kernel/generic/src/time/timeout.c
113,7 → 113,7
spinlock_lock(&t->lock);
 
if (t->cpu)
panic("Unexpected: t->cpu != 0.");
panic("t->cpu != 0");
 
t->cpu = CPU;
t->ticks = us2ticks(time);
/branches/network/kernel/generic/src/time/clock.c
79,7 → 79,7
 
faddr = frame_alloc(ONE_FRAME, FRAME_ATOMIC);
if (!faddr)
panic("Cannot allocate page for clock.");
panic("Cannot allocate page for clock");
uptime = (uptime_t *) PA2KA(faddr);
88,7 → 88,9
uptime->useconds = 0;
 
clock_parea.pbase = (uintptr_t) faddr;
clock_parea.vbase = (uintptr_t) uptime;
clock_parea.frames = 1;
clock_parea.cacheable = true;
ddi_parea_register(&clock_parea);
 
/*
187,19 → 189,7
spinlock_unlock(&THREAD->lock);
if (!ticks && !PREEMPTION_DISABLED) {
#ifdef CONFIG_UDEBUG
istate_t *istate;
#endif
scheduler();
#ifdef CONFIG_UDEBUG
/*
* Give udebug chance to stop the thread
* before it begins executing userspace code.
*/
istate = THREAD->udebug.uspace_state;
if (istate && istate_from_uspace(istate))
udebug_before_thread_runs();
#endif
}
}
 
/branches/network/kernel/generic/src/ddi/irq.c
39,8 → 39,7
*
* This code is designed to support:
* - multiple devices sharing single IRQ
* - multiple IRQs per single device
* - multiple instances of the same device
* - multiple IRQs per signle device
*
*
* Note about architectures.
69,11 → 68,8
 
#include <ddi/irq.h>
#include <adt/hash_table.h>
#include <mm/slab.h>
#include <arch/types.h>
#include <synch/spinlock.h>
#include <console/console.h>
#include <memstr.h>
#include <arch.h>
 
#define KEY_INR 0
80,22 → 76,13
#define KEY_DEVNO 1
 
/**
* Spinlock protecting the kernel IRQ hash table.
* Spinlock protecting the hash table.
* This lock must be taken only when interrupts are disabled.
*/
SPINLOCK_INITIALIZE(irq_kernel_hash_table_lock);
/** The kernel IRQ hash table. */
static hash_table_t irq_kernel_hash_table;
SPINLOCK_INITIALIZE(irq_hash_table_lock);
static hash_table_t irq_hash_table;
 
/**
* Spinlock protecting the uspace IRQ hash table.
* This lock must be taken only when interrupts are disabled.
*/
SPINLOCK_INITIALIZE(irq_uspace_hash_table_lock);
/** The uspace IRQ hash table. */
hash_table_t irq_uspace_hash_table;
 
/**
* Hash table operations for cases when we know that
* there will be collisions between different keys.
*/
123,9 → 110,6
.remove_callback = NULL /* not used */
};
 
/** Number of buckets in either of the hash tables. */
static count_t buckets;
 
/** Initialize IRQ subsystem.
*
* @param inrs Numbers of unique IRQ numbers or INRs.
133,7 → 117,6
*/
void irq_init(count_t inrs, count_t chains)
{
buckets = chains;
/*
* Be smart about the choice of the hash table operations.
* In cases in which inrs equals the requested number of
140,17 → 123,10
* chains (i.e. where there is no collision between
* different keys), we can use optimized set of operations.
*/
if (inrs == chains) {
hash_table_create(&irq_uspace_hash_table, chains, 2,
&irq_lin_ops);
hash_table_create(&irq_kernel_hash_table, chains, 2,
&irq_lin_ops);
} else {
hash_table_create(&irq_uspace_hash_table, chains, 2,
&irq_ht_ops);
hash_table_create(&irq_kernel_hash_table, chains, 2,
&irq_ht_ops);
}
if (inrs == chains)
hash_table_create(&irq_hash_table, chains, 2, &irq_lin_ops);
else
hash_table_create(&irq_hash_table, chains, 2, &irq_ht_ops);
}
 
/** Initialize one IRQ structure.
160,12 → 136,21
*/
void irq_initialize(irq_t *irq)
{
memsetb(irq, sizeof(irq_t), 0);
link_initialize(&irq->link);
spinlock_initialize(&irq->lock, "irq.lock");
link_initialize(&irq->notif_cfg.link);
irq->preack = false;
irq->inr = -1;
irq->devno = -1;
irq->trigger = (irq_trigger_t) 0;
irq->claim = NULL;
irq->handler = NULL;
irq->arg = NULL;
irq->notif_cfg.notify = false;
irq->notif_cfg.answerbox = NULL;
irq->notif_cfg.code = NULL;
irq->notif_cfg.method = 0;
irq->notif_cfg.counter = 0;
link_initialize(&irq->notif_cfg.link);
}
 
/** Register IRQ for device.
172,10 → 157,9
*
* The irq structure must be filled with information
* about the interrupt source and with the claim()
* function pointer and handler() function pointer.
* function pointer and irq_handler() function pointer.
*
* @param irq IRQ structure belonging to a device.
* @return True on success, false on failure.
* @param irq IRQ structure belonging to a device.
*/
void irq_register(irq_t *irq)
{
186,101 → 170,88
};
ipl = interrupts_disable();
spinlock_lock(&irq_kernel_hash_table_lock);
spinlock_lock(&irq->lock);
hash_table_insert(&irq_kernel_hash_table, key, &irq->link);
spinlock_unlock(&irq->lock);
spinlock_unlock(&irq_kernel_hash_table_lock);
spinlock_lock(&irq_hash_table_lock);
hash_table_insert(&irq_hash_table, key, &irq->link);
spinlock_unlock(&irq_hash_table_lock);
interrupts_restore(ipl);
}
 
/** Search and lock the uspace IRQ hash table.
/** Dispatch the IRQ.
*
* We assume this function is only called from interrupt
* context (i.e. that interrupts are disabled prior to
* this call).
*
* This function attempts to lookup a fitting IRQ
* structure. In case of success, return with interrupts
* disabled and holding the respective structure.
*
* @param inr Interrupt number (aka inr or irq).
*
* @return IRQ structure of the respective device or NULL.
*/
static irq_t *irq_dispatch_and_lock_uspace(inr_t inr)
irq_t *irq_dispatch_and_lock(inr_t inr)
{
link_t *lnk;
unative_t key[] = {
(unative_t) inr,
(unative_t) -1 /* search will use claim() instead of devno */
(unative_t) -1 /* search will use claim() instead of devno */
};
spinlock_lock(&irq_uspace_hash_table_lock);
lnk = hash_table_find(&irq_uspace_hash_table, key);
spinlock_lock(&irq_hash_table_lock);
 
lnk = hash_table_find(&irq_hash_table, key);
if (lnk) {
irq_t *irq;
irq = hash_table_get_instance(lnk, irq_t, link);
spinlock_unlock(&irq_uspace_hash_table_lock);
 
spinlock_unlock(&irq_hash_table_lock);
return irq;
}
spinlock_unlock(&irq_uspace_hash_table_lock);
return NULL;
spinlock_unlock(&irq_hash_table_lock);
 
return NULL;
}
 
/** Search and lock the kernel IRQ hash table.
/** Find the IRQ structure corresponding to inr and devno.
*
* This functions attempts to lookup the IRQ structure
* corresponding to its arguments. On success, this
* function returns with interrups disabled, holding
* the lock of the respective IRQ structure.
*
* This function assumes interrupts are already disabled.
*
* @param inr INR being looked up.
* @param devno Devno being looked up.
*
* @return Locked IRQ structure on success or NULL on failure.
*/
static irq_t *irq_dispatch_and_lock_kernel(inr_t inr)
irq_t *irq_find_and_lock(inr_t inr, devno_t devno)
{
link_t *lnk;
unative_t key[] = {
unative_t keys[] = {
(unative_t) inr,
(unative_t) -1 /* search will use claim() instead of devno */
(unative_t) devno
};
spinlock_lock(&irq_kernel_hash_table_lock);
lnk = hash_table_find(&irq_kernel_hash_table, key);
spinlock_lock(&irq_hash_table_lock);
 
lnk = hash_table_find(&irq_hash_table, keys);
if (lnk) {
irq_t *irq;
irq = hash_table_get_instance(lnk, irq_t, link);
spinlock_unlock(&irq_kernel_hash_table_lock);
 
spinlock_unlock(&irq_hash_table_lock);
return irq;
}
spinlock_unlock(&irq_kernel_hash_table_lock);
return NULL;
}
spinlock_unlock(&irq_hash_table_lock);
 
/** Dispatch the IRQ.
*
* We assume this function is only called from interrupt
* context (i.e. that interrupts are disabled prior to
* this call).
*
* This function attempts to lookup a fitting IRQ
* structure. In case of success, return with interrupts
* disabled and holding the respective structure.
*
* @param inr Interrupt number (aka inr or irq).
*
* @return IRQ structure of the respective device or NULL.
*/
irq_t *irq_dispatch_and_lock(inr_t inr)
{
irq_t *irq;
/*
* If the kernel console is silenced,
* then try first the uspace handlers,
* eventually fall back to kernel handlers.
*
* If the kernel console is active,
* then do it the other way around.
*/
if (silent) {
irq = irq_dispatch_and_lock_uspace(inr);
if (irq)
return irq;
return irq_dispatch_and_lock_kernel(inr);
}
irq = irq_dispatch_and_lock_kernel(inr);
if (irq)
return irq;
return irq_dispatch_and_lock_uspace(inr);
return NULL;
}
 
/** Compute hash index for the key.
299,7 → 270,7
index_t irq_ht_hash(unative_t key[])
{
inr_t inr = (inr_t) key[KEY_INR];
return inr % buckets;
return inr % irq_hash_table.entries;
}
 
/** Compare hash table element with a key.
333,8 → 304,7
spinlock_lock(&irq->lock);
if (devno == -1) {
/* Invoked by irq_dispatch_and_lock(). */
rv = ((irq->inr == inr) &&
(irq->claim(irq) == IRQ_ACCEPT));
rv = ((irq->inr == inr) && (irq->claim() == IRQ_ACCEPT));
} else {
/* Invoked by irq_find_and_lock(). */
rv = ((irq->inr == inr) && (irq->devno == devno));
393,7 → 363,7
spinlock_lock(&irq->lock);
if (devno == -1) {
/* Invoked by irq_dispatch_and_lock() */
rv = (irq->claim(irq) == IRQ_ACCEPT);
rv = (irq->claim() == IRQ_ACCEPT);
} else {
/* Invoked by irq_find_and_lock() */
rv = (irq->devno == devno);
/branches/network/kernel/generic/src/ddi/ddi.c
29,10 → 29,10
/** @addtogroup genericddi
* @{
*/
 
/**
* @file
* @brief Device Driver Interface functions.
* @brief Device Driver Interface functions.
*
* This file contains functions that comprise the Device Driver Interface.
* These are the functions for mapping physical memory and enabling I/O
68,100 → 68,82
*
* @param parea Pointer to physical area structure.
*
* @todo This function doesn't check for overlaps. It depends on the kernel to
* create disjunct physical memory areas.
*/
void ddi_parea_register(parea_t *parea)
{
ipl_t ipl = interrupts_disable();
ipl_t ipl;
 
ipl = interrupts_disable();
spinlock_lock(&parea_lock);
/*
* We don't check for overlaps here as the kernel is pretty sane.
* TODO: we should really check for overlaps here.
* However, we should be safe because the kernel is pretty sane and
* memory of different devices doesn't overlap.
*/
btree_insert(&parea_btree, (btree_key_t) parea->pbase, parea, NULL);
 
spinlock_unlock(&parea_lock);
interrupts_restore(ipl);
interrupts_restore(ipl);
}
 
/** Map piece of physical memory into virtual address space of current task.
*
* @param pf Physical address of the starting frame.
* @param vp Virtual address of the starting page.
* @param pf Physical address of the starting frame.
* @param vp Virtual address of the starting page.
* @param pages Number of pages to map.
* @param flags Address space area flags for the mapping.
*
* @return 0 on success, EPERM if the caller lacks capabilities to use this
* syscall, EBADMEM if pf or vf is not page aligned, ENOENT if there
* is no task matching the specified ID or the physical address space
* is not enabled for mapping and ENOMEM if there was a problem in
* creating address space area.
*
* syscall, ENOENT if there is no task matching the specified ID or the
* physical address space is not enabled for mapping and ENOMEM if there
* was a problem in creating address space area.
*/
static int ddi_physmem_map(uintptr_t pf, uintptr_t vp, count_t pages, int flags)
{
ASSERT(TASK);
ASSERT((pf % FRAME_SIZE) == 0);
ASSERT((vp % PAGE_SIZE) == 0);
ipl_t ipl;
cap_t caps;
mem_backend_data_t backend_data;
 
backend_data.base = pf;
backend_data.frames = pages;
/*
* Make sure the caller is authorised to make this syscall.
*/
cap_t caps = cap_get(TASK);
caps = cap_get(TASK);
if (!(caps & CAP_MEM_MANAGER))
return EPERM;
mem_backend_data_t backend_data;
backend_data.base = pf;
backend_data.frames = pages;
ipl_t ipl = interrupts_disable();
/* Find the zone of the physical memory */
spinlock_lock(&zones.lock);
count_t znum = find_zone(ADDR2PFN(pf), pages, 0);
if (znum == (count_t) -1) {
/* Frames not found in any zones
* -> assume it is hardware device and allow mapping
 
ipl = interrupts_disable();
 
/*
* Check if the physical memory area is enabled for mapping.
* If the architecture supports virtually indexed caches, intercept
* attempts to create an illegal address alias.
*/
spinlock_lock(&parea_lock);
parea_t *parea;
btree_node_t *nodep;
parea = (parea_t *) btree_search(&parea_btree, (btree_key_t) pf, &nodep);
if (!parea || parea->frames < pages || ((flags & AS_AREA_CACHEABLE) &&
!parea->cacheable) || (!(flags & AS_AREA_CACHEABLE) &&
parea->cacheable)) {
/*
* This physical memory area cannot be mapped.
*/
spinlock_unlock(&zones.lock);
goto map;
}
if (zones.info[znum].flags & ZONE_FIRMWARE) {
/* Frames are part of firmware */
spinlock_unlock(&zones.lock);
goto map;
}
if (zone_flags_available(zones.info[znum].flags)) {
/* Frames are part of physical memory, check if the memory
* region is enabled for mapping.
*/
spinlock_unlock(&zones.lock);
spinlock_lock(&parea_lock);
btree_node_t *nodep;
parea_t *parea = (parea_t *) btree_search(&parea_btree,
(btree_key_t) pf, &nodep);
if ((!parea) || (parea->frames < pages))
goto err;
spinlock_unlock(&parea_lock);
goto map;
interrupts_restore(ipl);
return ENOENT;
}
err:
spinlock_unlock(&zones.lock);
interrupts_restore(ipl);
return ENOENT;
map:
spinlock_unlock(&parea_lock);
 
spinlock_lock(&TASK->lock);
if (!as_area_create(TASK->as, flags, pages * PAGE_SIZE, vp,
AS_AREA_ATTR_NONE, &phys_backend, &backend_data)) {
if (!as_area_create(TASK->as, flags, pages * PAGE_SIZE, vp, AS_AREA_ATTR_NONE,
&phys_backend, &backend_data)) {
/*
* The address space area could not have been created.
* We report it using ENOMEM.
187,24 → 169,28
* @param size Size of the enabled I/O space..
*
* @return 0 on success, EPERM if the caller lacks capabilities to use this
* syscall, ENOENT if there is no task matching the specified ID.
*
* syscall, ENOENT if there is no task matching the specified ID.
*/
static int ddi_iospace_enable(task_id_t id, uintptr_t ioaddr, size_t size)
{
ipl_t ipl;
cap_t caps;
task_t *t;
int rc;
/*
* Make sure the caller is authorised to make this syscall.
*/
cap_t caps = cap_get(TASK);
caps = cap_get(TASK);
if (!(caps & CAP_IO_MANAGER))
return EPERM;
ipl_t ipl = interrupts_disable();
ipl = interrupts_disable();
spinlock_lock(&tasks_lock);
task_t *task = task_find_by_id(id);
t = task_find_by_id(id);
if ((!task) || (!context_check(CONTEXT, task->context))) {
if ((!t) || (!context_check(CONTEXT, t->context))) {
/*
* There is no task with the specified ID
* or the task belongs to a different security
214,16 → 200,15
interrupts_restore(ipl);
return ENOENT;
}
 
/* Lock the task and release the lock protecting tasks_btree. */
spinlock_lock(&task->lock);
spinlock_lock(&t->lock);
spinlock_unlock(&tasks_lock);
 
rc = ddi_iospace_enable_arch(t, ioaddr, size);
int rc = ddi_iospace_enable_arch(task, ioaddr, size);
spinlock_unlock(&task->lock);
spinlock_unlock(&t->lock);
interrupts_restore(ipl);
return rc;
}
 
235,8 → 220,7
* @param flags Flags of newly mapped pages
*
* @return 0 on success, otherwise it returns error code found in errno.h
*
*/
*/
unative_t sys_physmem_map(unative_t phys_base, unative_t virt_base,
unative_t pages, unative_t flags)
{
250,15 → 234,16
* @param uspace_io_arg User space address of DDI argument structure.
*
* @return 0 on success, otherwise it returns error code found in errno.h
*
*/
*/
unative_t sys_iospace_enable(ddi_ioarg_t *uspace_io_arg)
{
ddi_ioarg_t arg;
int rc = copy_from_uspace(&arg, uspace_io_arg, sizeof(ddi_ioarg_t));
int rc;
rc = copy_from_uspace(&arg, uspace_io_arg, sizeof(ddi_ioarg_t));
if (rc != 0)
return (unative_t) rc;
return (unative_t) ddi_iospace_enable((task_id_t) arg.task_id,
(uintptr_t) arg.ioaddr, (size_t) arg.size);
}
266,24 → 251,20
/** Disable or enable preemption.
*
* @param enable If non-zero, the preemption counter will be decremented,
* leading to potential enabling of preemption. Otherwise
* the preemption counter will be incremented, preventing
* preemption from occurring.
* leading to potential enabling of preemption. Otherwise the preemption
* counter will be incremented, preventing preemption from occurring.
*
* @return Zero on success or EPERM if callers capabilities are not sufficient.
*
*/
*/
unative_t sys_preempt_control(int enable)
{
if (!cap_get(TASK) & CAP_PREEMPT_CONTROL)
return EPERM;
if (enable)
preemption_enable();
else
preemption_disable();
return 0;
if (!cap_get(TASK) & CAP_PREEMPT_CONTROL)
return EPERM;
if (enable)
preemption_enable();
else
preemption_disable();
return 0;
}
 
/** @}
/branches/network/kernel/generic/src/ddi/device.c
31,7 → 31,7
*/
/**
* @file
* @brief Device numbers.
* @brief Device numbers.
*/
 
#include <arch/types.h>
47,16 → 47,13
*/
devno_t device_assign_devno(void)
{
devno_t devno = (devno_t) atomic_postinc(&last);
devno_t devno;
 
devno = (devno_t) atomic_postinc(&last);
ASSERT(devno >= 0);
 
return devno;
}
 
unative_t sys_device_assign_devno(void)
{
return (unative_t) device_assign_devno();
}
 
/** @}
*/
/branches/network/kernel/generic/include/udebug/udebug.h
File deleted
/branches/network/kernel/generic/include/udebug/udebug_ops.h
File deleted
/branches/network/kernel/generic/include/udebug/udebug_ipc.h
File deleted
/branches/network/kernel/generic/include/string.h
File deleted
/branches/network/kernel/generic/include/ipc/kbox.h
File deleted
/branches/network/kernel/generic/include/ipc/ipc.h
195,12 → 195,6
*/
#define IPC_M_DATA_READ 7
 
/** Debug the recipient.
* - ARG1 - specifies the debug method (from udebug_method_t)
* - other arguments are specific to the debug method
*/
#define IPC_M_DEBUG_ALL 8
 
/* Well-known methods */
#define IPC_M_LAST_SYSTEM 511
#define IPC_M_PING 512
266,6 → 260,12
typedef struct {
unative_t args[IPC_CALL_LEN];
phone_t *phone;
/*
* The forward operation can masquerade the caller phone. For those
* cases, we must keep it aside so that the answer is processed
* correctly.
*/
phone_t *caller_phone;
} ipc_data_t;
 
typedef struct {
287,13 → 287,6
 
/** Buffer for IPC_M_DATA_WRITE and IPC_M_DATA_READ. */
uint8_t *buffer;
 
/*
* The forward operation can masquerade the caller phone. For those
* cases, we must keep it aside so that the answer is processed
* correctly.
*/
phone_t *caller_phone;
} call_t;
 
extern void ipc_init(void);
313,8 → 306,6
extern int ipc_phone_hangup(phone_t *);
extern void ipc_backsend_err(phone_t *, call_t *, unative_t);
extern void ipc_print_task(task_id_t);
extern void ipc_answerbox_slam_phones(answerbox_t *, bool);
extern void ipc_cleanup_call_list(link_t *);
 
extern answerbox_t *ipc_phone_0;
 
/branches/network/kernel/generic/include/ipc/sysipc.h
53,13 → 53,10
int nonblocking);
unative_t sys_ipc_forward_fast(unative_t callid, unative_t phoneid,
unative_t method, unative_t arg1, unative_t arg2, int mode);
unative_t sys_ipc_forward_slow(unative_t callid, unative_t phoneid,
ipc_data_t *data, int mode);
unative_t sys_ipc_hangup(int phoneid);
unative_t sys_ipc_register_irq(inr_t inr, devno_t devno, unative_t method,
irq_code_t *ucode);
unative_t sys_ipc_unregister_irq(inr_t inr, devno_t devno);
unative_t sys_ipc_connect_kbox(sysarg64_t *task_id);
 
#endif
 
/branches/network/kernel/generic/include/ipc/irq.h
36,7 → 36,7
#define KERN_IPC_IRQ_H_
 
/** Maximum length of IPC IRQ program */
#define IRQ_MAX_PROG_SIZE 20
#define IRQ_MAX_PROG_SIZE 10
 
#include <ipc/ipc.h>
#include <ddi/irq.h>
43,21 → 43,16
#include <arch/types.h>
#include <adt/list.h>
 
extern int ipc_irq_register(answerbox_t *, inr_t, devno_t, unative_t,
irq_code_t *);
extern int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno,
unative_t method, irq_code_t *ucode);
extern void ipc_irq_send_notif(irq_t *irq);
extern void ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno);
extern void ipc_irq_cleanup(answerbox_t *box);
 
extern irq_ownership_t ipc_irq_top_half_claim(irq_t *);
extern void ipc_irq_top_half_handler(irq_t *);
 
extern int ipc_irq_unregister(answerbox_t *, inr_t, devno_t);
extern void ipc_irq_cleanup(answerbox_t *);
 
/*
* User friendly wrappers for ipc_irq_send_msg(). They are in the form
* ipc_irq_send_msg_m(), where m is the number of payload arguments.
*/
#define ipc_irq_send_msg_0(irq) \
ipc_irq_send_msg((irq), 0, 0, 0, 0, 0)
#define ipc_irq_send_msg_1(irq, a1) \
ipc_irq_send_msg((irq), (a1), 0, 0, 0, 0)
#define ipc_irq_send_msg_2(irq, a1, a2) \
69,8 → 64,8
#define ipc_irq_send_msg_5(irq, a1, a2, a3, a4, a5) \
ipc_irq_send_msg((irq), (a1), (a2), (a3), (a4), (a5))
 
extern void ipc_irq_send_msg(irq_t *, unative_t, unative_t, unative_t, unative_t,
unative_t);
extern void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2,
unative_t a3, unative_t a4, unative_t a5);
 
#endif
 
/branches/network/kernel/generic/include/errno.h
48,18 → 48,15
* sys_ipc_hangup() to close the connection.
* Used by answerbox to close the connection.
*/
#define EPARTY -8 /* The other party encountered an error when
* receiving the call.
*/
#define EEXISTS -9 /* Entry already exists */
#define EBADMEM -10 /* Bad memory pointer */
#define ENOTSUP -11 /* Not supported */
#define EADDRNOTAVAIL -12 /* Address not available. */
#define ETIMEOUT -13 /* Timeout expired */
#define EINVAL -14 /* Invalid value */
#define EBUSY -15 /* Resource is busy */
#define EOVERFLOW -16 /* The result does not fit its size. */
#define EINTR -17 /* Operation was interrupted. */
#define EEXISTS -8 /* Entry already exists */
#define EBADMEM -9 /* Bad memory pointer */
#define ENOTSUP -10 /* Not supported */
#define EADDRNOTAVAIL -11 /* Address not available. */
#define ETIMEOUT -12 /* Timeout expired */
#define EINVAL -13 /* Invalid value */
#define EBUSY -14 /* Resource is busy */
#define EOVERFLOW -15 /* The result does not fit its size. */
#define EINTR -16 /* Operation was interrupted. */
 
#endif
 
/branches/network/kernel/generic/include/mm/page.h
42,7 → 42,7
/** Operations to manipulate page mappings. */
typedef struct {
void (* mapping_insert)(as_t *as, uintptr_t page, uintptr_t frame,
int flags);
int flags);
void (* mapping_remove)(as_t *as, uintptr_t page);
pte_t *(* mapping_find)(as_t *as, uintptr_t page);
} page_mapping_operations_t;
59,7 → 59,6
extern pte_t *page_table_create(int flags);
extern void page_table_destroy(pte_t *page_table);
extern void map_structure(uintptr_t s, size_t size);
 
extern uintptr_t hw_map(uintptr_t physaddr, size_t size);
 
#endif
/branches/network/kernel/generic/include/mm/frame.h
38,82 → 38,34
 
#include <arch/types.h>
#include <adt/list.h>
#include <synch/spinlock.h>
#include <mm/buddy.h>
#include <synch/spinlock.h>
#include <arch/mm/page.h>
#include <arch/mm/frame.h>
 
#define ONE_FRAME 0
#define TWO_FRAMES 1
#define FOUR_FRAMES 2
#define ONE_FRAME 0
#define TWO_FRAMES 1
#define FOUR_FRAMES 2
 
 
#ifdef ARCH_STACK_FRAMES
#define STACK_FRAMES ARCH_STACK_FRAMES
#define STACK_FRAMES ARCH_STACK_FRAMES
#else
#define STACK_FRAMES ONE_FRAME
#define STACK_FRAMES ONE_FRAME
#endif
 
/** Maximum number of zones in the system. */
#define ZONES_MAX 32
/** Maximum number of zones in system. */
#define ZONES_MAX 16
 
typedef uint8_t frame_flags_t;
 
/** Convert the frame address to kernel VA. */
#define FRAME_KA 0x01
/** Convert the frame address to kernel va. */
#define FRAME_KA 0x1
/** Do not panic and do not sleep on failure. */
#define FRAME_ATOMIC 0x02
#define FRAME_ATOMIC 0x2
/** Do not start reclaiming when no free memory. */
#define FRAME_NO_RECLAIM 0x04
#define FRAME_NO_RECLAIM 0x4
/** Do not allocate above 4 GiB. */
#define FRAME_LOW_4_GiB 0x8
 
typedef uint8_t zone_flags_t;
 
/** Available zone (free for allocation) */
#define ZONE_AVAILABLE 0x00
/** Zone is reserved (not available for allocation) */
#define ZONE_RESERVED 0x08
/** Zone is used by firmware (not available for allocation) */
#define ZONE_FIRMWARE 0x10
 
/** Currently there is no equivalent zone flags
for frame flags */
#define FRAME_TO_ZONE_FLAGS(frame_flags) 0
 
typedef struct {
count_t refcount; /**< Tracking of shared frames */
uint8_t buddy_order; /**< Buddy system block order */
link_t buddy_link; /**< Link to the next free block inside
one order */
void *parent; /**< If allocated by slab, this points there */
} frame_t;
 
typedef struct {
pfn_t base; /**< Frame_no of the first frame
in the frames array */
count_t count; /**< Size of zone */
count_t free_count; /**< Number of free frame_t
structures */
count_t busy_count; /**< Number of busy frame_t
structures */
zone_flags_t flags; /**< Type of the zone */
frame_t *frames; /**< Array of frame_t structures
in this zone */
buddy_system_t *buddy_system; /**< Buddy system for the zone */
} zone_t;
 
/*
* The zoneinfo.lock must be locked when accessing zoneinfo structure.
* Some of the attributes in zone_t structures are 'read-only'
*/
typedef struct {
SPINLOCK_DECLARE(lock);
count_t count;
zone_t info[ZONES_MAX];
} zones_t;
 
extern zones_t zones;
 
static inline uintptr_t PFN2ADDR(pfn_t frame)
{
return (uintptr_t) (frame << FRAME_WIDTH);
136,37 → 88,31
return (size_t) (frames << FRAME_WIDTH);
}
 
static inline bool zone_flags_available(zone_flags_t flags)
{
return ((flags & (ZONE_RESERVED | ZONE_FIRMWARE)) == 0);
}
 
#define IS_BUDDY_ORDER_OK(index, order) \
#define IS_BUDDY_ORDER_OK(index, order) \
((~(((unative_t) -1) << (order)) & (index)) == 0)
#define IS_BUDDY_LEFT_BLOCK(zone, frame) \
(((frame_index((zone), (frame)) >> (frame)->buddy_order) & 0x01) == 0)
#define IS_BUDDY_RIGHT_BLOCK(zone, frame) \
(((frame_index((zone), (frame)) >> (frame)->buddy_order) & 0x01) == 1)
#define IS_BUDDY_LEFT_BLOCK_ABS(zone, frame) \
(((frame_index_abs((zone), (frame)) >> (frame)->buddy_order) & 0x01) == 0)
#define IS_BUDDY_RIGHT_BLOCK_ABS(zone, frame) \
(((frame_index_abs((zone), (frame)) >> (frame)->buddy_order) & 0x01) == 1)
#define IS_BUDDY_LEFT_BLOCK(zone, frame) \
(((frame_index((zone), (frame)) >> (frame)->buddy_order) & 0x1) == 0)
#define IS_BUDDY_RIGHT_BLOCK(zone, frame) \
(((frame_index((zone), (frame)) >> (frame)->buddy_order) & 0x1) == 1)
#define IS_BUDDY_LEFT_BLOCK_ABS(zone, frame) \
(((frame_index_abs((zone), (frame)) >> (frame)->buddy_order) & 0x1) == 0)
#define IS_BUDDY_RIGHT_BLOCK_ABS(zone, frame) \
(((frame_index_abs((zone), (frame)) >> (frame)->buddy_order) & 0x1) == 1)
 
#define frame_alloc(order, flags) \
#define frame_alloc(order, flags) \
frame_alloc_generic(order, flags, NULL)
 
extern void frame_init(void);
extern void *frame_alloc_generic(uint8_t, frame_flags_t, count_t *);
extern void *frame_alloc_generic(uint8_t, int, unsigned int *);
extern void frame_free(uintptr_t);
extern void frame_reference_add(pfn_t);
 
extern count_t find_zone(pfn_t frame, count_t count, count_t hint);
extern count_t zone_create(pfn_t, count_t, pfn_t, zone_flags_t);
extern void *frame_get_parent(pfn_t, count_t);
extern void frame_set_parent(pfn_t, void *, count_t);
extern int zone_create(pfn_t, count_t, pfn_t, int);
extern void *frame_get_parent(pfn_t, unsigned int);
extern void frame_set_parent(pfn_t, void *, unsigned int);
extern void frame_mark_unavailable(pfn_t, count_t);
extern uintptr_t zone_conf_size(count_t);
extern bool zone_merge(count_t, count_t);
extern void zone_merge(unsigned int, unsigned int);
extern void zone_merge_all(void);
extern uint64_t zone_total_size(void);
 
174,7 → 120,7
* Console functions
*/
extern void zone_print_list(void);
extern void zone_print_one(count_t);
extern void zone_print_one(unsigned int);
 
#endif
 
/branches/network/kernel/generic/include/mm/buddy.h
82,7 → 82,7
extern link_t *buddy_system_alloc(buddy_system_t *, uint8_t);
extern bool buddy_system_can_alloc(buddy_system_t *, uint8_t);
extern void buddy_system_free(buddy_system_t *, link_t *);
extern size_t buddy_conf_size(size_t);
extern size_t buddy_conf_size(int);
extern link_t *buddy_system_alloc_block(buddy_system_t *, link_t *);
 
#endif
/branches/network/kernel/generic/include/mm/slab.h
59,7 → 59,7
/* slab_reclaim constants */
 
/** Reclaim all possible memory, because we are in memory stress */
#define SLAB_RECLAIM_ALL 0x01
#define SLAB_RECLAIM_ALL 0x1
 
/* cache_create flags */
 
/branches/network/kernel/generic/include/macros.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup generic
/** @addtogroup generic
* @{
*/
/** @file
35,66 → 35,47
#ifndef KERN_MACROS_H_
#define KERN_MACROS_H_
 
#ifndef __ASM__
 
#include <arch/types.h>
 
#define isdigit(d) (((d) >= '0') && ((d) <= '9'))
#define islower(c) (((c) >= 'a') && ((c) <= 'z'))
#define isupper(c) (((c) >= 'A') && ((c) <= 'Z'))
#define isalpha(c) (is_lower((c)) || is_upper((c)))
#define isalphanum(c) (is_alpha((c)) || is_digit((c)))
#define isspace(c) (((c) == ' ') || ((c) == '\t') || ((c) == '\n') || \
((c) == '\r'))
 
#define min(a,b) ((a) < (b) ? (a) : (b))
#define max(a,b) ((a) > (b) ? (a) : (b))
 
/** Return true if the intervals overlap.
*
* @param s1 Start address of the first interval.
* @param sz1 Size of the first interval.
* @param s2 Start address of the second interval.
* @param sz2 Size of the second interval.
* @param s1 Start address of the first interval.
* @param sz1 Size of the first interval.
* @param s2 Start address of the second interval.
* @param sz2 Size of the second interval.
*/
static inline int overlaps(uintptr_t s1, size_t sz1, uintptr_t s2, size_t sz2)
{
uintptr_t e1 = s1 + sz1;
uintptr_t e2 = s2 + sz2;
return ((s1 < e2) && (s2 < e1));
 
return (s1 < e2) && (s2 < e1);
}
 
#endif /* __ASM__ */
 
#define isdigit(d) (((d) >= '0') && ((d) <= '9'))
#define islower(c) (((c) >= 'a') && ((c) <= 'z'))
#define isupper(c) (((c) >= 'A') && ((c) <= 'Z'))
#define isalpha(c) (is_lower((c)) || is_upper((c)))
#define isalphanum(c) (is_alpha((c)) || is_digit((c)))
#define isspace(c) \
(((c) == ' ') || ((c) == '\t') || ((c) == '\n') || ((c) == '\r'))
 
#define min(a, b) ((a) < (b) ? (a) : (b))
#define max(a, b) ((a) > (b) ? (a) : (b))
 
#define min3(a, b, c) ((a) < (b) ? (min(a, c)) : (min(b, c)))
#define max3(a, b, c) ((a) > (b) ? (max(a, c)) : (max(b, c)))
 
/* Compute overlapping of physical addresses */
#define PA_overlaps(x, szx, y, szy) \
#define PA_overlaps(x, szx, y, szy) \
overlaps(KA2PA((x)), (szx), KA2PA((y)), (szy))
 
#define SIZE2KB(size) ((size) >> 10)
#define SIZE2MB(size) ((size) >> 20)
#define SIZE2KB(size) ((size) >> 10)
#define SIZE2MB(size) ((size) >> 20)
 
#define KB2SIZE(kb) ((kb) << 10)
#define MB2SIZE(mb) ((mb) << 20)
#define KB2SIZE(kb) ((kb) << 10)
#define MB2SIZE(mb) ((mb) << 20)
 
#define STRING(arg) STRING_ARG(arg)
#define STRING_ARG(arg) #arg
#define STRING(arg) STRING_ARG(arg)
#define STRING_ARG(arg) #arg
 
/** Pseudorandom generator
*
* A pretty standard linear congruential pseudorandom
* number generator (m = 2^32 or 2^64 depending on architecture).
*
*/
#define RANDI(seed) \
({ \
(seed) = 1103515245 * (seed) + 12345; \
(seed); \
})
 
#endif
 
/** @}
/branches/network/kernel/generic/include/config.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup generic
/** @addtogroup generic
* @{
*/
/** @file
38,16 → 38,13
#include <arch/types.h>
#include <arch/mm/page.h>
 
#define STACK_SIZE PAGE_SIZE
#define STACK_SIZE PAGE_SIZE
 
#define CONFIG_INIT_TASKS 32
#define CONFIG_INIT_TASKS 32
 
#define CONFIG_TASK_NAME_BUFLEN 32
 
typedef struct {
uintptr_t addr;
size_t size;
char name[CONFIG_TASK_NAME_BUFLEN];
} init_task_t;
 
typedef struct {
66,14 → 63,14
} ballocs_t;
 
typedef struct {
count_t cpu_count; /**< Number of processors detected. */
volatile count_t cpu_active; /**< Number of processors that are up and running. */
count_t cpu_count; /**< Number of processors detected. */
volatile count_t cpu_active; /**< Number of processors that are up and running. */
 
uintptr_t base;
size_t kernel_size; /**< Size of memory in bytes taken by kernel and stack */
size_t kernel_size; /**< Size of memory in bytes taken by kernel and stack */
uintptr_t stack_base; /**< Base adddress of initial stack */
size_t stack_size; /**< Size of initial stack */
uintptr_t stack_base; /**< Base adddress of initial stack */
size_t stack_size; /**< Size of initial stack */
} config_t;
 
extern config_t config;
/branches/network/kernel/generic/include/proc/task.h
52,11 → 52,7
#include <arch/cpu.h>
#include <mm/tlb.h>
#include <proc/scheduler.h>
#include <udebug/udebug.h>
#include <ipc/kbox.h>
 
#define TASK_NAME_BUFLEN 20
 
struct thread;
 
/** Task structure. */
70,8 → 66,8
* threads.
*/
SPINLOCK_DECLARE(lock);
 
char name[TASK_NAME_BUFLEN];
char *name;
/** List of threads contained in this task. */
link_t th_head;
/** Address space. */
97,15 → 93,7
* certain extent.
*/
atomic_t active_calls;
 
#ifdef CONFIG_UDEBUG
/** Debugging stuff. */
udebug_task_t udebug;
 
/** Kernel answerbox. */
kbox_t kb;
#endif
 
/** Architecture specific task data. */
task_arch_t arch;
144,7 → 132,6
#endif
 
extern unative_t sys_task_get_id(task_id_t *uspace_task_id);
extern unative_t sys_task_set_name(const char *uspace_name, size_t name_len);
 
#endif
 
/branches/network/kernel/generic/include/proc/thread.h
46,7 → 46,6
#include <arch/cpu.h>
#include <mm/tlb.h>
#include <proc/uarg.h>
#include <udebug/udebug.h>
 
#define THREAD_STACK_SIZE STACK_SIZE
#define THREAD_NAME_BUFLEN 20
204,12 → 203,6
 
/** Thread's kernel stack. */
uint8_t *kstack;
 
#ifdef CONFIG_UDEBUG
/** Debugging stuff */
udebug_thread_t udebug;
#endif
 
} thread_t;
 
/** Thread list lock.
259,8 → 252,7
extern slab_cache_t *fpu_context_slab;
 
/* Thread syscall prototypes. */
extern unative_t sys_thread_create(uspace_arg_t *uspace_uarg,
char *uspace_name, size_t name_len, thread_id_t *uspace_thread_id);
extern unative_t sys_thread_create(uspace_arg_t *uspace_uarg, char *uspace_name, thread_id_t *uspace_thread_id);
extern unative_t sys_thread_exit(int uspace_status);
extern unative_t sys_thread_get_id(thread_id_t *uspace_thread_id);
 
/branches/network/kernel/generic/include/proc/program.h
52,14 → 52,12
 
extern void *program_loader;
 
extern void program_create(as_t *as, uintptr_t entry_addr, char *name,
program_t *p);
extern int program_create_from_image(void *image_addr, char *name,
program_t *p);
extern int program_create_loader(program_t *p, char *name);
extern void program_create(as_t *as, uintptr_t entry_addr, program_t *p);
extern int program_create_from_image(void *image_addr, program_t *p);
extern int program_create_loader(program_t *p);
extern void program_ready(program_t *p);
 
extern unative_t sys_program_spawn_loader(char *uspace_name, size_t name_len);
extern unative_t sys_program_spawn_loader(int *uspace_phone_id);
 
#endif
 
/branches/network/kernel/generic/include/synch/spinlock.h
36,7 → 36,6
#define KERN_SPINLOCK_H_
 
#include <arch/types.h>
#include <arch/barrier.h>
#include <preemption.h>
#include <atomic.h>
#include <debug.h>
/branches/network/kernel/generic/include/syscall/syscall.h
44,7 → 44,6
SYS_THREAD_GET_ID,
SYS_TASK_GET_ID,
SYS_TASK_SET_NAME,
SYS_PROGRAM_SPAWN_LOADER,
SYS_FUTEX_SLEEP,
63,7 → 62,6
SYS_IPC_ANSWER_FAST,
SYS_IPC_ANSWER_SLOW,
SYS_IPC_FORWARD_FAST,
SYS_IPC_FORWARD_SLOW,
SYS_IPC_WAIT,
SYS_IPC_HANGUP,
SYS_IPC_REGISTER_IRQ,
72,7 → 70,6
SYS_CAP_GRANT,
SYS_CAP_REVOKE,
SYS_DEVICE_ASSIGN_DEVNO,
SYS_PHYSMEM_MAP,
SYS_IOSPACE_ENABLE,
SYS_PREEMPT_CONTROL,
81,8 → 78,6
SYS_SYSINFO_VALUE,
SYS_DEBUG_ENABLE_CONSOLE,
SYS_DEBUG_DISABLE_CONSOLE,
SYS_IPC_CONNECT_KBOX,
SYSCALL_END
} syscall_t;
 
/branches/network/kernel/generic/include/memstr.h
44,7 → 44,7
extern void *_memcpy(void *dst, const void *src, size_t cnt);
extern void _memsetb(void *dst, size_t cnt, uint8_t x);
extern void _memsetw(void *dst, size_t cnt, uint16_t x);
extern void *memmove(void *dst, const void *src, size_t cnt);
extern char *strcpy(char *dest, const char *src);
 
#endif
 
/branches/network/kernel/generic/include/typedefs.h
51,10 → 51,6
typedef int32_t inr_t;
typedef int32_t devno_t;
 
typedef volatile uint8_t ioport8_t;
typedef volatile uint16_t ioport16_t;
typedef volatile uint32_t ioport32_t;
 
#endif
 
/** @}
/branches/network/kernel/generic/include/console/console.h
38,29 → 38,17
#include <arch/types.h>
#include <console/chardev.h>
 
extern indev_t *stdin;
extern outdev_t *stdout;
extern chardev_t *stdin;
extern chardev_t *stdout;
 
extern bool silent;
 
extern void console_init(void);
 
extern void klog_init(void);
extern void klog_update(void);
 
extern bool check_poll(indev_t *indev);
extern uint8_t getc(indev_t *indev);
extern uint8_t _getc(indev_t *indev);
extern count_t gets(indev_t *indev, char *buf, size_t buflen);
extern uint8_t getc(chardev_t *chardev);
uint8_t _getc(chardev_t *chardev);
extern count_t gets(chardev_t *chardev, char *buf, size_t buflen);
extern void putchar(char c);
extern unative_t sys_klog(int fd, const void * buf, size_t count);
 
extern void grab_console(void);
extern void release_console(void);
 
extern unative_t sys_debug_enable_console(void);
extern unative_t sys_debug_disable_console(void);
 
extern void arch_grab_console(void);
extern void arch_release_console(void);
 
/branches/network/kernel/generic/include/console/chardev.h
39,60 → 39,41
#include <synch/waitq.h>
#include <synch/spinlock.h>
 
#define INDEV_BUFLEN 512
#define CHARDEV_BUFLEN 512
 
struct indev;
struct chardev;
 
/* Input character device operations interface. */
/* Character device operations interface. */
typedef struct {
/** Suspend pushing characters. */
void (* suspend)(struct chardev *);
/** Resume pushing characters. */
void (* resume)(struct chardev *);
/** Write character to stream. */
void (* write)(struct chardev *, char c);
/** Read character directly from device, assume interrupts disabled. */
char (* poll)(struct indev *);
} indev_operations_t;
char (* read)(struct chardev *);
} chardev_operations_t;
 
/** Character input device. */
typedef struct indev {
typedef struct chardev {
char *name;
waitq_t wq;
/** Protects everything below. */
SPINLOCK_DECLARE(lock);
uint8_t buffer[INDEV_BUFLEN];
SPINLOCK_DECLARE(lock);
uint8_t buffer[CHARDEV_BUFLEN];
count_t counter;
/** Implementation of indev operations. */
indev_operations_t *op;
/** Implementation of chardev operations. */
chardev_operations_t *op;
index_t index;
void *data;
} indev_t;
} chardev_t;
 
extern void chardev_initialize(char *name, chardev_t *chardev,
chardev_operations_t *op);
extern void chardev_push_character(chardev_t *chardev, uint8_t ch);
 
struct outdev;
 
/* Output character device operations interface. */
typedef struct {
/** Write character to output. */
void (* write)(struct outdev *, char c, bool silent);
} outdev_operations_t;
 
/** Character input device. */
typedef struct outdev {
char *name;
/** Protects everything below. */
SPINLOCK_DECLARE(lock);
/** Implementation of outdev operations. */
outdev_operations_t *op;
void *data;
} outdev_t;
 
extern void indev_initialize(char *name, indev_t *indev,
indev_operations_t *op);
extern void indev_push_character(indev_t *indev, uint8_t ch);
 
extern void outdev_initialize(char *name, outdev_t *outdev,
outdev_operations_t *op);
 
#endif /* KERN_CHARDEV_H_ */
 
/** @}
/branches/network/kernel/generic/include/console/kconsole.h
37,7 → 37,6
 
#include <adt/list.h>
#include <synch/spinlock.h>
#include <ipc/irq.h>
 
#define MAX_CMDLINE 256
#define KCONSOLE_HISTORY 10
84,17 → 83,11
void (* help)(void);
} cmd_info_t;
 
extern bool kconsole_notify;
extern irq_t kconsole_irq;
 
SPINLOCK_EXTERN(cmd_lock);
extern link_t cmd_head;
 
extern void kconsole_init(void);
extern void kconsole_notify_init(void);
extern bool kconsole_check_poll(void);
extern void kconsole(char *prompt, char *msg, bool kcon);
extern void kconsole_thread(void *data);
extern void kconsole(void *prompt);
 
extern int cmd_register(cmd_info_t *cmd);
 
/branches/network/kernel/generic/include/interrupt.h
44,12 → 44,12
 
typedef void (* iroutine)(int n, istate_t *istate);
 
#define fault_if_from_uspace(istate, fmt, ...) \
#define fault_if_from_uspace(istate, cmd, ...) \
{ \
if (istate_from_uspace(istate)) { \
task_t *task = TASK; \
printf("Task %s (%" PRIu64 ") killed due to an exception at %p: ", task->name, task->taskid, istate_get_pc(istate)); \
printf(fmt "\n", ##__VA_ARGS__); \
printf("Task %" PRIu64 " killed due to an exception at %p.", task->taskid, istate_get_pc(istate)); \
printf(" " cmd, ##__VA_ARGS__); \
task_kill(task->taskid); \
thread_exit(); \
} \
/branches/network/kernel/generic/include/ddi/device.h
39,7 → 39,6
#include <typedefs.h>
 
extern devno_t device_assign_devno(void);
extern unative_t sys_device_assign_devno(void);
 
#endif
 
/branches/network/kernel/generic/include/ddi/irq.h
36,16 → 36,18
#define KERN_IRQ_H_
 
typedef enum {
CMD_PIO_READ_8 = 1,
CMD_PIO_READ_16,
CMD_PIO_READ_32,
CMD_PIO_WRITE_8,
CMD_PIO_WRITE_16,
CMD_PIO_WRITE_32,
CMD_BTEST,
CMD_PREDICATE,
CMD_ACCEPT,
CMD_DECLINE,
CMD_MEM_READ_1 = 0,
CMD_MEM_READ_2,
CMD_MEM_READ_4,
CMD_MEM_READ_8,
CMD_MEM_WRITE_1,
CMD_MEM_WRITE_2,
CMD_MEM_WRITE_4,
CMD_MEM_WRITE_8,
CMD_PORT_READ_1,
CMD_PORT_WRITE_1,
CMD_IA64_GETCHAR,
CMD_PPC32_GETCHAR,
CMD_LAST
} irq_cmd_type;
 
52,9 → 54,8
typedef struct {
irq_cmd_type cmd;
void *addr;
unsigned long long value;
unsigned int srcarg;
unsigned int dstarg;
unsigned long long value;
int dstarg;
} irq_cmd_t;
 
typedef struct {
66,10 → 67,8
 
#include <arch/types.h>
#include <adt/list.h>
#include <adt/hash_table.h>
#include <synch/spinlock.h>
#include <proc/task.h>
#include <ipc/ipc.h>
 
typedef enum {
IRQ_DECLINE, /**< Decline to service. */
82,11 → 81,8
} irq_trigger_t;
 
struct irq;
typedef void (* irq_handler_t)(struct irq *);
typedef void (* irq_handler_t)(struct irq *irq, void *arg, ...);
 
/** Type for function used to clear the interrupt. */
typedef void (* cir_t)(void *, inr_t);
 
/** IPC notification config structure.
*
* Primarily, this structure is encapsulated in the irq_t structure.
99,8 → 95,6
answerbox_t *answerbox;
/** Method to be used for the notification. */
unative_t method;
/** Arguments that will be sent if the IRQ is claimed. */
unative_t scratch[IPC_CALL_LEN];
/** Top-half pseudocode. */
irq_code_t *code;
/** Counter. */
144,29 → 138,22
/** Trigger level of the IRQ. */
irq_trigger_t trigger;
/** Claim ownership of the IRQ. */
irq_ownership_t (* claim)(struct irq *);
irq_ownership_t (* claim)(void);
/** Handler for this IRQ and device. */
irq_handler_t handler;
/** Instance argument for the handler and the claim function. */
void *instance;
/** Argument for the handler. */
void *arg;
 
/** Clear interrupt routine. */
cir_t cir;
/** First argument to the clear interrupt routine. */
void *cir_arg;
 
/** Notification configuration structure. */
ipc_notif_cfg_t notif_cfg;
} irq_t;
 
SPINLOCK_EXTERN(irq_uspace_hash_table_lock);
extern hash_table_t irq_uspace_hash_table;
extern void irq_init(count_t inrs, count_t chains);
extern void irq_initialize(irq_t *irq);
extern void irq_register(irq_t *irq);
extern irq_t *irq_dispatch_and_lock(inr_t inr);
extern irq_t *irq_find_and_lock(inr_t inr, devno_t devno);
 
extern void irq_init(count_t, count_t);
extern void irq_initialize(irq_t *);
extern void irq_register(irq_t *);
extern irq_t *irq_dispatch_and_lock(inr_t);
 
#endif
 
#endif
/branches/network/kernel/generic/include/ddi/ddi.h
38,14 → 38,13
#include <ddi/ddi_arg.h>
#include <arch/types.h>
#include <proc/task.h>
#include <adt/list.h>
 
/** Structure representing contiguous physical memory area. */
typedef struct {
uintptr_t pbase; /**< Physical base of the area. */
pfn_t frames; /**< Number of frames in the area. */
link_t link; /**< Linked list link */
uintptr_t pbase; /**< Physical base of the area. */
uintptr_t vbase; /**< Virtual base of the area. */
count_t frames; /**< Number of frames in the area. */
bool cacheable; /**< Cacheability. */
} parea_t;
 
extern void ddi_init(void);
/branches/network/kernel/generic/include/adt/bitmap.h
49,14 → 49,6
extern void bitmap_clear_range(bitmap_t *bitmap, index_t start, count_t bits);
extern void bitmap_copy(bitmap_t *dst, bitmap_t *src, count_t bits);
 
static inline int bitmap_get(bitmap_t *bitmap,index_t bit)
{
if(bit >= bitmap->bits)
return 0;
return !! ((bitmap->map)[bit/8] & (1 << (bit & 7)));
}
 
 
#endif
 
/** @}
/branches/network/kernel/generic/include/debug.h
57,21 → 57,21
#ifdef CONFIG_DEBUG
# define ASSERT(expr) \
if (!(expr)) { \
panic("Assertion failed (%s), caller=%p.", #expr, CALLER); \
panic("assertion failed (%s), caller=%p\n", #expr, CALLER); \
}
#else
# define ASSERT(expr)
#endif
 
/** Extensive logging output macro
/** Extensive debugging output macro
*
* If CONFIG_LOG is set, the LOG() macro
* If CONFIG_EDEBUG is set, the LOG() macro
* will print whatever message is indicated plus
* an information about the location.
*
*/
 
#ifdef CONFIG_LOG
#ifdef CONFIG_EDEBUG
# define LOG(format, ...) \
printf("%s() at %s:%u: " format "\n", __func__, __FILE__, \
__LINE__, ##__VA_ARGS__);
79,15 → 79,15
# define LOG(format, ...)
#endif
 
/** Extensive logging execute macro
/** Extensive debugging execute macro
*
* If CONFIG_LOG is set, the LOG_EXEC() macro
* If CONFIG_EDEBUG is set, the LOG_EXEC() macro
* will print an information about calling a given
* function and call it.
*
*/
 
#ifdef CONFIG_LOG
#ifdef CONFIG_EDEBUG
# define LOG_EXEC(fnc) \
{ \
printf("%s() at %s:%u: " #fnc "\n", __func__, __FILE__, \
/branches/network/kernel/generic/include/panic.h
37,11 → 37,11
 
#ifdef CONFIG_DEBUG
# define panic(format, ...) \
panic_printf("Kernel panic in %s() at %s:%u: " format "\n", \
__func__, __FILE__, __LINE__, ##__VA_ARGS__);
panic_printf("Kernel panic in %s() at %s:%u: " format, __func__, \
__FILE__, __LINE__, ##__VA_ARGS__);
#else
# define panic(format, ...) \
panic_printf("Kernel panic: " format "\n", ##__VA_ARGS__);
panic_printf("Kernel panic: " format, ##__VA_ARGS__);
#endif
 
extern void panic_printf(char *fmt, ...) __attribute__((noreturn));
/branches/network/kernel/generic/include/byteorder.h
51,14 → 51,6
#define uint32_t_be2host(n) (n)
#define uint64_t_be2host(n) (n)
 
#define host2uint16_t_le(n) uint16_t_byteorder_swap(n)
#define host2uint32_t_le(n) uint32_t_byteorder_swap(n)
#define host2uint64_t_le(n) uint64_t_byteorder_swap(n)
 
#define host2uint16_t_be(n) (n)
#define host2uint32_t_be(n) (n)
#define host2uint64_t_be(n) (n)
 
#else
 
#define uint16_t_le2host(n) (n)
69,14 → 61,6
#define uint32_t_be2host(n) uint32_t_byteorder_swap(n)
#define uint64_t_be2host(n) uint64_t_byteorder_swap(n)
 
#define host2uint16_t_le(n) (n)
#define host2uint32_t_le(n) (n)
#define host2uint64_t_le(n) (n)
 
#define host2uint16_t_be(n) uint16_t_byteorder_swap(n)
#define host2uint32_t_be(n) uint32_t_byteorder_swap(n)
#define host2uint64_t_be(n) uint64_t_byteorder_swap(n)
 
#endif
 
static inline uint64_t uint64_t_byteorder_swap(uint64_t n)
/branches/network/kernel/generic/include/arch.h
63,11 → 63,12
as_t *as; /**< Current address space. */
} the_t;
 
#define THE ((the_t * )(get_stack_base()))
#define THE ((the_t *)(get_stack_base()))
 
extern void the_initialize(the_t *the);
extern void the_copy(the_t *src, the_t *dst);
 
extern void arch_pre_main(void);
extern void arch_pre_mm_init(void);
extern void arch_post_mm_init(void);
extern void arch_post_cpu_init(void);
78,7 → 79,6
 
extern void reboot(void);
extern void arch_reboot(void);
extern void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller);
 
#endif
 
/branches/network/kernel/generic/include/func.h
41,6 → 41,11
extern atomic_t haltstate;
 
extern void halt(void);
 
extern size_t strlen(const char *str);
extern int strcmp(const char *src, const char *dst);
extern int strncmp(const char *src, const char *dst, size_t len);
extern void strncpy(char *dest, const char *src, size_t len);
extern unative_t atoi(const char *text);
extern void order(const uint64_t val, uint64_t *rv, char *suffix);
 
/branches/network/kernel/generic/include/fpu_context.h
37,6 → 37,10
 
#include <arch/fpu_context.h>
 
#if defined(CONFIG_FPU_LAZY) && !defined(ARCH_HAS_FPU)
# error "CONFIG_FPU_LAZY defined, but no ARCH_HAS_FPU"
#endif
 
extern void fpu_context_save(fpu_context_t *);
extern void fpu_context_restore(fpu_context_t *);
extern void fpu_init(void);
/branches/network/kernel/generic/include/main/main.h
35,13 → 35,8
#ifndef KERN_MAIN_H_
#define KERN_MAIN_H_
 
#include <arch/types.h>
 
extern uintptr_t stack_safe;
 
extern void main_bsp(void);
extern void main_ap(void);
 
#endif
 
/** @}
/branches/network/kernel/generic/include/align.h
26,13 → 26,13
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup generic
/** @addtogroup generic
* @ingroup others
* @{
*/
/**
* @file
* @brief Macros for making values and addresses aligned.
* @brief Macros for making values and addresses aligned.
*/
 
#ifndef KERN_ALIGN_H_
43,7 → 43,7
* @param s Address or size to be aligned.
* @param a Size of alignment, must be power of 2.
*/
#define ALIGN_DOWN(s, a) ((s) & ~((a) - 1))
#define ALIGN_DOWN(s, a) ((s) & ~((a) - 1))
 
 
/** Align to the nearest higher address.
51,7 → 51,7
* @param s Address or size to be aligned.
* @param a Size of alignment, must be power of 2.
*/
#define ALIGN_UP(s, a) (((s) + ((a) - 1)) & ~((a) - 1))
#define ALIGN_UP(s, a) (((s) + ((a) - 1)) & ~((a) - 1))
 
#endif
 
/branches/network/kernel/generic/include/symtab.h
44,20 → 44,15
char symbol_name[MAX_SYMBOL_NAME];
};
 
extern int symtab_name_lookup(unative_t addr, char **name);
extern char *symtab_fmt_name_lookup(unative_t addr);
extern int symtab_addr_lookup(const char *name, uintptr_t *addr);
extern char * get_symtab_entry(unative_t addr);
extern uintptr_t get_symbol_addr(const char *name);
extern void symtab_print_search(const char *name);
extern int symtab_compl(char *name);
 
#ifdef CONFIG_SYMTAB
 
/* Symtable linked together by build process */
extern struct symtab_entry symbol_table[];
 
#endif
 
#endif
 
/** @}
*/
/branches/network/kernel/generic/include/stdarg.h
45,7 → 45,7
#define va_start(ap, last) __builtin_va_start(ap, last)
#define va_arg(ap, type) __builtin_va_arg(ap, type)
#define va_end(ap) __builtin_va_end(ap)
#define va_copy(dst, src) __builtin_va_copy(dst, src)
#define va_copy(dst,src) __builtin_va_copy(dst,src)
 
#endif
 
/branches/network/kernel/arch/ia32/include/syscall.h
File deleted
\ No newline at end of file
Property changes:
Deleted: svn:special
-*
\ No newline at end of property
/branches/network/kernel/arch/ia32/include/atomic.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
41,29 → 41,17
 
static inline void atomic_inc(atomic_t *val) {
#ifdef CONFIG_SMP
asm volatile (
"lock incl %[count]\n"
: [count] "+m" (val->count)
);
asm volatile ("lock incl %0\n" : "+m" (val->count));
#else
asm volatile (
"incl %[count]\n"
: [count] "+m" (val->count)
);
asm volatile ("incl %0\n" : "+m" (val->count));
#endif /* CONFIG_SMP */
}
 
static inline void atomic_dec(atomic_t *val) {
#ifdef CONFIG_SMP
asm volatile (
"lock decl %[count]\n"
: [count] "+m" (val->count)
);
asm volatile ("lock decl %0\n" : "+m" (val->count));
#else
asm volatile (
"decl %[count]\n"
: [count] "+m" (val->count)
);
asm volatile ("decl %0\n" : "+m" (val->count));
#endif /* CONFIG_SMP */
}
 
70,12 → 58,12
static inline long atomic_postinc(atomic_t *val)
{
long r = 1;
 
asm volatile (
"lock xaddl %[r], %[count]\n"
: [count] "+m" (val->count), [r] "+r" (r)
"lock xaddl %1, %0\n"
: "+m" (val->count), "+r" (r)
);
 
return r;
}
 
84,23 → 72,23
long r = -1;
asm volatile (
"lock xaddl %[r], %[count]\n"
: [count] "+m" (val->count), [r] "+r"(r)
"lock xaddl %1, %0\n"
: "+m" (val->count), "+r"(r)
);
return r;
}
 
#define atomic_preinc(val) (atomic_postinc(val) + 1)
#define atomic_predec(val) (atomic_postdec(val) - 1)
#define atomic_preinc(val) (atomic_postinc(val) + 1)
#define atomic_predec(val) (atomic_postdec(val) - 1)
 
static inline uint32_t test_and_set(atomic_t *val) {
uint32_t v;
asm volatile (
"movl $1, %[v]\n"
"xchgl %[v], %[count]\n"
: [v] "=r" (v), [count] "+m" (val->count)
"movl $1, %0\n"
"xchgl %0, %1\n"
: "=r" (v),"+m" (val->count)
);
return v;
110,22 → 98,22
static inline void atomic_lock_arch(atomic_t *val)
{
uint32_t tmp;
 
preemption_disable();
asm volatile (
"0:\n"
#ifdef CONFIG_HT
"pause\n" /* Pentium 4's HT love this instruction */
"pause\n" /* Pentium 4's HT love this instruction */
#endif
"mov %[count], %[tmp]\n"
"testl %[tmp], %[tmp]\n"
"mov %0, %1\n"
"testl %1, %1\n"
"jnz 0b\n" /* lightweight looping on locked spinlock */
"incl %[tmp]\n" /* now use the atomic operation */
"xchgl %[count], %[tmp]\n"
"testl %[tmp], %[tmp]\n"
"incl %1\n" /* now use the atomic operation */
"xchgl %0, %1\n"
"testl %1, %1\n"
"jnz 0b\n"
: [count] "+m" (val->count), [tmp] "=&r" (tmp)
: "+m" (val->count), "=&r"(tmp)
);
/*
* Prevent critical section code from bleeding out this way up.
/branches/network/kernel/arch/ia32/include/mm/frame.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32mm
/** @addtogroup ia32mm
* @{
*/
/** @file
35,8 → 35,8
#ifndef KERN_ia32_FRAME_H_
#define KERN_ia32_FRAME_H_
 
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
#ifdef KERNEL
#ifndef __ASM__
/branches/network/kernel/arch/ia32/include/mm/as.h
42,7 → 42,7
#define USER_ADDRESS_SPACE_START_ARCH ((unsigned long) 0x00000000)
#define USER_ADDRESS_SPACE_END_ARCH ((unsigned long) 0x7fffffff)
 
#define USTACK_ADDRESS_ARCH (USER_ADDRESS_SPACE_END_ARCH - (PAGE_SIZE - 1))
#define USTACK_ADDRESS_ARCH (USER_ADDRESS_SPACE_END_ARCH-(PAGE_SIZE-1))
 
typedef struct {
} as_arch_t;
/branches/network/kernel/arch/ia32/include/mm/tlb.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32mm
/** @addtogroup ia32mm
* @{
*/
/** @file
35,6 → 35,9
#ifndef KERN_ia32_TLB_H_
#define KERN_ia32_TLB_H_
 
#define tlb_arch_init()
#define tlb_print()
 
#endif
 
/** @}
/branches/network/kernel/arch/ia32/include/barrier.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
46,8 → 46,8
* Provisions are made to prevent compiler from reordering instructions itself.
*/
 
#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory")
#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory")
#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory")
#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory")
 
static inline void cpuid_serialization(void)
{
58,30 → 58,30
);
}
 
#if defined(CONFIG_FENCES_P4)
#define memory_barrier() asm volatile ("mfence\n" ::: "memory")
#define read_barrier() asm volatile ("lfence\n" ::: "memory")
#ifdef CONFIG_WEAK_MEMORY
#define write_barrier() asm volatile ("sfence\n" ::: "memory")
#else
#define write_barrier() asm volatile ("" ::: "memory");
#endif
#elif defined(CONFIG_FENCES_P3)
#define memory_barrier() cpuid_serialization()
#define read_barrier() cpuid_serialization()
#ifdef CONFIG_WEAK_MEMORY
#define write_barrier() asm volatile ("sfence\n" ::: "memory")
#else
#define write_barrier() asm volatile ("" ::: "memory");
#endif
#ifdef CONFIG_FENCES_P4
# define memory_barrier() asm volatile ("mfence\n" ::: "memory")
# define read_barrier() asm volatile ("lfence\n" ::: "memory")
# ifdef CONFIG_WEAK_MEMORY
# define write_barrier() asm volatile ("sfence\n" ::: "memory")
# else
# define write_barrier() asm volatile( "" ::: "memory");
# endif
#elif CONFIG_FENCES_P3
# define memory_barrier() cpuid_serialization()
# define read_barrier() cpuid_serialization()
# ifdef CONFIG_WEAK_MEMORY
# define write_barrier() asm volatile ("sfence\n" ::: "memory")
# else
# define write_barrier() asm volatile( "" ::: "memory");
# endif
#else
#define memory_barrier() cpuid_serialization()
#define read_barrier() cpuid_serialization()
#ifdef CONFIG_WEAK_MEMORY
#define write_barrier() cpuid_serialization()
#else
#define write_barrier() asm volatile ("" ::: "memory");
#endif
# define memory_barrier() cpuid_serialization()
# define read_barrier() cpuid_serialization()
# ifdef CONFIG_WEAK_MEMORY
# define write_barrier() cpuid_serialization()
# else
# define write_barrier() asm volatile( "" ::: "memory");
# endif
#endif
 
/*
90,8 → 90,8
* queueing in the store buffer drain to the memory (even though it would be
* sufficient for them to drain to the D-cache).
*/
#define smc_coherence(a) write_barrier()
#define smc_coherence_block(a, l) write_barrier()
#define smc_coherence(a) write_barrier()
#define smc_coherence_block(a, l) write_barrier()
 
#endif
 
/branches/network/kernel/arch/ia32/include/types.h
57,9 → 57,6
typedef uint32_t unative_t;
typedef int32_t native_t;
 
typedef struct {
} fncptr_t;
 
#define PRIp "x" /**< Format for uintptr_t. */
#define PRIs "u" /**< Format for size_t. */
#define PRIc "u" /**< Format for count_t. */
/branches/network/kernel/arch/ia32/include/boot/memmap.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
35,29 → 35,24
#ifndef KERN_ia32_MEMMAP_H_
#define KERN_ia32_MEMMAP_H_
 
/* E820h memory range types */
/* E820h memory range types - other values*/
/* Free memory */
#define MEMMAP_MEMORY_AVAILABLE 1
/* Not available for OS */
#define MEMMAP_MEMORY_RESERVED 2
/* OS may use it after reading ACPI table */
#define MEMMAP_MEMORY_ACPI 3
/* Unusable, required to be saved and restored across an NVS sleep */
#define MEMMAP_MEMORY_NVS 4
/* Corrupted memory */
#define MEMMAP_MEMORY_UNUSABLE 5
 
/* Free memory */
#define MEMMAP_MEMORY_AVAILABLE 1
/* size of one entry */
#define MEMMAP_E820_RECORD_SIZE 20
/* maximum entries */
#define MEMMAP_E820_MAX_RECORDS 32
 
/* Not available for OS */
#define MEMMAP_MEMORY_RESERVED 2
 
/* OS may use it after reading ACPI table */
#define MEMMAP_MEMORY_ACPI 3
 
/* Unusable, required to be saved and restored across an NVS sleep */
#define MEMMAP_MEMORY_NVS 4
 
/* Corrupted memory */
#define MEMMAP_MEMORY_UNUSABLE 5
 
/* Size of one entry */
#define MEMMAP_E820_RECORD_SIZE 20
 
/* Maximum entries */
#define MEMMAP_E820_MAX_RECORDS 32
 
#ifndef __ASM__
 
#include <arch/types.h>
/branches/network/kernel/arch/ia32/include/boot/boot.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
35,24 → 35,15
#ifndef KERN_ia32_BOOT_H_
#define KERN_ia32_BOOT_H_
 
#define BOOT_OFFSET 0x108000
#define AP_BOOT_OFFSET 0x8000
#define BOOT_STACK_SIZE 0x400
#define BOOT_OFFSET 0x108000
#define AP_BOOT_OFFSET 0x8000
#define BOOT_STACK_SIZE 0x400
 
#define MULTIBOOT_HEADER_MAGIC 0x1BADB002
#define MULTIBOOT_HEADER_FLAGS 0x00010003
#define MULTIBOOT_HEADER_MAGIC 0x1BADB002
#define MULTIBOOT_HEADER_FLAGS 0x00010003
 
#ifndef __ASM__
#define MULTIBOOT_LOADER_MAGIC 0x2BADB002
 
#ifdef CONFIG_SMP
 
/* This is only a symbol so the type is dummy. Obtain the value using &. */
extern int _hardcoded_unmapped_size;
 
#endif /* CONFIG_SMP */
 
#endif /* __ASM__ */
 
#endif
 
/** @}
/branches/network/kernel/arch/ia32/include/interrupt.h
72,6 → 72,10
uint32_t eax;
uint32_t ecx;
uint32_t edx;
uint32_t esi;
uint32_t edi;
uint32_t ebp;
uint32_t ebx;
 
uint32_t gs;
uint32_t fs;
/branches/network/kernel/arch/ia32/include/pm.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
35,59 → 35,61
#ifndef KERN_ia32_PM_H_
#define KERN_ia32_PM_H_
 
#define IDT_ITEMS 64
#define GDT_ITEMS 7
#define IDT_ITEMS 64
#define GDT_ITEMS 7
 
#define NULL_DES 0
#define KTEXT_DES 1
#define KDATA_DES 2
#define UTEXT_DES 3
#define UDATA_DES 4
#define TSS_DES 5
#define TLS_DES 6 /* Pointer to Thread-Local-Storage data */
#define VESA_INIT_SEGMENT 0x8000
 
#define NULL_DES 0
#define KTEXT_DES 1
#define KDATA_DES 2
#define UTEXT_DES 3
#define UDATA_DES 4
#define TSS_DES 5
#define TLS_DES 6 /* Pointer to Thread-Local-Storage data */
 
#ifdef CONFIG_FB
 
#define VESA_INIT_SEGMENT 0x8000
#define VESA_INIT_DES 7
#define KTEXT32_DES KTEXT_DES
 
#define VESA_INIT_SEGMENT 0x8000
#define VESA_INIT_DES 7
#undef GDT_ITEMS
#define GDT_ITEMS 8
#define GDT_ITEMS 8
 
#endif /* CONFIG_FB */
 
#define gdtselector(des) ((des) << 3)
 
#define PL_KERNEL 0
#define PL_USER 3
#define selector(des) ((des) << 3)
 
#define AR_PRESENT (1 << 7)
#define AR_DATA (2 << 3)
#define AR_CODE (3 << 3)
#define AR_WRITABLE (1 << 1)
#define AR_INTERRUPT (0x0e)
#define AR_TSS (0x09)
#define PL_KERNEL 0
#define PL_USER 3
 
#define DPL_KERNEL (PL_KERNEL << 5)
#define DPL_USER (PL_USER << 5)
#define AR_PRESENT (1 << 7)
#define AR_DATA (2 << 3)
#define AR_CODE (3 << 3)
#define AR_WRITABLE (1 << 1)
#define AR_INTERRUPT (0xe)
#define AR_TSS (0x9)
 
#define TSS_BASIC_SIZE 104
#define TSS_IOMAP_SIZE (16 * 1024 + 1) /* 16K for bitmap + 1 terminating byte for convenience */
#define DPL_KERNEL (PL_KERNEL << 5)
#define DPL_USER (PL_USER << 5)
 
#define IO_PORTS (64 * 1024)
#define TSS_BASIC_SIZE 104
#define TSS_IOMAP_SIZE (16 * 1024 + 1) /* 16K for bitmap + 1 terminating byte for convenience */
 
#define IO_PORTS (64 * 1024)
 
#ifndef __ASM__
 
#include <arch/types.h>
#include <arch/context.h>
 
typedef struct {
struct ptr_16_32 {
uint16_t limit;
uint32_t base;
} __attribute__ ((packed)) ptr_16_32_t;
} __attribute__ ((packed));
typedef struct ptr_16_32 ptr_16_32_t;
 
typedef struct {
struct descriptor {
unsigned limit_0_15: 16;
unsigned base_0_15: 16;
unsigned base_16_23: 8;
98,17 → 100,19
unsigned special: 1;
unsigned granularity : 1;
unsigned base_24_31: 8;
} __attribute__ ((packed)) descriptor_t;
} __attribute__ ((packed));
typedef struct descriptor descriptor_t;
 
typedef struct {
struct idescriptor {
unsigned offset_0_15: 16;
unsigned selector: 16;
unsigned unused: 8;
unsigned access: 8;
unsigned offset_16_31: 16;
} __attribute__ ((packed)) idescriptor_t;
} __attribute__ ((packed));
typedef struct idescriptor idescriptor_t;
 
typedef struct {
struct tss {
uint16_t link;
unsigned : 16;
uint32_t esp0;
148,12 → 152,13
unsigned : 16;
uint16_t iomap_base;
uint8_t iomap[TSS_IOMAP_SIZE];
} __attribute__ ((packed)) tss_t;
} __attribute__ ((packed));
typedef struct tss tss_t;
 
extern ptr_16_32_t gdtr;
extern ptr_16_32_t bootstrap_gdtr;
extern ptr_16_32_t protected_ap_gdtr;
extern tss_t *tss_p;
extern struct tss *tss_p;
 
extern descriptor_t gdt[];
 
/branches/network/kernel/arch/ia32/include/asm.h
27,7 → 27,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
38,7 → 38,6
 
#include <arch/pm.h>
#include <arch/types.h>
#include <typedefs.h>
#include <config.h>
 
extern uint32_t interrupt_handler_size;
56,16 → 55,11
 
/** Halt CPU
*
* Halt the current CPU.
*
* Halt the current CPU until interrupt event.
*/
static inline void cpu_halt(void)
{
asm volatile (
"0:\n"
" hlt\n"
" jmp 0b\n"
);
asm volatile ("hlt\n");
}
 
static inline void cpu_sleep(void)
74,22 → 68,16
}
 
#define GEN_READ_REG(reg) static inline unative_t read_ ##reg (void) \
{ \
unative_t res; \
asm volatile ( \
"movl %%" #reg ", %[res]" \
: [res] "=r" (res) \
); \
return res; \
}
{ \
unative_t res; \
asm volatile ("movl %%" #reg ", %0" : "=r" (res) ); \
return res; \
}
 
#define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \
{ \
asm volatile ( \
"movl %[regn], %%" #reg \
:: [regn] "r" (regn) \
); \
}
{ \
asm volatile ("movl %0, %%" #reg : : "r" (regn)); \
}
 
GEN_READ_REG(cr0)
GEN_READ_REG(cr2)
116,14 → 104,10
*
* @param port Port to write to
* @param val Value to write
*
*/
static inline void pio_write_8(ioport8_t *port, uint8_t val)
static inline void outb(uint16_t port, uint8_t val)
{
asm volatile (
"outb %b[val], %w[port]\n"
:: [val] "a" (val), [port] "d" (port)
);
asm volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) );
}
 
/** Word to port
132,14 → 116,10
*
* @param port Port to write to
* @param val Value to write
*
*/
static inline void pio_write_16(ioport16_t *port, uint16_t val)
static inline void outw(uint16_t port, uint16_t val)
{
asm volatile (
"outw %w[val], %w[port]\n"
:: [val] "a" (val), [port] "d" (port)
);
asm volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) );
}
 
/** Double word to port
148,14 → 128,10
*
* @param port Port to write to
* @param val Value to write
*
*/
static inline void pio_write_32(ioport32_t *port, uint32_t val)
static inline void outl(uint16_t port, uint32_t val)
{
asm volatile (
"outl %[val], %w[port]\n"
:: [val] "a" (val), [port] "d" (port)
);
asm volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) );
}
 
/** Byte from port
164,18 → 140,12
*
* @param port Port to read from
* @return Value read
*
*/
static inline uint8_t pio_read_8(ioport8_t *port)
static inline uint8_t inb(uint16_t port)
{
uint8_t val;
asm volatile (
"inb %w[port], %b[val]\n"
: [val] "=a" (val)
: [port] "d" (port)
);
asm volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) );
return val;
}
 
185,18 → 155,12
*
* @param port Port to read from
* @return Value read
*
*/
static inline uint16_t pio_read_16(ioport16_t *port)
static inline uint16_t inw(uint16_t port)
{
uint16_t val;
asm volatile (
"inw %w[port], %w[val]\n"
: [val] "=a" (val)
: [port] "d" (port)
);
asm volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) );
return val;
}
 
206,18 → 170,12
*
* @param port Port to read from
* @return Value read
*
*/
static inline uint32_t pio_read_32(ioport32_t *port)
static inline uint32_t inl(uint16_t port)
{
uint32_t val;
asm volatile (
"inl %w[port], %[val]\n"
: [val] "=a" (val)
: [port] "d" (port)
);
asm volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) );
return val;
}
 
227,19 → 185,16
* value of EFLAGS.
*
* @return Old interrupt priority level.
*
*/
static inline ipl_t interrupts_enable(void)
{
ipl_t v;
asm volatile (
"pushf\n"
"popl %[v]\n"
"pushf\n\t"
"popl %0\n\t"
"sti\n"
: [v] "=r" (v)
: "=r" (v)
);
return v;
}
 
249,19 → 204,16
* value of EFLAGS.
*
* @return Old interrupt priority level.
*
*/
static inline ipl_t interrupts_disable(void)
{
ipl_t v;
asm volatile (
"pushf\n"
"popl %[v]\n"
"pushf\n\t"
"popl %0\n\t"
"cli\n"
: [v] "=r" (v)
: "=r" (v)
);
return v;
}
 
270,14 → 222,13
* Restore EFLAGS.
*
* @param ipl Saved interrupt priority level.
*
*/
static inline void interrupts_restore(ipl_t ipl)
{
asm volatile (
"pushl %[ipl]\n"
"pushl %0\n\t"
"popf\n"
:: [ipl] "r" (ipl)
: : "r" (ipl)
);
}
 
284,51 → 235,23
/** Return interrupt priority level.
*
* @return EFLAFS.
*
*/
static inline ipl_t interrupts_read(void)
{
ipl_t v;
asm volatile (
"pushf\n"
"popl %[v]\n"
: [v] "=r" (v)
"pushf\n\t"
"popl %0\n"
: "=r" (v)
);
return v;
}
 
/** Write to MSR */
static inline void write_msr(uint32_t msr, uint64_t value)
{
asm volatile (
"wrmsr"
:: "c" (msr), "a" ((uint32_t) (value)),
"d" ((uint32_t) (value >> 32))
);
}
 
static inline uint64_t read_msr(uint32_t msr)
{
uint32_t ax, dx;
asm volatile (
"rdmsr"
: "=a" (ax), "=d" (dx)
: "c" (msr)
);
return ((uint64_t) dx << 32) | ax;
}
 
 
/** Return base address of current stack
*
* Return the base address of the current stack.
* The stack is assumed to be STACK_SIZE bytes long.
* The stack must start on page boundary.
*
*/
static inline uintptr_t get_stack_base(void)
{
335,8 → 258,8
uintptr_t v;
asm volatile (
"andl %%esp, %[v]\n"
: [v] "=r" (v)
"andl %%esp, %0\n"
: "=r" (v)
: "0" (~(STACK_SIZE - 1))
);
347,12 → 270,11
static inline uintptr_t * get_ip()
{
uintptr_t *ip;
 
asm volatile (
"mov %%eip, %[ip]"
: [ip] "=r" (ip)
);
"mov %%eip, %0"
: "=r" (ip)
);
return ip;
}
 
359,66 → 281,46
/** Invalidate TLB Entry.
*
* @param addr Address on a page whose TLB entry is to be invalidated.
*
*/
static inline void invlpg(uintptr_t addr)
{
asm volatile (
"invlpg %[addr]\n"
:: [addr] "m" (*(unative_t *) addr)
);
asm volatile ("invlpg %0\n" :: "m" (*(unative_t *)addr));
}
 
/** Load GDTR register from memory.
*
* @param gdtr_reg Address of memory from where to load GDTR.
*
*/
static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
{
asm volatile (
"lgdtl %[gdtr_reg]\n"
:: [gdtr_reg] "m" (*gdtr_reg)
);
asm volatile ("lgdtl %0\n" : : "m" (*gdtr_reg));
}
 
/** Store GDTR register to memory.
*
* @param gdtr_reg Address of memory to where to load GDTR.
*
*/
static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
{
asm volatile (
"sgdtl %[gdtr_reg]\n"
:: [gdtr_reg] "m" (*gdtr_reg)
);
asm volatile ("sgdtl %0\n" : : "m" (*gdtr_reg));
}
 
/** Load IDTR register from memory.
*
* @param idtr_reg Address of memory from where to load IDTR.
*
*/
static inline void idtr_load(ptr_16_32_t *idtr_reg)
{
asm volatile (
"lidtl %[idtr_reg]\n"
:: [idtr_reg] "m" (*idtr_reg)
);
asm volatile ("lidtl %0\n" : : "m" (*idtr_reg));
}
 
/** Load TR from descriptor table.
*
* @param sel Selector specifying descriptor of TSS segment.
*
*/
static inline void tr_load(uint16_t sel)
{
asm volatile (
"ltr %[sel]"
:: [sel] "r" (sel)
);
asm volatile ("ltr %0" : : "r" (sel));
}
 
#endif
/branches/network/kernel/arch/ia32/include/cpuid.h
74,21 → 74,21
uint32_t val, ret;
asm volatile (
"pushf\n" /* read flags */
"popl %[ret]\n"
"movl %[ret], %[val]\n"
"pushf\n" /* read flags */
"popl %0\n"
"movl %0, %1\n"
"btcl $21, %[val]\n" /* swap the ID bit */
"btcl $21, %1\n" /* swap the ID bit */
"pushl %[val]\n" /* propagate the change into flags */
"pushl %1\n" /* propagate the change into flags */
"popf\n"
"pushf\n"
"popl %[val]\n"
"popl %1\n"
"andl $(1 << 21), %[ret]\n" /* interrested only in ID bit */
"andl $(1 << 21), %[val]\n"
"xorl %[val], %[ret]\n"
: [ret] "=r" (ret), [val] "=r" (val)
"andl $(1 << 21), %0\n" /* interrested only in ID bit */
"andl $(1 << 21), %1\n"
"xorl %1, %0\n"
: "=r" (ret), "=r" (val)
);
return ret;
98,8 → 98,7
{
asm volatile (
"cpuid\n"
: "=a" (info->cpuid_eax), "=b" (info->cpuid_ebx),
"=c" (info->cpuid_ecx), "=d" (info->cpuid_edx)
: "=a" (info->cpuid_eax), "=b" (info->cpuid_ebx), "=c" (info->cpuid_ecx), "=d" (info->cpuid_edx)
: "a" (cmd)
);
}
/branches/network/kernel/arch/ia32/include/cpu.h
35,33 → 35,25
#ifndef KERN_ia32_CPU_H_
#define KERN_ia32_CPU_H_
 
#include <arch/pm.h>
#include <arch/asm.h>
 
#define EFLAGS_IF (1 << 9)
#define EFLAGS_RF (1 << 16)
 
#define CR4_OSFXSR_MASK (1<<9)
 
/* Support for SYSENTER and SYSEXIT */
#define IA32_MSR_SYSENTER_CS 0x174
#define IA32_MSR_SYSENTER_ESP 0x175
#define IA32_MSR_SYSENTER_EIP 0x176
 
#ifndef __ASM__
 
#include <arch/pm.h>
#include <arch/asm.h>
 
typedef struct {
unsigned int vendor;
unsigned int family;
unsigned int model;
unsigned int stepping;
tss_t *tss;
int vendor;
int family;
int model;
int stepping;
struct tss *tss;
count_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */
} cpu_arch_t;
 
#endif
 
#define CR4_OSFXSR_MASK (1<<9)
 
#endif
 
/** @}
/branches/network/kernel/arch/ia32/include/fpu_context.h
37,6 → 37,7
 
#include <arch/types.h>
 
#define ARCH_HAS_FPU
#define FPU_CONTEXT_ALIGN 16
 
void fpu_fxsr(void);
/branches/network/kernel/arch/ia32/include/arch.h
1,5 → 1,5
/*
* Copyright (c) 2009 Martin Decky
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
35,10 → 35,6
#ifndef KERN_ia32_ARCH_H_
#define KERN_ia32_ARCH_H_
 
#include <genarch/multiboot/multiboot.h>
 
extern void arch_pre_main(uint32_t, const multiboot_info_t *);
 
#endif
 
/** @}
/branches/network/kernel/arch/ia32/include/drivers/i8254.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
/branches/network/kernel/arch/ia32/include/drivers/ega.h
0,0 → 1,48
/*
* Copyright (c) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
* @{
*/
/** @file
*/
 
#ifndef KERN_ia32_EGA_H_
#define KERN_ia32_EGA_H_
 
#define VIDEORAM 0xb8000
#define ROW 80
#define ROWS 25
#define SCREEN (ROW * ROWS)
 
extern void ega_init(void);
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ia32/include/drivers/vesa.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
36,7 → 36,6
#define KERN_ia32_VESA_H_
 
extern int vesa_present(void);
extern void vesa_redraw(void);
extern void vesa_init(void);
 
#endif
/branches/network/kernel/arch/ia32/include/drivers/i8259.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
38,13 → 38,13
#include <arch/types.h>
#include <arch/interrupt.h>
 
#define PIC_PIC0PORT1 ((ioport8_t *) 0x20)
#define PIC_PIC0PORT2 ((ioport8_t *) 0x21)
#define PIC_PIC1PORT1 ((ioport8_t *) 0xa0)
#define PIC_PIC1PORT2 ((ioport8_t *) 0xa1)
#define PIC_PIC0PORT1 0x20
#define PIC_PIC0PORT2 0x21
#define PIC_PIC1PORT1 0xa0
#define PIC_PIC1PORT2 0xa1
 
#define PIC_NEEDICW4 (1 << 0)
#define PIC_ICW1 (1 << 4)
#define PIC_NEEDICW4 (1<<0)
#define PIC_ICW1 (1<<4)
 
extern void i8259_init(void);
extern void pic_enable_irqs(uint16_t irqmask);
/branches/network/kernel/arch/ia32/include/drivers/i8042.h
0,0 → 1,71
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
* @{
*/
/** @file
*/
 
/**
* This file implements ia32 specific access to i8042 registers.
*/
 
#ifndef KERN_ia32_I8042_H_
#define KERN_ia32_I8042_H_
 
#include <arch/asm.h>
#include <arch/types.h>
 
#define i8042_DATA 0x60
#define i8042_STATUS 0x64
 
static inline void i8042_data_write(uint8_t data)
{
outb(i8042_DATA, data);
}
 
static inline uint8_t i8042_data_read(void)
{
return inb(i8042_DATA);
}
 
static inline uint8_t i8042_status_read(void)
{
return inb(i8042_STATUS);
}
 
static inline void i8042_command_write(uint8_t command)
{
outb(i8042_STATUS, command);
}
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ia32/Makefile.inc
29,6 → 29,10
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
BFD_NAME = elf32-i386
BFD_ARCH = i386
BFD = binary
35,7 → 39,7
TARGET = i686-pc-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/i686
 
DEFS += -D__32_BITS__
DEFS += -DMACHINE=$(MACHINE) -D__32_BITS__
 
CMN1 = -m32
GCC_CFLAGS += $(CMN1)
45,61 → 49,115
## Accepted CPUs
#
 
ifeq ($(PROCESSOR),athlon_xp)
ifeq ($(MACHINE),athlon-xp)
FPU_NO_CFLAGS = -mno-mmx -mno-sse -mno-3dnow
CMN2 = -march=athlon-xp
GCC_CFLAGS += $(CMN2)
ICC_CFLAGS += $(CMN2)
SUNCC_CFLAGS += -xarch=ssea
DEFS += -DCONFIG_FENCES_P3
CONFIG_SMP = n
CONFIG_HT = n
endif
ifeq ($(PROCESSOR),athlon_mp)
ifeq ($(MACHINE),athlon-mp)
FPU_NO_CFLAGS = -mno-mmx -mno-sse -mno-3dnow
CMN2 = -march=athlon-mp
GCC_CFLAGS += $(CMN2)
ICC_CFLAGS += $(CMN2)
SUNCC_CFLAGS += xarch=ssea
DEFS += -DCONFIG_FENCES_P3
CONFIG_HT = n
endif
ifeq ($(PROCESSOR),pentium3)
ifeq ($(MACHINE),pentium3)
FPU_NO_CFLAGS = -mno-mmx -mno-sse
CMN2 = -march=pentium3
GCC_CFLAGS += $(CMN2)
ICC_CFLAGS += $(CMN2)
SUNCC_CFLAGS += -xarch=sse
DEFS += -DCONFIG_FENCES_P3
CONFIG_HT = n
endif
ifeq ($(PROCESSOR),pentium4)
CMN2 = -march=pentium4
SUNCC_CFLAGS += -xarch=sse2
endif
ifeq ($(PROCESSOR),core)
ifeq ($(MACHINE),core)
FPU_NO_CFLAGS = -mno-mmx -mno-sse -mno-sse2 -mno-sse3
CMN2 = -march=prescott
GCC_CFLAGS += $(CMN2)
ICC_CFLAGS += $(CMN2)
SUNCC_CFLAGS += -xarch=sse3
DEFS += -DCONFIG_FENCES_P4
endif
ifeq ($(MACHINE),pentium4)
FPU_NO_CFLAGS = -mno-mmx -mno-sse -mno-sse2
GCC_CFLAGS += -march=pentium4
ICC_CFLAGS += -march=pentium4
SUNCC_CFLAGS += -xarch=sse2
DEFS += -DCONFIG_FENCES_P4
endif
 
FPU_NO_CFLAGS = -mno-mmx -mno-sse -mno-sse2 -mno-sse3 -mno-3dnow
GCC_CFLAGS += $(CMN2)
ICC_CFLAGS += $(CMN2)
## Own configuration directives
#
 
CONFIG_ACPI = y
 
## Compile with hierarchical page tables support.
#
 
CONFIG_PAGE_PT = y
DEFS += -DCONFIG_PAGE_PT
 
## Compile with i8042 controller support
#
 
CONFIG_I8042 = y
DEFS += -DCONFIG_I8042
 
## Accepted configuration directives
#
 
ifeq ($(CONFIG_SMP),y)
DEFS += -DCONFIG_SMP
endif
ifeq ($(CONFIG_HT),y)
DEFS += -DCONFIG_HT
endif
ifeq ($(CONFIG_SIMICS_FIX),y)
DEFS += -DCONFIG_SIMICS_FIX
endif
 
## Compile with support for software integer division.
#
 
CONFIG_SOFTINT = y
 
ARCH_SOURCES = \
arch/$(KARCH)/src/context.S \
arch/$(KARCH)/src/debug/panic.s \
arch/$(KARCH)/src/delay.s \
arch/$(KARCH)/src/asm.S \
arch/$(KARCH)/src/proc/scheduler.c \
arch/$(KARCH)/src/proc/task.c \
arch/$(KARCH)/src/proc/thread.c \
arch/$(KARCH)/src/bios/bios.c \
arch/$(KARCH)/src/smp/ap.S \
arch/$(KARCH)/src/smp/apic.c \
arch/$(KARCH)/src/smp/mps.c \
arch/$(KARCH)/src/smp/smp.c \
arch/$(KARCH)/src/atomic.S \
arch/$(KARCH)/src/smp/ipi.c \
arch/$(KARCH)/src/ia32.c \
arch/$(KARCH)/src/interrupt.c \
arch/$(KARCH)/src/pm.c \
arch/$(KARCH)/src/userspace.c \
arch/$(KARCH)/src/cpu/cpu.c \
arch/$(KARCH)/src/mm/as.c \
arch/$(KARCH)/src/mm/frame.c \
arch/$(KARCH)/src/mm/page.c \
arch/$(KARCH)/src/mm/tlb.c \
arch/$(KARCH)/src/ddi/ddi.c \
arch/$(KARCH)/src/drivers/i8254.c \
arch/$(KARCH)/src/drivers/i8259.c \
arch/$(KARCH)/src/drivers/vesa.c \
arch/$(KARCH)/src/boot/boot.S \
arch/$(KARCH)/src/boot/memmap.c \
arch/$(KARCH)/src/fpu_context.c \
arch/$(KARCH)/src/debugger.c \
arch/$(KARCH)/src/syscall.c
arch/$(ARCH)/src/context.S \
arch/$(ARCH)/src/debug/panic.s \
arch/$(ARCH)/src/delay.s \
arch/$(ARCH)/src/asm.S \
arch/$(ARCH)/src/proc/scheduler.c \
arch/$(ARCH)/src/proc/task.c \
arch/$(ARCH)/src/proc/thread.c \
arch/$(ARCH)/src/bios/bios.c \
arch/$(ARCH)/src/smp/ap.S \
arch/$(ARCH)/src/smp/apic.c \
arch/$(ARCH)/src/smp/mps.c \
arch/$(ARCH)/src/smp/smp.c \
arch/$(ARCH)/src/atomic.S \
arch/$(ARCH)/src/smp/ipi.c \
arch/$(ARCH)/src/ia32.c \
arch/$(ARCH)/src/interrupt.c \
arch/$(ARCH)/src/pm.c \
arch/$(ARCH)/src/userspace.c \
arch/$(ARCH)/src/cpu/cpu.c \
arch/$(ARCH)/src/mm/as.c \
arch/$(ARCH)/src/mm/frame.c \
arch/$(ARCH)/src/mm/page.c \
arch/$(ARCH)/src/mm/tlb.c \
arch/$(ARCH)/src/ddi/ddi.c \
arch/$(ARCH)/src/drivers/i8254.c \
arch/$(ARCH)/src/drivers/i8259.c \
arch/$(ARCH)/src/drivers/ega.c \
arch/$(ARCH)/src/drivers/vesa.c \
arch/$(ARCH)/src/boot/boot.S \
arch/$(ARCH)/src/boot/memmap.c \
arch/$(ARCH)/src/fpu_context.c \
arch/$(ARCH)/src/debugger.c
/branches/network/kernel/arch/ia32/src/syscall.c
File deleted
/branches/network/kernel/arch/ia32/src/asm.S
147,46 → 147,6
popfl
.endm
 
/*
* The SYSENTER syscall mechanism can be used for syscalls with
* four or fewer arguments. To pass these four arguments, we
* use four registers: EDX, ECX, EBX, ESI. The syscall number
* is passed in EAX. We use EDI to remember the return address
* and EBP to remember the stack. The INT-based syscall mechanism
* can actually handle six arguments plus the syscall number
* entirely in registers.
*/
.global sysenter_handler
sysenter_handler:
sti
pushl %ebp # remember user stack
pushl %edi # remember return user address
 
pushl %gs # remember TLS
 
pushl %eax # syscall number
subl $8, %esp # unused sixth and fifth argument
pushl %esi # fourth argument
pushl %ebx # third argument
pushl %ecx # second argument
pushl %edx # first argument
 
movw $16, %ax
movw %ax, %ds
movw %ax, %es
 
cld
call syscall_handler
addl $28, %esp # remove arguments from stack
 
pop %gs # restore TLS
 
pop %edx # prepare return EIP for SYSEXIT
pop %ecx # prepare userspace ESP for SYSEXIT
 
sysexit # return to userspace
 
 
## Declare interrupt handlers
#
# Declare interrupt handlers for n interrupt
268,6 → 228,14
pushl %fs
pushl %gs
 
#ifdef CONFIG_DEBUG_ALLREGS
pushl %ebx
pushl %ebp
pushl %edi
pushl %esi
#else
subl $16, %esp
#endif
pushl %edx
pushl %ecx
pushl %eax
289,6 → 257,14
popl %eax
popl %ecx
popl %edx
#ifdef CONFIG_DEBUG_ALLREGS
popl %esi
popl %edi
popl %ebp
popl %ebx
#else
addl $16, %esp
#endif
popl %gs
popl %fs
/branches/network/kernel/arch/ia32/src/mm/frame.c
54,57 → 54,26
static void init_e820_memory(pfn_t minconf)
{
unsigned int i;
pfn_t start, conf;
size_t size;
 
for (i = 0; i < e820counter; i++) {
uint64_t base = e820table[i].base_address;
uint64_t size = e820table[i].size;
#ifdef __32_BITS__
/* Ignore physical memory above 4 GB */
if ((base >> 32) != 0)
continue;
/* Clip regions above 4 GB */
if (((base + size) >> 32) != 0)
size = 0xffffffff - base;
#endif
pfn_t pfn;
count_t count;
if (e820table[i].type == MEMMAP_MEMORY_AVAILABLE) {
/* To be safe, make available zone possibly smaller */
pfn = ADDR2PFN(ALIGN_UP(base, FRAME_SIZE));
count = SIZE2FRAMES(ALIGN_DOWN(size, FRAME_SIZE));
start = ADDR2PFN(ALIGN_UP(e820table[i].base_address, FRAME_SIZE));
size = SIZE2FRAMES(ALIGN_DOWN(e820table[i].size, FRAME_SIZE));
pfn_t conf;
if ((minconf < pfn) || (minconf >= pfn + count))
conf = pfn;
if ((minconf < start) || (minconf >= start + size))
conf = start;
else
conf = minconf;
zone_create(pfn, count, conf, ZONE_AVAILABLE);
zone_create(start, size, conf, 0);
// XXX this has to be removed
if (last_frame < ALIGN_UP(base + size, FRAME_SIZE))
last_frame = ALIGN_UP(base + size, FRAME_SIZE);
}
if (e820table[i].type == MEMMAP_MEMORY_RESERVED) {
/* To be safe, make reserved zone possibly larger */
pfn = ADDR2PFN(ALIGN_DOWN(base, FRAME_SIZE));
count = SIZE2FRAMES(ALIGN_UP(size, FRAME_SIZE));
zone_create(pfn, count, 0, ZONE_RESERVED);
}
if (e820table[i].type == MEMMAP_MEMORY_ACPI) {
/* To be safe, make firmware zone possibly larger */
pfn = ADDR2PFN(ALIGN_DOWN(base, (uintptr_t) FRAME_SIZE));
count = SIZE2FRAMES(ALIGN_UP(size, (uintptr_t) FRAME_SIZE));
zone_create(pfn, count, 0, ZONE_FIRMWARE);
}
if (last_frame < ALIGN_UP(e820table[i].base_address +
e820table[i].size, FRAME_SIZE))
last_frame =
ALIGN_UP(e820table[i].base_address + e820table[i].size, FRAME_SIZE);
}
}
}
 
144,14 → 113,16
if (config.cpu_active == 1) {
minconf = 1;
#ifdef CONFIG_SMP
minconf = max(minconf,
ADDR2PFN(AP_BOOT_OFFSET + hardcoded_unmapped_ktext_size +
hardcoded_unmapped_kdata_size));
#endif
#ifdef CONFIG_SIMICS_FIX
minconf = max(minconf, ADDR2PFN(0x10000));
#endif
init_e820_memory(minconf);
 
/* Reserve frame 0 (BIOS data) */
frame_mark_unavailable(0, 1);
160,7 → 131,12
frame_mark_unavailable(AP_BOOT_OFFSET >> FRAME_WIDTH,
(hardcoded_unmapped_ktext_size +
hardcoded_unmapped_kdata_size) >> FRAME_WIDTH);
#ifdef CONFIG_SIMICS_FIX
/* Don't know why, but these addresses help */
frame_mark_unavailable(0xd000 >> FRAME_WIDTH, 3);
#endif
#endif
}
}
 
/branches/network/kernel/arch/ia32/src/mm/page.c
53,7 → 53,7
{
uintptr_t cur;
int flags;
 
if (config.cpu_active == 1) {
page_mapping_operations = &pt_mapping_operations;
66,12 → 66,12
flags |= PAGE_GLOBAL;
page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
}
 
exc_register(14, "page_fault", (iroutine) page_fault);
write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
} else
write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
 
paging_on();
}
 
79,7 → 79,7
uintptr_t hw_map(uintptr_t physaddr, size_t size)
{
if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
panic("Unable to map physical memory %p (%d bytes).", physaddr, size)
panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
uintptr_t virtaddr = PA2KA(last_frame);
pfn_t i;
101,8 → 101,8
page = read_cr2();
if (istate->error_word & PFERR_CODE_RSVD)
panic("Reserved bit set in page directory.");
panic("Reserved bit set in page directory.\n");
 
if (istate->error_word & PFERR_CODE_RW)
access = PF_ACCESS_WRITE;
else
109,11 → 109,11
access = PF_ACCESS_READ;
if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
fault_if_from_uspace(istate, "Page fault: %#x.", page);
fault_if_from_uspace(istate, "Page fault: %#x", page);
decode_istate(istate);
printf("page fault address: %#lx\n", page);
panic("Page fault.");
panic("page fault\n");
}
}
 
/branches/network/kernel/arch/ia32/src/mm/tlb.c
67,13 → 67,5
invlpg(page + i * PAGE_SIZE);
}
 
void tlb_arch_init(void)
{
}
 
void tlb_print(void)
{
}
 
/** @}
*/
/branches/network/kernel/arch/ia32/src/drivers/ega.c
0,0 → 1,155
/*
* Copyright (c) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
* @{
*/
/**
* @file
* @brief EGA driver.
*/
 
#include <arch/drivers/ega.h>
#include <putchar.h>
#include <mm/page.h>
#include <mm/as.h>
#include <arch/mm/page.h>
#include <synch/spinlock.h>
#include <arch/types.h>
#include <arch/asm.h>
#include <memstr.h>
#include <console/chardev.h>
#include <console/console.h>
#include <sysinfo/sysinfo.h>
#include <ddi/ddi.h>
 
/*
* The EGA driver.
* Simple and short. Function for displaying characters and "scrolling".
*/
 
static parea_t ega_parea; /**< Physical memory area for EGA video RAM. */
 
SPINLOCK_INITIALIZE(egalock);
static uint32_t ega_cursor;
static uint8_t *videoram;
 
static void ega_putchar(chardev_t *d, const char ch);
 
chardev_t ega_console;
static chardev_operations_t ega_ops = {
.write = ega_putchar
};
 
static void ega_move_cursor(void);
 
void ega_init(void)
{
uint8_t hi, lo;
videoram = (uint8_t *) hw_map(VIDEORAM, SCREEN * 2);
outb(0x3d4, 0xe);
hi = inb(0x3d5);
outb(0x3d4, 0xf);
lo = inb(0x3d5);
ega_cursor = (hi << 8) | lo;
 
chardev_initialize("ega_out", &ega_console, &ega_ops);
stdout = &ega_console;
ega_parea.pbase = VIDEORAM;
ega_parea.vbase = (uintptr_t) videoram;
ega_parea.frames = 1;
ega_parea.cacheable = false;
ddi_parea_register(&ega_parea);
 
sysinfo_set_item_val("fb", NULL, true);
sysinfo_set_item_val("fb.kind", NULL, 2);
sysinfo_set_item_val("fb.width", NULL, ROW);
sysinfo_set_item_val("fb.height", NULL, ROWS);
sysinfo_set_item_val("fb.address.physical", NULL, VIDEORAM);
}
 
static void ega_display_char(char ch)
{
videoram[ega_cursor * 2] = ch;
}
 
/*
* This function takes care of scrolling.
*/
static void ega_check_cursor(void)
{
if (ega_cursor < SCREEN)
return;
 
memcpy((void *) videoram, (void *) (videoram + ROW * 2), (SCREEN - ROW) * 2);
memsetw(videoram + (SCREEN - ROW) * 2, ROW, 0x0720);
ega_cursor = ega_cursor - ROW;
}
 
void ega_putchar(chardev_t *d __attribute__((unused)), const char ch)
{
ipl_t ipl;
 
ipl = interrupts_disable();
spinlock_lock(&egalock);
 
switch (ch) {
case '\n':
ega_cursor = (ega_cursor + ROW) - ega_cursor % ROW;
break;
case '\t':
ega_cursor = (ega_cursor + 8) - ega_cursor % 8;
break;
case '\b':
if (ega_cursor % ROW)
ega_cursor--;
break;
default:
ega_display_char(ch);
ega_cursor++;
break;
}
ega_check_cursor();
ega_move_cursor();
 
spinlock_unlock(&egalock);
interrupts_restore(ipl);
}
 
void ega_move_cursor(void)
{
outb(0x3d4, 0xe);
outb(0x3d5, (uint8_t) ((ega_cursor >> 8) & 0xff));
outb(0x3d4, 0xf);
outb(0x3d5, (uint8_t) (ega_cursor & 0xff));
}
 
/** @}
*/
/branches/network/kernel/arch/ia32/src/drivers/i8259.c
49,28 → 49,28
void i8259_init(void)
{
/* ICW1: this is ICW1, ICW4 to follow */
pio_write_8(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);
outb(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);
 
/* ICW2: IRQ 0 maps to INT IRQBASE */
pio_write_8(PIC_PIC0PORT2, IVT_IRQBASE);
outb(PIC_PIC0PORT2, IVT_IRQBASE);
 
/* ICW3: pic1 using IRQ IRQ_PIC1 */
pio_write_8(PIC_PIC0PORT2, 1 << IRQ_PIC1);
outb(PIC_PIC0PORT2, 1 << IRQ_PIC1);
 
/* ICW4: i8086 mode */
pio_write_8(PIC_PIC0PORT2, 1);
outb(PIC_PIC0PORT2, 1);
 
/* ICW1: ICW1, ICW4 to follow */
pio_write_8(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
 
/* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
pio_write_8(PIC_PIC1PORT2, IVT_IRQBASE + 8);
outb(PIC_PIC1PORT2, IVT_IRQBASE + 8);
 
/* ICW3: pic1 is known as IRQ_PIC1 */
pio_write_8(PIC_PIC1PORT2, IRQ_PIC1);
outb(PIC_PIC1PORT2, IRQ_PIC1);
 
/* ICW4: i8086 mode */
pio_write_8(PIC_PIC1PORT2, 1);
outb(PIC_PIC1PORT2, 1);
 
/*
* Register interrupt handler for the PIC spurious interrupt.
94,12 → 94,12
uint8_t x;
 
if (irqmask & 0xff) {
x = pio_read_8(PIC_PIC0PORT2);
pio_write_8(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff))));
x = inb(PIC_PIC0PORT2);
outb(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff))));
}
if (irqmask >> 8) {
x = pio_read_8(PIC_PIC1PORT2);
pio_write_8(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8))));
x = inb(PIC_PIC1PORT2);
outb(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8))));
}
}
 
108,19 → 108,19
uint8_t x;
 
if (irqmask & 0xff) {
x = pio_read_8(PIC_PIC0PORT2);
pio_write_8(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff)));
x = inb(PIC_PIC0PORT2);
outb(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff)));
}
if (irqmask >> 8) {
x = pio_read_8(PIC_PIC1PORT2);
pio_write_8(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8)));
x = inb(PIC_PIC1PORT2);
outb(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8)));
}
}
 
void pic_eoi(void)
{
pio_write_8((ioport8_t *)0x20, 0x20);
pio_write_8((ioport8_t *)0xa0, 0x20);
outb(0x20, 0x20);
outb(0xa0, 0x20);
}
 
void pic_spurious(int n __attribute__((unused)), istate_t *istate __attribute__((unused)))
/branches/network/kernel/arch/ia32/src/drivers/i8254.c
26,12 → 26,12
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/**
* @file
* @brief i8254 chip driver.
* @brief i8254 chip driver.
*
* Low level time functions.
*/
53,8 → 53,8
#include <ddi/irq.h>
#include <ddi/device.h>
 
#define CLK_PORT1 ((ioport8_t *)0x40)
#define CLK_PORT4 ((ioport8_t *)0x43)
#define CLK_PORT1 0x40
#define CLK_PORT4 0x43
 
#define CLK_CONST 1193180
#define MAGIC_NUMBER 1194
61,12 → 61,12
 
static irq_t i8254_irq;
 
static irq_ownership_t i8254_claim(irq_t *irq)
static irq_ownership_t i8254_claim(void)
{
return IRQ_ACCEPT;
}
 
static void i8254_irq_handler(irq_t *irq)
static void i8254_irq_handler(irq_t *irq, void *arg __attribute__((unused)), ...)
{
/*
* This IRQ is responsible for kernel preemption.
94,10 → 94,10
 
void i8254_normal_operation(void)
{
pio_write_8(CLK_PORT4, 0x36);
outb(CLK_PORT4, 0x36);
pic_disable_irqs(1 << IRQ_CLK);
pio_write_8(CLK_PORT1, (CLK_CONST / HZ) & 0xf);
pio_write_8(CLK_PORT1, (CLK_CONST / HZ) >> 8);
outb(CLK_PORT1, (CLK_CONST / HZ) & 0xf);
outb(CLK_PORT1, (CLK_CONST / HZ) >> 8);
pic_enable_irqs(1 << IRQ_CLK);
}
 
114,36 → 114,36
* One-shot timer. Count-down from 0xffff at 1193180Hz
* MAGIC_NUMBER is the magic value for 1ms.
*/
pio_write_8(CLK_PORT4, 0x30);
pio_write_8(CLK_PORT1, 0xff);
pio_write_8(CLK_PORT1, 0xff);
outb(CLK_PORT4, 0x30);
outb(CLK_PORT1, 0xff);
outb(CLK_PORT1, 0xff);
 
do {
/* will read both status and count */
pio_write_8(CLK_PORT4, 0xc2);
not_ok = (uint8_t) ((pio_read_8(CLK_PORT1) >> 6) & 1);
t1 = pio_read_8(CLK_PORT1);
t1 |= pio_read_8(CLK_PORT1) << 8;
outb(CLK_PORT4, 0xc2);
not_ok = (uint8_t) ((inb(CLK_PORT1) >> 6) & 1);
t1 = inb(CLK_PORT1);
t1 |= inb(CLK_PORT1) << 8;
} while (not_ok);
 
asm_delay_loop(LOOPS);
 
pio_write_8(CLK_PORT4, 0xd2);
t2 = pio_read_8(CLK_PORT1);
t2 |= pio_read_8(CLK_PORT1) << 8;
outb(CLK_PORT4, 0xd2);
t2 = inb(CLK_PORT1);
t2 |= inb(CLK_PORT1) << 8;
 
/*
* We want to determine the overhead of the calibrating mechanism.
*/
pio_write_8(CLK_PORT4, 0xd2);
o1 = pio_read_8(CLK_PORT1);
o1 |= pio_read_8(CLK_PORT1) << 8;
outb(CLK_PORT4, 0xd2);
o1 = inb(CLK_PORT1);
o1 |= inb(CLK_PORT1) << 8;
 
asm_fake_loop(LOOPS);
 
pio_write_8(CLK_PORT4, 0xd2);
o2 = pio_read_8(CLK_PORT1);
o2 |= pio_read_8(CLK_PORT1) << 8;
outb(CLK_PORT4, 0xd2);
o2 = inb(CLK_PORT1);
o2 |= inb(CLK_PORT1) << 8;
 
CPU->delay_loop_const =
((MAGIC_NUMBER * LOOPS) / 1000) / ((t1 - t2) - (o1 - o2)) +
/branches/network/kernel/arch/ia32/src/drivers/vesa.c
56,20 → 56,12
uint16_t vesa_bpp;
uint16_t vesa_scanline;
 
uint8_t vesa_red_mask;
uint8_t vesa_red_pos;
 
uint8_t vesa_green_mask;
uint8_t vesa_green_pos;
 
uint8_t vesa_blue_mask;
uint8_t vesa_blue_pos;
 
int vesa_present(void)
{
if ((vesa_width != 0xffff) && (vesa_height != 0xffff))
if (vesa_width != 0xffff)
return true;
if (vesa_height != 0xffff)
return true;
return false;
}
 
82,12 → 74,7
visual = VISUAL_INDIRECT_8;
break;
case 16:
if ((vesa_red_mask == 5) && (vesa_red_pos == 10)
&& (vesa_green_mask == 5) && (vesa_green_pos == 5)
&& (vesa_blue_mask == 5) && (vesa_blue_pos == 0))
visual = VISUAL_RGB_5_5_5;
else
visual = VISUAL_RGB_5_6_5;
visual = VISUAL_RGB_5_6_5;
break;
case 24:
visual = VISUAL_RGB_8_8_8;
96,25 → 83,12
visual = VISUAL_RGB_0_8_8_8;
break;
default:
panic("Unsupported bits per pixel.");
panic("Unsupported bits per pixel");
}
fb_properties_t vesa_props = {
.addr = vesa_ph_addr,
.offset = 0,
.x = vesa_width,
.y = vesa_height,
.scan = vesa_scanline,
.visual = visual,
};
fb_init(&vesa_props);
fb_init(vesa_ph_addr, vesa_width, vesa_height, vesa_scanline, visual);
}
 
void vesa_redraw(void)
{
fb_redraw();
}
 
#endif
 
/** @}
/branches/network/kernel/arch/ia32/src/userspace.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
47,8 → 47,10
*/
void userspace(uspace_arg_t *kernel_uarg)
{
ipl_t ipl = interrupts_disable();
ipl_t ipl;
 
ipl = interrupts_disable();
 
asm volatile (
/*
* Clear nested task flag.
58,33 → 60,35
"and $0xffffbfff, %%eax\n"
"push %%eax\n"
"popfl\n"
 
/* Set up GS register (TLS) */
"movl %[tls_des], %%gs\n"
"pushl %[udata_des]\n"
"pushl %[stack_size]\n"
"pushl %[ipl]\n"
"pushl %[utext_des]\n"
"pushl %[entry]\n"
"movl %[uarg], %%eax\n"
"movl %6, %%gs\n"
 
"pushl %0\n"
"pushl %1\n"
"pushl %2\n"
"pushl %3\n"
"pushl %4\n"
"movl %5, %%eax\n"
 
/* %ebx is defined to hold pcb_ptr - set it to 0 */
"xorl %%ebx, %%ebx\n"
"xorl %%ebx, %%ebx\n"
 
"iret\n"
:
: [udata_des] "i" (gdtselector(UDATA_DES) | PL_USER),
[stack_size] "r" ((uint8_t *) kernel_uarg->uspace_stack + THREAD_STACK_SIZE),
[ipl] "r" (ipl),
[utext_des] "i" (gdtselector(UTEXT_DES) | PL_USER),
[entry] "r" (kernel_uarg->uspace_entry),
[uarg] "r" (kernel_uarg->uspace_uarg),
[tls_des] "r" (gdtselector(TLS_DES))
:
: "i" (selector(UDATA_DES) | PL_USER),
"r" ((uint8_t *) kernel_uarg->uspace_stack +
THREAD_STACK_SIZE),
"r" (ipl),
"i" (selector(UTEXT_DES) | PL_USER),
"r" (kernel_uarg->uspace_entry),
"r" (kernel_uarg->uspace_uarg),
"r" (selector(TLS_DES))
: "eax");
/* Unreachable */
while (1);
for(;;)
;
}
 
/** @}
/branches/network/kernel/arch/ia32/src/smp/smp.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
75,12 → 75,12
l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME,
FRAME_ATOMIC | FRAME_KA);
if (!l_apic_address)
panic("Cannot allocate address for l_apic.");
panic("cannot allocate address for l_apic\n");
 
io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME,
FRAME_ATOMIC | FRAME_KA);
if (!io_apic_address)
panic("Cannot allocate address for io_apic.");
panic("cannot allocate address for io_apic\n");
 
if (config.cpu_count > 1) {
page_mapping_insert(AS_KERNEL, l_apic_address,
122,8 → 122,8
* Save 0xa to address 0xf of the CMOS RAM.
* BIOS will not do the POST after the INIT signal.
*/
pio_write_8((ioport8_t *)0x70, 0xf);
pio_write_8((ioport8_t *)0x71, 0xa);
outb(0x70, 0xf);
outb(0x71, 0xa);
 
pic_disable_irqs(0xffff);
apic_init();
131,8 → 131,8
uint8_t apic = l_apic_id();
 
for (i = 0; i < ops->cpu_count(); i++) {
descriptor_t *gdt_new;
struct descriptor *gdt_new;
/*
* Skip processors marked unusable.
*/
154,19 → 154,14
/*
* Prepare new GDT for CPU in question.
*/
/* XXX Flag FRAME_LOW_4_GiB was removed temporarily,
* it needs to be replaced by a generic fuctionality of
* the memory subsystem
*/
gdt_new = (descriptor_t *) malloc(GDT_ITEMS *
sizeof(descriptor_t), FRAME_ATOMIC);
gdt_new = (struct descriptor *) malloc(GDT_ITEMS *
sizeof(struct descriptor), FRAME_ATOMIC | FRAME_LOW_4_GiB);
if (!gdt_new)
panic("Cannot allocate memory for GDT.");
panic("couldn't allocate memory for GDT\n");
 
memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(descriptor_t));
memsetb(&gdt_new[TSS_DES], sizeof(descriptor_t), 0);
protected_ap_gdtr.limit = GDT_ITEMS * sizeof(descriptor_t);
memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor));
memsetb(&gdt_new[TSS_DES], sizeof(struct descriptor), 0);
protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor);
protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new);
gdtr.base = (uintptr_t) gdt_new;
 
/branches/network/kernel/arch/ia32/src/smp/apic.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
132,12 → 132,12
#endif
}
 
static irq_ownership_t l_apic_timer_claim(irq_t *irq)
static irq_ownership_t l_apic_timer_claim(void)
{
return IRQ_ACCEPT;
}
 
static void l_apic_timer_irq_handler(irq_t *irq)
static void l_apic_timer_irq_handler(irq_t *irq, void *arg __attribute__((unused)), ...)
{
/*
* Holding a spinlock could prevent clock() from preempting
/branches/network/kernel/arch/ia32/src/pm.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
112,7 → 112,7
 
void tss_initialize(tss_t *t)
{
memsetb(t, sizeof(tss_t), 0);
memsetb(t, sizeof(struct tss), 0);
}
 
/*
127,7 → 127,7
d = &idt[i];
 
d->unused = 0;
d->selector = gdtselector(KTEXT_DES);
d->selector = selector(KTEXT_DES);
 
d->access = AR_PRESENT | AR_INTERRUPT; /* masking interrupt */
 
154,7 → 154,7
"and $0xffff8fff, %%eax\n"
"push %%eax\n"
"popfl\n"
::: "eax"
: : : "eax"
);
}
 
165,7 → 165,7
"mov %%cr0, %%eax\n"
"and $0xfffbffff, %%eax\n"
"mov %%eax, %%cr0\n"
::: "eax"
: : : "eax"
);
}
 
198,7 → 198,7
else {
tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
if (!tss_p)
panic("Cannot allocate TSS.");
panic("could not allocate TSS\n");
}
 
tss_initialize(tss_p);
214,7 → 214,7
* As of this moment, the current CPU has its own GDT pointing
* to its own TSS. We just need to load the TR register.
*/
tr_load(gdtselector(TSS_DES));
tr_load(selector(TSS_DES));
clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels and clear NT flag. */
clean_AM_flag(); /* Disable alignment check */
/branches/network/kernel/arch/ia32/src/boot/vesa_prot.inc
File deleted
/branches/network/kernel/arch/ia32/src/boot/vesa_real.inc
File deleted
/branches/network/kernel/arch/ia32/src/boot/vesa_ret.inc
File deleted
/branches/network/kernel/arch/ia32/src/boot/boot.S
42,63 → 42,178
multiboot_header:
.long MULTIBOOT_HEADER_MAGIC
.long MULTIBOOT_HEADER_FLAGS
.long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) # checksum
.long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) # checksum
.long multiboot_header
.long unmapped_ktext_start
.long 0
.long 0
.long multiboot_image_start
 
multiboot_image_start:
cld
movl $START_STACK, %esp # initialize stack pointer
lgdt KA2PA(bootstrap_gdtr) # initialize Global Descriptor Table register
movw $gdtselector(KDATA_DES), %cx
movl $START_STACK, %esp # initialize stack pointer
lgdt KA2PA(bootstrap_gdtr) # initialize Global Descriptor Table register
 
movw $selector(KDATA_DES), %cx
movw %cx, %es
movw %cx, %fs
movw %cx, %gs
movw %cx, %ds # kernel data + stack
movw %cx, %ds # kernel data + stack
movw %cx, %ss
jmpl $gdtselector(KTEXT_DES), $multiboot_meeting_point
jmpl $selector(KTEXT_DES), $multiboot_meeting_point
multiboot_meeting_point:
movl %eax, grub_eax # save parameters from GRUB
movl %eax, grub_eax # save parameters from GRUB
movl %ebx, grub_ebx
xorl %eax, %eax
cpuid
cmp $0x0, %eax # any function > 0?
xorl %eax, %eax
cpuid
cmp $0x0, %eax # any function > 0?
jbe pse_unsupported
movl $0x1, %eax # basic function code 1
movl $0x1, %eax # Basic function code 1
cpuid
bt $3, %edx # test if PSE is supported
bt $3, %edx # Test if PSE is supported
jc pse_supported
 
pse_unsupported:
movl $pse_msg, %esi
jmp error_halt
pse_supported:
#ifdef CONFIG_FB
mov $vesa_init, %esi
mov $VESA_INIT_SEGMENT << 4, %edi
mov $e_vesa_init - vesa_init, %ecx
rep movsb
 
#include "vesa_prot.inc"
 
# map kernel and turn paging on
call map_kernel
mov $VESA_INIT_SEGMENT << 4, %edi
jmpl *%edi
# call arch_pre_main(grub_eax, grub_ebx)
pushl grub_ebx
pushl grub_eax
call arch_pre_main
vesa_meeting_point:
call main_bsp
mov %esi, KA2PA(vesa_ph_addr)
mov %di, KA2PA(vesa_height)
shr $16, %edi
mov %di, KA2PA(vesa_width)
mov %bx, KA2PA(vesa_scanline)
shr $16, %ebx
mov %bx, KA2PA(vesa_bpp)
#endif
# not reached
call map_kernel # map kernel and turn paging on
movl grub_eax, %eax
movl grub_ebx, %ebx
cmpl $MULTIBOOT_LOADER_MAGIC, %eax # compare GRUB signature
je valid_boot
xorl %ecx, %ecx # no memory map available
movl %ecx, e820counter
jmp invalid_boot
valid_boot:
movl (%ebx), %eax # ebx = physical address of struct multiboot_info
bt $3, %eax # mbi->flags[3] (mods_count, mods_addr valid)
jc mods_valid
xorl %ecx, %ecx
movl %ecx, init
jmp mods_end
mods_valid:
movl 20(%ebx), %ecx # mbi->mods_count
movl %ecx, init
cmpl $0, %ecx
je mods_end
movl 24(%ebx), %esi # mbi->mods_addr
movl $init, %edi
mods_loop:
movl 0(%esi), %edx # mods->mod_start
addl $0x80000000, %edx
movl %edx, 4(%edi)
movl 4(%esi), %edx
subl 0(%esi), %edx # mods->mod_end - mods->mod_start
movl %edx, 8(%edi)
addl $16, %esi
addl $8 , %edi
loop mods_loop
mods_end:
bt $6, %eax # mbi->flags[6] (mmap_length, mmap_addr valid)
jc mmap_valid
xorl %edx, %edx
jmp mmap_invalid
mmap_valid:
movl 44(%ebx), %ecx # mbi->mmap_length
movl 48(%ebx), %esi # mbi->mmap_addr
movl $e820table, %edi
xorl %edx, %edx
mmap_loop:
cmpl $0, %ecx
jle mmap_end
movl 4(%esi), %eax # mmap->base_addr_low
movl %eax, (%edi)
movl 8(%esi), %eax # mmap->base_addr_high
movl %eax, 4(%edi)
movl 12(%esi), %eax # mmap->length_low
movl %eax, 8(%edi)
movl 16(%esi), %eax # mmap->length_high
movl %eax, 12(%edi)
movl 20(%esi), %eax # mmap->type
movl %eax, 16(%edi)
movl (%esi), %eax # mmap->size
addl $0x4, %eax
addl %eax, %esi
subl %eax, %ecx
addl $MEMMAP_E820_RECORD_SIZE, %edi
incl %edx
jmp mmap_loop
mmap_end:
mmap_invalid:
movl %edx, e820counter
invalid_boot:
#ifdef CONFIG_SMP
# copy AP bootstrap routines below 1 MB
movl $BOOT_OFFSET, %esi
movl $AP_BOOT_OFFSET, %edi
movl $_hardcoded_unmapped_size, %ecx
rep movsb
#endif
 
call main_bsp # never returns
 
cli
hlt0:
hlt
jmp hlt0
hlt
 
.global map_kernel
map_kernel:
107,8 → 222,8
# For simplicity, we map the entire 4G space.
#
movl %cr4, %ecx
orl $(1 << 4), %ecx # turn PSE on
andl $(~(1 << 5)), %ecx # turn PAE off
orl $(1 << 4), %ecx # turn PSE on
andl $(~(1 << 5)), %ecx # turn PAE off
movl %ecx, %cr4
movl $(page_directory + 0), %esi
115,31 → 230,30
movl $(page_directory + 2048), %edi
xorl %ecx, %ecx
xorl %ebx, %ebx
floop:
movl $((1 << 7) | (1 << 1) | (1 << 0)), %eax
orl %ebx, %eax
movl %eax, (%esi, %ecx, 4) # mapping 0x00000000 + %ecx * 4M => 0x00000000 + %ecx * 4M
movl %eax, (%edi, %ecx, 4) # mapping 0x80000000 + %ecx * 4M => 0x00000000 + %ecx * 4M
addl $(4 * 1024 * 1024), %ebx
incl %ecx
cmpl $512, %ecx
jl floop
0:
movl $((1 << 7) | (1 << 1) | (1 << 0)), %eax
orl %ebx, %eax
movl %eax, (%esi, %ecx, 4) # mapping 0x00000000 + %ecx * 4M => 0x00000000 + %ecx * 4M
movl %eax, (%edi, %ecx, 4) # mapping 0x80000000 + %ecx * 4M => 0x00000000 + %ecx * 4M
addl $(4 * 1024 * 1024), %ebx
 
incl %ecx
cmpl $512, %ecx
jl 0b
 
movl %esi, %cr3
movl %cr0, %ebx
orl $(1 << 31), %ebx # turn paging on
orl $(1 << 31), %ebx # turn paging on
movl %ebx, %cr0
ret
 
# Print string from %esi to EGA display (in red) and halt
error_halt:
movl $0xb8000, %edi # base of EGA text mode memory
movl $0xb8000, %edi # base of EGA text mode memory
xorl %eax, %eax
movw $0x3d4, %dx # read bits 8 - 15 of the cursor address
movw $0x3d4, %dx # read bits 8 - 15 of the cursor address
movb $0xe, %al
outb %al, %dx
147,7 → 261,7
inb %dx, %al
shl $8, %ax
movw $0x3d4, %dx # read bits 0 - 7 of the cursor address
movw $0x3d4, %dx # read bits 0 - 7 of the cursor address
movb $0xf, %al
outb %al, %dx
156,9 → 270,7
cmp $1920, %ax
jbe cursor_ok
movw $1920, %ax # sanity check for the cursor on the last line
movw $1920, %ax # sanity check for the cursor on the last line
cursor_ok:
movw %ax, %bx
165,7 → 277,7
shl $1, %eax
addl %eax, %edi
movw $0x0c00, %ax # black background, light red foreground
movw $0x0c00, %ax # black background, light red foreground
ploop:
lodsb
172,11 → 284,11
cmp $0, %al
je ploop_end
stosw
inc %bx
inc %bx
jmp ploop
ploop_end:
movw $0x3d4, %dx # write bits 8 - 15 of the cursor address
movw $0x3d4, %dx # write bits 8 - 15 of the cursor address
movb $0xe, %al
outb %al, %dx
184,7 → 296,7
movb %bh, %al
outb %al, %dx
movw $0x3d4, %dx # write bits 0 - 7 of the cursor address
movw $0x3d4, %dx # write bits 0 - 7 of the cursor address
movb $0xf, %al
outb %al, %dx
191,14 → 303,240
movw $0x3d5, %dx
movb %bl, %al
outb %al, %dx
cli
hlt1:
hlt
jmp hlt1
hlt
 
#include "vesa_real.inc"
#ifdef CONFIG_FB
vesa_init:
jmp $selector(VESA_INIT_DES), $vesa_init_real - vesa_init
.code16
vesa_init_real:
mov %cr0, %eax
and $~1, %eax
mov %eax, %cr0
jmp $VESA_INIT_SEGMENT, $vesa_init_real2 - vesa_init
vesa_init_real2:
mov $VESA_INIT_SEGMENT, %bx
mov %bx, %es
mov %bx, %fs
mov %bx, %gs
mov %bx, %ds
mov %bx, %ss
movl %esp, %eax
movl $0x0000fffc, %esp
movl $0x0000fffc, %ebp
pushl %eax
#define VESA_INFO_SIZE 1024
 
#define VESA_MODE_ATTRIBUTES_OFFSET 0
#define VESA_MODE_LIST_PTR_OFFSET 14
#define VESA_MODE_SCANLINE_OFFSET 16
#define VESA_MODE_WIDTH_OFFSET 18
#define VESA_MODE_HEIGHT_OFFSET 20
#define VESA_MODE_BPP_OFFSET 25
#define VESA_MODE_PHADDR_OFFSET 40
 
#define VESA_END_OF_MODES 0xffff
 
#define VESA_OK 0x4f
 
#define VESA_GET_INFO 0x4f00
#define VESA_GET_MODE_INFO 0x4f01
#define VESA_SET_MODE 0x4f02
#define VESA_SET_PALETTE 0x4f09
 
#if CONFIG_VESA_BPP == 24
#define CONFIG_VESA_BPP_VARIANT 32
#endif
 
mov $VESA_GET_INFO, %ax
mov $e_vesa_init - vesa_init, %di
push %di
int $0x10
pop %di
cmp $VESA_OK, %al
jnz 0f
mov 2 + VESA_MODE_LIST_PTR_OFFSET(%di), %si
mov %si, %gs
mov VESA_MODE_LIST_PTR_OFFSET(%di), %si
add $VESA_INFO_SIZE, %di
 
1:# Try next mode
mov %gs:(%si), %cx
cmp $VESA_END_OF_MODES, %cx
jz 0f
inc %si
inc %si
push %cx
push %di
push %si
mov $VESA_GET_MODE_INFO, %ax
int $0x10
pop %si
pop %di
pop %cx
cmp $VESA_OK, %al
jnz 0f
mov $CONFIG_VESA_WIDTH, %ax
cmp VESA_MODE_WIDTH_OFFSET(%di), %ax
jnz 1b
mov $CONFIG_VESA_HEIGHT, %ax
cmp VESA_MODE_HEIGHT_OFFSET(%di), %ax
jnz 1b
mov $CONFIG_VESA_BPP, %al
cmp VESA_MODE_BPP_OFFSET(%di), %al
 
#ifdef CONFIG_VESA_BPP_VARIANT
jz 2f
mov $CONFIG_VESA_BPP_VARIANT, %al
cmp VESA_MODE_BPP_OFFSET(%di), %al
#endif
jnz 1b
 
2:
mov %cx, %bx
or $0xc000, %bx
push %di
mov $VESA_SET_MODE, %ax
int $0x10
pop %di
cmp $VESA_OK, %al
jnz 0f
 
#if CONFIG_VESA_BPP == 8
# Set 3:2:3 VGA palette
mov VESA_MODE_ATTRIBUTES_OFFSET(%di), %ax
push %di
mov $vga323 - vesa_init, %di
mov $0x100, %ecx
bt $5, %ax # Test if VGA compatible registers are present
jnc vga_compat
# Try VESA routine to set palette
mov $VESA_SET_PALETTE, %ax
xor %bl, %bl
xor %dx, %dx
int $0x10
jmp vga_not_compat
vga_compat:
# Try VGA registers to set palette
movw $0x3c6, %dx # Set palette mask
movb $0xff, %al
outb %al, %dx
movw $0x3c8, %dx # First index to set
xor %al, %al
outb %al, %dx
movw $0x3c9, %dx # Data port
vga_loop:
movb %es:2(%di), %al
outb %al, %dx
movb %es:1(%di), %al
outb %al, %dx
movb %es:(%di), %al
outb %al, %dx
addw $4, %di
loop vga_loop
vga_not_compat:
pop %di
#endif
mov VESA_MODE_PHADDR_OFFSET(%di), %esi
mov VESA_MODE_WIDTH_OFFSET(%di), %ax
shl $16, %eax
mov VESA_MODE_HEIGHT_OFFSET(%di), %ax
mov VESA_MODE_BPP_OFFSET(%di), %bl
xor %bh, %bh
shl $16, %ebx
mov VESA_MODE_SCANLINE_OFFSET(%di), %bx
mov %eax, %edi
8:
mov %cr0, %eax
or $1, %eax
mov %eax, %cr0
jmp 9f
9:
ljmpl $selector(KTEXT_DES), $(vesa_init_protect - vesa_init + VESA_INIT_SEGMENT << 4)
 
0:# No prefered mode found
mov $0x111, %cx
push %di
push %cx
mov $VESA_GET_MODE_INFO, %ax
int $0x10
pop %cx
pop %di
cmp $VESA_OK, %al
jnz 1f
jz 2b # Force relative jump
1:
mov $0x0003, %ax
int $0x10
mov $0xffffffff, %edi # EGA text mode used, because of problems with VESA
xor %ax, %ax
jz 8b # Force relative jump
 
vga323:
#include "vga323.pal"
 
.code32
vesa_init_protect:
movw $selector(KDATA_DES), %cx
movw %cx, %es
movw %cx, %fs
movw %cx, %gs
movw %cx, %ds # kernel data + stack
movw %cx, %ss
movl $START_STACK, %esp # initialize stack pointer
 
jmpl $selector(KTEXT_DES), $vesa_meeting_point
 
.align 4
e_vesa_init:
#endif
 
.section K_DATA_START, "aw", @progbits
 
.align 4096
/branches/network/kernel/arch/ia32/src/boot/vga323.pal
1,256 → 1,256
.byte 0x00, 0x00, 0x00, 0x00
.byte 0x09, 0x00, 0x00, 0x00
.byte 0x12, 0x00, 0x00, 0x00
.byte 0x1b, 0x00, 0x00, 0x00
.byte 0x24, 0x00, 0x00, 0x00
.byte 0x2d, 0x00, 0x00, 0x00
.byte 0x36, 0x00, 0x00, 0x00
.byte 0x3f, 0x00, 0x00, 0x00
.byte 0x00, 0x15, 0x00, 0x00
.byte 0x09, 0x15, 0x00, 0x00
.byte 0x12, 0x15, 0x00, 0x00
.byte 0x1b, 0x15, 0x00, 0x00
.byte 0x24, 0x15, 0x00, 0x00
.byte 0x2d, 0x15, 0x00, 0x00
.byte 0x36, 0x15, 0x00, 0x00
.byte 0x3f, 0x15, 0x00, 0x00
.byte 0x00, 0x2a, 0x00, 0x00
.byte 0x09, 0x2a, 0x00, 0x00
.byte 0x12, 0x2a, 0x00, 0x00
.byte 0x1b, 0x2a, 0x00, 0x00
.byte 0x24, 0x2a, 0x00, 0x00
.byte 0x2d, 0x2a, 0x00, 0x00
.byte 0x36, 0x2a, 0x00, 0x00
.byte 0x3f, 0x2a, 0x00, 0x00
.byte 0x00, 0x3f, 0x00, 0x00
.byte 0x09, 0x3f, 0x00, 0x00
.byte 0x12, 0x3f, 0x00, 0x00
.byte 0x1b, 0x3f, 0x00, 0x00
.byte 0x24, 0x3f, 0x00, 0x00
.byte 0x2d, 0x3f, 0x00, 0x00
.byte 0x36, 0x3f, 0x00, 0x00
.byte 0x3f, 0x3f, 0x00, 0x00
.byte 0x00, 0x00, 0x09, 0x00
.byte 0x09, 0x00, 0x09, 0x00
.byte 0x12, 0x00, 0x09, 0x00
.byte 0x1b, 0x00, 0x09, 0x00
.byte 0x24, 0x00, 0x09, 0x00
.byte 0x2d, 0x00, 0x09, 0x00
.byte 0x36, 0x00, 0x09, 0x00
.byte 0x3f, 0x00, 0x09, 0x00
.byte 0x00, 0x15, 0x09, 0x00
.byte 0x09, 0x15, 0x09, 0x00
.byte 0x12, 0x15, 0x09, 0x00
.byte 0x1b, 0x15, 0x09, 0x00
.byte 0x24, 0x15, 0x09, 0x00
.byte 0x2d, 0x15, 0x09, 0x00
.byte 0x36, 0x15, 0x09, 0x00
.byte 0x3f, 0x15, 0x09, 0x00
.byte 0x00, 0x2a, 0x09, 0x00
.byte 0x09, 0x2a, 0x09, 0x00
.byte 0x12, 0x2a, 0x09, 0x00
.byte 0x1b, 0x2a, 0x09, 0x00
.byte 0x24, 0x2a, 0x09, 0x00
.byte 0x2d, 0x2a, 0x09, 0x00
.byte 0x36, 0x2a, 0x09, 0x00
.byte 0x3f, 0x2a, 0x09, 0x00
.byte 0x00, 0x3f, 0x09, 0x00
.byte 0x09, 0x3f, 0x09, 0x00
.byte 0x12, 0x3f, 0x09, 0x00
.byte 0x1b, 0x3f, 0x09, 0x00
.byte 0x24, 0x3f, 0x09, 0x00
.byte 0x2d, 0x3f, 0x09, 0x00
.byte 0x36, 0x3f, 0x09, 0x00
.byte 0x3f, 0x3f, 0x09, 0x00
.byte 0x00, 0x00, 0x12, 0x00
.byte 0x09, 0x00, 0x12, 0x00
.byte 0x12, 0x00, 0x12, 0x00
.byte 0x1b, 0x00, 0x12, 0x00
.byte 0x24, 0x00, 0x12, 0x00
.byte 0x2d, 0x00, 0x12, 0x00
.byte 0x36, 0x00, 0x12, 0x00
.byte 0x3f, 0x00, 0x12, 0x00
.byte 0x00, 0x15, 0x12, 0x00
.byte 0x09, 0x15, 0x12, 0x00
.byte 0x12, 0x15, 0x12, 0x00
.byte 0x1b, 0x15, 0x12, 0x00
.byte 0x24, 0x15, 0x12, 0x00
.byte 0x2d, 0x15, 0x12, 0x00
.byte 0x36, 0x15, 0x12, 0x00
.byte 0x3f, 0x15, 0x12, 0x00
.byte 0x00, 0x2a, 0x12, 0x00
.byte 0x09, 0x2a, 0x12, 0x00
.byte 0x12, 0x2a, 0x12, 0x00
.byte 0x1b, 0x2a, 0x12, 0x00
.byte 0x24, 0x2a, 0x12, 0x00
.byte 0x2d, 0x2a, 0x12, 0x00
.byte 0x36, 0x2a, 0x12, 0x00
.byte 0x3f, 0x2a, 0x12, 0x00
.byte 0x00, 0x3f, 0x12, 0x00
.byte 0x09, 0x3f, 0x12, 0x00
.byte 0x12, 0x3f, 0x12, 0x00
.byte 0x1b, 0x3f, 0x12, 0x00
.byte 0x24, 0x3f, 0x12, 0x00
.byte 0x2d, 0x3f, 0x12, 0x00
.byte 0x36, 0x3f, 0x12, 0x00
.byte 0x3f, 0x3f, 0x12, 0x00
.byte 0x00, 0x00, 0x1b, 0x00
.byte 0x09, 0x00, 0x1b, 0x00
.byte 0x12, 0x00, 0x1b, 0x00
.byte 0x1b, 0x00, 0x1b, 0x00
.byte 0x24, 0x00, 0x1b, 0x00
.byte 0x2d, 0x00, 0x1b, 0x00
.byte 0x36, 0x00, 0x1b, 0x00
.byte 0x3f, 0x00, 0x1b, 0x00
.byte 0x00, 0x15, 0x1b, 0x00
.byte 0x09, 0x15, 0x1b, 0x00
.byte 0x12, 0x15, 0x1b, 0x00
.byte 0x1b, 0x15, 0x1b, 0x00
.byte 0x24, 0x15, 0x1b, 0x00
.byte 0x2d, 0x15, 0x1b, 0x00
.byte 0x36, 0x15, 0x1b, 0x00
.byte 0x3f, 0x15, 0x1b, 0x00
.byte 0x00, 0x2a, 0x1b, 0x00
.byte 0x09, 0x2a, 0x1b, 0x00
.byte 0x12, 0x2a, 0x1b, 0x00
.byte 0x1b, 0x2a, 0x1b, 0x00
.byte 0x24, 0x2a, 0x1b, 0x00
.byte 0x2d, 0x2a, 0x1b, 0x00
.byte 0x36, 0x2a, 0x1b, 0x00
.byte 0x3f, 0x2a, 0x1b, 0x00
.byte 0x00, 0x3f, 0x1b, 0x00
.byte 0x09, 0x3f, 0x1b, 0x00
.byte 0x12, 0x3f, 0x1b, 0x00
.byte 0x1b, 0x3f, 0x1b, 0x00
.byte 0x24, 0x3f, 0x1b, 0x00
.byte 0x2d, 0x3f, 0x1b, 0x00
.byte 0x36, 0x3f, 0x1b, 0x00
.byte 0x3f, 0x3f, 0x1b, 0x00
.byte 0x00, 0x00, 0x24, 0x00
.byte 0x09, 0x00, 0x24, 0x00
.byte 0x12, 0x00, 0x24, 0x00
.byte 0x1b, 0x00, 0x24, 0x00
.byte 0x24, 0x00, 0x24, 0x00
.byte 0x2d, 0x00, 0x24, 0x00
.byte 0x36, 0x00, 0x24, 0x00
.byte 0x3f, 0x00, 0x24, 0x00
.byte 0x00, 0x15, 0x24, 0x00
.byte 0x09, 0x15, 0x24, 0x00
.byte 0x12, 0x15, 0x24, 0x00
.byte 0x1b, 0x15, 0x24, 0x00
.byte 0x24, 0x15, 0x24, 0x00
.byte 0x2d, 0x15, 0x24, 0x00
.byte 0x36, 0x15, 0x24, 0x00
.byte 0x3f, 0x15, 0x24, 0x00
.byte 0x00, 0x2a, 0x24, 0x00
.byte 0x09, 0x2a, 0x24, 0x00
.byte 0x12, 0x2a, 0x24, 0x00
.byte 0x1b, 0x2a, 0x24, 0x00
.byte 0x24, 0x2a, 0x24, 0x00
.byte 0x2d, 0x2a, 0x24, 0x00
.byte 0x36, 0x2a, 0x24, 0x00
.byte 0x3f, 0x2a, 0x24, 0x00
.byte 0x00, 0x3f, 0x24, 0x00
.byte 0x09, 0x3f, 0x24, 0x00
.byte 0x12, 0x3f, 0x24, 0x00
.byte 0x1b, 0x3f, 0x24, 0x00
.byte 0x24, 0x3f, 0x24, 0x00
.byte 0x2d, 0x3f, 0x24, 0x00
.byte 0x36, 0x3f, 0x24, 0x00
.byte 0x3f, 0x3f, 0x24, 0x00
.byte 0x00, 0x00, 0x2d, 0x00
.byte 0x09, 0x00, 0x2d, 0x00
.byte 0x12, 0x00, 0x2d, 0x00
.byte 0x1b, 0x00, 0x2d, 0x00
.byte 0x24, 0x00, 0x2d, 0x00
.byte 0x2d, 0x00, 0x2d, 0x00
.byte 0x36, 0x00, 0x2d, 0x00
.byte 0x3f, 0x00, 0x2d, 0x00
.byte 0x00, 0x15, 0x2d, 0x00
.byte 0x09, 0x15, 0x2d, 0x00
.byte 0x12, 0x15, 0x2d, 0x00
.byte 0x1b, 0x15, 0x2d, 0x00
.byte 0x24, 0x15, 0x2d, 0x00
.byte 0x2d, 0x15, 0x2d, 0x00
.byte 0x36, 0x15, 0x2d, 0x00
.byte 0x3f, 0x15, 0x2d, 0x00
.byte 0x00, 0x2a, 0x2d, 0x00
.byte 0x09, 0x2a, 0x2d, 0x00
.byte 0x12, 0x2a, 0x2d, 0x00
.byte 0x1b, 0x2a, 0x2d, 0x00
.byte 0x24, 0x2a, 0x2d, 0x00
.byte 0x2d, 0x2a, 0x2d, 0x00
.byte 0x36, 0x2a, 0x2d, 0x00
.byte 0x3f, 0x2a, 0x2d, 0x00
.byte 0x00, 0x3f, 0x2d, 0x00
.byte 0x09, 0x3f, 0x2d, 0x00
.byte 0x12, 0x3f, 0x2d, 0x00
.byte 0x1b, 0x3f, 0x2d, 0x00
.byte 0x24, 0x3f, 0x2d, 0x00
.byte 0x2d, 0x3f, 0x2d, 0x00
.byte 0x36, 0x3f, 0x2d, 0x00
.byte 0x3f, 0x3f, 0x2d, 0x00
.byte 0x00, 0x00, 0x36, 0x00
.byte 0x09, 0x00, 0x36, 0x00
.byte 0x12, 0x00, 0x36, 0x00
.byte 0x1b, 0x00, 0x36, 0x00
.byte 0x24, 0x00, 0x36, 0x00
.byte 0x2d, 0x00, 0x36, 0x00
.byte 0x36, 0x00, 0x36, 0x00
.byte 0x3f, 0x00, 0x36, 0x00
.byte 0x00, 0x15, 0x36, 0x00
.byte 0x09, 0x15, 0x36, 0x00
.byte 0x12, 0x15, 0x36, 0x00
.byte 0x1b, 0x15, 0x36, 0x00
.byte 0x24, 0x15, 0x36, 0x00
.byte 0x2d, 0x15, 0x36, 0x00
.byte 0x36, 0x15, 0x36, 0x00
.byte 0x3f, 0x15, 0x36, 0x00
.byte 0x00, 0x2a, 0x36, 0x00
.byte 0x09, 0x2a, 0x36, 0x00
.byte 0x12, 0x2a, 0x36, 0x00
.byte 0x1b, 0x2a, 0x36, 0x00
.byte 0x24, 0x2a, 0x36, 0x00
.byte 0x2d, 0x2a, 0x36, 0x00
.byte 0x36, 0x2a, 0x36, 0x00
.byte 0x3f, 0x2a, 0x36, 0x00
.byte 0x00, 0x3f, 0x36, 0x00
.byte 0x09, 0x3f, 0x36, 0x00
.byte 0x12, 0x3f, 0x36, 0x00
.byte 0x1b, 0x3f, 0x36, 0x00
.byte 0x24, 0x3f, 0x36, 0x00
.byte 0x2d, 0x3f, 0x36, 0x00
.byte 0x36, 0x3f, 0x36, 0x00
.byte 0x3f, 0x3f, 0x36, 0x00
.byte 0x00, 0x00, 0x3f, 0x00
.byte 0x09, 0x00, 0x3f, 0x00
.byte 0x12, 0x00, 0x3f, 0x00
.byte 0x1b, 0x00, 0x3f, 0x00
.byte 0x24, 0x00, 0x3f, 0x00
.byte 0x2d, 0x00, 0x3f, 0x00
.byte 0x36, 0x00, 0x3f, 0x00
.byte 0x3f, 0x00, 0x3f, 0x00
.byte 0x00, 0x15, 0x3f, 0x00
.byte 0x09, 0x15, 0x3f, 0x00
.byte 0x12, 0x15, 0x3f, 0x00
.byte 0x1b, 0x15, 0x3f, 0x00
.byte 0x24, 0x15, 0x3f, 0x00
.byte 0x2d, 0x15, 0x3f, 0x00
.byte 0x36, 0x15, 0x3f, 0x00
.byte 0x3f, 0x15, 0x3f, 0x00
.byte 0x00, 0x2a, 0x3f, 0x00
.byte 0x09, 0x2a, 0x3f, 0x00
.byte 0x12, 0x2a, 0x3f, 0x00
.byte 0x1b, 0x2a, 0x3f, 0x00
.byte 0x24, 0x2a, 0x3f, 0x00
.byte 0x2d, 0x2a, 0x3f, 0x00
.byte 0x36, 0x2a, 0x3f, 0x00
.byte 0x3f, 0x2a, 0x3f, 0x00
.byte 0x00, 0x3f, 0x3f, 0x00
.byte 0x09, 0x3f, 0x3f, 0x00
.byte 0x12, 0x3f, 0x3f, 0x00
.byte 0x1b, 0x3f, 0x3f, 0x00
.byte 0x24, 0x3f, 0x3f, 0x00
.byte 0x2d, 0x3f, 0x3f, 0x00
.byte 0x36, 0x3f, 0x3f, 0x00
.byte 0x3f, 0x3f, 0x3f, 0x00
.byte 0x36, 0x3f, 0x3f, 0x00
.byte 0x2d, 0x3f, 0x3f, 0x00
.byte 0x24, 0x3f, 0x3f, 0x00
.byte 0x1b, 0x3f, 0x3f, 0x00
.byte 0x12, 0x3f, 0x3f, 0x00
.byte 0x09, 0x3f, 0x3f, 0x00
.byte 0x00, 0x3f, 0x3f, 0x00
.byte 0x3f, 0x2a, 0x3f, 0x00
.byte 0x36, 0x2a, 0x3f, 0x00
.byte 0x2d, 0x2a, 0x3f, 0x00
.byte 0x24, 0x2a, 0x3f, 0x00
.byte 0x1b, 0x2a, 0x3f, 0x00
.byte 0x12, 0x2a, 0x3f, 0x00
.byte 0x09, 0x2a, 0x3f, 0x00
.byte 0x00, 0x2a, 0x3f, 0x00
.byte 0x3f, 0x15, 0x3f, 0x00
.byte 0x36, 0x15, 0x3f, 0x00
.byte 0x2d, 0x15, 0x3f, 0x00
.byte 0x24, 0x15, 0x3f, 0x00
.byte 0x1b, 0x15, 0x3f, 0x00
.byte 0x12, 0x15, 0x3f, 0x00
.byte 0x09, 0x15, 0x3f, 0x00
.byte 0x00, 0x15, 0x3f, 0x00
.byte 0x3f, 0x00, 0x3f, 0x00
.byte 0x36, 0x00, 0x3f, 0x00
.byte 0x2d, 0x00, 0x3f, 0x00
.byte 0x24, 0x00, 0x3f, 0x00
.byte 0x1b, 0x00, 0x3f, 0x00
.byte 0x12, 0x00, 0x3f, 0x00
.byte 0x09, 0x00, 0x3f, 0x00
.byte 0x00, 0x00, 0x3f, 0x00
.byte 0x3f, 0x3f, 0x36, 0x00
.byte 0x36, 0x3f, 0x36, 0x00
.byte 0x2d, 0x3f, 0x36, 0x00
.byte 0x24, 0x3f, 0x36, 0x00
.byte 0x1b, 0x3f, 0x36, 0x00
.byte 0x12, 0x3f, 0x36, 0x00
.byte 0x09, 0x3f, 0x36, 0x00
.byte 0x00, 0x3f, 0x36, 0x00
.byte 0x3f, 0x2a, 0x36, 0x00
.byte 0x36, 0x2a, 0x36, 0x00
.byte 0x2d, 0x2a, 0x36, 0x00
.byte 0x24, 0x2a, 0x36, 0x00
.byte 0x1b, 0x2a, 0x36, 0x00
.byte 0x12, 0x2a, 0x36, 0x00
.byte 0x09, 0x2a, 0x36, 0x00
.byte 0x00, 0x2a, 0x36, 0x00
.byte 0x3f, 0x15, 0x36, 0x00
.byte 0x36, 0x15, 0x36, 0x00
.byte 0x2d, 0x15, 0x36, 0x00
.byte 0x24, 0x15, 0x36, 0x00
.byte 0x1b, 0x15, 0x36, 0x00
.byte 0x12, 0x15, 0x36, 0x00
.byte 0x09, 0x15, 0x36, 0x00
.byte 0x00, 0x15, 0x36, 0x00
.byte 0x3f, 0x00, 0x36, 0x00
.byte 0x36, 0x00, 0x36, 0x00
.byte 0x2d, 0x00, 0x36, 0x00
.byte 0x24, 0x00, 0x36, 0x00
.byte 0x1b, 0x00, 0x36, 0x00
.byte 0x12, 0x00, 0x36, 0x00
.byte 0x09, 0x00, 0x36, 0x00
.byte 0x00, 0x00, 0x36, 0x00
.byte 0x3f, 0x3f, 0x2d, 0x00
.byte 0x36, 0x3f, 0x2d, 0x00
.byte 0x2d, 0x3f, 0x2d, 0x00
.byte 0x24, 0x3f, 0x2d, 0x00
.byte 0x1b, 0x3f, 0x2d, 0x00
.byte 0x12, 0x3f, 0x2d, 0x00
.byte 0x09, 0x3f, 0x2d, 0x00
.byte 0x00, 0x3f, 0x2d, 0x00
.byte 0x3f, 0x2a, 0x2d, 0x00
.byte 0x36, 0x2a, 0x2d, 0x00
.byte 0x2d, 0x2a, 0x2d, 0x00
.byte 0x24, 0x2a, 0x2d, 0x00
.byte 0x1b, 0x2a, 0x2d, 0x00
.byte 0x12, 0x2a, 0x2d, 0x00
.byte 0x09, 0x2a, 0x2d, 0x00
.byte 0x00, 0x2a, 0x2d, 0x00
.byte 0x3f, 0x15, 0x2d, 0x00
.byte 0x36, 0x15, 0x2d, 0x00
.byte 0x2d, 0x15, 0x2d, 0x00
.byte 0x24, 0x15, 0x2d, 0x00
.byte 0x1b, 0x15, 0x2d, 0x00
.byte 0x12, 0x15, 0x2d, 0x00
.byte 0x09, 0x15, 0x2d, 0x00
.byte 0x00, 0x15, 0x2d, 0x00
.byte 0x3f, 0x00, 0x2d, 0x00
.byte 0x36, 0x00, 0x2d, 0x00
.byte 0x2d, 0x00, 0x2d, 0x00
.byte 0x24, 0x00, 0x2d, 0x00
.byte 0x1b, 0x00, 0x2d, 0x00
.byte 0x12, 0x00, 0x2d, 0x00
.byte 0x09, 0x00, 0x2d, 0x00
.byte 0x00, 0x00, 0x2d, 0x00
.byte 0x3f, 0x3f, 0x24, 0x00
.byte 0x36, 0x3f, 0x24, 0x00
.byte 0x2d, 0x3f, 0x24, 0x00
.byte 0x24, 0x3f, 0x24, 0x00
.byte 0x1b, 0x3f, 0x24, 0x00
.byte 0x12, 0x3f, 0x24, 0x00
.byte 0x09, 0x3f, 0x24, 0x00
.byte 0x00, 0x3f, 0x24, 0x00
.byte 0x3f, 0x2a, 0x24, 0x00
.byte 0x36, 0x2a, 0x24, 0x00
.byte 0x2d, 0x2a, 0x24, 0x00
.byte 0x24, 0x2a, 0x24, 0x00
.byte 0x1b, 0x2a, 0x24, 0x00
.byte 0x12, 0x2a, 0x24, 0x00
.byte 0x09, 0x2a, 0x24, 0x00
.byte 0x00, 0x2a, 0x24, 0x00
.byte 0x3f, 0x15, 0x24, 0x00
.byte 0x36, 0x15, 0x24, 0x00
.byte 0x2d, 0x15, 0x24, 0x00
.byte 0x24, 0x15, 0x24, 0x00
.byte 0x1b, 0x15, 0x24, 0x00
.byte 0x12, 0x15, 0x24, 0x00
.byte 0x09, 0x15, 0x24, 0x00
.byte 0x00, 0x15, 0x24, 0x00
.byte 0x3f, 0x00, 0x24, 0x00
.byte 0x36, 0x00, 0x24, 0x00
.byte 0x2d, 0x00, 0x24, 0x00
.byte 0x24, 0x00, 0x24, 0x00
.byte 0x1b, 0x00, 0x24, 0x00
.byte 0x12, 0x00, 0x24, 0x00
.byte 0x09, 0x00, 0x24, 0x00
.byte 0x00, 0x00, 0x24, 0x00
.byte 0x3f, 0x3f, 0x1b, 0x00
.byte 0x36, 0x3f, 0x1b, 0x00
.byte 0x2d, 0x3f, 0x1b, 0x00
.byte 0x24, 0x3f, 0x1b, 0x00
.byte 0x1b, 0x3f, 0x1b, 0x00
.byte 0x12, 0x3f, 0x1b, 0x00
.byte 0x09, 0x3f, 0x1b, 0x00
.byte 0x00, 0x3f, 0x1b, 0x00
.byte 0x3f, 0x2a, 0x1b, 0x00
.byte 0x36, 0x2a, 0x1b, 0x00
.byte 0x2d, 0x2a, 0x1b, 0x00
.byte 0x24, 0x2a, 0x1b, 0x00
.byte 0x1b, 0x2a, 0x1b, 0x00
.byte 0x12, 0x2a, 0x1b, 0x00
.byte 0x09, 0x2a, 0x1b, 0x00
.byte 0x00, 0x2a, 0x1b, 0x00
.byte 0x3f, 0x15, 0x1b, 0x00
.byte 0x36, 0x15, 0x1b, 0x00
.byte 0x2d, 0x15, 0x1b, 0x00
.byte 0x24, 0x15, 0x1b, 0x00
.byte 0x1b, 0x15, 0x1b, 0x00
.byte 0x12, 0x15, 0x1b, 0x00
.byte 0x09, 0x15, 0x1b, 0x00
.byte 0x00, 0x15, 0x1b, 0x00
.byte 0x3f, 0x00, 0x1b, 0x00
.byte 0x36, 0x00, 0x1b, 0x00
.byte 0x2d, 0x00, 0x1b, 0x00
.byte 0x24, 0x00, 0x1b, 0x00
.byte 0x1b, 0x00, 0x1b, 0x00
.byte 0x12, 0x00, 0x1b, 0x00
.byte 0x09, 0x00, 0x1b, 0x00
.byte 0x00, 0x00, 0x1b, 0x00
.byte 0x3f, 0x3f, 0x12, 0x00
.byte 0x36, 0x3f, 0x12, 0x00
.byte 0x2d, 0x3f, 0x12, 0x00
.byte 0x24, 0x3f, 0x12, 0x00
.byte 0x1b, 0x3f, 0x12, 0x00
.byte 0x12, 0x3f, 0x12, 0x00
.byte 0x09, 0x3f, 0x12, 0x00
.byte 0x00, 0x3f, 0x12, 0x00
.byte 0x3f, 0x2a, 0x12, 0x00
.byte 0x36, 0x2a, 0x12, 0x00
.byte 0x2d, 0x2a, 0x12, 0x00
.byte 0x24, 0x2a, 0x12, 0x00
.byte 0x1b, 0x2a, 0x12, 0x00
.byte 0x12, 0x2a, 0x12, 0x00
.byte 0x09, 0x2a, 0x12, 0x00
.byte 0x00, 0x2a, 0x12, 0x00
.byte 0x3f, 0x15, 0x12, 0x00
.byte 0x36, 0x15, 0x12, 0x00
.byte 0x2d, 0x15, 0x12, 0x00
.byte 0x24, 0x15, 0x12, 0x00
.byte 0x1b, 0x15, 0x12, 0x00
.byte 0x12, 0x15, 0x12, 0x00
.byte 0x09, 0x15, 0x12, 0x00
.byte 0x00, 0x15, 0x12, 0x00
.byte 0x3f, 0x00, 0x12, 0x00
.byte 0x36, 0x00, 0x12, 0x00
.byte 0x2d, 0x00, 0x12, 0x00
.byte 0x24, 0x00, 0x12, 0x00
.byte 0x1b, 0x00, 0x12, 0x00
.byte 0x12, 0x00, 0x12, 0x00
.byte 0x09, 0x00, 0x12, 0x00
.byte 0x00, 0x00, 0x12, 0x00
.byte 0x3f, 0x3f, 0x09, 0x00
.byte 0x36, 0x3f, 0x09, 0x00
.byte 0x2d, 0x3f, 0x09, 0x00
.byte 0x24, 0x3f, 0x09, 0x00
.byte 0x1b, 0x3f, 0x09, 0x00
.byte 0x12, 0x3f, 0x09, 0x00
.byte 0x09, 0x3f, 0x09, 0x00
.byte 0x00, 0x3f, 0x09, 0x00
.byte 0x3f, 0x2a, 0x09, 0x00
.byte 0x36, 0x2a, 0x09, 0x00
.byte 0x2d, 0x2a, 0x09, 0x00
.byte 0x24, 0x2a, 0x09, 0x00
.byte 0x1b, 0x2a, 0x09, 0x00
.byte 0x12, 0x2a, 0x09, 0x00
.byte 0x09, 0x2a, 0x09, 0x00
.byte 0x00, 0x2a, 0x09, 0x00
.byte 0x3f, 0x15, 0x09, 0x00
.byte 0x36, 0x15, 0x09, 0x00
.byte 0x2d, 0x15, 0x09, 0x00
.byte 0x24, 0x15, 0x09, 0x00
.byte 0x1b, 0x15, 0x09, 0x00
.byte 0x12, 0x15, 0x09, 0x00
.byte 0x09, 0x15, 0x09, 0x00
.byte 0x00, 0x15, 0x09, 0x00
.byte 0x3f, 0x00, 0x09, 0x00
.byte 0x36, 0x00, 0x09, 0x00
.byte 0x2d, 0x00, 0x09, 0x00
.byte 0x24, 0x00, 0x09, 0x00
.byte 0x1b, 0x00, 0x09, 0x00
.byte 0x12, 0x00, 0x09, 0x00
.byte 0x09, 0x00, 0x09, 0x00
.byte 0x00, 0x00, 0x09, 0x00
.byte 0x3f, 0x3f, 0x00, 0x00
.byte 0x36, 0x3f, 0x00, 0x00
.byte 0x2d, 0x3f, 0x00, 0x00
.byte 0x24, 0x3f, 0x00, 0x00
.byte 0x1b, 0x3f, 0x00, 0x00
.byte 0x12, 0x3f, 0x00, 0x00
.byte 0x09, 0x3f, 0x00, 0x00
.byte 0x00, 0x3f, 0x00, 0x00
.byte 0x3f, 0x2a, 0x00, 0x00
.byte 0x36, 0x2a, 0x00, 0x00
.byte 0x2d, 0x2a, 0x00, 0x00
.byte 0x24, 0x2a, 0x00, 0x00
.byte 0x1b, 0x2a, 0x00, 0x00
.byte 0x12, 0x2a, 0x00, 0x00
.byte 0x09, 0x2a, 0x00, 0x00
.byte 0x00, 0x2a, 0x00, 0x00
.byte 0x3f, 0x15, 0x00, 0x00
.byte 0x36, 0x15, 0x00, 0x00
.byte 0x2d, 0x15, 0x00, 0x00
.byte 0x24, 0x15, 0x00, 0x00
.byte 0x1b, 0x15, 0x00, 0x00
.byte 0x12, 0x15, 0x00, 0x00
.byte 0x09, 0x15, 0x00, 0x00
.byte 0x00, 0x15, 0x00, 0x00
.byte 0x3f, 0x00, 0x00, 0x00
.byte 0x36, 0x00, 0x00, 0x00
.byte 0x2d, 0x00, 0x00, 0x00
.byte 0x24, 0x00, 0x00, 0x00
.byte 0x1b, 0x00, 0x00, 0x00
.byte 0x12, 0x00, 0x00, 0x00
.byte 0x09, 0x00, 0x00, 0x00
.byte 0x00, 0x00, 0x00, 0x00
/branches/network/kernel/arch/ia32/src/ia32.c
1,7 → 1,5
/*
* Copyright (c) 2001-2004 Jakub Jermar
* Copyright (c) 2009 Jiri Svoboda
* Copyright (c) 2009 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
40,12 → 38,9
 
#include <arch/pm.h>
 
#include <genarch/multiboot/multiboot.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <genarch/drivers/ega/ega.h>
#include <arch/drivers/ega.h>
#include <arch/drivers/vesa.h>
#include <genarch/drivers/i8042/i8042.h>
#include <genarch/kbrd/kbrd.h>
#include <genarch/kbd/i8042.h>
#include <arch/drivers/i8254.h>
#include <arch/drivers/i8259.h>
 
65,30 → 60,12
#include <proc/thread.h>
#include <syscall/syscall.h>
#include <console/console.h>
#include <sysinfo/sysinfo.h>
#include <arch/boot/boot.h>
#include <ddi/device.h>
 
#ifdef CONFIG_SMP
#include <arch/smp/apic.h>
#endif
 
/** Perform ia32-specific initialization before main_bsp() is called.
*
* @param signature Should contain the multiboot signature.
* @param mi Pointer to the multiboot information structure.
*/
void arch_pre_main(uint32_t signature, const multiboot_info_t *mi)
{
/* Parse multiboot information obtained from the bootloader. */
multiboot_info_parse(signature, mi);
#ifdef CONFIG_SMP
/* Copy AP bootstrap routines below 1 MB. */
memcpy((void *) AP_BOOT_OFFSET, (void *) BOOT_OFFSET,
(size_t) &_hardcoded_unmapped_size);
#endif
}
 
void arch_pre_mm_init(void)
{
pm_init();
110,17 → 87,13
/* hard clock */
i8254_init();
 
#ifdef CONFIG_FB
if (vesa_present())
if (vesa_present())
vesa_init();
else
#endif
#ifdef CONFIG_EGA
ega_init(EGA_BASE, EGA_VIDEORAM); /* video */
#else
{}
#endif
ega_init(); /* video */
/* Enable debugger */
debugger_init();
150,28 → 123,10
 
void arch_post_smp_init(void)
{
#ifdef CONFIG_PC_KBD
/*
* Initialize the i8042 controller. Then initialize the keyboard
* module and connect it to i8042. Enable keyboard interrupts.
*/
indev_t *kbrdin = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
if (kbrdin) {
kbrd_init(kbrdin);
trap_virtual_enable_irqs(1 << IRQ_KBD);
}
/*
* This is the necessary evil until the userspace driver is entirely
* self-sufficient.
*/
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
sysinfo_set_item_val("kbd.address.physical", NULL,
(uintptr_t) I8042_BASE);
sysinfo_set_item_val("kbd.address.kernel", NULL,
(uintptr_t) I8042_BASE);
#endif
devno_t kbd = device_assign_devno();
devno_t mouse = device_assign_devno();
/* keyboard controller */
i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
}
 
void calibrate_delay_loop(void)
204,38 → 159,15
*/
void arch_grab_console(void)
{
#ifdef CONFIG_FB
if (vesa_present())
vesa_redraw();
else
#endif
#ifdef CONFIG_EGA
ega_redraw();
#else
{}
#endif
i8042_grab();
}
 
/** Return console to userspace
*
*/
void arch_release_console(void)
{
i8042_release();
}
 
/** Construct function pointer
*
* @param fptr function pointer structure
* @param addr function address
* @param caller calling function address
*
* @return address of the function pointer
*
*/
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
return addr;
}
 
/** @}
*/
/branches/network/kernel/arch/ia32/src/ddi/ddi.c
156,7 → 156,7
* type must be changed to describe inactive TSS.
*/
gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
tr_load(gdtselector(TSS_DES));
tr_load(selector(TSS_DES));
/*
* Update the generation count so that faults caused by
/branches/network/kernel/arch/ia32/src/proc/scheduler.c
38,6 → 38,7
#include <proc/thread.h>
#include <arch.h>
#include <arch/context.h> /* SP_DELTA */
#include <arch/debugger.h>
#include <arch/pm.h>
#include <arch/asm.h>
#include <arch/ddi/ddi.h>
57,18 → 58,21
*/
void before_thread_runs_arch(void)
{
uintptr_t kstk = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
CPU->arch.tss->esp0 = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
SP_DELTA];
/* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */
write_msr(IA32_MSR_SYSENTER_ESP, kstk);
/* Set kernel stack for CPL3 -> CPL0 switch via interrupt */
CPU->arch.tss->esp0 = kstk;
CPU->arch.tss->ss0 = gdtselector(KDATA_DES);
CPU->arch.tss->ss0 = selector(KDATA_DES);
 
/* Set up TLS in GS register */
set_tls_desc(THREAD->arch.tls);
 
#ifdef CONFIG_DEBUG_AS_WATCHPOINT
/* Set watchpoint on AS to ensure that nobody sets it to zero */
if (CPU->id < BKPOINTS_MAX) {
the_t *the = THE;
breakpoint_add(&((the_t *) the->thread->kstack)->as,
BKPOINT_WRITE | BKPOINT_CHECK_ZERO, the->cpu->id);
}
#endif
}
 
void after_thread_ran_arch(void)
/branches/network/kernel/arch/ia32/src/interrupt.c
44,6 → 44,7
#include <mm/tlb.h>
#include <mm/as.h>
#include <arch.h>
#include <symtab.h>
#include <proc/thread.h>
#include <proc/task.h>
#include <synch/spinlock.h>
51,7 → 52,6
#include <ipc/sysipc.h>
#include <interrupt.h>
#include <ddi/irq.h>
#include <symtab.h>
 
/*
* Interrupt and exception dispatching.
63,9 → 63,10
 
void decode_istate(istate_t *istate)
{
char *symbol;
char *symbol = get_symtab_entry(istate->eip);
 
symbol = symtab_fmt_name_lookup(istate->eip);
if (!symbol)
symbol = "";
 
if (CPU)
printf("----------------EXCEPTION OCCURED (cpu%u)----------------\n", CPU->id);
76,6 → 77,9
printf("ERROR_WORD=%#lx\n", istate->error_word);
printf("%%cs=%#lx,flags=%#lx\n", istate->cs, istate->eflags);
printf("%%eax=%#lx, %%ecx=%#lx, %%edx=%#lx, %%esp=%p\n", istate->eax, istate->ecx, istate->edx, &istate->stack[0]);
#ifdef CONFIG_DEBUG_ALLREGS
printf("%%esi=%#lx, %%edi=%#lx, %%ebp=%#lx, %%ebx=%#lx\n", istate->esi, istate->edi, istate->ebp, istate->ebx);
#endif
printf("stack: %#lx, %#lx, %#lx, %#lx\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]);
printf(" %#lx, %#lx, %#lx, %#lx\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]);
}
85,16 → 89,16
if (eoi_function)
eoi_function();
else
panic("No eoi_function.");
panic("no eoi_function\n");
 
}
 
static void null_interrupt(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "Unserviced interrupt: %d.", n);
fault_if_from_uspace(istate, "unserviced interrupt: %d", n);
 
decode_istate(istate);
panic("Unserviced interrupt: %d.", n);
panic("unserviced interrupt: %d\n", n);
}
 
/** General Protection Fault. */
118,19 → 122,19
io_perm_bitmap_install();
return;
}
fault_if_from_uspace(istate, "General protection fault.");
fault_if_from_uspace(istate, "general protection fault");
}
 
decode_istate(istate);
panic("General protection fault.");
panic("general protection fault\n");
}
 
static void ss_fault(int n __attribute__((unused)), istate_t *istate)
{
fault_if_from_uspace(istate, "Stack fault.");
fault_if_from_uspace(istate, "stack fault");
 
decode_istate(istate);
panic("Stack fault.");
panic("stack fault\n");
}
 
static void simd_fp_exception(int n __attribute__((unused)), istate_t *istate)
137,15 → 141,15
{
uint32_t mxcsr;
asm (
"stmxcsr %[mxcsr]\n"
: [mxcsr] "=m" (mxcsr)
"stmxcsr %0;\n"
: "=m" (mxcsr)
);
fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zx.",
fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zx",
(unative_t) mxcsr);
 
decode_istate(istate);
printf("MXCSR: %#lx\n", mxcsr);
panic("SIMD FP exception(19).");
panic("SIMD FP exception(19)\n");
}
 
static void nm_fault(int n __attribute__((unused)), istate_t *istate __attribute__((unused)))
153,8 → 157,8
#ifdef CONFIG_FPU_LAZY
scheduler_fpu_lazy_request();
#else
fault_if_from_uspace(istate, "FPU fault.");
panic("FPU fault.");
fault_if_from_uspace(istate, "fpu fault");
panic("fpu fault");
#endif
}
 
187,7 → 191,7
trap_virtual_eoi();
ack = true;
}
irq->handler(irq);
irq->handler(irq, irq->arg);
spinlock_unlock(&irq->lock);
} else {
/*
229,7 → 233,7
if (enable_irqs_function)
enable_irqs_function(irqmask);
else
panic("No enable_irqs_function.");
panic("no enable_irqs_function\n");
}
 
void trap_virtual_disable_irqs(uint16_t irqmask)
237,7 → 241,7
if (disable_irqs_function)
disable_irqs_function(irqmask);
else
panic("No disable_irqs_function.");
panic("no disable_irqs_function\n");
}
 
/** @}
/branches/network/kernel/arch/ia32/src/cpu/cpu.c
42,23 → 42,22
#include <fpu_context.h>
 
#include <arch/smp/apic.h>
#include <arch/syscall.h>
 
/*
* Identification of CPUs.
* Contains only non-MP-Specification specific SMP code.
*/
#define AMD_CPUID_EBX 0x68747541
#define AMD_CPUID_ECX 0x444d4163
#define AMD_CPUID_EDX 0x69746e65
#define AMD_CPUID_EBX 0x68747541
#define AMD_CPUID_ECX 0x444d4163
#define AMD_CPUID_EDX 0x69746e65
 
#define INTEL_CPUID_EBX 0x756e6547
#define INTEL_CPUID_ECX 0x6c65746e
#define INTEL_CPUID_EDX 0x49656e69
#define INTEL_CPUID_EBX 0x756e6547
#define INTEL_CPUID_ECX 0x6c65746e
#define INTEL_CPUID_EDX 0x49656e69
 
 
enum vendor {
VendorUnknown = 0,
VendorUnknown=0,
VendorAMD,
VendorIntel
};
65,17 → 64,19
 
static char *vendor_str[] = {
"Unknown Vendor",
"AMD",
"Intel"
"AuthenticAMD",
"GenuineIntel"
};
 
void fpu_disable(void)
{
asm volatile (
"mov %%cr0, %%eax\n"
"or $8, %%eax\n"
"mov %%eax, %%cr0\n"
::: "%eax"
"mov %%cr0,%%eax;"
"or $8,%%eax;"
"mov %%eax,%%cr0;"
:
:
:"%eax"
);
}
 
82,11 → 83,13
void fpu_enable(void)
{
asm volatile (
"mov %%cr0, %%eax\n"
"and $0xffFFffF7, %%eax\n"
"mov %%eax,%%cr0\n"
::: "%eax"
);
"mov %%cr0,%%eax;"
"and $0xffFFffF7,%%eax;"
"mov %%eax,%%cr0;"
:
:
:"%eax"
);
}
 
void cpu_arch_init(void)
98,11 → 101,11
CPU->arch.tss = tss_p;
CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((uint8_t *) CPU->arch.tss);
 
CPU->fpu_owner = NULL;
 
cpuid(1, &info);
 
fi.word = info.cpuid_edx;
efi.word = info.cpuid_ecx;
109,20 → 112,17
if (fi.bits.fxsr)
fpu_fxsr();
else
fpu_fsr();
fpu_fsr();
if (fi.bits.sse) {
asm volatile (
"mov %%cr4, %[help]\n"
"or %[mask], %[help]\n"
"mov %[help], %%cr4\n"
: [help] "+r" (help)
: [mask] "i" (CR4_OSFXSR_MASK | (1 << 10))
"mov %%cr4,%0\n"
"or %1,%0\n"
"mov %0,%%cr4\n"
: "+r" (help)
: "i" (CR4_OSFXSR_MASK|(1<<10))
);
}
/* Setup fast SYSENTER/SYSEXIT syscalls */
syscall_setup_cpu();
}
 
void cpu_identify(void)
136,31 → 136,29
/*
* Check for AMD processor.
*/
if ((info.cpuid_ebx == AMD_CPUID_EBX)
&& (info.cpuid_ecx == AMD_CPUID_ECX)
&& (info.cpuid_edx == AMD_CPUID_EDX))
if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
CPU->arch.vendor = VendorAMD;
}
 
/*
* Check for Intel processor.
*/
if ((info.cpuid_ebx == INTEL_CPUID_EBX)
&& (info.cpuid_ecx == INTEL_CPUID_ECX)
&& (info.cpuid_edx == INTEL_CPUID_EDX))
if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
CPU->arch.vendor = VendorIntel;
}
cpuid(1, &info);
CPU->arch.family = (info.cpuid_eax >> 8) & 0x0f;
CPU->arch.model = (info.cpuid_eax >> 4) & 0x0f;
CPU->arch.stepping = (info.cpuid_eax >> 0) & 0x0f;
CPU->arch.family = (info.cpuid_eax>>8)&0xf;
CPU->arch.model = (info.cpuid_eax>>4)&0xf;
CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;
}
}
 
void cpu_print_report(cpu_t* cpu)
void cpu_print_report(cpu_t* m)
{
printf("cpu%u: (%s family=%u model=%u stepping=%u) %" PRIu16 " MHz\n",
cpu->id, vendor_str[cpu->arch.vendor], cpu->arch.family,
cpu->arch.model, cpu->arch.stepping, cpu->frequency_mhz);
printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
m->frequency_mhz);
}
 
/** @}
/branches/network/kernel/arch/ia32/src/fpu_context.c
44,43 → 44,46
static void fpu_context_f_save(fpu_context_t *fctx)
{
asm volatile (
"fnsave %[fctx]"
: [fctx] "=m" (*fctx)
);
"fnsave %0"
: "=m"(*fctx)
);
}
 
static void fpu_context_f_restore(fpu_context_t *fctx)
{
asm volatile (
"frstor %[fctx]"
: [fctx] "=m" (*fctx)
);
"frstor %0"
: "=m"(*fctx)
);
}
 
static void fpu_context_fx_save(fpu_context_t *fctx)
{
asm volatile (
"fxsave %[fctx]"
: [fctx] "=m" (*fctx)
);
"fxsave %0"
: "=m"(*fctx)
);
}
 
static void fpu_context_fx_restore(fpu_context_t *fctx)
{
asm volatile (
"fxrstor %[fctx]"
: [fctx] "=m" (*fctx)
);
"fxrstor %0"
: "=m"(*fctx)
);
}
 
/* Setup using fxsr instruction */
/*
Setup using fxsr instruction
*/
void fpu_fxsr(void)
{
fpu_save=fpu_context_fx_save;
fpu_restore=fpu_context_fx_restore;
}
 
/* Setup using not fxsr instruction */
/*
Setup using not fxsr instruction
*/
void fpu_fsr(void)
{
fpu_save = fpu_context_f_save;
99,18 → 102,16
 
void fpu_init()
{
uint32_t help0 = 0;
uint32_t help1 = 0;
uint32_t help0 = 0, help1 = 0;
asm volatile (
"fninit\n"
"stmxcsr %[help0]\n"
"mov %[help0], %[help1]\n"
"or %[magic], %[help1]\n"
"mov %[help1], %[help0]\n"
"ldmxcsr %[help0]\n"
: [help0] "+m" (help0), [help1] "+r" (help1)
: [magic] "i" (0x1f80)
"fninit;\n"
"stmxcsr %0\n"
"mov %0,%1;\n"
"or %2,%1;\n"
"mov %1,%0;\n"
"ldmxcsr %0;\n"
: "+m" (help0), "+r" (help1)
: "i" (0x1f80)
);
}
 
/branches/network/kernel/arch/ia32/_link.ld.in
1,11 → 1,11
/** IA-32 linker script
*
*
* umapped section:
* kernel text
* kernel data
* kernel text
* kernel data
* mapped section:
* kernel text
* kernel data
* kernel text
* kernel data
*/
 
#include <arch/boot/boot.h>
28,9 → 28,9
ktext_end = .;
kdata_start = .;
*(.data); /* initialized data */
*(.rodata*); /* string literals */
*(COMMON); /* global variables */
*(.data); /* initialized data */
*(.rodata*); /* string literals */
*(COMMON); /* global variables */
hardcoded_load_address = .;
LONG(PA2KA(BOOT_OFFSET));
hardcoded_ktext_size = .;
42,23 → 42,23
hardcoded_unmapped_kdata_size = .;
LONG(unmapped_kdata_end - unmapped_kdata_start);
symbol_table = .;
*(symtab.*); /* Symbol table, must be LAST symbol! */
*(.bss); /* uninitialized static variables */
*(symtab.*); /* Symbol table, must be LAST symbol! */
*(.bss); /* uninitialized static variables */
kdata_end = .;
}
 
/DISCARD/ : {
*(.note.GNU-stack);
*(.note.GNU-stack);
*(.comment);
}
#ifdef CONFIG_SMP
#ifdef CONFIG_SMP
_hardcoded_unmapped_size = (unmapped_ktext_end - unmapped_ktext_start) + (unmapped_kdata_end - unmapped_kdata_start);
ap_boot = unmapped_ap_boot - BOOT_OFFSET + AP_BOOT_OFFSET;
ap_gdtr = unmapped_ap_gdtr - BOOT_OFFSET + AP_BOOT_OFFSET;
protected_ap_gdtr = PA2KA(ap_gdtr);
 
#endif /* CONFIG_SMP */
 
}
/branches/network/kernel/arch/amd64/include/atomic.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup amd64
/** @addtogroup amd64
* @{
*/
/** @file
41,29 → 41,17
 
static inline void atomic_inc(atomic_t *val) {
#ifdef CONFIG_SMP
asm volatile (
"lock incq %[count]\n"
: [count] "+m" (val->count)
);
asm volatile ("lock incq %0\n" : "+m" (val->count));
#else
asm volatile (
"incq %[count]\n"
: [count] "+m" (val->count)
);
asm volatile ("incq %0\n" : "+m" (val->count));
#endif /* CONFIG_SMP */
}
 
static inline void atomic_dec(atomic_t *val) {
#ifdef CONFIG_SMP
asm volatile (
"lock decq %[count]\n"
: [count] "+m" (val->count)
);
asm volatile ("lock decq %0\n" : "+m" (val->count));
#else
asm volatile (
"decq %[count]\n"
: [count] "+m" (val->count)
);
asm volatile ("decq %0\n" : "+m" (val->count));
#endif /* CONFIG_SMP */
}
 
70,12 → 58,12
static inline long atomic_postinc(atomic_t *val)
{
long r = 1;
 
asm volatile (
"lock xaddq %[r], %[count]\n"
: [count] "+m" (val->count), [r] "+r" (r)
"lock xaddq %1, %0\n"
: "+m" (val->count), "+r" (r)
);
 
return r;
}
 
84,23 → 72,23
long r = -1;
asm volatile (
"lock xaddq %[r], %[count]\n"
: [count] "+m" (val->count), [r] "+r" (r)
"lock xaddq %1, %0\n"
: "+m" (val->count), "+r" (r)
);
return r;
}
 
#define atomic_preinc(val) (atomic_postinc(val) + 1)
#define atomic_predec(val) (atomic_postdec(val) - 1)
#define atomic_preinc(val) (atomic_postinc(val) + 1)
#define atomic_predec(val) (atomic_postdec(val) - 1)
 
static inline uint64_t test_and_set(atomic_t *val) {
uint64_t v;
asm volatile (
"movq $1, %[v]\n"
"xchgq %[v], %[count]\n"
: [v] "=r" (v), [count] "+m" (val->count)
"movq $1, %0\n"
"xchgq %0, %1\n"
: "=r" (v), "+m" (val->count)
);
return v;
111,7 → 99,7
static inline void atomic_lock_arch(atomic_t *val)
{
uint64_t tmp;
 
preemption_disable();
asm volatile (
"0:\n"
118,15 → 106,15
#ifdef CONFIG_HT
"pause\n"
#endif
"mov %[count], %[tmp]\n"
"testq %[tmp], %[tmp]\n"
"mov %0, %1\n"
"testq %1, %1\n"
"jnz 0b\n" /* lightweight looping on locked spinlock */
"incq %[tmp]\n" /* now use the atomic operation */
"xchgq %[count], %[tmp]\n"
"testq %[tmp], %[tmp]\n"
"incq %1\n" /* now use the atomic operation */
"xchgq %0, %1\n"
"testq %1, %1\n"
"jnz 0b\n"
: [count] "+m" (val->count), [tmp] "=&r" (tmp)
: "+m" (val->count), "=&r" (tmp)
);
/*
* Prevent critical section code from bleeding out this way up.
/branches/network/kernel/arch/amd64/include/mm/frame.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup amd64mm
/** @addtogroup amd64mm
* @{
*/
/** @file
39,8 → 39,8
#include <arch/types.h>
#endif /* __ASM__ */
 
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
#ifndef __ASM__
extern uintptr_t last_frame;
/branches/network/kernel/arch/amd64/include/mm/tlb.h
35,6 → 35,9
#ifndef KERN_amd64_TLB_H_
#define KERN_amd64_TLB_H_
 
#define tlb_arch_init()
#define tlb_print()
 
#endif
 
/** @}
/branches/network/kernel/arch/amd64/include/types.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup amd64
/** @addtogroup amd64
* @{
*/
/** @file
57,9 → 57,6
typedef uint64_t unative_t;
typedef int64_t native_t;
 
typedef struct {
} fncptr_t;
 
/**< Formats for uintptr_t, size_t, count_t and index_t */
#define PRIp "llx"
#define PRIs "llu"
/branches/network/kernel/arch/amd64/include/cpu.h
35,9 → 35,9
#ifndef KERN_amd64_CPU_H_
#define KERN_amd64_CPU_H_
 
#define RFLAGS_IF (1 << 9)
#define RFLAGS_DF (1 << 10)
#define RFLAGS_RF (1 << 16)
#define RFLAGS_IF (1 << 9)
#define RFLAGS_DF (1 << 10)
#define RFLAGS_RF (1 << 16)
 
#define EFER_MSR_NUM 0xc0000080
#define AMD_SCE_FLAG 0
62,15 → 62,17
int family;
int model;
int stepping;
tss_t *tss;
struct tss *tss;
count_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */
count_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */
} cpu_arch_t;
 
struct star_msr {
};
 
struct lstar_msr {
};
 
extern void set_efer_flag(int flag);
/branches/network/kernel/arch/amd64/include/interrupt.h
71,6 → 71,7
/** This is passed to interrupt handlers */
typedef struct {
uint64_t rax;
uint64_t rbx;
uint64_t rcx;
uint64_t rdx;
uint64_t rsi;
79,6 → 80,11
uint64_t r9;
uint64_t r10;
uint64_t r11;
uint64_t r12;
uint64_t r13;
uint64_t r14;
uint64_t r15;
uint64_t rbp;
uint64_t error_word;
uint64_t rip;
uint64_t cs;
/branches/network/kernel/arch/amd64/include/asm.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup amd64
/** @addtogroup amd64
* @{
*/
/** @file
36,8 → 36,6
#define KERN_amd64_ASM_H_
 
#include <config.h>
#include <arch/types.h>
#include <typedefs.h>
 
extern void asm_delay_loop(uint32_t t);
extern void asm_fake_loop(uint32_t t);
47,17 → 45,12
* Return the base address of the current stack.
* The stack is assumed to be STACK_SIZE bytes long.
* The stack must start on page boundary.
*
*/
static inline uintptr_t get_stack_base(void)
{
uintptr_t v;
asm volatile (
"andq %%rsp, %[v]\n"
: [v] "=r" (v)
: "0" (~((uint64_t) STACK_SIZE-1))
);
asm volatile ("andq %%rsp, %0\n" : "=r" (v) : "0" (~((uint64_t)STACK_SIZE-1)));
return v;
}
69,11 → 62,7
 
static inline void cpu_halt(void)
{
asm volatile (
"0:\n"
" hlt\n"
" jmp 0b\n"
);
asm volatile ("hlt\n");
}
 
 
83,63 → 72,15
*
* @param port Port to read from
* @return Value read
*
*/
static inline uint8_t pio_read_8(ioport8_t *port)
static inline uint8_t inb(uint16_t port)
{
uint8_t val;
asm volatile (
"inb %w[port], %b[val]\n"
: [val] "=a" (val)
: [port] "d" (port)
);
return val;
}
 
/** Word from port
*
* Get word from port
*
* @param port Port to read from
* @return Value read
*
*/
static inline uint16_t pio_read_16(ioport16_t *port)
{
uint16_t val;
asm volatile (
"inw %w[port], %w[val]\n"
: [val] "=a" (val)
: [port] "d" (port)
);
asm volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port));
return val;
}
 
/** Double word from port
*
* Get double word from port
*
* @param port Port to read from
* @return Value read
*
*/
static inline uint32_t pio_read_32(ioport32_t *port)
{
uint32_t val;
asm volatile (
"inl %w[port], %[val]\n"
: [val] "=a" (val)
: [port] "d" (port)
);
return val;
}
 
/** Byte to port
*
* Output byte to port
146,48 → 87,12
*
* @param port Port to write to
* @param val Value to write
*
*/
static inline void pio_write_8(ioport8_t *port, uint8_t val)
static inline void outb(uint16_t port, uint8_t val)
{
asm volatile (
"outb %b[val], %w[port]\n"
:: [val] "a" (val), [port] "d" (port)
);
asm volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port));
}
 
/** Word to port
*
* Output word to port
*
* @param port Port to write to
* @param val Value to write
*
*/
static inline void pio_write_16(ioport16_t *port, uint16_t val)
{
asm volatile (
"outw %w[val], %w[port]\n"
:: [val] "a" (val), [port] "d" (port)
);
}
 
/** Double word to port
*
* Output double word to port
*
* @param port Port to write to
* @param val Value to write
*
*/
static inline void pio_write_32(ioport32_t *port, uint32_t val)
{
asm volatile (
"outl %[val], %w[port]\n"
:: [val] "a" (val), [port] "d" (port)
);
}
 
/** Swap Hidden part of GS register with visible one */
static inline void swapgs(void)
{
200,18 → 105,15
* value of EFLAGS.
*
* @return Old interrupt priority level.
*
*/
static inline ipl_t interrupts_enable(void) {
ipl_t v;
asm volatile (
__asm__ volatile (
"pushfq\n"
"popq %[v]\n"
"popq %0\n"
"sti\n"
: [v] "=r" (v)
: "=r" (v)
);
return v;
}
 
221,18 → 123,15
* value of EFLAGS.
*
* @return Old interrupt priority level.
*
*/
static inline ipl_t interrupts_disable(void) {
ipl_t v;
asm volatile (
__asm__ volatile (
"pushfq\n"
"popq %[v]\n"
"popq %0\n"
"cli\n"
: [v] "=r" (v)
);
: "=r" (v)
);
return v;
}
 
241,14 → 140,13
* Restore EFLAGS.
*
* @param ipl Saved interrupt priority level.
*
*/
static inline void interrupts_restore(ipl_t ipl) {
asm volatile (
"pushq %[ipl]\n"
__asm__ volatile (
"pushq %0\n"
"popfq\n"
:: [ipl] "r" (ipl)
);
: : "r" (ipl)
);
}
 
/** Return interrupt priority level.
256,17 → 154,14
* Return EFLAFS.
*
* @return Current interrupt priority level.
*
*/
static inline ipl_t interrupts_read(void) {
ipl_t v;
asm volatile (
__asm__ volatile (
"pushfq\n"
"popq %[v]\n"
: [v] "=r" (v)
"popq %0\n"
: "=r" (v)
);
return v;
}
 
273,25 → 168,21
/** Write to MSR */
static inline void write_msr(uint32_t msr, uint64_t value)
{
asm volatile (
"wrmsr\n"
:: "c" (msr),
"a" ((uint32_t) (value)),
"d" ((uint32_t) (value >> 32))
);
__asm__ volatile (
"wrmsr;" : : "c" (msr),
"a" ((uint32_t)(value)),
"d" ((uint32_t)(value >> 32))
);
}
 
static inline unative_t read_msr(uint32_t msr)
{
uint32_t ax, dx;
asm volatile (
"rdmsr\n"
: "=a" (ax), "=d" (dx)
: "c" (msr)
);
return ((uint64_t) dx << 32) | ax;
 
__asm__ volatile (
"rdmsr;" : "=a"(ax), "=d"(dx) : "c" (msr)
);
return ((uint64_t)dx << 32) | ax;
}
 
 
298,29 → 189,29
/** Enable local APIC
*
* Enable local APIC in MSR.
*
*/
static inline void enable_l_apic_in_msr()
{
asm volatile (
__asm__ volatile (
"movl $0x1b, %%ecx\n"
"rdmsr\n"
"orl $(1 << 11),%%eax\n"
"orl $(1<<11),%%eax\n"
"orl $(0xfee00000),%%eax\n"
"wrmsr\n"
::: "%eax","%ecx","%edx"
);
:
:
:"%eax","%ecx","%edx"
);
}
 
static inline uintptr_t * get_ip()
{
uintptr_t *ip;
asm volatile (
"mov %%rip, %[ip]"
: [ip] "=r" (ip)
);
 
__asm__ volatile (
"mov %%rip, %0"
: "=r" (ip)
);
return ip;
}
 
327,84 → 218,59
/** Invalidate TLB Entry.
*
* @param addr Address on a page whose TLB entry is to be invalidated.
*
*/
static inline void invlpg(uintptr_t addr)
{
asm volatile (
"invlpg %[addr]\n"
:: [addr] "m" (*((unative_t *) addr))
);
__asm__ volatile ("invlpg %0\n" :: "m" (*((unative_t *)addr)));
}
 
/** Load GDTR register from memory.
*
* @param gdtr_reg Address of memory from where to load GDTR.
*
*/
static inline void gdtr_load(ptr_16_64_t *gdtr_reg)
static inline void gdtr_load(struct ptr_16_64 *gdtr_reg)
{
asm volatile (
"lgdtq %[gdtr_reg]\n"
:: [gdtr_reg] "m" (*gdtr_reg)
);
__asm__ volatile ("lgdtq %0\n" : : "m" (*gdtr_reg));
}
 
/** Store GDTR register to memory.
*
* @param gdtr_reg Address of memory to where to load GDTR.
*
*/
static inline void gdtr_store(ptr_16_64_t *gdtr_reg)
static inline void gdtr_store(struct ptr_16_64 *gdtr_reg)
{
asm volatile (
"sgdtq %[gdtr_reg]\n"
:: [gdtr_reg] "m" (*gdtr_reg)
);
__asm__ volatile ("sgdtq %0\n" : : "m" (*gdtr_reg));
}
 
/** Load IDTR register from memory.
*
* @param idtr_reg Address of memory from where to load IDTR.
*
*/
static inline void idtr_load(ptr_16_64_t *idtr_reg)
static inline void idtr_load(struct ptr_16_64 *idtr_reg)
{
asm volatile (
"lidtq %[idtr_reg]\n"
:: [idtr_reg] "m" (*idtr_reg));
__asm__ volatile ("lidtq %0\n" : : "m" (*idtr_reg));
}
 
/** Load TR from descriptor table.
*
* @param sel Selector specifying descriptor of TSS segment.
*
*/
static inline void tr_load(uint16_t sel)
{
asm volatile (
"ltr %[sel]"
:: [sel] "r" (sel)
);
__asm__ volatile ("ltr %0" : : "r" (sel));
}
 
#define GEN_READ_REG(reg) static inline unative_t read_ ##reg (void) \
{ \
unative_t res; \
asm volatile ( \
"movq %%" #reg ", %[res]" \
: [res] "=r" (res) \
); \
return res; \
}
{ \
unative_t res; \
__asm__ volatile ("movq %%" #reg ", %0" : "=r" (res) ); \
return res; \
}
 
#define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \
{ \
asm volatile ( \
"movq %[regn], %%" #reg \
:: [regn] "r" (regn) \
); \
}
{ \
__asm__ volatile ("movq %0, %%" #reg : : "r" (regn)); \
}
 
GEN_READ_REG(cr0)
GEN_READ_REG(cr2)
/branches/network/kernel/arch/amd64/include/pm.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup amd64
/** @addtogroup amd64
* @{
*/
/** @file
36,60 → 36,63
#define KERN_amd64_PM_H_
 
#ifndef __ASM__
#include <arch/types.h>
#include <arch/context.h>
# include <arch/types.h>
# include <arch/context.h>
#endif
 
#define IDT_ITEMS 64
#define GDT_ITEMS 8
#define IDT_ITEMS 64
#define GDT_ITEMS 8
 
 
#define NULL_DES 0
/* Warning: Do not reorder the following items, unless you look into syscall.c! */
#define KTEXT_DES 1
#define KDATA_DES 2
#define UDATA_DES 3
#define UTEXT_DES 4
#define KTEXT32_DES 5
/* End of warning */
#define TSS_DES 6
#define NULL_DES 0
/* Warning: Do not reorder next items, unless you look into syscall.c!!! */
#define KTEXT_DES 1
#define KDATA_DES 2
#define UDATA_DES 3
#define UTEXT_DES 4
#define KTEXT32_DES 5
/* EndOfWarning */
#define TSS_DES 6
 
 
 
#ifdef CONFIG_FB
 
#define VESA_INIT_DES 8
#define VESA_INIT_SEGMENT 0x8000
#define VESA_INIT_DES 8
#define VESA_INIT_SEGMENT 0x8000
#undef GDT_ITEMS
#define GDT_ITEMS 9
 
#undef GDT_ITEMS
#define GDT_ITEMS 9
#endif /*CONFIG_FB*/
 
#endif /* CONFIG_FB */
 
#define gdtselector(des) ((des) << 3)
#define idtselector(des) ((des) << 4)
 
#define PL_KERNEL 0
#define PL_USER 3
#define gdtselector(des) ((des) << 3)
#define idtselector(des) ((des) << 4)
 
#define AR_PRESENT ( 1 << 7)
#define AR_DATA (2 << 3)
#define AR_CODE (3 << 3)
#define AR_WRITABLE (1 << 1)
#define AR_READABLE (1 << 1)
#define AR_TSS (0x09)
#define AR_INTERRUPT (0x0e)
#define AR_TRAP (0x0f)
#define PL_KERNEL 0
#define PL_USER 3
 
#define DPL_KERNEL (PL_KERNEL << 5)
#define DPL_USER (PL_USER << 5)
#define AR_PRESENT (1<<7)
#define AR_DATA (2<<3)
#define AR_CODE (3<<3)
#define AR_WRITABLE (1<<1)
#define AR_READABLE (1<<1)
#define AR_TSS (0x9)
#define AR_INTERRUPT (0xe)
#define AR_TRAP (0xf)
 
#define TSS_BASIC_SIZE 104
#define TSS_IOMAP_SIZE (16 * 1024 + 1) /* 16K for bitmap + 1 terminating byte for convenience */
#define DPL_KERNEL (PL_KERNEL<<5)
#define DPL_USER (PL_USER<<5)
 
#define IO_PORTS (64 * 1024)
#define TSS_BASIC_SIZE 104
#define TSS_IOMAP_SIZE (16*1024+1) /* 16K for bitmap + 1 terminating byte for convenience */
 
#define IO_PORTS (64*1024)
 
#ifndef __ASM__
 
typedef struct {
struct descriptor {
unsigned limit_0_15: 16;
unsigned base_0_15: 16;
unsigned base_16_23: 8;
100,9 → 103,10
unsigned special: 1;
unsigned granularity : 1;
unsigned base_24_31: 8;
} __attribute__ ((packed)) descriptor_t;
} __attribute__ ((packed));
typedef struct descriptor descriptor_t;
 
typedef struct {
struct tss_descriptor {
unsigned limit_0_15: 16;
unsigned base_0_15: 16;
unsigned base_16_23: 8;
117,9 → 121,10
unsigned base_24_31: 8;
unsigned base_32_63 : 32;
unsigned : 32;
} __attribute__ ((packed)) tss_descriptor_t;
} __attribute__ ((packed));
typedef struct tss_descriptor tss_descriptor_t;
 
typedef struct {
struct idescriptor {
unsigned offset_0_15: 16;
unsigned selector: 16;
unsigned ist:3;
130,19 → 135,22
unsigned offset_16_31: 16;
unsigned offset_32_63: 32;
unsigned : 32;
} __attribute__ ((packed)) idescriptor_t;
} __attribute__ ((packed));
typedef struct idescriptor idescriptor_t;
 
typedef struct {
struct ptr_16_64 {
uint16_t limit;
uint64_t base;
} __attribute__ ((packed)) ptr_16_64_t;
} __attribute__ ((packed));
typedef struct ptr_16_64 ptr_16_64_t;
 
typedef struct {
struct ptr_16_32 {
uint16_t limit;
uint32_t base;
} __attribute__ ((packed)) ptr_16_32_t;
} __attribute__ ((packed));
typedef struct ptr_16_32 ptr_16_32_t;
 
typedef struct {
struct tss {
uint32_t reserve1;
uint64_t rsp0;
uint64_t rsp1;
159,7 → 167,8
uint16_t reserve4;
uint16_t iomap_base;
uint8_t iomap[TSS_IOMAP_SIZE];
} __attribute__ ((packed)) tss_t;
} __attribute__ ((packed));
typedef struct tss tss_t;
 
extern tss_t *tss_p;
 
/branches/network/kernel/arch/amd64/include/syscall.h
35,6 → 35,8
#ifndef KERN_amd64_SYSCALL_H_
#define KERN_amd64_SYSCALL_H_
 
#include <arch/types.h>
 
extern void syscall_setup_cpu(void);
 
#endif
/branches/network/kernel/arch/amd64/include/boot/boot.h
42,17 → 42,8
#define MULTIBOOT_HEADER_MAGIC 0x1BADB002
#define MULTIBOOT_HEADER_FLAGS 0x00010003
 
#ifndef __ASM__
#define MULTIBOOT_LOADER_MAGIC 0x2BADB002
 
#ifdef CONFIG_SMP
 
/* This is only a symbol so the type is dummy. Obtain the value using &. */
extern int _hardcoded_unmapped_size;
 
#endif /* CONFIG_SMP */
 
#endif /* __ASM__ */
 
#endif
 
/** @}
/branches/network/kernel/arch/amd64/include/arch.h
35,10 → 35,6
#ifndef KERN_amd64_ARCH_H_
#define KERN_amd64_ARCH_H_
 
#include <genarch/multiboot/multiboot.h>
 
extern void arch_pre_main(uint32_t, const multiboot_info_t *);
 
#endif
 
/** @}
/branches/network/kernel/arch/amd64/include/drivers/vesa.h
0,0 → 1,44
/*
* Copyright (c) 2006-2006 Jakub Vana
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup amd64
* @{
*/
/** @file
*/
 
#ifndef KERN_amd64_VESA_H_
#define KERN_amd64_VESA_H_
 
int vesa_present(void);
void vesa_init(void);
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/amd64/include/drivers/i8254.h
0,0 → 1,0
link ../../../ia32/include/drivers/i8254.h
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/amd64/include/drivers/i8259.h
0,0 → 1,0
link ../../../ia32/include/drivers/i8259.h
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/amd64/include/drivers/ega.h
0,0 → 1,0
link ../../../ia32/include/drivers/ega.h
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/amd64/include/drivers/i8042.h
0,0 → 1,0
link ../../../ia32/include/drivers/i8042.h
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/amd64/Makefile.inc
29,6 → 29,10
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
BFD_NAME = elf64-x86-64
BFD_ARCH = i386:x86-64
BFD = binary
41,50 → 45,83
ICC_CFLAGS += $(CMN1)
SUNCC_CFLAGS += -m64 -xmodel=kernel
 
DEFS += -D__64_BITS__
DEFS += -DMACHINE=$(MACHINE) -D__64_BITS__
 
## Accepted CPUs
#
 
ifeq ($(PROCESSOR),opteron)
ifeq ($(MACHINE),opteron)
CMN2 := -march=opteron
GCC_CFLAGS += $(CMN2)
ICC_CFLAGS += $(CMN2)
SUNCC_CFLAGS += -xtarget=opteron
DEFS += -DFENCES=p4
endif
 
## Own configuration directives
#
 
CONFIG_ACPI = y
 
## Compile with hierarchical page tables support.
#
 
CONFIG_PAGE_PT = y
DEFS += -DCONFIG_PAGE_PT
 
## Compile with i8042 support.
#
 
CONFIG_I8042 = y
DEFS += -DCONFIG_I8042
 
## Accepted configuration directives
#
 
ifeq ($(CONFIG_SMP),y)
DEFS += -DCONFIG_SMP
endif
ifeq ($(CONFIG_HT),y)
DEFS += -DCONFIG_HT
endif
 
ifeq ($(CONFIG_SIMICS_FIX),y)
DEFS += -DCONFIG_SIMICS_FIX
endif
 
ARCH_SOURCES = \
arch/$(KARCH)/src/fpu_context.c \
arch/$(KARCH)/src/boot/boot.S \
arch/$(KARCH)/src/boot/memmap.c \
arch/$(KARCH)/src/pm.c \
arch/$(KARCH)/src/context.S \
arch/$(KARCH)/src/ddi/ddi.c \
arch/$(KARCH)/src/drivers/vesa.c \
arch/$(KARCH)/src/drivers/i8254.c \
arch/$(KARCH)/src/drivers/i8259.c \
arch/$(KARCH)/src/delay.S \
arch/$(KARCH)/src/amd64.c \
arch/$(KARCH)/src/bios/bios.c \
arch/$(KARCH)/src/interrupt.c \
arch/$(KARCH)/src/mm/as.c \
arch/$(KARCH)/src/mm/frame.c \
arch/$(KARCH)/src/mm/page.c \
arch/$(KARCH)/src/mm/tlb.c \
arch/$(KARCH)/src/asm_utils.S \
arch/$(KARCH)/src/cpu/cpu.c \
arch/$(KARCH)/src/proc/scheduler.c \
arch/$(KARCH)/src/proc/task.c \
arch/$(KARCH)/src/proc/thread.c \
arch/$(KARCH)/src/userspace.c \
arch/$(KARCH)/src/syscall.c \
arch/$(KARCH)/src/debugger.c
arch/$(ARCH)/src/fpu_context.c \
arch/$(ARCH)/src/boot/boot.S \
arch/$(ARCH)/src/boot/memmap.c \
arch/$(ARCH)/src/pm.c \
arch/$(ARCH)/src/context.S \
arch/$(ARCH)/src/ddi/ddi.c \
arch/$(ARCH)/src/drivers/ega.c \
arch/$(ARCH)/src/drivers/vesa.c \
arch/$(ARCH)/src/drivers/i8254.c \
arch/$(ARCH)/src/drivers/i8259.c \
arch/$(ARCH)/src/delay.S \
arch/$(ARCH)/src/amd64.c \
arch/$(ARCH)/src/bios/bios.c \
arch/$(ARCH)/src/interrupt.c \
arch/$(ARCH)/src/mm/as.c \
arch/$(ARCH)/src/mm/frame.c \
arch/$(ARCH)/src/mm/page.c \
arch/$(ARCH)/src/mm/tlb.c \
arch/$(ARCH)/src/asm_utils.S \
arch/$(ARCH)/src/cpu/cpu.c \
arch/$(ARCH)/src/proc/scheduler.c \
arch/$(ARCH)/src/proc/task.c \
arch/$(ARCH)/src/proc/thread.c \
arch/$(ARCH)/src/userspace.c \
arch/$(ARCH)/src/syscall.c \
arch/$(ARCH)/src/debugger.c
 
ifeq ($(CONFIG_SMP),y)
ARCH_SOURCES += \
arch/$(KARCH)/src/smp/ap.S \
arch/$(KARCH)/src/smp/apic.c \
arch/$(KARCH)/src/smp/ipi.c \
arch/$(KARCH)/src/smp/mps.c \
arch/$(KARCH)/src/smp/smp.c
arch/$(ARCH)/src/smp/ap.S \
arch/$(ARCH)/src/smp/apic.c \
arch/$(ARCH)/src/smp/ipi.c \
arch/$(ARCH)/src/smp/mps.c \
arch/$(ARCH)/src/smp/smp.c
endif
/branches/network/kernel/arch/amd64/src/asm_utils.S
26,17 → 26,23
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#define IREGISTER_SPACE 72
#define IREGISTER_SPACE 120
 
#define IOFFSET_RAX 0x0
#define IOFFSET_RCX 0x8
#define IOFFSET_RDX 0x10
#define IOFFSET_RSI 0x18
#define IOFFSET_RDI 0x20
#define IOFFSET_R8 0x28
#define IOFFSET_R9 0x30
#define IOFFSET_R10 0x38
#define IOFFSET_R11 0x40
#define IOFFSET_RAX 0x0
#define IOFFSET_RBX 0x8
#define IOFFSET_RCX 0x10
#define IOFFSET_RDX 0x18
#define IOFFSET_RSI 0x20
#define IOFFSET_RDI 0x28
#define IOFFSET_R8 0x30
#define IOFFSET_R9 0x38
#define IOFFSET_R10 0x40
#define IOFFSET_R11 0x48
#define IOFFSET_R12 0x50
#define IOFFSET_R13 0x58
#define IOFFSET_R14 0x60
#define IOFFSET_R15 0x68
#define IOFFSET_RBP 0x70
 
# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
# and 1 means interrupt with error word
167,7 → 173,7
rdmsr
ret
 
# Push all volatile general purpose registers on stack
# Push all general purpose registers on stack except %rbp, %rsp
.macro save_all_gpr
movq %rax, IOFFSET_RAX(%rsp)
movq %rcx, IOFFSET_RCX(%rsp)
178,6 → 184,14
movq %r9, IOFFSET_R9(%rsp)
movq %r10, IOFFSET_R10(%rsp)
movq %r11, IOFFSET_R11(%rsp)
#ifdef CONFIG_DEBUG_ALLREGS
movq %rbx, IOFFSET_RBX(%rsp)
movq %rbp, IOFFSET_RBP(%rsp)
movq %r12, IOFFSET_R12(%rsp)
movq %r13, IOFFSET_R13(%rsp)
movq %r14, IOFFSET_R14(%rsp)
movq %r15, IOFFSET_R15(%rsp)
#endif
.endm
 
.macro restore_all_gpr
190,9 → 204,21
movq IOFFSET_R9(%rsp), %r9
movq IOFFSET_R10(%rsp), %r10
movq IOFFSET_R11(%rsp), %r11
#ifdef CONFIG_DEBUG_ALLREGS
movq IOFFSET_RBX(%rsp), %rbx
movq IOFFSET_RBP(%rsp), %rbp
movq IOFFSET_R12(%rsp), %r12
movq IOFFSET_R13(%rsp), %r13
movq IOFFSET_R14(%rsp), %r14
movq IOFFSET_R15(%rsp), %r15
#endif
.endm
 
#define INTERRUPT_ALIGN 128
#ifdef CONFIG_DEBUG_ALLREGS
# define INTERRUPT_ALIGN 256
#else
# define INTERRUPT_ALIGN 128
#endif
## Declare interrupt handlers
#
/branches/network/kernel/arch/amd64/src/userspace.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup amd64
/** @addtogroup amd64
* @{
*/
/** @file
47,33 → 47,36
*/
void userspace(uspace_arg_t *kernel_uarg)
{
ipl_t ipl = interrupts_disable();
ipl_t ipl;
/* Clear CF, PF, AF, ZF, SF, DF, OF */
ipl = interrupts_disable();
 
/* Clear CF,PF,AF,ZF,SF,DF,OF */
ipl &= ~(0xcd4);
 
asm volatile (""
"pushq %0\n"
"pushq %1\n"
"pushq %2\n"
"pushq %3\n"
"pushq %4\n"
"movq %5, %%rax\n"
/* %rdi is defined to hold pcb_ptr - set it to 0 */
"xorq %%rdi, %%rdi\n"
"iretq\n"
: :
"i" (gdtselector(UDATA_DES) | PL_USER),
"r" (kernel_uarg->uspace_stack+THREAD_STACK_SIZE),
"r" (ipl),
"i" (gdtselector(UTEXT_DES) | PL_USER),
"r" (kernel_uarg->uspace_entry),
"r" (kernel_uarg->uspace_uarg)
: "rax"
);
asm volatile (
"pushq %[udata_des]\n"
"pushq %[stack_size]\n"
"pushq %[ipl]\n"
"pushq %[utext_des]\n"
"pushq %[entry]\n"
"movq %[uarg], %%rax\n"
/* %rdi is defined to hold pcb_ptr - set it to 0 */
"xorq %%rdi, %%rdi\n"
"iretq\n"
:: [udata_des] "i" (gdtselector(UDATA_DES) | PL_USER),
[stack_size] "r" (kernel_uarg->uspace_stack + THREAD_STACK_SIZE),
[ipl] "r" (ipl),
[utext_des] "i" (gdtselector(UTEXT_DES) | PL_USER),
[entry] "r" (kernel_uarg->uspace_entry),
[uarg] "r" (kernel_uarg->uspace_uarg)
: "rax"
);
/* Unreachable */
while (1);
for(;;)
;
}
 
/** @}
/branches/network/kernel/arch/amd64/src/debugger.c
35,6 → 35,7
#include <arch/debugger.h>
#include <console/kconsole.h>
#include <console/cmd.h>
#include <symtab.h>
#include <print.h>
#include <panic.h>
#include <interrupt.h>
43,7 → 44,6
#include <debug.h>
#include <func.h>
#include <smp/ipi.h>
#include <symtab.h>
 
typedef struct {
uintptr_t address; /**< Breakpoint address */
54,8 → 54,6
static bpinfo_t breakpoints[BKPOINTS_MAX];
SPINLOCK_INITIALIZE(bkpoint_lock);
 
#ifdef CONFIG_KCONSOLE
 
static int cmd_print_breakpoints(cmd_arg_t *argv);
static cmd_info_t bkpts_info = {
.name = "bkpts",
64,6 → 62,8
.argc = 0,
};
 
#ifndef CONFIG_DEBUG_AS_WATCHPOINT
 
static int cmd_del_breakpoint(cmd_arg_t *argv);
static cmd_arg_t del_argv = {
.type = ARG_TYPE_INT
99,8 → 99,44
.argv = &addw_argv
};
 
#endif /* CONFIG_KCONSOLE */
#endif
 
/** Print table of active breakpoints */
int cmd_print_breakpoints(cmd_arg_t *argv __attribute__((unused)))
{
unsigned int i;
char *symbol;
 
#ifdef __32_BITS__
printf("# Count Address In symbol\n");
printf("-- ----- ---------- ---------\n");
#endif
 
#ifdef __64_BITS__
printf("# Count Address In symbol\n");
printf("-- ----- ------------------ ---------\n");
#endif
for (i = 0; i < BKPOINTS_MAX; i++)
if (breakpoints[i].address) {
symbol = get_symtab_entry(breakpoints[i].address);
 
#ifdef __32_BITS__
printf("%-2u %-5d %#10zx %s\n", i,
breakpoints[i].counter, breakpoints[i].address,
symbol);
#endif
 
#ifdef __64_BITS__
printf("%-2u %-5d %#18zx %s\n", i,
breakpoints[i].counter, breakpoints[i].address,
symbol);
#endif
 
}
return 1;
}
 
/* Setup DR register according to table */
static void setup_dr(int curidx)
{
201,16 → 237,16
 
/* Send IPI */
#ifdef CONFIG_SMP
// ipi_broadcast(VECTOR_DEBUG_IPI);
// ipi_broadcast(VECTOR_DEBUG_IPI);
#endif
 
return curidx;
}
 
#ifdef __64_BITS__
#define getip(x) ((x)->rip)
#ifdef amd64
# define getip(x) ((x)->rip)
#else
#define getip(x) ((x)->eip)
# define getip(x) ((x)->eip)
#endif
 
static void handle_exception(int slot, istate_t *istate)
229,15 → 265,12
*((unative_t *) breakpoints[slot].address));
}
}
 
printf("Reached breakpoint %d:%lx (%s)\n", slot, getip(istate),
symtab_fmt_name_lookup(getip(istate)));
 
#ifdef CONFIG_KCONSOLE
atomic_set(&haltstate, 1);
kconsole("debug", "Debug console ready.\n", false);
atomic_set(&haltstate, 0);
#endif
printf("Reached breakpoint %d:%lx(%s)\n", slot, getip(istate),
get_symtab_entry(getip(istate)));
printf("***Type 'exit' to exit kconsole.\n");
atomic_set(&haltstate,1);
kconsole((void *) "debug");
atomic_set(&haltstate,0);
}
 
void breakpoint_del(int slot)
266,8 → 299,42
#endif
}
 
#ifndef CONFIG_DEBUG_AS_WATCHPOINT
 
/** Remove breakpoint from table */
int cmd_del_breakpoint(cmd_arg_t *argv)
{
unative_t bpno = argv->intval;
if (bpno > BKPOINTS_MAX) {
printf("Invalid breakpoint number.\n");
return 0;
}
breakpoint_del(argv->intval);
return 1;
}
 
/** Add new breakpoint to table */
static int cmd_add_breakpoint(cmd_arg_t *argv)
{
int flags;
int id;
 
if (argv == &add_argv) {
flags = BKPOINT_INSTR;
} else { /* addwatchp */
flags = BKPOINT_WRITE;
}
printf("Adding breakpoint on address: %p\n", argv->intval);
id = breakpoint_add((void *)argv->intval, flags, -1);
if (id < 0)
printf("Add breakpoint failed.\n");
else
printf("Added breakpoint %d.\n", id);
return 1;
}
#endif
 
static void debug_exception(int n __attribute__((unused)), istate_t *istate)
{
unative_t dr6;
274,7 → 341,7
int i;
/* Set RF to restart the instruction */
#ifdef __64_BITS__
#ifdef amd64
istate->rflags |= RFLAGS_RF;
#else
istate->eflags |= EFLAGS_RF;
312,24 → 379,24
 
for (i = 0; i < BKPOINTS_MAX; i++)
breakpoints[i].address = NULL;
 
#ifdef CONFIG_KCONSOLE
cmd_initialize(&bkpts_info);
if (!cmd_register(&bkpts_info))
printf("Cannot register command %s\n", bkpts_info.name);
panic("could not register command %s\n", bkpts_info.name);
 
#ifndef CONFIG_DEBUG_AS_WATCHPOINT
cmd_initialize(&delbkpt_info);
if (!cmd_register(&delbkpt_info))
printf("Cannot register command %s\n", delbkpt_info.name);
panic("could not register command %s\n", delbkpt_info.name);
 
cmd_initialize(&addbkpt_info);
if (!cmd_register(&addbkpt_info))
printf("Cannot register command %s\n", addbkpt_info.name);
panic("could not register command %s\n", addbkpt_info.name);
 
cmd_initialize(&addwatchp_info);
if (!cmd_register(&addwatchp_info))
printf("Cannot register command %s\n", addwatchp_info.name);
#endif /* CONFIG_KCONSOLE */
panic("could not register command %s\n", addwatchp_info.name);
#endif
exc_register(VECTOR_DEBUG, "debugger", debug_exception);
#ifdef CONFIG_SMP
337,77 → 404,5
#endif
}
 
#ifdef CONFIG_KCONSOLE
/** Print table of active breakpoints */
int cmd_print_breakpoints(cmd_arg_t *argv __attribute__((unused)))
{
unsigned int i;
char *symbol;
 
#ifdef __32_BITS__
printf("# Count Address In symbol\n");
printf("-- ----- ---------- ---------\n");
#endif
 
#ifdef __64_BITS__
printf("# Count Address In symbol\n");
printf("-- ----- ------------------ ---------\n");
#endif
for (i = 0; i < BKPOINTS_MAX; i++)
if (breakpoints[i].address) {
symbol = symtab_fmt_name_lookup(
breakpoints[i].address);
 
#ifdef __32_BITS__
printf("%-2u %-5d %#10zx %s\n", i,
breakpoints[i].counter, breakpoints[i].address,
symbol);
#endif
 
#ifdef __64_BITS__
printf("%-2u %-5d %#18zx %s\n", i,
breakpoints[i].counter, breakpoints[i].address,
symbol);
#endif
 
}
return 1;
}
 
/** Remove breakpoint from table */
int cmd_del_breakpoint(cmd_arg_t *argv)
{
unative_t bpno = argv->intval;
if (bpno > BKPOINTS_MAX) {
printf("Invalid breakpoint number.\n");
return 0;
}
breakpoint_del(argv->intval);
return 1;
}
 
/** Add new breakpoint to table */
static int cmd_add_breakpoint(cmd_arg_t *argv)
{
int flags;
int id;
 
if (argv == &add_argv) {
flags = BKPOINT_INSTR;
} else { /* addwatchp */
flags = BKPOINT_WRITE;
}
printf("Adding breakpoint on address: %p\n", argv->intval);
id = breakpoint_add((void *)argv->intval, flags, -1);
if (id < 0)
printf("Add breakpoint failed.\n");
else
printf("Added breakpoint %d.\n", id);
return 1;
}
#endif /* CONFIG_KCONSOLE */
 
/** @}
*/
/branches/network/kernel/arch/amd64/src/pm.c
137,8 → 137,8
 
void gdt_tss_setlimit(descriptor_t *d, uint32_t limit)
{
tss_descriptor_t *td = (tss_descriptor_t *) d;
struct tss_descriptor *td = (tss_descriptor_t *) d;
 
td->limit_0_15 = limit & 0xffff;
td->limit_16_19 = (limit >> 16) & 0xf;
}
185,14 → 185,14
*/
void pm_init(void)
{
descriptor_t *gdt_p = (descriptor_t *) gdtr.base;
descriptor_t *gdt_p = (struct descriptor *) gdtr.base;
tss_descriptor_t *tss_desc;
 
/*
* Each CPU has its private GDT and TSS.
* All CPUs share one IDT.
*/
 
if (config.cpu_active == 1) {
idt_init();
/*
200,19 → 200,20
* the heap hasn't been initialized so far.
*/
tss_p = &tss;
} else {
}
else {
/* We are going to use malloc, which may return
* non boot-mapped pointer, initialize the CR3 register
* ahead of page_init */
write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
 
tss_p = (struct tss *) malloc(sizeof(tss_t), FRAME_ATOMIC);
if (!tss_p)
panic("Cannot allocate TSS.");
panic("could not allocate TSS\n");
}
 
tss_initialize(tss_p);
 
tss_desc = (tss_descriptor_t *) (&gdt_p[TSS_DES]);
tss_desc->present = 1;
tss_desc->type = AR_TSS;
220,7 → 221,7
gdt_tss_setbase(&gdt_p[TSS_DES], (uintptr_t) tss_p);
gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1);
 
gdtr_load(&gdtr);
idtr_load(&idtr);
/*
/branches/network/kernel/arch/amd64/src/proc/scheduler.c
39,6 → 39,7
#include <arch.h>
#include <arch/context.h> /* SP_DELTA */
#include <arch/asm.h>
#include <arch/debugger.h>
#include <print.h>
#include <arch/pm.h>
#include <arch/ddi/ddi.h>
67,6 → 68,13
 
/* TLS support - set FS to thread local storage */
write_msr(AMD_MSR_FS, THREAD->arch.tls);
 
#ifdef CONFIG_DEBUG_AS_WATCHPOINT
/* Set watchpoint on AS to ensure that nobody sets it to zero */
if (CPU->id < BKPOINTS_MAX)
breakpoint_add(&((the_t *) THREAD->kstack)->as,
BKPOINT_WRITE | BKPOINT_CHECK_ZERO, CPU->id);
#endif
}
 
void after_thread_ran_arch(void)
/branches/network/kernel/arch/amd64/src/boot/vesa_prot.inc
File deleted
\ No newline at end of file
Property changes:
Deleted: svn:special
-*
\ No newline at end of property
/branches/network/kernel/arch/amd64/src/boot/vesa_real.inc
File deleted
\ No newline at end of file
Property changes:
Deleted: svn:special
-*
\ No newline at end of property
/branches/network/kernel/arch/amd64/src/boot/vesa_ret.inc
File deleted
/branches/network/kernel/arch/amd64/src/boot/boot.S
1,4 → 1,4
#
 
# Copyright (c) 2005 Ondrej Palkovsky
# Copyright (c) 2006 Martin Decky
# Copyright (c) 2008 Jakub Jermar
37,7 → 37,7
#include <arch/cpuid.h>
 
#define START_STACK (BOOT_OFFSET - BOOT_STACK_SIZE)
 
.section K_TEXT_START, "ax"
 
.code32
46,7 → 46,7
multiboot_header:
.long MULTIBOOT_HEADER_MAGIC
.long MULTIBOOT_HEADER_FLAGS
.long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) # checksum
.long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) # checksum
.long multiboot_header
.long unmapped_ktext_start
.long 0
55,19 → 55,15
 
multiboot_image_start:
cld
movl $START_STACK, %esp # initialize stack pointer
lgdtl bootstrap_gdtr # initialize Global Descriptor Table register
movl $START_STACK, %esp # initialize stack pointer
lgdtl bootstrap_gdtr # initialize Global Descriptor Table register
 
movw $gdtselector(KDATA_DES), %cx
movw %cx, %es
movw %cx, %ds # kernel data + stack
movw %cx, %ds # kernel data + stack
movw %cx, %ss
#
# Simics seems to remove hidden part of GS on entering user mode
# when _visible_ part of GS does not point to user-mode segment.
#
# when _visible_ part of GS does not point to user-mode segment
movw $gdtselector(UDATA_DES), %cx
movw %cx, %fs
movw %cx, %gs
75,19 → 71,17
jmpl $gdtselector(KTEXT32_DES), $multiboot_meeting_point
multiboot_meeting_point:
movl %eax, grub_eax # save parameters from GRUB
movl %eax, grub_eax # save parameters from GRUB
movl %ebx, grub_ebx
#
# Protected 32-bit. We want to reuse the code-seg descriptor,
# the Default operand size must not be 1 when entering long mode.
#
# the Default operand size must not be 1 when entering long mode
movl $(INTEL_CPUID_EXTENDED), %eax
cpuid
cmp $(INTEL_CPUID_EXTENDED), %eax
movl $(INTEL_CPUID_EXTENDED), %eax
cpuid
cmp $(INTEL_CPUID_EXTENDED), %eax
ja extended_cpuid_supported
movl $extended_cpuid_msg, %esi
jmp error_halt
96,11 → 90,11
movl $(AMD_CPUID_EXTENDED), %eax
cpuid
bt $(AMD_EXT_LONG_MODE), %edx
jc long_mode_supported
jc long_mode_supported
movl $long_mode_msg, %esi
jmp error_halt
 
long_mode_supported:
bt $(AMD_EXT_NOEXECUTE), %edx
114,7 → 108,7
movl $(INTEL_CPUID_STANDARD), %eax
cpuid
bt $(INTEL_FXSAVE), %edx
jc fx_supported
jc fx_supported
movl $fx_msg, %esi
jmp error_halt
122,43 → 116,59
fx_supported:
bt $(INTEL_SSE2), %edx
jc sse2_supported
jc sse2_supported
movl $sse2_msg, %esi
jmp error_halt
sse2_supported:
#ifdef CONFIG_FB
mov $vesa_init, %esi
mov $VESA_INIT_SEGMENT << 4, %edi
mov $e_vesa_init - vesa_init, %ecx
rep movsb
 
#include "vesa_prot.inc"
 
#
mov $VESA_INIT_SEGMENT << 4, %edi
jmpl *%edi
vesa_meeting_point:
mov %esi, KA2PA(vesa_ph_addr)
mov %di, KA2PA(vesa_height)
shr $16, %edi
mov %di, KA2PA(vesa_width)
mov %bx, KA2PA(vesa_scanline)
shr $16, %ebx
mov %bx, KA2PA(vesa_bpp)
#endif
# Enable 64-bit page translation entries - CR4.PAE = 1.
# Paging is not enabled until after long mode is enabled.
#
# Paging is not enabled until after long mode is enabled
movl %cr4, %eax
btsl $5, %eax
movl %eax, %cr4
 
# Set up paging tables
# set up paging tables
leal ptl_0, %eax
movl %eax, %cr3
# enable long mode
# Enable long mode
movl $EFER_MSR_NUM, %ecx # EFER MSR number
rdmsr # read EFER
btsl $AMD_LME_FLAG, %eax # set LME = 1
wrmsr # write EFER
movl $EFER_MSR_NUM, %ecx # EFER MSR number
rdmsr # Read EFER
btsl $AMD_LME_FLAG, %eax # Set LME = 1
wrmsr # Write EFER
# enable paging to activate long mode (set CR0.PG = 1)
# Enable paging to activate long mode (set CR0.PG = 1)
movl %cr0, %eax
btsl $31, %eax
movl %eax, %cr0
# at this point we are in compatibility mode
# At this point we are in compatibility mode
jmpl $gdtselector(KTEXT_DES), $start64
 
165,29 → 175,362
.code64
start64:
movq $(PA2KA(START_STACK)), %rsp
movl grub_eax, %eax
movl grub_ebx, %ebx
# call arch_pre_main(grub_eax, grub_ebx)
xorq %rdi, %rdi
movl grub_eax, %edi
xorq %rsi, %rsi
movl grub_ebx, %esi
call arch_pre_main
cmpl $MULTIBOOT_LOADER_MAGIC, %eax # compare GRUB signature
je valid_boot
xorl %ecx, %ecx # no memory size or map available
movl %ecx, e820counter
jmp invalid_boot
valid_boot:
movl (%ebx), %eax # ebx = physical address of struct multiboot_info
bt $3, %eax # mbi->flags[3] (mods_count, mods_addr valid)
jc mods_valid
xorq %rcx, %rcx
movq %rcx, init
jmp mods_end
mods_valid:
xorq %rcx, %rcx
movl 20(%ebx), %ecx # mbi->mods_count
movq %rcx, init
cmpl $0, %ecx
je mods_end
movl 24(%ebx), %esi # mbi->mods_addr
movq $init, %rdi
mods_loop:
xorq %rdx, %rdx
movl 0(%esi), %edx # mods->mod_start
movq $0xffff800000000000, %r10
addq %r10, %rdx
movq %rdx, 8(%rdi)
xorq %rdx, %rdx
movl 4(%esi), %edx
subl 0(%esi), %edx # mods->mod_end - mods->mod_start
movq %rdx, 16(%rdi)
addl $16, %esi
addq $16, %rdi
loop mods_loop
mods_end:
bt $6, %eax # mbi->flags[6] (mmap_length, mmap_addr valid)
jc mmap_valid
xorl %edx, %edx
jmp mmap_invalid
mmap_valid:
movl 44(%ebx), %ecx # mbi->mmap_length
movl 48(%ebx), %esi # mbi->mmap_addr
movq $e820table, %rdi
xorl %edx, %edx
mmap_loop:
cmpl $0, %ecx
jle mmap_end
movl 4(%esi), %eax # mmap->base_addr_low
movl %eax, (%rdi)
movl 8(%esi), %eax # mmap->base_addr_high
movl %eax, 4(%rdi)
movl 12(%esi), %eax # mmap->length_low
movl %eax, 8(%rdi)
movl 16(%esi), %eax # mmap->length_high
movl %eax, 12(%rdi)
movl 20(%esi), %eax # mmap->type
movl %eax, 16(%rdi)
movl (%esi), %eax # mmap->size
addl $0x4, %eax
addl %eax, %esi
subl %eax, %ecx
addq $MEMMAP_E820_RECORD_SIZE, %rdi
incl %edx
jmp mmap_loop
mmap_end:
mmap_invalid:
movl %edx, e820counter
invalid_boot:
call main_bsp
#ifdef CONFIG_SMP
# not reached
# copy AP bootstrap routines below 1 MB
movq $BOOT_OFFSET, %rsi
movq $AP_BOOT_OFFSET, %rdi
movq $_hardcoded_unmapped_size, %rcx
rep movsb
#endif
call main_bsp # never returns
cli
hlt0:
hlt
jmp hlt0
hlt
 
#ifdef CONFIG_FB
.code32
vesa_init:
jmp $gdtselector(VESA_INIT_DES), $vesa_init_real - vesa_init
.code16
vesa_init_real:
mov %cr0, %eax
and $~1, %eax
mov %eax, %cr0
jmp $VESA_INIT_SEGMENT, $vesa_init_real2 - vesa_init
vesa_init_real2:
mov $VESA_INIT_SEGMENT, %bx
mov %bx, %es
mov %bx, %fs
mov %bx, %gs
mov %bx, %ds
mov %bx, %ss
movl $0x0000fffc, %esp
movl $0x0000fffc, %ebp
#define VESA_INFO_SIZE 1024
 
#define VESA_MODE_ATTRIBUTES_OFFSET 0
#define VESA_MODE_LIST_PTR_OFFSET 14
#define VESA_MODE_SCANLINE_OFFSET 16
#define VESA_MODE_WIDTH_OFFSET 18
#define VESA_MODE_HEIGHT_OFFSET 20
#define VESA_MODE_BPP_OFFSET 25
#define VESA_MODE_PHADDR_OFFSET 40
 
#define VESA_END_OF_MODES 0xffff
 
#define VESA_OK 0x4f
 
#define VESA_GET_INFO 0x4f00
#define VESA_GET_MODE_INFO 0x4f01
#define VESA_SET_MODE 0x4f02
#define VESA_SET_PALETTE 0x4f09
 
#define CONFIG_VESA_BPP_a 255
 
#if CONFIG_VESA_BPP == 24
#define CONFIG_VESA_BPP_VARIANT 32
#endif
 
mov $VESA_GET_INFO, %ax
mov $e_vesa_init - vesa_init, %di
push %di
int $0x10
pop %di
cmp $VESA_OK, %al
jnz 0f
mov 2 + VESA_MODE_LIST_PTR_OFFSET(%di), %si
mov %si, %gs
mov VESA_MODE_LIST_PTR_OFFSET(%di), %si
add $VESA_INFO_SIZE, %di
 
1:# Try next mode
mov %gs:(%si), %cx
cmp $VESA_END_OF_MODES, %cx
jz 0f
inc %si
inc %si
push %cx
push %di
push %si
mov $VESA_GET_MODE_INFO, %ax
int $0x10
pop %si
pop %di
pop %cx
cmp $VESA_OK, %al
jnz 0f
mov $CONFIG_VESA_WIDTH, %ax
cmp VESA_MODE_WIDTH_OFFSET(%di), %ax
jnz 1b
mov $CONFIG_VESA_HEIGHT, %ax
cmp VESA_MODE_HEIGHT_OFFSET(%di), %ax
jnz 1b
mov $CONFIG_VESA_BPP, %al
cmp VESA_MODE_BPP_OFFSET(%di), %al
 
#ifdef CONFIG_VESA_BPP_VARIANT
jz 2f
mov $CONFIG_VESA_BPP_VARIANT, %al
cmp VESA_MODE_BPP_OFFSET(%di), %al
#endif
jnz 1b
2:
mov %cx, %bx
or $0xc000, %bx
push %di
mov $VESA_SET_MODE, %ax
int $0x10
pop %di
cmp $VESA_OK, %al
jnz 0f
 
#if CONFIG_VESA_BPP == 8
# Set 3:2:3 VGA palette
mov VESA_MODE_ATTRIBUTES_OFFSET(%di), %ax
push %di
mov $vga323 - vesa_init, %di
mov $0x100, %ecx
bt $5, %ax # Test if VGA compatible registers are present
jnc vga_compat
# Try VESA routine to set palette
mov $VESA_SET_PALETTE, %ax
xor %bl, %bl
xor %dx, %dx
int $0x10
jmp vga_not_compat
vga_compat:
# Try VGA registers to set palette
movw $0x3c6, %dx # Set palette mask
movb $0xff, %al
outb %al, %dx
movw $0x3c8, %dx # First index to set
xor %al, %al
outb %al, %dx
movw $0x3c9, %dx # Data port
vga_loop:
movb %es:2(%di), %al
outb %al, %dx
movb %es:1(%di), %al
outb %al, %dx
movb %es:(%di), %al
outb %al, %dx
addw $4, %di
loop vga_loop
vga_not_compat:
pop %di
#endif
mov VESA_MODE_PHADDR_OFFSET(%di), %esi
mov VESA_MODE_WIDTH_OFFSET(%di), %ax
shl $16, %eax
mov VESA_MODE_HEIGHT_OFFSET(%di), %ax
mov VESA_MODE_BPP_OFFSET(%di), %bl
xor %bh, %bh
shl $16, %ebx
mov VESA_MODE_SCANLINE_OFFSET(%di), %bx
mov %eax, %edi
8:
mov %cr0, %eax
or $1, %eax
mov %eax, %cr0
jmp 9f
9:
ljmpl $gdtselector(KTEXT32_DES), $(vesa_init_protect - vesa_init + VESA_INIT_SEGMENT << 4)
0:# No prefered mode found
mov $0x111, %cx
push %di
push %cx
mov $VESA_GET_MODE_INFO, %ax
int $0x10
pop %cx
pop %di
cmp $VESA_OK, %al
jnz 1f
jz 2b # Force relative jump
 
1:
mov $0x0003, %ax
int $0x10
mov $0xffffffff, %edi # EGA text mode used, because of problems with VESA
xor %ax, %ax
jz 8b # Force relative jump
 
vga323:
#include "vga323.pal"
.code32
vesa_init_protect:
movw $gdtselector(KDATA_DES), %cx
movw %cx, %es
movw %cx, %ds # kernel data + stack
movw %cx, %ss
# Simics seems to remove hidden part of GS on entering user mode
# when _visible_ part of GS does not point to user-mode segment
movw $gdtselector(UDATA_DES), %cx
movw %cx, %fs
movw %cx, %gs
movl $START_STACK, %esp # initialize stack pointer
jmpl $gdtselector(KTEXT32_DES), $vesa_meeting_point
.align 4
e_vesa_init:
#endif
 
# Print string from %esi to EGA display (in red) and halt
error_halt:
movl $0xb8000, %edi # base of EGA text mode memory
movl $0xb8000, %edi # base of EGA text mode memory
xorl %eax, %eax
movw $0x3d4, %dx # read bits 8 - 15 of the cursor address
movw $0x3d4, %dx # read bits 8 - 15 of the cursor address
movb $0xe, %al
outb %al, %dx
195,7 → 538,7
inb %dx, %al
shl $8, %ax
movw $0x3d4, %dx # read bits 0 - 7 of the cursor address
movw $0x3d4, %dx # read bits 0 - 7 of the cursor address
movb $0xf, %al
outb %al, %dx
204,9 → 547,7
cmp $1920, %ax
jbe cursor_ok
movw $1920, %ax # sanity check for the cursor on the last line
movw $1920, %ax # sanity check for the cursor on the last line
cursor_ok:
movw %ax, %bx
213,7 → 554,7
shl $1, %eax
addl %eax, %edi
movw $0x0c00, %ax # black background, light red foreground
movw $0x0c00, %ax # black background, light red foreground
ploop:
lodsb
220,11 → 561,11
cmp $0, %al
je ploop_end
stosw
inc %bx
inc %bx
jmp ploop
ploop_end:
movw $0x3d4, %dx # write bits 8 - 15 of the cursor address
movw $0x3d4, %dx # write bits 8 - 15 of the cursor address
movb $0xe, %al
outb %al, %dx
232,7 → 573,7
movb %bh, %al
outb %al, %dx
movw $0x3d4, %dx # write bits 0 - 7 of the cursor address
movw $0x3d4, %dx # write bits 0 - 7 of the cursor address
movb $0xf, %al
outb %al, %dx
239,20 → 580,17
movw $0x3d5, %dx
movb %bl, %al
outb %al, %dx
cli
hlt1:
hlt
jmp hlt1
hlt
 
#include "vesa_real.inc"
 
.section K_INI_PTLS, "aw", @progbits
 
#
# Macro for generating initial page table contents.
# @param cnt Number of entries to generat. Must be multiple of 8.
# @param g Number of GB that will be added to the mapping.
# @param cnt Number of entries to generat. Must be multiple of 8.
# @param g Number of GB that will be added to the mapping.
#
.macro ptl2gen cnt g
.if \cnt
304,7 → 642,7
# Mapping of [0; 1G) at -2G
.quad ptl_2_0g + (PTL_WRITABLE | PTL_PRESENT)
.fill 1, 8, 0
 
.align 4096
.global ptl_0
ptl_0:
/branches/network/kernel/arch/amd64/src/boot/memmap.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup amd64mm
/** @addtogroup amd64mm
* @{
*/
/** @file
/branches/network/kernel/arch/amd64/src/cpu/cpu.c
77,19 → 77,21
void cpu_setup_fpu(void)
{
asm volatile (
"movq %%cr0, %%rax\n"
"btsq $1, %%rax\n" /* cr0.mp */
"btrq $2, %%rax\n" /* cr0.em */
"movq %%rax, %%cr0\n"
"movq %%cr4, %%rax\n"
"bts $9, %%rax\n" /* cr4.osfxsr */
"movq %%rax, %%cr4\n"
::: "%rax"
);
"movq %%cr0, %%rax;"
"btsq $1, %%rax;" /* cr0.mp */
"btrq $2, %%rax;" /* cr0.em */
"movq %%rax, %%cr0;"
 
"movq %%cr4, %%rax;"
"bts $9, %%rax;" /* cr4.osfxsr */
"movq %%rax, %%cr4;"
:
:
:"%rax"
);
}
 
/** Set the TS flag to 1.
/** Set the TS flag to 1.
*
* If a thread accesses coprocessor, exception is run, which
* does a lazy fpu context switch.
97,22 → 99,26
*/
void fpu_disable(void)
{
asm volatile (
"mov %%cr0, %%rax\n"
"bts $3, %%rax\n"
"mov %%rax, %%cr0\n"
::: "%rax"
);
asm volatile (
"mov %%cr0,%%rax;"
"bts $3,%%rax;"
"mov %%rax,%%cr0;"
:
:
:"%rax"
);
}
 
void fpu_enable(void)
{
asm volatile (
"mov %%cr0, %%rax\n"
"btr $3, %%rax\n"
"mov %%rax, %%cr0\n"
::: "%rax"
);
asm volatile (
"mov %%cr0,%%rax;"
"btr $3,%%rax;"
"mov %%rax,%%cr0;"
:
:
:"%rax"
);
}
 
void cpu_arch_init(void)
/branches/network/kernel/arch/amd64/src/mm/page.c
180,7 → 180,7
page = read_cr2();
if (istate->error_word & PFERR_CODE_RSVD)
panic("Reserved bit set in page table entry.");
panic("Reserved bit set in page table entry.\n");
if (istate->error_word & PFERR_CODE_RW)
access = PF_ACCESS_WRITE;
190,11 → 190,11
access = PF_ACCESS_READ;
if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
fault_if_from_uspace(istate, "Page fault: %#x.", page);
fault_if_from_uspace(istate, "Page fault: %#x", page);
 
decode_istate(n, istate);
printf("Page fault address: %llx.\n", page);
panic("Page fault.");
printf("Page fault address: %llx\n", page);
panic("page fault\n");
}
}
 
202,7 → 202,7
uintptr_t hw_map(uintptr_t physaddr, size_t size)
{
if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
panic("Unable to map physical memory %p (%d bytes).", physaddr, size)
panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
uintptr_t virtaddr = PA2KA(last_frame);
pfn_t i;
/branches/network/kernel/arch/amd64/src/amd64.c
39,15 → 39,11
#include <config.h>
 
#include <proc/thread.h>
#include <genarch/multiboot/multiboot.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <genarch/drivers/ega/ega.h>
#include <arch/drivers/ega.h>
#include <arch/drivers/vesa.h>
#include <genarch/drivers/i8042/i8042.h>
#include <genarch/kbrd/kbrd.h>
#include <genarch/kbd/i8042.h>
#include <arch/drivers/i8254.h>
#include <arch/drivers/i8259.h>
#include <arch/boot/boot.h>
 
#ifdef CONFIG_SMP
#include <arch/smp/apic.h>
65,8 → 61,9
#include <syscall/syscall.h>
#include <console/console.h>
#include <ddi/irq.h>
#include <sysinfo/sysinfo.h>
#include <ddi/device.h>
 
 
/** Disable I/O on non-privileged levels
*
* Clean IOPL(12,13) and NT(14) flags in EFLAGS register
73,13 → 70,15
*/
static void clean_IOPL_NT_flags(void)
{
asm volatile (
asm (
"pushfq\n"
"pop %%rax\n"
"and $~(0x7000), %%rax\n"
"pushq %%rax\n"
"popfq\n"
::: "%rax"
:
:
: "%rax"
);
}
 
89,31 → 88,16
*/
static void clean_AM_flag(void)
{
asm volatile (
asm (
"mov %%cr0, %%rax\n"
"and $~(0x40000), %%rax\n"
"mov %%rax, %%cr0\n"
::: "%rax"
:
:
: "%rax"
);
}
 
/** Perform amd64-specific initialization before main_bsp() is called.
*
* @param signature Should contain the multiboot signature.
* @param mi Pointer to the multiboot information structure.
*/
void arch_pre_main(uint32_t signature, const multiboot_info_t *mi)
{
/* Parse multiboot information obtained from the bootloader. */
multiboot_info_parse(signature, mi);
#ifdef CONFIG_SMP
/* Copy AP bootstrap routines below 1 MB. */
memcpy((void *) AP_BOOT_OFFSET, (void *) BOOT_OFFSET,
(size_t) &_hardcoded_unmapped_size);
#endif
}
 
void arch_pre_mm_init(void)
{
/* Enable no-execute pages */
149,17 → 133,13
/* hard clock */
i8254_init();
#ifdef CONFIG_FB
if (vesa_present())
vesa_init();
else
#endif
#ifdef CONFIG_EGA
ega_init(EGA_BASE, EGA_VIDEORAM); /* video */
#else
{}
#endif
ega_init(); /* video */
/* Enable debugger */
debugger_init();
192,28 → 172,8
 
void arch_post_smp_init(void)
{
#ifdef CONFIG_PC_KBD
/*
* Initialize the i8042 controller. Then initialize the keyboard
* module and connect it to i8042. Enable keyboard interrupts.
*/
indev_t *kbrdin = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
if (kbrdin) {
kbrd_init(kbrdin);
trap_virtual_enable_irqs(1 << IRQ_KBD);
}
/*
* This is the necessary evil until the userspace driver is entirely
* self-sufficient.
*/
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
sysinfo_set_item_val("kbd.address.physical", NULL,
(uintptr_t) I8042_BASE);
sysinfo_set_item_val("kbd.address.kernel", NULL,
(uintptr_t) I8042_BASE);
#endif
/* keyboard controller */
i8042_init(device_assign_devno(), IRQ_KBD, device_assign_devno(), IRQ_MOUSE);
}
 
void calibrate_delay_loop(void)
248,38 → 208,15
*/
void arch_grab_console(void)
{
#ifdef CONFIG_FB
if (vesa_present())
vesa_redraw();
else
#endif
#ifdef CONFIG_EGA
ega_redraw();
#else
{}
#endif
i8042_grab();
}
 
/** Return console to userspace
*
*/
void arch_release_console(void)
{
i8042_release();
}
 
/** Construct function pointer
*
* @param fptr function pointer structure
* @param addr function address
* @param caller calling function address
*
* @return address of the function pointer
*
*/
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
return addr;
}
 
/** @}
*/
/branches/network/kernel/arch/amd64/src/ddi/ddi.c
57,15 → 57,15
int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
{
count_t bits;
 
bits = ioaddr + size;
if (bits > IO_PORTS)
return ENOENT;
 
if (task->arch.iomap.bits < bits) {
bitmap_t oldiomap;
uint8_t *newmap;
/*
* The I/O permission bitmap is too small and needs to be grown.
*/
77,17 → 77,17
bitmap_initialize(&oldiomap, task->arch.iomap.map,
task->arch.iomap.bits);
bitmap_initialize(&task->arch.iomap, newmap, bits);
 
/*
* Mark the new range inaccessible.
*/
bitmap_set_range(&task->arch.iomap, oldiomap.bits,
bits - oldiomap.bits);
 
/*
* In case there really existed smaller iomap,
* copy its contents and deallocate it.
*/
*/
if (oldiomap.bits) {
bitmap_copy(&task->arch.iomap, &oldiomap,
oldiomap.bits);
94,17 → 94,17
free(oldiomap.map);
}
}
 
/*
* Enable the range and we are done.
*/
bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);
 
/*
* Increment I/O Permission bitmap generation counter.
*/
task->arch.iomapver++;
 
return 0;
}
 
122,7 → 122,7
descriptor_t *gdt_p;
tss_descriptor_t *tss_desc;
count_t ver;
 
/* First, copy the I/O Permission Bitmap. */
spinlock_lock(&TASK->lock);
ver = TASK->arch.iomapver;
140,7 → 140,7
bitmap_set_range(&iomap, ALIGN_UP(TASK->arch.iomap.bits, 8), 8);
}
spinlock_unlock(&TASK->lock);
 
/*
* Second, adjust TSS segment limit.
* Take the extra ending byte will all bits set into account.
151,10 → 151,10
gdtr_load(&cpugdtr);
/*
* Before we load new TSS limit, the current TSS descriptor
* type must be changed to describe inactive TSS.
*/
tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
* Before we load new TSS limit, the current TSS descriptor
* type must be changed to describe inactive TSS.
*/
tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
tss_desc->type = AR_TSS;
tr_load(gdtselector(TSS_DES));
/branches/network/kernel/arch/amd64/src/interrupt.c
43,6 → 43,7
#include <mm/tlb.h>
#include <mm/as.h>
#include <arch.h>
#include <symtab.h>
#include <arch/asm.h>
#include <proc/scheduler.h>
#include <proc/thread.h>
51,7 → 52,6
#include <arch/ddi/ddi.h>
#include <interrupt.h>
#include <ddi/irq.h>
#include <symtab.h>
 
/*
* Interrupt and exception dispatching.
64,8 → 64,10
void decode_istate(int n, istate_t *istate)
{
char *symbol;
/* uint64_t *x = &istate->stack[0]; */
 
symbol = symtab_fmt_name_lookup(istate->rip);
if (!(symbol = get_symtab_entry(istate->rip)))
symbol = "";
 
printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n", n, __func__);
printf("%%rip: %#llx (%s)\n", istate->rip, symbol);
78,6 → 80,12
istate->rdi, istate->r8);
printf("%%r9=%#llx, %%r10=%#llx, %%r11=%#llx\n", istate->r9,
istate->r10, istate->r11);
#ifdef CONFIG_DEBUG_ALLREGS
printf("%%r12=%#llx, %%r13=%#llx, %%r14=%#llx\n", istate->r12,
istate->r13, istate->r14);
printf("%%r15=%#llx, %%rbx=%#llx, %%rbp=%#llx\n", istate->r15,
istate->rbx, &istate->rbp);
#endif
printf("%%rsp=%#llx\n", &istate->stack[0]);
}
 
86,15 → 94,15
if (eoi_function)
eoi_function();
else
panic("No eoi_function.");
panic("no eoi_function\n");
 
}
 
static void null_interrupt(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "Unserviced interrupt: %d.", n);
fault_if_from_uspace(istate, "unserviced interrupt: %d", n);
decode_istate(n, istate);
panic("Unserviced interrupt.");
panic("unserviced interrupt\n");
}
 
/** General Protection Fault. */
118,37 → 126,35
io_perm_bitmap_install();
return;
}
fault_if_from_uspace(istate, "General protection fault.");
fault_if_from_uspace(istate, "general protection fault");
}
 
decode_istate(n, istate);
panic("General protection fault.");
panic("general protection fault\n");
}
 
static void ss_fault(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "Stack fault.");
fault_if_from_uspace(istate, "stack fault");
decode_istate(n, istate);
panic("Stack fault.");
panic("stack fault\n");
}
 
static void nm_fault(int n, istate_t *istate)
{
#ifdef CONFIG_FPU_LAZY
#ifdef CONFIG_FPU_LAZY
scheduler_fpu_lazy_request();
#else
fault_if_from_uspace(istate, "FPU fault.");
panic("FPU fault.");
fault_if_from_uspace(istate, "fpu fault");
panic("fpu fault");
#endif
}
 
#ifdef CONFIG_SMP
static void tlb_shootdown_ipi(int n, istate_t *istate)
{
trap_virtual_eoi();
tlb_shootdown_ipi_recv();
}
#endif
 
/** Handler of IRQ exceptions */
static void irq_interrupt(int n, istate_t *istate)
171,7 → 177,7
trap_virtual_eoi();
ack = true;
}
irq->handler(irq);
irq->handler(irq, irq->arg);
spinlock_unlock(&irq->lock);
} else {
/*
215,7 → 221,7
if (enable_irqs_function)
enable_irqs_function(irqmask);
else
panic("No enable_irqs_function.");
panic("no enable_irqs_function\n");
}
 
void trap_virtual_disable_irqs(uint16_t irqmask)
223,7 → 229,7
if (disable_irqs_function)
disable_irqs_function(irqmask);
else
panic("No disable_irqs_function.");
panic("no disable_irqs_function\n");
}
 
/** @}
/branches/network/kernel/arch/amd64/src/fpu_context.c
39,9 → 39,9
void fpu_context_save(fpu_context_t *fctx)
{
asm volatile (
"fxsave %[fctx]\n"
: [fctx] "=m" (*fctx)
);
"fxsave %0"
: "=m"(*fctx)
);
}
 
/** Restore FPU (mmx,sse) context using fxrstor instruction */
48,9 → 48,9
void fpu_context_restore(fpu_context_t *fctx)
{
asm volatile (
"fxrstor %[fctx]\n"
: [fctx] "=m" (*fctx)
);
"fxrstor %0"
: "=m"(*fctx)
);
}
 
void fpu_init()
57,7 → 57,7
{
/* TODO: Zero all SSE, MMX etc. registers */
asm volatile (
"fninit\n"
"fninit;"
);
}
 
/branches/network/kernel/arch/sparc64/include/cpu_node.h
File deleted
/branches/network/kernel/arch/sparc64/include/cpu_family.h
File deleted
/branches/network/kernel/arch/sparc64/include/mm/tlb.h
35,17 → 35,9
#ifndef KERN_sparc64_TLB_H_
#define KERN_sparc64_TLB_H_
 
#if defined (US)
#define ITLB_ENTRY_COUNT 64
#define DTLB_ENTRY_COUNT 64
#define DTLB_MAX_LOCKED_ENTRIES DTLB_ENTRY_COUNT
#endif
 
/** TLB_DSMALL is the only of the three DMMUs that can hold locked entries. */
#if defined (US3)
#define DTLB_MAX_LOCKED_ENTRIES 16
#endif
 
#define MEM_CONTEXT_KERNEL 0
#define MEM_CONTEXT_TEMP 1
 
61,9 → 53,6
/* TLB Demap Operation types. */
#define TLB_DEMAP_PAGE 0
#define TLB_DEMAP_CONTEXT 1
#if defined (US3)
#define TLB_DEMAP_ALL 2
#endif
 
#define TLB_DEMAP_TYPE_SHIFT 6
 
72,18 → 61,6
#define TLB_DEMAP_SECONDARY 1
#define TLB_DEMAP_NUCLEUS 2
 
/* There are more TLBs in one MMU in US3, their codes are defined here. */
#if defined (US3)
/* D-MMU: one small (16-entry) TLB and two big (512-entry) TLBs */
#define TLB_DSMALL 0
#define TLB_DBIG_0 2
#define TLB_DBIG_1 3
/* I-MMU: one small (16-entry) TLB and one big TLB */
#define TLB_ISMALL 0
#define TLB_IBIG 2
#endif
 
#define TLB_DEMAP_CONTEXT_SHIFT 4
 
/* TLB Tag Access shifts */
99,8 → 76,6
#include <arch/asm.h>
#include <arch/barrier.h>
#include <arch/types.h>
#include <arch/register.h>
#include <arch/cpu.h>
 
union tlb_context_reg {
uint64_t v;
115,9 → 90,6
typedef tte_data_t tlb_data_t;
 
/** I-/D-TLB Data Access Address in Alternate Space. */
 
#if defined (US)
 
union tlb_data_access_addr {
uint64_t value;
struct {
126,54 → 98,9
unsigned : 3;
} __attribute__ ((packed));
};
typedef union tlb_data_access_addr dtlb_data_access_addr_t;
typedef union tlb_data_access_addr dtlb_tag_read_addr_t;
typedef union tlb_data_access_addr itlb_data_access_addr_t;
typedef union tlb_data_access_addr itlb_tag_read_addr_t;
typedef union tlb_data_access_addr tlb_data_access_addr_t;
typedef union tlb_data_access_addr tlb_tag_read_addr_t;
 
#elif defined (US3)
 
/*
* In US3, I-MMU and D-MMU have different formats of the data
* access register virtual address. In the corresponding
* structures the member variable for the entry number is
* called "local_tlb_entry" - it contrasts with the "tlb_entry"
* for the US data access register VA structure. The rationale
* behind this is to prevent careless mistakes in the code
* caused by setting only the entry number and not the TLB
* number in the US3 code (when taking the code from US).
*/
 
union dtlb_data_access_addr {
uint64_t value;
struct {
uint64_t : 45;
unsigned : 1;
unsigned tlb_number : 2;
unsigned : 4;
unsigned local_tlb_entry : 9;
unsigned : 3;
} __attribute__ ((packed));
};
typedef union dtlb_data_access_addr dtlb_data_access_addr_t;
typedef union dtlb_data_access_addr dtlb_tag_read_addr_t;
 
union itlb_data_access_addr {
uint64_t value;
struct {
uint64_t : 45;
unsigned : 1;
unsigned tlb_number : 2;
unsigned : 6;
unsigned local_tlb_entry : 7;
unsigned : 3;
} __attribute__ ((packed));
};
typedef union itlb_data_access_addr itlb_data_access_addr_t;
typedef union itlb_data_access_addr itlb_tag_read_addr_t;
 
#endif
 
/** I-/D-TLB Tag Read Register. */
union tlb_tag_read_reg {
uint64_t value;
191,13 → 118,8
uint64_t value;
struct {
uint64_t vpn: 51; /**< Virtual Address bits 63:13. */
#if defined (US)
unsigned : 6; /**< Ignored. */
unsigned type : 1; /**< The type of demap operation. */
#elif defined (US3)
unsigned : 5; /**< Ignored. */
unsigned type: 2; /**< The type of demap operation. */
#endif
unsigned context : 2; /**< Context register selection. */
unsigned : 4; /**< Zero. */
} __attribute__ ((packed));
208,19 → 130,10
union tlb_sfsr_reg {
uint64_t value;
struct {
#if defined (US)
unsigned long : 40; /**< Implementation dependent. */
unsigned asi : 8; /**< ASI. */
unsigned : 2;
unsigned ft : 7; /**< Fault type. */
#elif defined (US3)
unsigned long : 39; /**< Implementation dependent. */
unsigned nf : 1; /**< Non-faulting load. */
unsigned asi : 8; /**< ASI. */
unsigned tm : 1; /**< I-TLB miss. */
unsigned : 3; /**< Reserved. */
unsigned ft : 5; /**< Fault type. */
#endif
unsigned e : 1; /**< Side-effect bit. */
unsigned ct : 2; /**< Context Register selection. */
unsigned pr : 1; /**< Privilege bit. */
231,53 → 144,9
};
typedef union tlb_sfsr_reg tlb_sfsr_reg_t;
 
#if defined (US3)
 
/*
* Functions for determining the number of entries in TLBs. They either return
* a constant value or a value based on the CPU autodetection.
*/
 
/**
* Determine the number of entries in the DMMU's small TLB.
*/
static inline uint16_t tlb_dsmall_size(void)
{
return 16;
}
 
/**
* Determine the number of entries in each DMMU's big TLB.
*/
static inline uint16_t tlb_dbig_size(void)
{
return 512;
}
 
/**
* Determine the number of entries in the IMMU's small TLB.
*/
static inline uint16_t tlb_ismall_size(void)
{
return 16;
}
 
/**
* Determine the number of entries in the IMMU's big TLB.
*/
static inline uint16_t tlb_ibig_size(void)
{
if (((ver_reg_t) ver_read()).impl == IMPL_ULTRASPARCIV_PLUS)
return 512;
else
return 128;
}
 
#endif
 
/** Read MMU Primary Context Register.
*
* @return Current value of Primary Context Register.
* @return Current value of Primary Context Register.
*/
static inline uint64_t mmu_primary_context_read(void)
{
286,7 → 155,7
 
/** Write MMU Primary Context Register.
*
* @param v New value of Primary Context Register.
* @param v New value of Primary Context Register.
*/
static inline void mmu_primary_context_write(uint64_t v)
{
296,7 → 165,7
 
/** Read MMU Secondary Context Register.
*
* @return Current value of Secondary Context Register.
* @return Current value of Secondary Context Register.
*/
static inline uint64_t mmu_secondary_context_read(void)
{
305,7 → 174,7
 
/** Write MMU Primary Context Register.
*
* @param v New value of Primary Context Register.
* @param v New value of Primary Context Register.
*/
static inline void mmu_secondary_context_write(uint64_t v)
{
313,18 → 182,15
flush_pipeline();
}
 
#if defined (US)
 
/** Read IMMU TLB Data Access Register.
*
* @param entry TLB Entry index.
* @param entry TLB Entry index.
*
* @return Current value of specified IMMU TLB Data Access
* Register.
* @return Current value of specified IMMU TLB Data Access Register.
*/
static inline uint64_t itlb_data_access_read(index_t entry)
{
itlb_data_access_addr_t reg;
tlb_data_access_addr_t reg;
reg.value = 0;
reg.tlb_entry = entry;
333,12 → 199,12
 
/** Write IMMU TLB Data Access Register.
*
* @param entry TLB Entry index.
* @param value Value to be written.
* @param entry TLB Entry index.
* @param value Value to be written.
*/
static inline void itlb_data_access_write(index_t entry, uint64_t value)
{
itlb_data_access_addr_t reg;
tlb_data_access_addr_t reg;
reg.value = 0;
reg.tlb_entry = entry;
348,14 → 214,13
 
/** Read DMMU TLB Data Access Register.
*
* @param entry TLB Entry index.
* @param entry TLB Entry index.
*
* @return Current value of specified DMMU TLB Data Access
* Register.
* @return Current value of specified DMMU TLB Data Access Register.
*/
static inline uint64_t dtlb_data_access_read(index_t entry)
{
dtlb_data_access_addr_t reg;
tlb_data_access_addr_t reg;
reg.value = 0;
reg.tlb_entry = entry;
364,12 → 229,12
 
/** Write DMMU TLB Data Access Register.
*
* @param entry TLB Entry index.
* @param value Value to be written.
* @param entry TLB Entry index.
* @param value Value to be written.
*/
static inline void dtlb_data_access_write(index_t entry, uint64_t value)
{
dtlb_data_access_addr_t reg;
tlb_data_access_addr_t reg;
reg.value = 0;
reg.tlb_entry = entry;
379,13 → 244,13
 
/** Read IMMU TLB Tag Read Register.
*
* @param entry TLB Entry index.
* @param entry TLB Entry index.
*
* @return Current value of specified IMMU TLB Tag Read Register.
* @return Current value of specified IMMU TLB Tag Read Register.
*/
static inline uint64_t itlb_tag_read_read(index_t entry)
{
itlb_tag_read_addr_t tag;
tlb_tag_read_addr_t tag;
 
tag.value = 0;
tag.tlb_entry = entry;
394,13 → 259,13
 
/** Read DMMU TLB Tag Read Register.
*
* @param entry TLB Entry index.
* @param entry TLB Entry index.
*
* @return Current value of specified DMMU TLB Tag Read Register.
* @return Current value of specified DMMU TLB Tag Read Register.
*/
static inline uint64_t dtlb_tag_read_read(index_t entry)
{
dtlb_tag_read_addr_t tag;
tlb_tag_read_addr_t tag;
 
tag.value = 0;
tag.tlb_entry = entry;
407,120 → 272,9
return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value);
}
 
#elif defined (US3)
 
 
/** Read IMMU TLB Data Access Register.
*
* @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG)
* @param entry TLB Entry index.
*
* @return Current value of specified IMMU TLB Data Access
* Register.
*/
static inline uint64_t itlb_data_access_read(int tlb, index_t entry)
{
itlb_data_access_addr_t reg;
reg.value = 0;
reg.tlb_number = tlb;
reg.local_tlb_entry = entry;
return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value);
}
 
/** Write IMMU TLB Data Access Register.
* @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG)
* @param entry TLB Entry index.
* @param value Value to be written.
*/
static inline void itlb_data_access_write(int tlb, index_t entry,
uint64_t value)
{
itlb_data_access_addr_t reg;
reg.value = 0;
reg.tlb_number = tlb;
reg.local_tlb_entry = entry;
asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value);
flush_pipeline();
}
 
/** Read DMMU TLB Data Access Register.
*
* @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG, TLB_DBIG)
* @param entry TLB Entry index.
*
* @return Current value of specified DMMU TLB Data Access
* Register.
*/
static inline uint64_t dtlb_data_access_read(int tlb, index_t entry)
{
dtlb_data_access_addr_t reg;
reg.value = 0;
reg.tlb_number = tlb;
reg.local_tlb_entry = entry;
return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value);
}
 
/** Write DMMU TLB Data Access Register.
*
* @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1)
* @param entry TLB Entry index.
* @param value Value to be written.
*/
static inline void dtlb_data_access_write(int tlb, index_t entry,
uint64_t value)
{
dtlb_data_access_addr_t reg;
reg.value = 0;
reg.tlb_number = tlb;
reg.local_tlb_entry = entry;
asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value);
membar();
}
 
/** Read IMMU TLB Tag Read Register.
*
* @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG)
* @param entry TLB Entry index.
*
* @return Current value of specified IMMU TLB Tag Read Register.
*/
static inline uint64_t itlb_tag_read_read(int tlb, index_t entry)
{
itlb_tag_read_addr_t tag;
 
tag.value = 0;
tag.tlb_number = tlb;
tag.local_tlb_entry = entry;
return asi_u64_read(ASI_ITLB_TAG_READ_REG, tag.value);
}
 
/** Read DMMU TLB Tag Read Register.
*
* @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1)
* @param entry TLB Entry index.
*
* @return Current value of specified DMMU TLB Tag Read Register.
*/
static inline uint64_t dtlb_tag_read_read(int tlb, index_t entry)
{
dtlb_tag_read_addr_t tag;
 
tag.value = 0;
tag.tlb_number = tlb;
tag.local_tlb_entry = entry;
return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value);
}
 
#endif
 
 
/** Write IMMU TLB Tag Access Register.
*
* @param v Value to be written.
* @param v Value to be written.
*/
static inline void itlb_tag_access_write(uint64_t v)
{
530,7 → 284,7
 
/** Read IMMU TLB Tag Access Register.
*
* @return Current value of IMMU TLB Tag Access Register.
* @return Current value of IMMU TLB Tag Access Register.
*/
static inline uint64_t itlb_tag_access_read(void)
{
539,7 → 293,7
 
/** Write DMMU TLB Tag Access Register.
*
* @param v Value to be written.
* @param v Value to be written.
*/
static inline void dtlb_tag_access_write(uint64_t v)
{
549,7 → 303,7
 
/** Read DMMU TLB Tag Access Register.
*
* @return Current value of DMMU TLB Tag Access Register.
* @return Current value of DMMU TLB Tag Access Register.
*/
static inline uint64_t dtlb_tag_access_read(void)
{
559,7 → 313,7
 
/** Write IMMU TLB Data in Register.
*
* @param v Value to be written.
* @param v Value to be written.
*/
static inline void itlb_data_in_write(uint64_t v)
{
569,7 → 323,7
 
/** Write DMMU TLB Data in Register.
*
* @param v Value to be written.
* @param v Value to be written.
*/
static inline void dtlb_data_in_write(uint64_t v)
{
579,7 → 333,7
 
/** Read ITLB Synchronous Fault Status Register.
*
* @return Current content of I-SFSR register.
* @return Current content of I-SFSR register.
*/
static inline uint64_t itlb_sfsr_read(void)
{
588,7 → 342,7
 
/** Write ITLB Synchronous Fault Status Register.
*
* @param v New value of I-SFSR register.
* @param v New value of I-SFSR register.
*/
static inline void itlb_sfsr_write(uint64_t v)
{
598,7 → 352,7
 
/** Read DTLB Synchronous Fault Status Register.
*
* @return Current content of D-SFSR register.
* @return Current content of D-SFSR register.
*/
static inline uint64_t dtlb_sfsr_read(void)
{
607,7 → 361,7
 
/** Write DTLB Synchronous Fault Status Register.
*
* @param v New value of D-SFSR register.
* @param v New value of D-SFSR register.
*/
static inline void dtlb_sfsr_write(uint64_t v)
{
617,7 → 371,7
 
/** Read DTLB Synchronous Fault Address Register.
*
* @return Current content of D-SFAR register.
* @return Current content of D-SFAR register.
*/
static inline uint64_t dtlb_sfar_read(void)
{
626,11 → 380,10
 
/** Perform IMMU TLB Demap Operation.
*
* @param type Selects between context and page demap (and entire MMU
* demap on US3).
* @param type Selects between context and page demap.
* @param context_encoding Specifies which Context register has Context ID for
* demap.
* @param page Address which is on the page to be demapped.
* demap.
* @param page Address which is on the page to be demapped.
*/
static inline void itlb_demap(int type, int context_encoding, uintptr_t page)
{
644,19 → 397,18
da.context = context_encoding;
da.vpn = pg.vpn;
/* da.value is the address within the ASI */
asi_u64_write(ASI_IMMU_DEMAP, da.value, 0);
 
asi_u64_write(ASI_IMMU_DEMAP, da.value, 0); /* da.value is the
* address within the
* ASI */
flush_pipeline();
}
 
/** Perform DMMU TLB Demap Operation.
*
* @param type Selects between context and page demap (and entire MMU
* demap on US3).
* @param type Selects between context and page demap.
* @param context_encoding Specifies which Context register has Context ID for
* demap.
* @param page Address which is on the page to be demapped.
* demap.
* @param page Address which is on the page to be demapped.
*/
static inline void dtlb_demap(int type, int context_encoding, uintptr_t page)
{
670,17 → 422,17
da.context = context_encoding;
da.vpn = pg.vpn;
/* da.value is the address within the ASI */
asi_u64_write(ASI_DMMU_DEMAP, da.value, 0);
 
asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); /* da.value is the
* address within the
* ASI */
membar();
}
 
extern void fast_instruction_access_mmu_miss(unative_t, istate_t *);
extern void fast_data_access_mmu_miss(tlb_tag_access_reg_t, istate_t *);
extern void fast_data_access_protection(tlb_tag_access_reg_t , istate_t *);
extern void fast_instruction_access_mmu_miss(unative_t unused, istate_t *istate);
extern void fast_data_access_mmu_miss(tlb_tag_access_reg_t tag, istate_t *istate);
extern void fast_data_access_protection(tlb_tag_access_reg_t tag , istate_t *istate);
 
extern void dtlb_insert_mapping(uintptr_t, uintptr_t, int, bool, bool);
extern void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable);
 
extern void dump_sfsr_and_sfar(void);
 
/branches/network/kernel/arch/sparc64/include/mm/cache_spec.h
38,20 → 38,19
/*
* The following macros are valid for the following processors:
*
* UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III,
* UltraSPARC III+, UltraSPARC IV, UltraSPARC IV+
* UltraSPARC, UltraSPARC II, UltraSPARC IIi
*
* Should we support other UltraSPARC processors, we need to make sure that
* the macros are defined correctly for them.
*/
#if defined (US)
 
#define DCACHE_SIZE (16 * 1024)
#elif defined (US3)
#define DCACHE_SIZE (64 * 1024)
#endif
#define DCACHE_LINE_SIZE 32
 
#define ICACHE_SIZE (16 * 1024)
#define ICACHE_WAYS 2
#define ICACHE_LINE_SIZE 32
 
#endif
 
/** @}
/branches/network/kernel/arch/sparc64/include/mm/frame.h
59,13 → 59,8
union frame_address {
uintptr_t address;
struct {
#if defined (US)
unsigned : 23;
uint64_t pfn : 28; /**< Physical Frame Number. */
#elif defined (US3)
unsigned : 21;
uint64_t pfn : 30; /**< Physical Frame Number. */
#endif
unsigned offset : 13; /**< Offset. */
} __attribute__ ((packed));
};
/branches/network/kernel/arch/sparc64/include/mm/cache.h
38,6 → 38,15
#include <mm/page.h>
#include <mm/frame.h>
 
#define dcache_flush_page(p) \
dcache_flush_color(PAGE_COLOR((p)))
#define dcache_flush_frame(p, f) \
dcache_flush_tag(PAGE_COLOR((p)), ADDR2PFN((f)));
 
extern void dcache_flush(void);
extern void dcache_flush_color(int c);
extern void dcache_flush_tag(int c, pfn_t tag);
 
#endif
 
/** @}
/branches/network/kernel/arch/sparc64/include/mm/tsb.h
107,55 → 107,6
asi_u64_write(ASI_DMMU, VA_DMMU_TSB_BASE, v);
}
 
#if defined (US3)
 
/** Write DTSB Primary Extension register.
*
* @param v New content of the DTSB Primary Extension register.
*/
static inline void dtsb_primary_extension_write(uint64_t v)
{
asi_u64_write(ASI_DMMU, VA_DMMU_PRIMARY_EXTENSION, v);
}
 
/** Write DTSB Secondary Extension register.
*
* @param v New content of the DTSB Secondary Extension register.
*/
static inline void dtsb_secondary_extension_write(uint64_t v)
{
asi_u64_write(ASI_DMMU, VA_DMMU_SECONDARY_EXTENSION, v);
}
 
/** Write DTSB Nucleus Extension register.
*
* @param v New content of the DTSB Nucleus Extension register.
*/
static inline void dtsb_nucleus_extension_write(uint64_t v)
{
asi_u64_write(ASI_DMMU, VA_DMMU_NUCLEUS_EXTENSION, v);
}
 
/** Write ITSB Primary Extension register.
*
* @param v New content of the ITSB Primary Extension register.
*/
static inline void itsb_primary_extension_write(uint64_t v)
{
asi_u64_write(ASI_IMMU, VA_IMMU_PRIMARY_EXTENSION, v);
}
 
/** Write ITSB Nucleus Extension register.
*
* @param v New content of the ITSB Nucleus Extension register.
*/
static inline void itsb_nucleus_extension_write(uint64_t v)
{
asi_u64_write(ASI_IMMU, VA_IMMU_NUCLEUS_EXTENSION, v);
}
 
#endif
 
/* Forward declarations. */
struct as;
struct pte;
/branches/network/kernel/arch/sparc64/include/mm/mmu.h
35,10 → 35,8
#ifndef KERN_sparc64_MMU_H_
#define KERN_sparc64_MMU_H_
 
#if defined(US)
/* LSU Control Register ASI. */
#define ASI_LSU_CONTROL_REG 0x45 /**< Load/Store Unit Control Register. */
#endif
 
/* I-MMU ASIs. */
#define ASI_IMMU 0x50
54,12 → 52,7
#define VA_IMMU_SFSR 0x18 /**< IMMU sync fault status register. */
#define VA_IMMU_TSB_BASE 0x28 /**< IMMU TSB base register. */
#define VA_IMMU_TAG_ACCESS 0x30 /**< IMMU TLB tag access register. */
#if defined (US3)
#define VA_IMMU_PRIMARY_EXTENSION 0x48 /**< IMMU TSB primary extension register */
#define VA_IMMU_NUCLEUS_EXTENSION 0x58 /**< IMMU TSB nucleus extension register */
#endif
 
 
/* D-MMU ASIs. */
#define ASI_DMMU 0x58
#define ASI_DMMU_TSB_8KB_PTR_REG 0x59
80,11 → 73,6
#define VA_DMMU_TAG_ACCESS 0x30 /**< DMMU TLB tag access register. */
#define VA_DMMU_VA_WATCHPOINT_REG 0x38 /**< DMMU VA data watchpoint register. */
#define VA_DMMU_PA_WATCHPOINT_REG 0x40 /**< DMMU PA data watchpoint register. */
#if defined (US3)
#define VA_DMMU_PRIMARY_EXTENSION 0x48 /**< DMMU TSB primary extension register */
#define VA_DMMU_SECONDARY_EXTENSION 0x50 /**< DMMU TSB secondary extension register */
#define VA_DMMU_NUCLEUS_EXTENSION 0x58 /**< DMMU TSB nucleus extension register */
#endif
 
#ifndef __ASM__
 
92,7 → 80,6
#include <arch/barrier.h>
#include <arch/types.h>
 
#if defined(US)
/** LSU Control Register. */
typedef union {
uint64_t value;
113,7 → 100,6
} __attribute__ ((packed));
} lsu_cr_reg_t;
#endif /* US */
 
#endif /* !def __ASM__ */
 
/branches/network/kernel/arch/sparc64/include/mm/tte.h
50,7 → 50,6
 
#include <arch/types.h>
 
/* TTE tag's VA_tag field contains bits <63:VA_TAG_PAGE_SHIFT> of the VA */
#define VA_TAG_PAGE_SHIFT 22
 
/** Translation Table Entry - Tag. */
76,13 → 75,8
unsigned nfo : 1; /**< No-Fault-Only. */
unsigned ie : 1; /**< Invert Endianness. */
unsigned soft2 : 9; /**< Software defined field. */
#if defined (US)
unsigned diag : 9; /**< Diagnostic data. */
unsigned pfn : 28; /**< Physical Address bits, bits 40:13. */
#elif defined (US3)
unsigned : 7; /**< Reserved. */
unsigned pfn : 30; /**< Physical Address bits, bits 42:13 */
#endif
unsigned soft : 6; /**< Software defined field. */
unsigned l : 1; /**< Lock. */
unsigned cp : 1; /**< Cacheable in physically indexed cache. */
/branches/network/kernel/arch/sparc64/include/barrier.h
82,8 → 82,6
asm volatile ("membar #Sync\n");
}
 
#if defined (US)
 
#define smc_coherence(a) \
{ \
write_barrier(); \
99,22 → 97,6
flush((void *)(a) + i); \
}
 
#elif defined (US3)
 
#define smc_coherence(a) \
{ \
write_barrier(); \
flush_pipeline(); \
}
 
#define smc_coherence_block(a, l) \
{ \
write_barrier(); \
flush_pipeline(); \
}
 
#endif /* defined(US3) */
 
#endif
 
/** @}
/branches/network/kernel/arch/sparc64/include/asm.h
42,56 → 42,7
#include <arch/register.h>
#include <config.h>
#include <arch/stack.h>
#include <arch/barrier.h>
 
static inline void pio_write_8(ioport8_t *port, uint8_t v)
{
*port = v;
memory_barrier();
}
 
static inline void pio_write_16(ioport16_t *port, uint16_t v)
{
*port = v;
memory_barrier();
}
 
static inline void pio_write_32(ioport32_t *port, uint32_t v)
{
*port = v;
memory_barrier();
}
 
static inline uint8_t pio_read_8(ioport8_t *port)
{
uint8_t rv;
 
rv = *port;
memory_barrier();
 
return rv;
}
 
static inline uint16_t pio_read_16(ioport16_t *port)
{
uint16_t rv;
 
rv = *port;
memory_barrier();
 
return rv;
}
 
static inline uint32_t pio_read_32(ioport32_t *port)
{
uint32_t rv;
 
rv = *port;
memory_barrier();
 
return rv;
}
 
/** Read Processor State register.
*
* @return Value of PSTATE register.
136,28 → 87,6
asm volatile ("wr %0, %1, %%tick_cmpr\n" : : "r" (v), "i" (0));
}
 
/** Read STICK_compare Register.
*
* @return Value of STICK_compare register.
*/
static inline uint64_t stick_compare_read(void)
{
uint64_t v;
asm volatile ("rd %%asr25, %0\n" : "=r" (v));
return v;
}
 
/** Write STICK_compare Register.
*
* @param v New value of STICK_comapre register.
*/
static inline void stick_compare_write(uint64_t v)
{
asm volatile ("wr %0, %1, %%asr25\n" : : "r" (v), "i" (0));
}
 
/** Read TICK Register.
*
* @return Value of TICK register.
429,6 → 358,15
asm volatile ("wrpr %g0, %g0, %tl\n");
}
 
/** Read UPA_CONFIG register.
*
* @return Value of the UPA_CONFIG register.
*/
static inline uint64_t upa_config_read(void)
{
return asi_u64_read(ASI_UPA_CONFIG, 0);
}
 
extern void cpu_halt(void);
extern void cpu_sleep(void);
extern void asm_delay_loop(const uint32_t usec);
/branches/network/kernel/arch/sparc64/include/cpu.h
35,6 → 35,15
#ifndef KERN_sparc64_CPU_H_
#define KERN_sparc64_CPU_H_
 
#include <arch/types.h>
#include <typedefs.h>
#include <arch/register.h>
#include <arch/asm.h>
 
#ifdef CONFIG_SMP
#include <arch/mm/cache.h>
#endif
 
#define MANUF_FUJITSU 0x04
#define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */
#define MANUF_SUN 0x3e
43,29 → 52,14
#define IMPL_ULTRASPARCII 0x11
#define IMPL_ULTRASPARCII_I 0x12
#define IMPL_ULTRASPARCII_E 0x13
#define IMPL_ULTRASPARCIII 0x14
#define IMPL_ULTRASPARCIII_PLUS 0x15
#define IMPL_ULTRASPARCIII_I 0x16
#define IMPL_ULTRASPARCIV 0x18
#define IMPL_ULTRASPARCIII 0x15
#define IMPL_ULTRASPARCIV_PLUS 0x19
 
#define IMPL_SPARC64V 0x5
 
#ifndef __ASM__
 
#include <arch/types.h>
#include <typedefs.h>
#include <arch/register.h>
#include <arch/regdef.h>
#include <arch/asm.h>
 
#ifdef CONFIG_SMP
#include <arch/mm/cache.h>
#endif
 
typedef struct {
uint32_t mid; /**< Processor ID as read from
UPA_CONFIG/FIREPLANE_CONFIG. */
UPA_CONFIG. */
ver_reg_t ver;
uint32_t clock_frequency; /**< Processor frequency in Hz. */
uint64_t next_tick_cmpr; /**< Next clock interrupt should be
72,28 → 66,8
generated when the TICK register
matches this value. */
} cpu_arch_t;
 
 
/**
* Reads the module ID (agent ID/CPUID) of the current CPU.
*/
static inline uint32_t read_mid(void)
{
uint64_t icbus_config = asi_u64_read(ASI_ICBUS_CONFIG, 0);
icbus_config = icbus_config >> ICBUS_CONFIG_MID_SHIFT;
#if defined (US)
return icbus_config & 0x1f;
#elif defined (US3)
if (((ver_reg_t) ver_read()).impl == IMPL_ULTRASPARCIII_I)
return icbus_config & 0x1f;
else
return icbus_config & 0x3ff;
#endif
}
 
#endif
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/sparc64/include/types.h
57,9 → 57,6
typedef uint64_t unative_t;
typedef int64_t native_t;
 
typedef struct {
} fncptr_t;
 
/**< Formats for uintptr_t, size_t, count_t and index_t */
#define PRIp "llx"
#define PRIs "llu"
/branches/network/kernel/arch/sparc64/include/trap/syscall.h
31,14 → 31,26
*/
/**
* @file
* @brief
* @brief This file contains the trap_instruction handler.
*
* The trap_instruction trap is used to implement syscalls.
*/
 
#ifndef KERN_sparc64_SYSCALL_TRAP_H_
#define KERN_sparc64_SYSCALL_TRAP_H_
 
#define TT_TRAP_INSTRUCTION_0 0x100
#define TT_TRAP_INSTRUCTION(n) (0x100 + (n))
#define TT_TRAP_INSTRUCTION_LAST TT_TRAP_INSTRUCTION(127)
 
#ifdef __ASM__
 
.macro TRAP_INSTRUCTION n
ba trap_instruction_handler
mov TT_TRAP_INSTRUCTION(\n) - TT_TRAP_INSTRUCTION(0), %g2
.endm
 
#endif /* __ASM__ */
 
#endif
 
/** @}
/branches/network/kernel/arch/sparc64/include/trap/interrupt.h
49,43 → 49,21
 
 
/* Interrupt ASI registers. */
#define ASI_INTR_W 0x77
#define ASI_UDB_INTR_W 0x77
#define ASI_INTR_DISPATCH_STATUS 0x48
#define ASI_INTR_R 0x7f
#define ASI_UDB_INTR_R 0x7f
#define ASI_INTR_RECEIVE 0x49
 
/* VA's used with ASI_INTR_W register. */
#if defined (US)
/* VA's used with ASI_UDB_INTR_W register. */
#define ASI_UDB_INTR_W_DATA_0 0x40
#define ASI_UDB_INTR_W_DATA_1 0x50
#define ASI_UDB_INTR_W_DATA_2 0x60
#elif defined (US3)
#define VA_INTR_W_DATA_0 0x40
#define VA_INTR_W_DATA_1 0x48
#define VA_INTR_W_DATA_2 0x50
#define VA_INTR_W_DATA_3 0x58
#define VA_INTR_W_DATA_4 0x60
#define VA_INTR_W_DATA_5 0x68
#define VA_INTR_W_DATA_6 0x80
#define VA_INTR_W_DATA_7 0x88
#endif
#define VA_INTR_W_DISPATCH 0x70
#define ASI_UDB_INTR_W_DISPATCH 0x70
 
/* VA's used with ASI_INTR_R register. */
#if defined(US)
/* VA's used with ASI_UDB_INTR_R register. */
#define ASI_UDB_INTR_R_DATA_0 0x40
#define ASI_UDB_INTR_R_DATA_1 0x50
#define ASI_UDB_INTR_R_DATA_2 0x60
#elif defined (US3)
#define VA_INTR_R_DATA_0 0x40
#define VA_INTR_R_DATA_1 0x48
#define VA_INTR_R_DATA_2 0x50
#define VA_INTR_R_DATA_3 0x58
#define VA_INTR_R_DATA_4 0x60
#define VA_INTR_R_DATA_5 0x68
#define VA_INTR_R_DATA_6 0x80
#define VA_INTR_R_DATA_7 0x88
#endif
 
/* Shifts in the Interrupt Vector Dispatch virtual address. */
#define INTR_VEC_DISPATCH_MID_SHIFT 14
/branches/network/kernel/arch/sparc64/include/trap/regwin.h
39,7 → 39,6
 
#include <arch/stack.h>
#include <arch/arch.h>
#include <align.h>
 
#define TT_CLEAN_WINDOW 0x24
#define TT_SPILL_0_NORMAL 0x80 /* kernel spills */
73,11 → 72,6
#define I6_OFFSET 112
#define I7_OFFSET 120
 
/* Uspace Window Buffer constants. */
#define UWB_SIZE ((NWINDOWS - 1) * STACK_WINDOW_SAVE_AREA_SIZE)
#define UWB_ALIGNMENT 1024
#define UWB_ASIZE ALIGN_UP(UWB_SIZE, UWB_ALIGNMENT)
 
#ifdef __ASM__
 
/*
/branches/network/kernel/arch/sparc64/include/drivers/sgcn.h
File deleted
/branches/network/kernel/arch/sparc64/include/drivers/scr.h
42,14 → 42,12
SCR_UNKNOWN,
SCR_ATYFB,
SCR_FFB,
SCR_CGSIX,
SCR_XVR
SCR_CGSIX
} scr_type_t;
 
extern scr_type_t scr_type;
 
extern void scr_init(ofw_tree_node_t *node);
extern void scr_redraw(void);
 
#endif
 
/branches/network/kernel/arch/sparc64/include/drivers/z8530.h
0,0 → 1,140
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup sparc64
* @{
*/
/** @file
*/
 
#ifndef KERN_sparc64_Z8530_H_
#define KERN_sparc64_Z8530_H_
 
#include <arch/types.h>
#include <arch/drivers/kbd.h>
 
#define Z8530_CHAN_A 4
#define Z8530_CHAN_B 0
 
#define WR0 0
#define WR1 1
#define WR2 2
#define WR3 3
#define WR4 4
#define WR5 5
#define WR6 6
#define WR7 7
#define WR8 8
#define WR9 9
#define WR10 10
#define WR11 11
#define WR12 12
#define WR13 13
#define WR14 14
#define WR15 15
 
#define RR0 0
#define RR1 1
#define RR2 2
#define RR3 3
#define RR8 8
#define RR10 10
#define RR12 12
#define RR13 13
#define RR14 14
#define RR15 15
 
/* Write Register 0 */
#define WR0_TX_IP_RST (0x5<<3) /** Reset pending TX interrupt. */
#define WR0_ERR_RST (0x6<<3)
 
/* Write Register 1 */
#define WR1_RID (0x0<<3) /** Receive Interrupts Disabled. */
#define WR1_RIFCSC (0x1<<3) /** Receive Interrupt on First Character or Special Condition. */
#define WR1_IARCSC (0x2<<3) /** Interrupt on All Receive Characters or Special Conditions. */
#define WR1_RISC (0x3<<3) /** Receive Interrupt on Special Condition. */
#define WR1_PISC (0x1<<2) /** Parity Is Special Condition. */
 
/* Write Register 3 */
#define WR3_RX_ENABLE (0x1<<0) /** Rx Enable. */
#define WR3_RX8BITSCH (0x3<<6) /** 8-bits per character. */
 
/* Write Register 9 */
#define WR9_MIE (0x1<<3) /** Master Interrupt Enable. */
 
/* Read Register 0 */
#define RR0_RCA (0x1<<0) /** Receive Character Available. */
 
/** Structure representing the z8530 device. */
typedef struct {
devno_t devno;
volatile uint8_t *reg; /** Memory mapped registers of the z8530. */
} z8530_t;
 
static inline void z8530_write(z8530_t *dev, index_t chan, uint8_t reg, uint8_t val)
{
/*
* Registers 8-15 will automatically issue the Point High
* command as their bit 3 is 1.
*/
dev->reg[WR0+chan] = reg; /* select register */
dev->reg[WR0+chan] = val; /* write value */
}
 
static inline void z8530_write_a(z8530_t *dev, uint8_t reg, uint8_t val)
{
z8530_write(dev, Z8530_CHAN_A, reg, val);
}
static inline void z8530_write_b(z8530_t *dev, uint8_t reg, uint8_t val)
{
z8530_write(dev, Z8530_CHAN_B, reg, val);
}
 
static inline uint8_t z8530_read(z8530_t *dev, index_t chan, uint8_t reg)
{
/*
* Registers 8-15 will automatically issue the Point High
* command as their bit 3 is 1.
*/
dev->reg[WR0+chan] = reg; /* select register */
return dev->reg[WR0+chan];
}
 
static inline uint8_t z8530_read_a(z8530_t *dev, uint8_t reg)
{
return z8530_read(dev, Z8530_CHAN_A, reg);
}
static inline uint8_t z8530_read_b(z8530_t *dev, uint8_t reg)
{
return z8530_read(dev, Z8530_CHAN_B, reg);
}
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/sparc64/include/drivers/pci.h
51,8 → 51,8
};
 
struct pci_operations {
void (* enable_interrupt)(pci_t *, int);
void (* clear_interrupt)(pci_t *, int);
void (* enable_interrupt)(pci_t *pci, int inr);
void (* clear_interrupt)(pci_t *pci, int inr);
};
 
struct pci {
61,9 → 61,9
volatile uint64_t *reg; /**< Registers including interrupt registers. */
};
 
extern pci_t *pci_init(ofw_tree_node_t *);
extern void pci_enable_interrupt(pci_t *, int);
extern void pci_clear_interrupt(void *, int);
extern pci_t *pci_init(ofw_tree_node_t *node);
extern void pci_enable_interrupt(pci_t *pci, int inr);
extern void pci_clear_interrupt(pci_t *pci, int inr);
 
#endif
 
/branches/network/kernel/arch/sparc64/include/drivers/fhc.h
44,9 → 44,9
 
extern fhc_t *central_fhc;
 
extern fhc_t *fhc_init(ofw_tree_node_t *);
extern void fhc_enable_interrupt(fhc_t *, int);
extern void fhc_clear_interrupt(void *, int);
extern fhc_t *fhc_init(ofw_tree_node_t *node);
extern void fhc_enable_interrupt(fhc_t *fhc, int inr);
extern void fhc_clear_interrupt(fhc_t *fhc, int inr);
 
#endif
 
/branches/network/kernel/arch/sparc64/include/drivers/kbd.h
41,8 → 41,7
typedef enum {
KBD_UNKNOWN,
KBD_Z8530,
KBD_NS16550,
KBD_SGCN
KBD_NS16550
} kbd_type_t;
 
extern kbd_type_t kbd_type;
/branches/network/kernel/arch/sparc64/include/drivers/ns16550.h
0,0 → 1,102
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup sparc64
* @{
*/
/** @file
*/
 
#ifndef KERN_sparc64_NS16550_H_
#define KERN_sparc64_NS16550_H_
 
#include <arch/types.h>
#include <arch/drivers/kbd.h>
 
/* NS16550 registers */
#define RBR_REG 0 /** Receiver Buffer Register. */
#define IER_REG 1 /** Interrupt Enable Register. */
#define IIR_REG 2 /** Interrupt Ident Register (read). */
#define FCR_REG 2 /** FIFO control register (write). */
#define LCR_REG 3 /** Line Control register. */
#define LSR_REG 5 /** Line Status Register. */
 
#define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */
 
#define LCR_DLAB 0x80 /** Divisor Latch Access bit. */
 
/** Structure representing the ns16550 device. */
typedef struct {
devno_t devno;
volatile uint8_t *reg; /** Memory mapped registers of the ns16550. */
} ns16550_t;
 
static inline uint8_t ns16550_rbr_read(ns16550_t *dev)
{
return dev->reg[RBR_REG];
}
 
static inline uint8_t ns16550_ier_read(ns16550_t *dev)
{
return dev->reg[IER_REG];
}
 
static inline void ns16550_ier_write(ns16550_t *dev, uint8_t v)
{
dev->reg[IER_REG] = v;
}
 
static inline uint8_t ns16550_iir_read(ns16550_t *dev)
{
return dev->reg[IIR_REG];
}
 
static inline void ns16550_fcr_write(ns16550_t *dev, uint8_t v)
{
dev->reg[FCR_REG] = v;
}
 
static inline uint8_t ns16550_lcr_read(ns16550_t *dev)
{
return dev->reg[LCR_REG];
}
 
static inline void ns16550_lcr_write(ns16550_t *dev, uint8_t v)
{
dev->reg[LCR_REG] = v;
}
 
static inline uint8_t ns16550_lsr_read(ns16550_t *dev)
{
return dev->reg[LSR_REG];
}
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/sparc64/include/boot/boot.h
48,12 → 48,9
#define TASKMAP_MAX_RECORDS 32
#define MEMMAP_MAX_RECORDS 32
 
#define BOOTINFO_TASK_NAME_BUFLEN 32
 
typedef struct {
void * addr;
uint32_t size;
char name[BOOTINFO_TASK_NAME_BUFLEN];
} utask_t;
 
typedef struct {
/branches/network/kernel/arch/sparc64/include/fpu_context.h
37,6 → 37,7
 
#include <arch/types.h>
 
#define ARCH_HAS_FPU
#define FPU_CONTEXT_ALIGN 8
 
typedef struct {
/branches/network/kernel/arch/sparc64/include/regdef.h
55,11 → 55,8
#define WSTATE_NORMAL(n) (n)
#define WSTATE_OTHER(n) ((n) << 3)
 
/*
* The following definitions concern the UPA_CONFIG register on US and the
* FIREPLANE_CONFIG register on US3.
*/
#define ICBUS_CONFIG_MID_SHIFT 17
#define UPA_CONFIG_MID_SHIFT 17
#define UPA_CONFIG_MID_MASK 0x1f
 
#endif
 
/branches/network/kernel/arch/sparc64/include/arch.h
41,16 → 41,10
#define ASI_AIUS 0x11 /** Access to secondary context with user privileges. */
#define ASI_NUCLEUS_QUAD_LDD 0x24 /** ASI for 16-byte atomic loads. */
#define ASI_DCACHE_TAG 0x47 /** ASI D-Cache Tag. */
#define ASI_ICBUS_CONFIG 0x4a /** ASI of the UPA_CONFIG/FIREPLANE_CONFIG register. */
#define ASI_UPA_CONFIG 0x4a /** ASI of the UPA_CONFIG register. */
 
#define NWINDOWS 8 /** Number of register window sets. */
 
#ifndef __ASM__
 
extern void arch_pre_main(void);
 
#endif /* __ASM__ */
 
#endif
 
/** @}
/branches/network/kernel/arch/sparc64/include/register.h
117,6 → 117,23
};
typedef union fprs_reg fprs_reg_t;
 
/** UPA_CONFIG register.
*
* Note that format of this register differs significantly from
* processor version to version. The format defined here
* is the common subset for all supported processor versions.
*/
union upa_config {
uint64_t value;
struct {
uint64_t : 34;
unsigned pcon : 8; /**< Processor configuration. */
unsigned mid : 5; /**< Module (processor) ID register. */
unsigned pcap : 17; /**< Processor capabilities. */
} __attribute__ ((packed));
};
typedef union upa_config upa_config_t;
 
#endif
 
/** @}
/branches/network/kernel/arch/sparc64/Makefile.inc
29,6 → 29,10
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
BFD_NAME = elf64-sparc
BFD_ARCH = sparc
BFD = binary
42,55 → 46,80
 
DEFS += -D__64_BITS__
 
ifeq ($(PROCESSOR),us)
DEFS += -DUS
endif
## Own configuration directives
#
 
ifeq ($(PROCESSOR),us3)
DEFS += -DUS3
## Compile with page hash table support.
#
 
CONFIG_PAGE_HT = y
DEFS += -DCONFIG_PAGE_HT
 
## Compile with support for address space identifiers.
#
 
CONFIG_ASID = y
CONFIG_ASID_FIFO = y
 
## Compile with support for framebuffer.
#
 
CONFIG_FB = y
 
## Compile with support for Sun keyboard.
#
 
CONFIG_SUN_KBD = y
 
## Compile with support for OpenFirmware device tree.
#
 
CONFIG_OFW_TREE = y
 
ifeq ($(CONFIG_SMP),y)
DEFS += -DCONFIG_SMP
endif
 
ARCH_SOURCES = \
arch/$(KARCH)/src/cpu/cpu.c \
arch/$(KARCH)/src/asm.S \
arch/$(KARCH)/src/panic.S \
arch/$(KARCH)/src/console.c \
arch/$(KARCH)/src/context.S \
arch/$(KARCH)/src/fpu_context.c \
arch/$(KARCH)/src/dummy.s \
arch/$(KARCH)/src/mm/as.c \
arch/$(KARCH)/src/mm/cache.S \
arch/$(KARCH)/src/mm/frame.c \
arch/$(KARCH)/src/mm/page.c \
arch/$(KARCH)/src/mm/tlb.c \
arch/$(KARCH)/src/sparc64.c \
arch/$(KARCH)/src/start.S \
arch/$(KARCH)/src/proc/scheduler.c \
arch/$(KARCH)/src/proc/thread.c \
arch/$(KARCH)/src/trap/mmu.S \
arch/$(KARCH)/src/trap/trap_table.S \
arch/$(KARCH)/src/trap/trap.c \
arch/$(KARCH)/src/trap/exception.c \
arch/$(KARCH)/src/trap/interrupt.c \
arch/$(KARCH)/src/ddi/ddi.c \
arch/$(KARCH)/src/drivers/tick.c \
arch/$(KARCH)/src/drivers/kbd.c \
arch/$(KARCH)/src/drivers/sgcn.c \
arch/$(KARCH)/src/drivers/pci.c \
arch/$(KARCH)/src/drivers/fhc.c
arch/$(ARCH)/src/cpu/cpu.c \
arch/$(ARCH)/src/asm.S \
arch/$(ARCH)/src/panic.S \
arch/$(ARCH)/src/console.c \
arch/$(ARCH)/src/context.S \
arch/$(ARCH)/src/fpu_context.c \
arch/$(ARCH)/src/dummy.s \
arch/$(ARCH)/src/mm/as.c \
arch/$(ARCH)/src/mm/cache.S \
arch/$(ARCH)/src/mm/frame.c \
arch/$(ARCH)/src/mm/page.c \
arch/$(ARCH)/src/mm/tlb.c \
arch/$(ARCH)/src/sparc64.c \
arch/$(ARCH)/src/start.S \
arch/$(ARCH)/src/proc/scheduler.c \
arch/$(ARCH)/src/proc/thread.c \
arch/$(ARCH)/src/trap/mmu.S \
arch/$(ARCH)/src/trap/trap_table.S \
arch/$(ARCH)/src/trap/trap.c \
arch/$(ARCH)/src/trap/exception.c \
arch/$(ARCH)/src/trap/interrupt.c \
arch/$(ARCH)/src/ddi/ddi.c \
arch/$(ARCH)/src/drivers/tick.c \
arch/$(ARCH)/src/drivers/kbd.c \
arch/$(ARCH)/src/drivers/scr.c \
arch/$(ARCH)/src/drivers/pci.c
 
ifeq ($(CONFIG_FB),y)
ARCH_SOURCES += \
arch/$(KARCH)/src/drivers/scr.c
endif
 
ifeq ($(CONFIG_SMP),y)
ARCH_SOURCES += \
arch/$(KARCH)/src/smp/ipi.c \
arch/$(KARCH)/src/smp/smp.c
ARCH_SOURCES += \
arch/$(ARCH)/src/smp/ipi.c \
arch/$(ARCH)/src/smp/smp.c
endif
 
ifeq ($(CONFIG_TSB),y)
ARCH_SOURCES += \
arch/$(KARCH)/src/mm/tsb.c
ARCH_SOURCES += \
arch/$(ARCH)/src/mm/tsb.c
endif
 
ifdef CONFIG_Z8530
ARCH_SOURCES += \
arch/$(ARCH)/src/drivers/fhc.c
endif
/branches/network/kernel/arch/sparc64/src/mm/cache.S
47,3 → 47,45
retl
! beware SF Erratum #51, do not put the MEMBAR here
nop
 
/** Flush only D-cache lines of one virtual color.
*
* @param o0 Virtual color to be flushed.
*/
.global dcache_flush_color
dcache_flush_color:
mov (DCACHE_SIZE / DCACHE_LINE_SIZE) / 2, %g1
set DCACHE_SIZE / 2, %g2
sllx %g2, %o0, %g2
sub %g2, DCACHE_LINE_SIZE, %g2
0: stxa %g0, [%g2] ASI_DCACHE_TAG
membar #Sync
subcc %g1, 1, %g1
bnz,pt %xcc, 0b
sub %g2, DCACHE_LINE_SIZE, %g2
retl
nop
 
/** Flush only D-cache lines of one virtual color and one tag.
*
* @param o0 Virtual color to lookup the tag.
* @param o1 Tag of the cachelines to be flushed.
*/
.global dcache_flush_tag
dcache_flush_tag:
mov (DCACHE_SIZE / DCACHE_LINE_SIZE) / 2, %g1
set DCACHE_SIZE / 2, %g2
sllx %g2, %o0, %g2
sub %g2, DCACHE_LINE_SIZE, %g2
0: ldxa [%g2] ASI_DCACHE_TAG, %g3
srlx %g3, DCACHE_TAG_SHIFT, %g3
cmp %g3, %o1
bnz 1f
nop
stxa %g0, [%g2] ASI_DCACHE_TAG
membar #Sync
1: subcc %g1, 1, %g1
bnz,pt %xcc, 0b
sub %g2, DCACHE_LINE_SIZE, %g2
retl
nop
/branches/network/kernel/arch/sparc64/src/mm/as.c
164,25 → 164,7
itsb_base_write(tsb_base.value);
tsb_base.base = ((uintptr_t) as->arch.dtsb) >> MMU_PAGE_WIDTH;
dtsb_base_write(tsb_base.value);
#if defined (US3)
/*
* Clear the extension registers.
* In HelenOS, primary and secondary context registers contain
* equal values and kernel misses (context 0, ie. the nucleus context)
* are excluded from the TSB miss handler, so it makes no sense
* to have separate TSBs for primary, secondary and nucleus contexts.
* Clearing the extension registers will ensure that the value of the
* TSB Base register will be used as an address of TSB, making the code
* compatible with the US port.
*/
itsb_primary_extension_write(0);
itsb_nucleus_extension_write(0);
dtsb_primary_extension_write(0);
dtsb_secondary_extension_write(0);
dtsb_nucleus_extension_write(0);
#endif
#endif
}
 
/** Perform sparc64-specific tasks when an address space is removed from the
/branches/network/kernel/arch/sparc64/src/mm/tlb.c
54,13 → 54,14
#include <arch/mm/tsb.h>
#endif
 
static void dtlb_pte_copy(pte_t *, index_t, bool);
static void itlb_pte_copy(pte_t *, index_t);
static void do_fast_instruction_access_mmu_miss_fault(istate_t *, const char *);
static void do_fast_data_access_mmu_miss_fault(istate_t *, tlb_tag_access_reg_t,
const char *);
static void do_fast_data_access_protection_fault(istate_t *,
tlb_tag_access_reg_t, const char *);
static void dtlb_pte_copy(pte_t *t, index_t index, bool ro);
static void itlb_pte_copy(pte_t *t, index_t index);
static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate,
const char *str);
static void do_fast_data_access_mmu_miss_fault(istate_t *istate,
tlb_tag_access_reg_t tag, const char *str);
static void do_fast_data_access_protection_fault(istate_t *istate,
tlb_tag_access_reg_t tag, const char *str);
 
char *context_encoding[] = {
"Primary",
85,11 → 86,11
 
/** Insert privileged mapping into DMMU TLB.
*
* @param page Virtual page address.
* @param frame Physical frame address.
* @param pagesize Page size.
* @param locked True for permanent mappings, false otherwise.
* @param cacheable True if the mapping is cacheable, false otherwise.
* @param page Virtual page address.
* @param frame Physical frame address.
* @param pagesize Page size.
* @param locked True for permanent mappings, false otherwise.
* @param cacheable True if the mapping is cacheable, false otherwise.
*/
void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize,
bool locked, bool cacheable)
102,7 → 103,7
pg.address = page;
fr.address = frame;
 
tag.context = ASID_KERNEL;
tag.value = ASID_KERNEL;
tag.vpn = pg.vpn;
 
dtlb_tag_access_write(tag.value);
125,10 → 126,10
 
/** Copy PTE to TLB.
*
* @param t Page Table Entry to be copied.
* @param index Zero if lower 8K-subpage, one if higher 8K-subpage.
* @param ro If true, the entry will be created read-only, regardless
* of its w field.
* @param t Page Table Entry to be copied.
* @param index Zero if lower 8K-subpage, one if higher 8K-subpage.
* @param ro If true, the entry will be created read-only, regardless of its
* w field.
*/
void dtlb_pte_copy(pte_t *t, index_t index, bool ro)
{
164,8 → 165,8
 
/** Copy PTE to ITLB.
*
* @param t Page Table Entry to be copied.
* @param index Zero if lower 8K-subpage, one if higher 8K-subpage.
* @param t Page Table Entry to be copied.
* @param index Zero if lower 8K-subpage, one if higher 8K-subpage.
*/
void itlb_pte_copy(pte_t *t, index_t index)
{
234,11 → 235,10
* Note that some faults (e.g. kernel faults) were already resolved by the
* low-level, assembly language part of the fast_data_access_mmu_miss handler.
*
* @param tag Content of the TLB Tag Access register as it existed
* when the trap happened. This is to prevent confusion
* created by clobbered Tag Access register during a nested
* DTLB miss.
* @param istate Interrupted state saved on the stack.
* @param tag Content of the TLB Tag Access register as it existed when the
* trap happened. This is to prevent confusion created by clobbered
* Tag Access register during a nested DTLB miss.
* @param istate Interrupted state saved on the stack.
*/
void fast_data_access_mmu_miss(tlb_tag_access_reg_t tag, istate_t *istate)
{
287,11 → 287,10
 
/** DTLB protection fault handler.
*
* @param tag Content of the TLB Tag Access register as it existed
* when the trap happened. This is to prevent confusion
* created by clobbered Tag Access register during a nested
* DTLB miss.
* @param istate Interrupted state saved on the stack.
* @param tag Content of the TLB Tag Access register as it existed when the
* trap happened. This is to prevent confusion created by clobbered
* Tag Access register during a nested DTLB miss.
* @param istate Interrupted state saved on the stack.
*/
void fast_data_access_protection(tlb_tag_access_reg_t tag, istate_t *istate)
{
332,26 → 331,6
}
}
 
/** Print TLB entry (for debugging purposes).
*
* The diag field has been left out in order to make this function more generic
* (there is no diag field in US3 architeture).
*
* @param i TLB entry number
* @param t TLB entry tag
* @param d TLB entry data
*/
static void print_tlb_entry(int i, tlb_tag_read_reg_t t, tlb_data_t d)
{
printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
"ie=%d, soft2=%#x, pfn=%#x, soft=%#x, l=%d, "
"cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
t.context, d.v, d.size, d.nfo, d.ie, d.soft2,
d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
}
 
#if defined (US)
 
/** Print contents of both TLBs. */
void tlb_print(void)
{
363,7 → 342,12
for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
d.value = itlb_data_access_read(i);
t.value = itlb_tag_read_read(i);
print_tlb_entry(i, t, d);
 
printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
"ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, "
"cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag,
d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
}
 
printf("D-TLB contents:\n");
370,63 → 354,22
for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
d.value = dtlb_data_access_read(i);
t.value = dtlb_tag_read_read(i);
print_tlb_entry(i, t, d);
printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
"ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, "
"cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag,
d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
}
}
 
#elif defined (US3)
 
/** Print contents of all TLBs. */
void tlb_print(void)
{
int i;
tlb_data_t d;
tlb_tag_read_reg_t t;
printf("TLB_ISMALL contents:\n");
for (i = 0; i < tlb_ismall_size(); i++) {
d.value = dtlb_data_access_read(TLB_ISMALL, i);
t.value = dtlb_tag_read_read(TLB_ISMALL, i);
print_tlb_entry(i, t, d);
}
printf("TLB_IBIG contents:\n");
for (i = 0; i < tlb_ibig_size(); i++) {
d.value = dtlb_data_access_read(TLB_IBIG, i);
t.value = dtlb_tag_read_read(TLB_IBIG, i);
print_tlb_entry(i, t, d);
}
printf("TLB_DSMALL contents:\n");
for (i = 0; i < tlb_dsmall_size(); i++) {
d.value = dtlb_data_access_read(TLB_DSMALL, i);
t.value = dtlb_tag_read_read(TLB_DSMALL, i);
print_tlb_entry(i, t, d);
}
printf("TLB_DBIG_1 contents:\n");
for (i = 0; i < tlb_dbig_size(); i++) {
d.value = dtlb_data_access_read(TLB_DBIG_0, i);
t.value = dtlb_tag_read_read(TLB_DBIG_0, i);
print_tlb_entry(i, t, d);
}
printf("TLB_DBIG_2 contents:\n");
for (i = 0; i < tlb_dbig_size(); i++) {
d.value = dtlb_data_access_read(TLB_DBIG_1, i);
t.value = dtlb_tag_read_read(TLB_DBIG_1, i);
print_tlb_entry(i, t, d);
}
}
 
#endif
 
void do_fast_instruction_access_mmu_miss_fault(istate_t *istate,
const char *str)
{
fault_if_from_uspace(istate, "%s.", str);
fault_if_from_uspace(istate, "%s\n", str);
dump_istate(istate);
panic("%s.", str);
panic("%s\n", str);
}
 
void do_fast_data_access_mmu_miss_fault(istate_t *istate,
436,12 → 379,12
 
va = tag.vpn << MMU_PAGE_WIDTH;
if (tag.context) {
fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d).", str, va,
fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va,
tag.context);
}
dump_istate(istate);
printf("Faulting page: %p, ASID=%d.\n", va, tag.context);
panic("%s.", str);
printf("Faulting page: %p, ASID=%d\n", va, tag.context);
panic("%s\n", str);
}
 
void do_fast_data_access_protection_fault(istate_t *istate,
452,12 → 395,12
va = tag.vpn << MMU_PAGE_WIDTH;
 
if (tag.context) {
fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d).", str, va,
fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va,
tag.context);
}
printf("Faulting page: %p, ASID=%d\n", va, tag.context);
dump_istate(istate);
panic("%s.", str);
panic("%s\n", str);
}
 
void dump_sfsr_and_sfar(void)
468,71 → 411,30
sfsr.value = dtlb_sfsr_read();
sfar = dtlb_sfar_read();
#if defined (US)
printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, "
"fv=%d\n", sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w,
sfsr.ow, sfsr.fv);
#elif defined (US3)
printf("DTLB SFSR: nf=%d, asi=%#x, tm=%d, ft=%#x, e=%d, ct=%d, pr=%d, "
"w=%d, ow=%d, fv=%d\n", sfsr.nf, sfsr.asi, sfsr.tm, sfsr.ft,
sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, sfsr.ow, sfsr.fv);
#endif
printf("DTLB SFAR: address=%p\n", sfar);
dtlb_sfsr_write(0);
}
 
#if defined (US3)
/** Invalidates given TLB entry if and only if it is non-locked or global.
*
* @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1,
* TLB_ISMALL, TLB_IBIG).
* @param entry Entry index within the given TLB.
*/
static void tlb_invalidate_entry(int tlb, index_t entry)
/** Invalidate all unlocked ITLB and DTLB entries. */
void tlb_invalidate_all(void)
{
int i;
tlb_data_t d;
tlb_tag_read_reg_t t;
if (tlb == TLB_DSMALL || tlb == TLB_DBIG_0 || tlb == TLB_DBIG_1) {
d.value = dtlb_data_access_read(tlb, entry);
if (!d.l || d.g) {
t.value = dtlb_tag_read_read(tlb, entry);
d.v = false;
dtlb_tag_access_write(t.value);
dtlb_data_access_write(tlb, entry, d.value);
}
} else if (tlb == TLB_ISMALL || tlb == TLB_IBIG) {
d.value = itlb_data_access_read(tlb, entry);
if (!d.l || d.g) {
t.value = itlb_tag_read_read(tlb, entry);
d.v = false;
itlb_tag_access_write(t.value);
itlb_data_access_write(tlb, entry, d.value);
}
}
}
#endif
 
/** Invalidate all unlocked ITLB and DTLB entries. */
void tlb_invalidate_all(void)
{
int i;
/*
* Walk all ITLB and DTLB entries and remove all unlocked mappings.
*
* The kernel doesn't use global mappings so any locked global mappings
* found must have been created by someone else. Their only purpose now
* found must have been created by someone else. Their only purpose now
* is to collide with proper mappings. Invalidate immediately. It should
* be safe to invalidate them as late as now.
*/
 
#if defined (US)
tlb_data_t d;
tlb_tag_read_reg_t t;
 
for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
d.value = itlb_data_access_read(i);
if (!d.l || d.g) {
542,7 → 444,7
itlb_data_access_write(i, d.value);
}
}
 
for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
d.value = dtlb_data_access_read(i);
if (!d.l || d.g) {
552,21 → 454,7
dtlb_data_access_write(i, d.value);
}
}
 
#elif defined (US3)
 
for (i = 0; i < tlb_ismall_size(); i++)
tlb_invalidate_entry(TLB_ISMALL, i);
for (i = 0; i < tlb_ibig_size(); i++)
tlb_invalidate_entry(TLB_IBIG, i);
for (i = 0; i < tlb_dsmall_size(); i++)
tlb_invalidate_entry(TLB_DSMALL, i);
for (i = 0; i < tlb_dbig_size(); i++)
tlb_invalidate_entry(TLB_DBIG_0, i);
for (i = 0; i < tlb_dbig_size(); i++)
tlb_invalidate_entry(TLB_DBIG_1, i);
#endif
 
}
 
/** Invalidate all ITLB and DTLB entries that belong to specified ASID
596,9 → 484,9
/** Invalidate all ITLB and DTLB entries for specified page range in specified
* address space.
*
* @param asid Address Space ID.
* @param page First page which to sweep out from ITLB and DTLB.
* @param cnt Number of ITLB and DTLB entries to invalidate.
* @param asid Address Space ID.
* @param page First page which to sweep out from ITLB and DTLB.
* @param cnt Number of ITLB and DTLB entries to invalidate.
*/
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
{
/branches/network/kernel/arch/sparc64/src/mm/frame.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup sparc64mm
/** @addtogroup sparc64mm
* @{
*/
/** @file
79,6 → 79,7
*/
frame_mark_unavailable(ADDR2PFN(KA2PA(PFN2ADDR(0))), 1);
}
}
 
/** @}
/branches/network/kernel/arch/sparc64/src/mm/page.c
1,5 → 1,5
/*
* Copyright (c) 2009 Jakub Jermar
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup sparc64mm
/** @addtogroup sparc64mm
* @{
*/
/** @file
42,27 → 42,126
#include <align.h>
#include <config.h>
 
#ifdef CONFIG_SMP
/** Entries locked in DTLB of BSP.
*
* Application processors need to have the same locked entries in their DTLBs as
* the bootstrap processor.
*/
static struct {
uintptr_t virt_page;
uintptr_t phys_page;
int pagesize_code;
} bsp_locked_dtlb_entry[DTLB_ENTRY_COUNT];
 
/** Number of entries in bsp_locked_dtlb_entry array. */
static count_t bsp_locked_dtlb_entries = 0;
#endif /* CONFIG_SMP */
 
/** Perform sparc64 specific initialization of paging. */
void page_arch_init(void)
{
if (config.cpu_active == 1)
if (config.cpu_active == 1) {
page_mapping_operations = &ht_mapping_operations;
} else {
 
#ifdef CONFIG_SMP
unsigned int i;
 
/*
* Copy locked DTLB entries from the BSP.
*/
for (i = 0; i < bsp_locked_dtlb_entries; i++) {
dtlb_insert_mapping(bsp_locked_dtlb_entry[i].virt_page,
bsp_locked_dtlb_entry[i].phys_page,
bsp_locked_dtlb_entry[i].pagesize_code, true,
false);
}
#endif
 
}
}
 
/** Map memory-mapped device into virtual memory.
*
* We are currently using identity mapping for mapping device registers.
* So far, only DTLB is used to map devices into memory. Chances are that there
* will be only a limited amount of devices that the kernel itself needs to
* lock in DTLB.
*
* @param physaddr Physical address of the page where the device is
* located.
* @param size Size of the device's registers. This argument is
* ignored.
* @param physaddr Physical address of the page where the device is located.
* Must be at least page-aligned.
* @param size Size of the device's registers. Must not exceed 4M and must
* include extra space caused by the alignment.
*
* @return Virtual address of the page where the device is mapped.
* @return Virtual address of the page where the device is mapped.
*/
uintptr_t hw_map(uintptr_t physaddr, size_t size)
{
return PA2KA(physaddr);
unsigned int order;
unsigned int i;
 
ASSERT(config.cpu_active == 1);
 
struct {
int pagesize_code;
size_t increment;
count_t count;
} sizemap[] = {
{ PAGESIZE_8K, 0, 1 }, /* 8K */
{ PAGESIZE_8K, MMU_PAGE_SIZE, 2 }, /* 16K */
{ PAGESIZE_8K, MMU_PAGE_SIZE, 4 }, /* 32K */
{ PAGESIZE_64K, 0, 1}, /* 64K */
{ PAGESIZE_64K, 8 * MMU_PAGE_SIZE, 2 }, /* 128K */
{ PAGESIZE_64K, 8 * MMU_PAGE_SIZE, 4 }, /* 256K */
{ PAGESIZE_512K, 0, 1 }, /* 512K */
{ PAGESIZE_512K, 64 * MMU_PAGE_SIZE, 2 }, /* 1M */
{ PAGESIZE_512K, 64 * MMU_PAGE_SIZE, 4 }, /* 2M */
{ PAGESIZE_4M, 0, 1 }, /* 4M */
{ PAGESIZE_4M, 512 * MMU_PAGE_SIZE, 2 } /* 8M */
};
ASSERT(ALIGN_UP(physaddr, MMU_PAGE_SIZE) == physaddr);
ASSERT(size <= 8 * 1024 * 1024);
if (size <= MMU_FRAME_SIZE)
order = 0;
else
order = (fnzb64(size - 1) + 1) - MMU_FRAME_WIDTH;
 
/*
* Use virtual addresses that are beyond the limit of physical memory.
* Thus, the physical address space will not be wasted by holes created
* by frame_alloc().
*/
ASSERT(PA2KA(last_frame));
uintptr_t virtaddr = ALIGN_UP(PA2KA(last_frame),
1 << (order + FRAME_WIDTH));
last_frame = ALIGN_UP(KA2PA(virtaddr) + size,
1 << (order + FRAME_WIDTH));
for (i = 0; i < sizemap[order].count; i++) {
/*
* First, insert the mapping into DTLB.
*/
dtlb_insert_mapping(virtaddr + i * sizemap[order].increment,
physaddr + i * sizemap[order].increment,
sizemap[order].pagesize_code, true, false);
#ifdef CONFIG_SMP
/*
* Second, save the information about the mapping for APs.
*/
bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page =
virtaddr + i * sizemap[order].increment;
bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page =
physaddr + i * sizemap[order].increment;
bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code =
sizemap[order].pagesize_code;
bsp_locked_dtlb_entries++;
#endif
}
return virtaddr;
}
 
/** @}
/branches/network/kernel/arch/sparc64/src/mm/tsb.c
112,9 → 112,9
tsb->data.value = 0;
tsb->data.size = PAGESIZE_8K;
tsb->data.pfn = (t->frame >> MMU_FRAME_WIDTH) + index;
tsb->data.cp = t->c; /* cp as cache in phys.-idxed, c as cacheable */
tsb->data.p = t->k; /* p as privileged, k as kernel */
tsb->data.v = t->p; /* v as valid, p as present */
tsb->data.cp = t->c;
tsb->data.p = t->k; /* p as privileged */
tsb->data.v = t->p;
write_barrier();
173,4 → 173,3
 
/** @}
*/
 
/branches/network/kernel/arch/sparc64/src/smp/smp.c
35,7 → 35,6
#include <smp/smp.h>
#include <genarch/ofw/ofw_tree.h>
#include <cpu.h>
#include <arch/cpu_family.h>
#include <arch/cpu.h>
#include <arch.h>
#include <config.h>
44,7 → 43,6
#include <synch/synch.h>
#include <synch/waitq.h>
#include <print.h>
#include <arch/cpu_node.h>
 
/**
* This global variable is used to pick-up application processors
63,55 → 61,15
ofw_tree_node_t *node;
count_t cnt = 0;
if (is_us() || is_us_iii()) {
node = ofw_tree_find_child_by_device_type(cpus_parent(), "cpu");
while (node) {
cnt++;
node = ofw_tree_find_peer_by_device_type(node, "cpu");
}
} else if (is_us_iv()) {
node = ofw_tree_find_child(cpus_parent(), "cmp");
while (node) {
cnt += 2;
node = ofw_tree_find_peer_by_name(node, "cmp");
}
node = ofw_tree_find_child_by_device_type(ofw_tree_lookup("/"), "cpu");
while (node) {
cnt++;
node = ofw_tree_find_peer_by_device_type(node, "cpu");
}
config.cpu_count = max(1, cnt);
}
 
/**
* Wakes up the CPU which is represented by the "node" OFW tree node.
* If "node" represents the current CPU, calling the function has
* no effect.
*/
static void wakeup_cpu(ofw_tree_node_t *node)
{
uint32_t mid;
ofw_tree_property_t *prop;
/* 'upa-portid' for US, 'portid' for US-III, 'cpuid' for US-IV */
prop = ofw_tree_getprop(node, "upa-portid");
if ((!prop) || (!prop->value))
prop = ofw_tree_getprop(node, "portid");
if ((!prop) || (!prop->value))
prop = ofw_tree_getprop(node, "cpuid");
if (!prop || prop->value == NULL)
return;
mid = *((uint32_t *) prop->value);
if (CPU->arch.mid == mid)
return;
 
waking_up_mid = mid;
if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) ==
ESYNCH_TIMEOUT)
printf("%s: waiting for processor (mid = %" PRIu32
") timed out\n", __func__, mid);
}
 
/** Wake application processors up. */
void kmp(void *arg)
{
118,18 → 76,31
ofw_tree_node_t *node;
int i;
if (is_us() || is_us_iii()) {
node = ofw_tree_find_child_by_device_type(cpus_parent(), "cpu");
for (i = 0; node;
node = ofw_tree_find_peer_by_device_type(node, "cpu"), i++)
wakeup_cpu(node);
} else if (is_us_iv()) {
node = ofw_tree_find_child(cpus_parent(), "cmp");
while (node) {
wakeup_cpu(ofw_tree_find_child(node, "cpu@0"));
wakeup_cpu(ofw_tree_find_child(node, "cpu@1"));
node = ofw_tree_find_peer_by_name(node, "cmp");
node = ofw_tree_find_child_by_device_type(ofw_tree_lookup("/"), "cpu");
for (i = 0; node; node = ofw_tree_find_peer_by_device_type(node, "cpu"), i++) {
uint32_t mid;
ofw_tree_property_t *prop;
prop = ofw_tree_getprop(node, "upa-portid");
if (!prop || !prop->value)
continue;
mid = *((uint32_t *) prop->value);
if (CPU->arch.mid == mid) {
/*
* Skip the current CPU.
*/
continue;
}
 
/*
* Processor with ID == mid can proceed with its initialization.
*/
waking_up_mid = mid;
if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT)
printf("%s: waiting for processor (mid = %" PRIu32 ") timed out\n",
__func__, mid);
}
}
 
/branches/network/kernel/arch/sparc64/src/smp/ipi.c
46,33 → 46,6
#include <time/delay.h>
#include <panic.h>
 
/** Set the contents of the outgoing interrupt vector data.
*
* The first data item (data 0) will be set to the value of func, the
* rest of the vector will contain zeros.
*
* This is a helper function used from within the cross_call function.
*
* @param func value the first data item of the vector will be set to
*/
static inline void set_intr_w_data(void (* func)(void))
{
#if defined (US)
asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_0, (uintptr_t) func);
asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_1, 0);
asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_2, 0);
#elif defined (US3)
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_0, (uintptr_t) func);
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_1, 0);
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_2, 0);
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_3, 0);
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_4, 0);
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_5, 0);
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_6, 0);
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_7, 0);
#endif
}
 
/** Invoke function on another processor.
*
* Currently, only functions without arguments are supported.
98,15 → 71,16
status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
if (status & INTR_DISPATCH_STATUS_BUSY)
panic("Interrupt Dispatch Status busy bit set.");
panic("Interrupt Dispatch Status busy bit set\n");
ASSERT(!(pstate_read() & PSTATE_IE_BIT));
do {
set_intr_w_data(func);
asi_u64_write(ASI_INTR_W,
asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_0,
(uintptr_t) func);
asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_1, 0);
asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_2, 0);
asi_u64_write(ASI_UDB_INTR_W,
(mid << INTR_VEC_DISPATCH_MID_SHIFT) |
VA_INTR_W_DISPATCH, 0);
ASI_UDB_INTR_W_DISPATCH, 0);
membar();
151,7 → 125,7
func = tlb_shootdown_ipi_recv;
break;
default:
panic("Unknown IPI (%d).", ipi);
panic("Unknown IPI (%d).\n", ipi);
break;
}
/branches/network/kernel/arch/sparc64/src/trap/exception.c
40,67 → 40,62
#include <arch/asm.h>
#include <arch/register.h>
#include <debug.h>
#include <symtab.h>
#include <print.h>
#include <symtab.h>
 
void dump_istate(istate_t *istate)
{
char *tpcs, *tnpcs;
 
tpcs = symtab_fmt_name_lookup(istate->tpc);
tnpcs = symtab_fmt_name_lookup(istate->tnpc);
 
printf("TSTATE=%#" PRIx64 "\n", istate->tstate);
printf("TPC=%#" PRIx64 " (%s)\n", istate->tpc, tpcs);
printf("TNPC=%#" PRIx64 " (%s)\n", istate->tnpc, tnpcs);
printf("TPC=%#" PRIx64 " (%s)\n", istate->tpc, get_symtab_entry(istate->tpc));
printf("TNPC=%#" PRIx64 " (%s)\n", istate->tnpc, get_symtab_entry(istate->tnpc));
}
 
/** Handle instruction_access_exception. (0x8) */
void instruction_access_exception(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle instruction_access_error. (0xa) */
void instruction_access_error(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle illegal_instruction. (0x10) */
void illegal_instruction(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle privileged_opcode. (0x11) */
void privileged_opcode(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle unimplemented_LDD. (0x12) */
void unimplemented_LDD(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle unimplemented_STD. (0x13) */
void unimplemented_STD(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle fp_disabled. (0x20) */
118,9 → 113,9
#ifdef CONFIG_FPU_LAZY
scheduler_fpu_lazy_request();
#else
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
#endif
}
 
127,98 → 122,98
/** Handle fp_exception_ieee_754. (0x21) */
void fp_exception_ieee_754(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle fp_exception_other. (0x22) */
void fp_exception_other(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle tag_overflow. (0x23) */
void tag_overflow(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle division_by_zero. (0x28) */
void division_by_zero(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle data_access_exception. (0x30) */
void data_access_exception(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
dump_sfsr_and_sfar();
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle data_access_error. (0x32) */
void data_access_error(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle mem_address_not_aligned. (0x34) */
void mem_address_not_aligned(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle LDDF_mem_address_not_aligned. (0x35) */
void LDDF_mem_address_not_aligned(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle STDF_mem_address_not_aligned. (0x36) */
void STDF_mem_address_not_aligned(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle privileged_action. (0x37) */
void privileged_action(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle LDQF_mem_address_not_aligned. (0x38) */
void LDQF_mem_address_not_aligned(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Handle STQF_mem_address_not_aligned. (0x39) */
void STQF_mem_address_not_aligned(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s.", __func__);
fault_if_from_uspace(istate, "%s\n", __func__);
dump_istate(istate);
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** @}
/branches/network/kernel/arch/sparc64/src/trap/interrupt.c
67,19 → 67,11
*/
void interrupt(int n, istate_t *istate)
{
uint64_t status;
uint64_t intrcv;
uint64_t data0;
status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
if (status & (!INTR_DISPATCH_STATUS_BUSY))
panic("Interrupt Dispatch Status busy bit not set.");
 
intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);
#if defined (US)
data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0);
#elif defined (US3)
data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0);
#endif
data0 = asi_u64_read(ASI_UDB_INTR_R, ASI_UDB_INTR_R_DATA_0);
 
irq_t *irq = irq_dispatch_and_lock(data0);
if (irq) {
86,13 → 78,7
/*
* The IRQ handler was found.
*/
irq->handler(irq);
/*
* See if there is a clear-interrupt-routine and call it.
*/
if (irq->cir) {
irq->cir(irq->cir_arg, irq->inr);
}
irq->handler(irq, irq->arg);
spinlock_unlock(&irq->lock);
} else if (data0 > config.base) {
/*
112,7 → 98,7
*/
#ifdef CONFIG_DEBUG
printf("cpu%u: spurious interrupt (intrcv=%#" PRIx64
", data0=%#" PRIx64 ")\n", CPU->id, intrcv, data0);
", data0=%#" PRIx64 ")\n", CPU->id, intrcv, data0);
#endif
}
 
/branches/network/kernel/arch/sparc64/src/trap/trap_table.S
329,22 → 329,198
fill_1_normal_tl0:
FILL_NORMAL_HANDLER_USERSPACE
 
/* TT = 0x100 - 0x17f, TL = 0, trap_instruction_0 - trap_instruction_7f */
.irp cur, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,\
20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38,\
39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,\
58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76,\
77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,\
96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,\
112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126,\
127
.org trap_table + (TT_TRAP_INSTRUCTION_0+\cur)*ENTRY_SIZE
.global trap_instruction_\cur\()_tl0
trap_instruction_\cur\()_tl0:
ba trap_instruction_handler
mov \cur, %g2
.endr
/* TT = 0x100, TL = 0, trap_instruction_0 */
.org trap_table + TT_TRAP_INSTRUCTION(0)*ENTRY_SIZE
.global trap_instruction_0_tl0
trap_instruction_0_tl0:
TRAP_INSTRUCTION 0
 
/* TT = 0x101, TL = 0, trap_instruction_1 */
.org trap_table + TT_TRAP_INSTRUCTION(1)*ENTRY_SIZE
.global trap_instruction_1_tl0
trap_instruction_1_tl0:
TRAP_INSTRUCTION 1
 
/* TT = 0x102, TL = 0, trap_instruction_2 */
.org trap_table + TT_TRAP_INSTRUCTION(2)*ENTRY_SIZE
.global trap_instruction_2_tl0
trap_instruction_2_tl0:
TRAP_INSTRUCTION 2
 
/* TT = 0x103, TL = 0, trap_instruction_3 */
.org trap_table + TT_TRAP_INSTRUCTION(3)*ENTRY_SIZE
.global trap_instruction_3_tl0
trap_instruction_3_tl0:
TRAP_INSTRUCTION 3
 
/* TT = 0x104, TL = 0, trap_instruction_4 */
.org trap_table + TT_TRAP_INSTRUCTION(4)*ENTRY_SIZE
.global trap_instruction_4_tl0
trap_instruction_4_tl0:
TRAP_INSTRUCTION 4
 
/* TT = 0x105, TL = 0, trap_instruction_5 */
.org trap_table + TT_TRAP_INSTRUCTION(5)*ENTRY_SIZE
.global trap_instruction_5_tl0
trap_instruction_5_tl0:
TRAP_INSTRUCTION 5
 
/* TT = 0x106, TL = 0, trap_instruction_6 */
.org trap_table + TT_TRAP_INSTRUCTION(6)*ENTRY_SIZE
.global trap_instruction_6_tl0
trap_instruction_6_tl0:
TRAP_INSTRUCTION 6
 
/* TT = 0x107, TL = 0, trap_instruction_7 */
.org trap_table + TT_TRAP_INSTRUCTION(7)*ENTRY_SIZE
.global trap_instruction_7_tl0
trap_instruction_7_tl0:
TRAP_INSTRUCTION 7
 
/* TT = 0x108, TL = 0, trap_instruction_8 */
.org trap_table + TT_TRAP_INSTRUCTION(8)*ENTRY_SIZE
.global trap_instruction_8_tl0
trap_instruction_8_tl0:
TRAP_INSTRUCTION 8
 
/* TT = 0x109, TL = 0, trap_instruction_9 */
.org trap_table + TT_TRAP_INSTRUCTION(9)*ENTRY_SIZE
.global trap_instruction_9_tl0
trap_instruction_9_tl0:
TRAP_INSTRUCTION 9
 
/* TT = 0x10a, TL = 0, trap_instruction_10 */
.org trap_table + TT_TRAP_INSTRUCTION(10)*ENTRY_SIZE
.global trap_instruction_10_tl0
trap_instruction_10_tl0:
TRAP_INSTRUCTION 10
 
/* TT = 0x10b, TL = 0, trap_instruction_11 */
.org trap_table + TT_TRAP_INSTRUCTION(11)*ENTRY_SIZE
.global trap_instruction_11_tl0
trap_instruction_11_tl0:
TRAP_INSTRUCTION 11
 
/* TT = 0x10c, TL = 0, trap_instruction_12 */
.org trap_table + TT_TRAP_INSTRUCTION(12)*ENTRY_SIZE
.global trap_instruction_12_tl0
trap_instruction_12_tl0:
TRAP_INSTRUCTION 12
 
/* TT = 0x10d, TL = 0, trap_instruction_13 */
.org trap_table + TT_TRAP_INSTRUCTION(13)*ENTRY_SIZE
.global trap_instruction_13_tl0
trap_instruction_13_tl0:
TRAP_INSTRUCTION 13
 
/* TT = 0x10e, TL = 0, trap_instruction_14 */
.org trap_table + TT_TRAP_INSTRUCTION(14)*ENTRY_SIZE
.global trap_instruction_14_tl0
trap_instruction_14_tl0:
TRAP_INSTRUCTION 14
 
/* TT = 0x10f, TL = 0, trap_instruction_15 */
.org trap_table + TT_TRAP_INSTRUCTION(15)*ENTRY_SIZE
.global trap_instruction_15_tl0
trap_instruction_15_tl0:
TRAP_INSTRUCTION 15
 
/* TT = 0x110, TL = 0, trap_instruction_16 */
.org trap_table + TT_TRAP_INSTRUCTION(16)*ENTRY_SIZE
.global trap_instruction_16_tl0
trap_instruction_16_tl0:
TRAP_INSTRUCTION 16
 
/* TT = 0x111, TL = 0, trap_instruction_17 */
.org trap_table + TT_TRAP_INSTRUCTION(17)*ENTRY_SIZE
.global trap_instruction_17_tl0
trap_instruction_17_tl0:
TRAP_INSTRUCTION 17
 
/* TT = 0x112, TL = 0, trap_instruction_18 */
.org trap_table + TT_TRAP_INSTRUCTION(18)*ENTRY_SIZE
.global trap_instruction_18_tl0
trap_instruction_18_tl0:
TRAP_INSTRUCTION 18
 
/* TT = 0x113, TL = 0, trap_instruction_19 */
.org trap_table + TT_TRAP_INSTRUCTION(19)*ENTRY_SIZE
.global trap_instruction_19_tl0
trap_instruction_19_tl0:
TRAP_INSTRUCTION 19
 
/* TT = 0x114, TL = 0, trap_instruction_20 */
.org trap_table + TT_TRAP_INSTRUCTION(20)*ENTRY_SIZE
.global trap_instruction_20_tl0
trap_instruction_20_tl0:
TRAP_INSTRUCTION 20
 
/* TT = 0x115, TL = 0, trap_instruction_21 */
.org trap_table + TT_TRAP_INSTRUCTION(21)*ENTRY_SIZE
.global trap_instruction_21_tl0
trap_instruction_21_tl0:
TRAP_INSTRUCTION 21
 
/* TT = 0x116, TL = 0, trap_instruction_22 */
.org trap_table + TT_TRAP_INSTRUCTION(22)*ENTRY_SIZE
.global trap_instruction_22_tl0
trap_instruction_22_tl0:
TRAP_INSTRUCTION 22
 
/* TT = 0x117, TL = 0, trap_instruction_23 */
.org trap_table + TT_TRAP_INSTRUCTION(23)*ENTRY_SIZE
.global trap_instruction_23_tl0
trap_instruction_23_tl0:
TRAP_INSTRUCTION 23
 
/* TT = 0x118, TL = 0, trap_instruction_24 */
.org trap_table + TT_TRAP_INSTRUCTION(24)*ENTRY_SIZE
.global trap_instruction_24_tl0
trap_instruction_24_tl0:
TRAP_INSTRUCTION 24
 
/* TT = 0x119, TL = 0, trap_instruction_25 */
.org trap_table + TT_TRAP_INSTRUCTION(25)*ENTRY_SIZE
.global trap_instruction_25_tl0
trap_instruction_25_tl0:
TRAP_INSTRUCTION 25
 
/* TT = 0x11a, TL = 0, trap_instruction_26 */
.org trap_table + TT_TRAP_INSTRUCTION(26)*ENTRY_SIZE
.global trap_instruction_26_tl0
trap_instruction_26_tl0:
TRAP_INSTRUCTION 26
 
/* TT = 0x11b, TL = 0, trap_instruction_27 */
.org trap_table + TT_TRAP_INSTRUCTION(27)*ENTRY_SIZE
.global trap_instruction_27_tl0
trap_instruction_27_tl0:
TRAP_INSTRUCTION 27
 
/* TT = 0x11c, TL = 0, trap_instruction_28 */
.org trap_table + TT_TRAP_INSTRUCTION(28)*ENTRY_SIZE
.global trap_instruction_28_tl0
trap_instruction_28_tl0:
TRAP_INSTRUCTION 28
 
/* TT = 0x11d, TL = 0, trap_instruction_29 */
.org trap_table + TT_TRAP_INSTRUCTION(29)*ENTRY_SIZE
.global trap_instruction_29_tl0
trap_instruction_29_tl0:
TRAP_INSTRUCTION 29
 
/* TT = 0x11e, TL = 0, trap_instruction_30 */
.org trap_table + TT_TRAP_INSTRUCTION(30)*ENTRY_SIZE
.global trap_instruction_30_tl0
trap_instruction_30_tl0:
TRAP_INSTRUCTION 30
 
/* TT = 0x11f, TL = 0, trap_instruction_31 */
.org trap_table + TT_TRAP_INSTRUCTION(31)*ENTRY_SIZE
.global trap_instruction_31_tl0
trap_instruction_31_tl0:
TRAP_INSTRUCTION 31
 
/*
* Handlers for TL>0.
*/
606,10 → 782,10
add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1
.else
/*
* Call the higher-level syscall handler and enable interrupts.
* Call the higher-level syscall handler.
*/
call syscall_handler
wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT | PSTATE_IE_BIT, %pstate
nop
mov %o0, %i0 ! copy the value returned by the syscall
.endif
 
748,8 → 924,9
* Fill all windows stored in the buffer.
*/
clr %g4
0: andcc %g7, UWB_ALIGNMENT - 1, %g0 ! alignment check
bz 0f ! %g7 is UWB_ALIGNMENT-aligned, no more windows to refill
set PAGE_SIZE - 1, %g5
0: andcc %g7, %g5, %g0 ! PAGE_SIZE alignment check
bz 0f ! %g7 is page-aligned, no more windows to refill
nop
 
add %g7, -STACK_WINDOW_SAVE_AREA_SIZE, %g7
/branches/network/kernel/arch/sparc64/src/cpu/cpu.c
32,46 → 32,12
/** @file
*/
 
#include <arch/cpu_family.h>
#include <cpu.h>
#include <arch.h>
#include <genarch/ofw/ofw_tree.h>
#include <arch/drivers/tick.h>
#include <print.h>
#include <arch/cpu_node.h>
 
/**
* Finds out the clock frequency of the current CPU.
*
* @param node node representing the current CPU in the OFW tree
* @return clock frequency if "node" is the current CPU and no error
* occurs, -1 if "node" is not the current CPU or on error
*/
static int find_cpu_frequency(ofw_tree_node_t *node)
{
ofw_tree_property_t *prop;
uint32_t mid;
 
/* 'upa-portid' for US, 'portid' for US-III, 'cpuid' for US-IV */
prop = ofw_tree_getprop(node, "upa-portid");
if ((!prop) || (!prop->value))
prop = ofw_tree_getprop(node, "portid");
if ((!prop) || (!prop->value))
prop = ofw_tree_getprop(node, "cpuid");
if (prop && prop->value) {
mid = *((uint32_t *) prop->value);
if (mid == CPU->arch.mid) {
prop = ofw_tree_getprop(node, "clock-frequency");
if (prop && prop->value) {
return *((uint32_t *) prop->value);
}
}
}
return -1;
}
 
/** Perform sparc64 specific initialization of the processor structure for the
* current processor.
*/
78,37 → 44,34
void cpu_arch_init(void)
{
ofw_tree_node_t *node;
uint32_t mid;
uint32_t clock_frequency = 0;
upa_config_t upa_config;
CPU->arch.mid = read_mid();
upa_config.value = upa_config_read();
CPU->arch.mid = upa_config.mid;
/*
* Detect processor frequency.
*/
if (is_us() || is_us_iii()) {
node = ofw_tree_find_child_by_device_type(cpus_parent(), "cpu");
while (node) {
int f = find_cpu_frequency(node);
if (f != -1)
clock_frequency = (uint32_t) f;
node = ofw_tree_find_peer_by_device_type(node, "cpu");
node = ofw_tree_find_child_by_device_type(ofw_tree_lookup("/"), "cpu");
while (node) {
ofw_tree_property_t *prop;
prop = ofw_tree_getprop(node, "upa-portid");
if (prop && prop->value) {
mid = *((uint32_t *) prop->value);
if (mid == CPU->arch.mid) {
prop = ofw_tree_getprop(node,
"clock-frequency");
if (prop && prop->value)
clock_frequency = *((uint32_t *)
prop->value);
}
}
} else if (is_us_iv()) {
node = ofw_tree_find_child(cpus_parent(), "cmp");
while (node) {
int f;
f = find_cpu_frequency(
ofw_tree_find_child(node, "cpu@0"));
if (f != -1)
clock_frequency = (uint32_t) f;
f = find_cpu_frequency(
ofw_tree_find_child(node, "cpu@1"));
if (f != -1)
clock_frequency = (uint32_t) f;
node = ofw_tree_find_peer_by_name(node, "cmp");
}
node = ofw_tree_find_peer_by_device_type(node, "cpu");
}
 
CPU->arch.clock_frequency = clock_frequency;
tick_init();
}
161,15 → 124,6
case IMPL_ULTRASPARCIII:
impl = "UltraSPARC III";
break;
case IMPL_ULTRASPARCIII_PLUS:
impl = "UltraSPARC III+";
break;
case IMPL_ULTRASPARCIII_I:
impl = "UltraSPARC IIIi";
break;
case IMPL_ULTRASPARCIV:
impl = "UltraSPARC IV";
break;
case IMPL_ULTRASPARCIV_PLUS:
impl = "UltraSPARC IV+";
break;
/branches/network/kernel/arch/sparc64/src/drivers/sgcn.c
File deleted
/branches/network/kernel/arch/sparc64/src/drivers/scr.c
37,7 → 37,7
#include <genarch/fb/fb.h>
#include <genarch/fb/visuals.h>
#include <arch/types.h>
#include <string.h>
#include <func.h>
#include <align.h>
#include <print.h>
 
55,10 → 55,6
void scr_init(ofw_tree_node_t *node)
{
ofw_tree_property_t *prop;
ofw_pci_reg_t *pci_reg;
ofw_pci_reg_t pci_abs_reg;
ofw_upa_reg_t *upa_reg;
ofw_sbus_reg_t *sbus_reg;
const char *name;
name = ofw_tree_node_name(node);
65,8 → 61,6
if (strcmp(name, "SUNW,m64B") == 0)
scr_type = SCR_ATYFB;
else if (strcmp(name, "SUNW,XVR-100") == 0)
scr_type = SCR_XVR;
else if (strcmp(name, "SUNW,ffb") == 0)
scr_type = SCR_FFB;
else if (strcmp(name, "cgsix") == 0)
73,12 → 67,11
scr_type = SCR_CGSIX;
if (scr_type == SCR_UNKNOWN) {
printf("Unknown screen device.\n");
printf("Unknown keyboard device.\n");
return;
}
uintptr_t fb_addr;
unsigned int fb_offset = 0;
uint32_t fb_width = 0;
uint32_t fb_height = 0;
uint32_t fb_depth = 0;
104,7 → 97,7
 
prop = ofw_tree_getprop(node, "reg");
if (!prop)
panic("Cannot find 'reg' property.");
panic("Can't find \"reg\" property.\n");
 
switch (scr_type) {
case SCR_ATYFB:
113,15 → 106,15
return;
}
pci_reg = &((ofw_pci_reg_t *) prop->value)[1];
ofw_pci_reg_t *fb_reg = &((ofw_pci_reg_t *) prop->value)[1];
ofw_pci_reg_t abs_reg;
if (!ofw_pci_reg_absolutize(node, pci_reg, &pci_abs_reg)) {
if (!ofw_pci_reg_absolutize(node, fb_reg, &abs_reg)) {
printf("Failed to absolutize fb register.\n");
return;
}
if (!ofw_pci_apply_ranges(node->parent, &pci_abs_reg,
&fb_addr)) {
if (!ofw_pci_apply_ranges(node->parent, &abs_reg , &fb_addr)) {
printf("Failed to determine screen address.\n");
return;
}
149,56 → 142,12
}
break;
case SCR_XVR:
if (prop->size / sizeof(ofw_pci_reg_t) < 2) {
printf("Too few screen registers.\n");
return;
}
pci_reg = &((ofw_pci_reg_t *) prop->value)[1];
if (!ofw_pci_reg_absolutize(node, pci_reg, &pci_abs_reg)) {
printf("Failed to absolutize fb register.\n");
return;
}
if (!ofw_pci_apply_ranges(node->parent, &pci_abs_reg,
&fb_addr)) {
printf("Failed to determine screen address.\n");
return;
}
 
fb_offset = 4 * 0x2000;
 
switch (fb_depth) {
case 8:
fb_scanline = fb_linebytes * (fb_depth >> 3);
visual = VISUAL_INDIRECT_8;
break;
case 16:
fb_scanline = fb_linebytes * (fb_depth >> 3);
visual = VISUAL_RGB_5_6_5;
break;
case 24:
fb_scanline = fb_linebytes * 4;
visual = VISUAL_RGB_8_8_8_0;
break;
case 32:
fb_scanline = fb_linebytes * (fb_depth >> 3);
visual = VISUAL_RGB_0_8_8_8;
break;
default:
printf("Unsupported bits per pixel.\n");
return;
}
break;
case SCR_FFB:
fb_scanline = 8192;
visual = VISUAL_BGR_0_8_8_8;
 
upa_reg = &((ofw_upa_reg_t *) prop->value)[FFB_REG_24BPP];
if (!ofw_upa_apply_ranges(node->parent, upa_reg, &fb_addr)) {
ofw_upa_reg_t *reg = &((ofw_upa_reg_t *) prop->value)[FFB_REG_24BPP];
if (!ofw_upa_apply_ranges(node->parent, reg, &fb_addr)) {
printf("Failed to determine screen address.\n");
return;
}
215,8 → 164,8
return;
}
sbus_reg = &((ofw_sbus_reg_t *) prop->value)[0];
if (!ofw_sbus_apply_ranges(node->parent, sbus_reg, &fb_addr)) {
ofw_sbus_reg_t *cg6_reg = &((ofw_sbus_reg_t *) prop->value)[0];
if (!ofw_sbus_apply_ranges(node->parent, cg6_reg, &fb_addr)) {
printf("Failed to determine screen address.\n");
return;
}
223,24 → 172,11
break;
default:
panic("Unexpected type.");
panic("Unexpected type.\n");
}
 
fb_properties_t props = {
.addr = fb_addr,
.offset = fb_offset,
.x = fb_width,
.y = fb_height,
.scan = fb_scanline,
.visual = visual,
};
fb_init(&props);
fb_init(fb_addr, fb_width, fb_height, fb_scanline, visual);
}
 
void scr_redraw(void)
{
fb_redraw();
}
 
/** @}
*/
/branches/network/kernel/arch/sparc64/src/drivers/tick.c
45,12 → 45,11
 
#define TICK_RESTART_TIME 50 /* Worst case estimate. */
 
/** Initialize tick and stick interrupt. */
/** Initialize tick interrupt. */
void tick_init(void)
{
/* initialize TICK interrupt */
tick_compare_reg_t compare;
 
interrupt_register(14, "tick_int", tick_interrupt);
compare.int_dis = false;
compare.tick_cmpr = CPU->arch.clock_frequency / HZ;
57,21 → 56,6
CPU->arch.next_tick_cmpr = compare.tick_cmpr;
tick_compare_write(compare.value);
tick_write(0);
 
#if defined (US3)
/* disable STICK interrupts and clear any pending ones */
tick_compare_reg_t stick_compare;
softint_reg_t clear;
 
stick_compare.value = stick_compare_read();
stick_compare.int_dis = true;
stick_compare.tick_cmpr = 0;
stick_compare_write(stick_compare.value);
 
clear.value = 0;
clear.stick_int = 1;
clear_softint_write(clear.value);
#endif
}
 
/** Process tick interrupt.
83,7 → 67,7
{
softint_reg_t softint, clear;
uint64_t drift;
 
softint.value = softint_read();
/*
/branches/network/kernel/arch/sparc64/src/drivers/fhc.c
45,7 → 45,6
#include <mm/slab.h>
#include <arch/types.h>
#include <genarch/ofw/ofw_tree.h>
#include <sysinfo/sysinfo.h>
 
fhc_t *central_fhc = NULL;
 
87,13 → 86,6
 
fhc->uart_imap = (uint32_t *) hw_map(paddr, reg->size);
/*
* Set sysinfo data needed by the uspace FHC driver.
*/
sysinfo_set_item_val("fhc.uart.size", NULL, reg->size);
sysinfo_set_item_val("fhc.uart.physical", NULL, paddr);
sysinfo_set_item_val("kbd.cir.fhc", NULL, 1);
 
return fhc;
}
 
104,14 → 96,13
fhc->uart_imap[FHC_UART_IMAP] |= IMAP_V_MASK;
break;
default:
panic("Unexpected INR (%d).", inr);
panic("Unexpected INR (%d)\n", inr);
break;
}
}
 
void fhc_clear_interrupt(void *fhcp, int inr)
void fhc_clear_interrupt(fhc_t *fhc, int inr)
{
fhc_t *fhc = (fhc_t *)fhcp;
ASSERT(fhc->uart_imap);
 
switch (inr) {
119,7 → 110,7
fhc->uart_imap[FHC_UART_ICLR] = 0;
break;
default:
panic("Unexpected INR (%d).", inr);
panic("Unexpected INR (%d)\n", inr);
break;
}
}
/branches/network/kernel/arch/sparc64/src/drivers/kbd.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup sparc64
/** @addtogroup sparc64
* @{
*/
/** @file
34,30 → 34,22
 
#include <arch/drivers/kbd.h>
#include <genarch/ofw/ofw_tree.h>
 
#ifdef CONFIG_SUN_KBD
#include <genarch/kbrd/kbrd.h>
#endif
#ifdef CONFIG_Z8530
#include <genarch/drivers/z8530/z8530.h>
#include <genarch/kbd/z8530.h>
#endif
#ifdef CONFIG_NS16550
#include <genarch/drivers/ns16550/ns16550.h>
#include <genarch/kbd/ns16550.h>
#endif
 
#include <console/console.h>
#include <ddi/device.h>
#include <ddi/irq.h>
#include <arch/mm/page.h>
#include <arch/types.h>
#include <align.h>
#include <string.h>
#include <func.h>
#include <print.h>
#include <sysinfo/sysinfo.h>
 
kbd_type_t kbd_type = KBD_UNKNOWN;
 
#ifdef CONFIG_SUN_KBD
 
/** Initialize keyboard.
*
* Traverse OpenFirmware device tree in order to find necessary
71,16 → 63,7
uintptr_t aligned_addr;
ofw_tree_property_t *prop;
const char *name;
cir_t cir;
void *cir_arg;
#ifdef CONFIG_NS16550
ns16550_t *ns16550;
#endif
#ifdef CONFIG_Z8530
z8530_t *z8530;
#endif
name = ofw_tree_node_name(node);
/*
101,32 → 84,30
*/
uint32_t interrupts;
prop = ofw_tree_getprop(node, "interrupts");
if ((!prop) || (!prop->value))
panic("Cannot find 'interrupt' property.");
if (!prop || !prop->value)
panic("Can't find \"interrupts\" property.\n");
interrupts = *((uint32_t *) prop->value);
 
/*
* Read 'reg' property.
*/
prop = ofw_tree_getprop(node, "reg");
if ((!prop) || (!prop->value))
panic("Cannot find 'reg' property.");
if (!prop || !prop->value)
panic("Can't find \"reg\" property.\n");
uintptr_t pa;
size_t size;
inr_t inr;
devno_t devno = device_assign_devno();
switch (kbd_type) {
case KBD_Z8530:
size = ((ofw_fhc_reg_t *) prop->value)->size;
if (!ofw_fhc_apply_ranges(node->parent,
((ofw_fhc_reg_t *) prop->value), &pa)) {
if (!ofw_fhc_apply_ranges(node->parent, ((ofw_fhc_reg_t *) prop->value) , &pa)) {
printf("Failed to determine keyboard address.\n");
return;
}
if (!ofw_fhc_map_interrupt(node->parent,
((ofw_fhc_reg_t *) prop->value), interrupts, &inr, &cir,
&cir_arg)) {
if (!ofw_fhc_map_interrupt(node->parent, ((ofw_fhc_reg_t *) prop->value), interrupts, &inr)) {
printf("Failed to determine keyboard interrupt.\n");
return;
}
134,20 → 115,18
case KBD_NS16550:
size = ((ofw_ebus_reg_t *) prop->value)->size;
if (!ofw_ebus_apply_ranges(node->parent,
((ofw_ebus_reg_t *) prop->value), &pa)) {
if (!ofw_ebus_apply_ranges(node->parent, ((ofw_ebus_reg_t *) prop->value) , &pa)) {
printf("Failed to determine keyboard address.\n");
return;
}
if (!ofw_ebus_map_interrupt(node->parent,
((ofw_ebus_reg_t *) prop->value), interrupts, &inr, &cir,
&cir_arg)) {
if (!ofw_ebus_map_interrupt(node->parent, ((ofw_ebus_reg_t *) prop->value), interrupts, &inr)) {
printf("Failed to determine keyboard interrupt.\n");
return;
};
break;
 
default:
panic("Unexpected keyboard type.");
panic("Unexpected type.\n");
}
/*
158,57 → 137,23
*/
aligned_addr = ALIGN_DOWN(pa, PAGE_SIZE);
offset = pa - aligned_addr;
uintptr_t vaddr = hw_map(aligned_addr, offset + size) + offset;
 
switch (kbd_type) {
#ifdef CONFIG_Z8530
case KBD_Z8530:
z8530 = (z8530_t *) hw_map(aligned_addr, offset + size) +
offset;
indev_t *kbrdin_z8530 = z8530_init(z8530, inr, cir, cir_arg);
if (kbrdin_z8530)
kbrd_init(kbrdin_z8530);
/*
* This is the necessary evil until the userspace drivers are
* entirely self-sufficient.
*/
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.type", NULL, KBD_Z8530);
sysinfo_set_item_val("kbd.inr", NULL, inr);
sysinfo_set_item_val("kbd.address.kernel", NULL,
(uintptr_t) z8530);
sysinfo_set_item_val("kbd.address.physical", NULL, pa);
z8530_init(devno, inr, vaddr);
break;
#endif
#ifdef CONFIG_NS16550
case KBD_NS16550:
ns16550 = (ns16550_t *) hw_map(aligned_addr, offset + size) +
offset;
indev_t *kbrdin_ns16550 = ns16550_init(ns16550, inr, cir, cir_arg);
if (kbrdin_ns16550)
kbrd_init(kbrdin_ns16550);
/*
* This is the necessary evil until the userspace driver is
* entirely self-sufficient.
*/
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
sysinfo_set_item_val("kbd.inr", NULL, inr);
sysinfo_set_item_val("kbd.address.kernel", NULL,
(uintptr_t) ns16550);
sysinfo_set_item_val("kbd.address.physical", NULL, pa);
ns16550_init(devno, inr, vaddr);
break;
#endif
default:
printf("Kernel is not compiled with the necessary keyboard "
"driver this machine requires.\n");
printf("Kernel is not compiled with the necessary keyboard driver this machine requires.\n");
}
}
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/sparc64/src/drivers/pci.c
42,41 → 42,43
#include <arch/types.h>
#include <debug.h>
#include <print.h>
#include <string.h>
#include <func.h>
#include <arch/asm.h>
#include <sysinfo/sysinfo.h>
 
#define SABRE_INTERNAL_REG 0
#define PSYCHO_INTERNAL_REG 2
#define PCI_SABRE_REGS_REG 0
 
#define OBIO_IMR_BASE 0x200
#define OBIO_IMR(ino) (OBIO_IMR_BASE + ((ino) & INO_MASK))
#define PCI_SABRE_IMAP_BASE 0x200
#define PCI_SABRE_ICLR_BASE 0x300
 
#define OBIO_CIR_BASE 0x300
#define OBIO_CIR(ino) (OBIO_CIR_BASE + ((ino) & INO_MASK))
#define PCI_PSYCHO_REGS_REG 2
 
static void obio_enable_interrupt(pci_t *, int);
static void obio_clear_interrupt(pci_t *, int);
#define PCI_PSYCHO_IMAP_BASE 0x200
#define PCI_PSYCHO_ICLR_BASE 0x300
 
static pci_t *pci_sabre_init(ofw_tree_node_t *);
static pci_t *pci_psycho_init(ofw_tree_node_t *);
static pci_t *pci_sabre_init(ofw_tree_node_t *node);
static void pci_sabre_enable_interrupt(pci_t *pci, int inr);
static void pci_sabre_clear_interrupt(pci_t *pci, int inr);
 
static pci_t *pci_psycho_init(ofw_tree_node_t *node);
static void pci_psycho_enable_interrupt(pci_t *pci, int inr);
static void pci_psycho_clear_interrupt(pci_t *pci, int inr);
 
/** PCI operations for Sabre model. */
static pci_operations_t pci_sabre_ops = {
.enable_interrupt = obio_enable_interrupt,
.clear_interrupt = obio_clear_interrupt
.enable_interrupt = pci_sabre_enable_interrupt,
.clear_interrupt = pci_sabre_clear_interrupt
};
/** PCI operations for Psycho model. */
static pci_operations_t pci_psycho_ops = {
.enable_interrupt = obio_enable_interrupt,
.clear_interrupt = obio_clear_interrupt
.enable_interrupt = pci_psycho_enable_interrupt,
.clear_interrupt = pci_psycho_clear_interrupt
};
 
/** Initialize PCI controller (model Sabre).
*
* @param node OpenFirmware device tree node of the Sabre.
* @param node OpenFirmware device tree node of the Sabre.
*
* @return Address of the initialized PCI structure.
* @return Address of the initialized PCI structure.
*/
pci_t *pci_sabre_init(ofw_tree_node_t *node)
{
93,12 → 95,11
ofw_upa_reg_t *reg = prop->value;
count_t regs = prop->size / sizeof(ofw_upa_reg_t);
 
if (regs < SABRE_INTERNAL_REG + 1)
if (regs < PCI_SABRE_REGS_REG + 1)
return NULL;
 
uintptr_t paddr;
if (!ofw_upa_apply_ranges(node->parent, &reg[SABRE_INTERNAL_REG],
&paddr))
if (!ofw_upa_apply_ranges(node->parent, &reg[PCI_SABRE_REGS_REG], &paddr))
return NULL;
 
pci = (pci_t *) malloc(sizeof(pci_t), FRAME_ATOMIC);
107,14 → 108,8
 
pci->model = PCI_SABRE;
pci->op = &pci_sabre_ops;
pci->reg = (uint64_t *) hw_map(paddr, reg[SABRE_INTERNAL_REG].size);
pci->reg = (uint64_t *) hw_map(paddr, reg[PCI_SABRE_REGS_REG].size);
 
/*
* Set sysinfo data needed by the uspace OBIO driver.
*/
sysinfo_set_item_val("obio.base.physical", NULL, paddr);
sysinfo_set_item_val("kbd.cir.obio", NULL, 1);
 
return pci;
}
 
121,9 → 116,9
 
/** Initialize the Psycho PCI controller.
*
* @param node OpenFirmware device tree node of the Psycho.
* @param node OpenFirmware device tree node of the Psycho.
*
* @return Address of the initialized PCI structure.
* @return Address of the initialized PCI structure.
*/
pci_t *pci_psycho_init(ofw_tree_node_t *node)
{
140,12 → 135,11
ofw_upa_reg_t *reg = prop->value;
count_t regs = prop->size / sizeof(ofw_upa_reg_t);
 
if (regs < PSYCHO_INTERNAL_REG + 1)
if (regs < PCI_PSYCHO_REGS_REG + 1)
return NULL;
 
uintptr_t paddr;
if (!ofw_upa_apply_ranges(node->parent, &reg[PSYCHO_INTERNAL_REG],
&paddr))
if (!ofw_upa_apply_ranges(node->parent, &reg[PCI_PSYCHO_REGS_REG], &paddr))
return NULL;
 
pci = (pci_t *) malloc(sizeof(pci_t), FRAME_ATOMIC);
154,27 → 148,31
 
pci->model = PCI_PSYCHO;
pci->op = &pci_psycho_ops;
pci->reg = (uint64_t *) hw_map(paddr, reg[PSYCHO_INTERNAL_REG].size);
pci->reg = (uint64_t *) hw_map(paddr, reg[PCI_PSYCHO_REGS_REG].size);
 
/*
* Set sysinfo data needed by the uspace OBIO driver.
*/
sysinfo_set_item_val("obio.base.physical", NULL, paddr);
sysinfo_set_item_val("kbd.cir.obio", NULL, 1);
 
return pci;
}
 
void obio_enable_interrupt(pci_t *pci, int inr)
void pci_sabre_enable_interrupt(pci_t *pci, int inr)
{
pci->reg[OBIO_IMR(inr & INO_MASK)] |= IMAP_V_MASK;
pci->reg[PCI_SABRE_IMAP_BASE + (inr & INO_MASK)] |= IMAP_V_MASK;
}
 
void obio_clear_interrupt(pci_t *pci, int inr)
void pci_sabre_clear_interrupt(pci_t *pci, int inr)
{
pci->reg[OBIO_CIR(inr & INO_MASK)] = 0; /* set IDLE */
pci->reg[PCI_SABRE_ICLR_BASE + (inr & INO_MASK)] = 0;
}
 
void pci_psycho_enable_interrupt(pci_t *pci, int inr)
{
pci->reg[PCI_PSYCHO_IMAP_BASE + (inr & INO_MASK)] |= IMAP_V_MASK;
}
 
void pci_psycho_clear_interrupt(pci_t *pci, int inr)
{
pci->reg[PCI_PSYCHO_ICLR_BASE + (inr & INO_MASK)] = 0;
}
 
/** Initialize PCI controller. */
pci_t *pci_init(ofw_tree_node_t *node)
{
217,14 → 215,14
 
void pci_enable_interrupt(pci_t *pci, int inr)
{
ASSERT(pci->model);
ASSERT(pci->op && pci->op->enable_interrupt);
pci->op->enable_interrupt(pci, inr);
}
 
void pci_clear_interrupt(void *pcip, int inr)
void pci_clear_interrupt(pci_t *pci, int inr)
{
pci_t *pci = (pci_t *)pcip;
 
ASSERT(pci->model);
ASSERT(pci->op && pci->op->clear_interrupt);
pci->op->clear_interrupt(pci, inr);
}
/branches/network/kernel/arch/sparc64/src/proc/thread.c
34,8 → 34,9
 
#include <proc/thread.h>
#include <arch/proc/thread.h>
#include <mm/slab.h>
#include <arch/trap/regwin.h>
#include <mm/frame.h>
#include <mm/page.h>
#include <arch/mm/page.h>
#include <align.h>
 
void thr_constructor_arch(thread_t *t)
49,12 → 50,12
void thr_destructor_arch(thread_t *t)
{
if (t->arch.uspace_window_buffer) {
uintptr_t uw_buf = (uintptr_t) t->arch.uspace_window_buffer;
/*
* Mind the possible alignment of the userspace window buffer
* belonging to a killed thread.
*/
free((uint8_t *) ALIGN_DOWN(uw_buf, UWB_ALIGNMENT));
frame_free(KA2PA(ALIGN_DOWN((uintptr_t)
t->arch.uspace_window_buffer, PAGE_SIZE)));
}
}
 
66,7 → 67,7
* The thread needs userspace window buffer and the object
* returned from the slab allocator doesn't have any.
*/
t->arch.uspace_window_buffer = malloc(UWB_ASIZE, 0);
t->arch.uspace_window_buffer = frame_alloc(ONE_FRAME, FRAME_KA);
} else {
uintptr_t uw_buf = (uintptr_t) t->arch.uspace_window_buffer;
 
75,7 → 76,7
* belonging to a killed thread.
*/
t->arch.uspace_window_buffer = (uint8_t *) ALIGN_DOWN(uw_buf,
UWB_ASIZE);
PAGE_SIZE);
}
}
 
/branches/network/kernel/arch/sparc64/src/sparc64.c
37,6 → 37,7
#include <config.h>
#include <arch/trap/trap.h>
#include <arch/console.h>
#include <proc/thread.h>
#include <console/console.h>
#include <arch/boot/boot.h>
#include <arch/arch.h>
46,11 → 47,10
#include <genarch/ofw/ofw_tree.h>
#include <userspace.h>
#include <ddi/irq.h>
#include <string.h>
 
bootinfo_t bootinfo;
 
/** Perform sparc64-specific initialization before main_bsp() is called. */
/** Perform sparc64 specific initialization before main_bsp() is called. */
void arch_pre_main(void)
{
/* Copy init task info. */
61,8 → 61,6
for (i = 0; i < bootinfo.taskmap.count; i++) {
init.tasks[i].addr = (uintptr_t) bootinfo.taskmap.tasks[i].addr;
init.tasks[i].size = bootinfo.taskmap.tasks[i].size;
strncpy(init.tasks[i].name, bootinfo.taskmap.tasks[i].name,
CONFIG_TASK_NAME_BUFLEN);
}
/* Copy boot allocations info. */
88,6 → 86,8
* But we only create 128 buckets.
*/
irq_init(1 << 11, 128);
standalone_sparc64_console_init();
}
}
 
101,7 → 101,18
 
void arch_post_smp_init(void)
{
standalone_sparc64_console_init();
static thread_t *t = NULL;
 
 
if (!t) {
/*
* Create thread that polls keyboard.
*/
t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
if (!t)
panic("cannot create kkbdpoll\n");
thread_ready(t);
}
}
 
/** Calibrate delay loop.
150,19 → 161,5
while (1);
}
 
/** Construct function pointer
*
* @param fptr function pointer structure
* @param addr function address
* @param caller calling function address
*
* @return address of the function pointer
*
*/
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
return addr;
}
 
/** @}
*/
/branches/network/kernel/arch/sparc64/src/ddi/ddi.c
41,7 → 41,7
* Interrupts are disabled and task is locked.
*
* @param task Task.
* @param ioaddr Starting I/O space address.
* @param ioaddr Startign I/O space address.
* @param size Size of the enabled I/O range.
*
* @return 0 on success or an error code from errno.h.
/branches/network/kernel/arch/sparc64/src/console.c
37,8 → 37,14
 
#include <arch/drivers/scr.h>
#include <arch/drivers/kbd.h>
#include <arch/drivers/sgcn.h>
#include <genarch/srln/srln.h>
 
#ifdef CONFIG_Z8530
#include <genarch/kbd/z8530.h>
#endif
#ifdef CONFIG_NS16550
#include <genarch/kbd/ns16550.h>
#endif
 
#include <console/chardev.h>
#include <console/console.h>
#include <arch/asm.h>
48,98 → 54,89
#include <genarch/ofw/ofw_tree.h>
#include <arch.h>
#include <panic.h>
#include <string.h>
#include <print.h>
 
#define KEYBOARD_POLL_PAUSE 50000 /* 50ms */
 
/**
* Initialize kernel console to use framebuffer and keyboard directly.
* Called on UltraSPARC machines with standard keyboard and framebuffer.
*
* @param aliases the "/aliases" OBP node
*/
static void standard_console_init(ofw_tree_node_t *aliases)
/** Initialize kernel console to use framebuffer and keyboard directly. */
void standalone_sparc64_console_init(void)
{
#ifdef CONFIG_FB
ofw_tree_property_t *prop_scr = ofw_tree_getprop(aliases, "screen");
if (!prop_scr)
panic("Cannot find property 'screen'.");
if (!prop_scr->value)
panic("Cannot find screen alias.");
ofw_tree_node_t *screen = ofw_tree_lookup(prop_scr->value);
stdin = NULL;
 
ofw_tree_node_t *aliases;
ofw_tree_property_t *prop;
ofw_tree_node_t *screen;
ofw_tree_node_t *keyboard;
aliases = ofw_tree_lookup("/aliases");
if (!aliases)
panic("Can't find /aliases.\n");
prop = ofw_tree_getprop(aliases, "screen");
if (!prop)
panic("Can't find property \"screen\".\n");
if (!prop->value)
panic("Can't find screen alias.\n");
screen = ofw_tree_lookup(prop->value);
if (!screen)
panic("Cannot find %s.", prop_scr->value);
panic("Can't find %s\n", prop->value);
 
scr_init(screen);
#endif
 
#ifdef CONFIG_SUN_KBD
ofw_tree_property_t *prop_kbd = ofw_tree_getprop(aliases, "keyboard");
if (!prop_kbd)
panic("Cannot find property 'keyboard'.");
if (!prop_kbd->value)
panic("Cannot find keyboard alias.");
ofw_tree_node_t *keyboard = ofw_tree_lookup(prop_kbd->value);
prop = ofw_tree_getprop(aliases, "keyboard");
if (!prop)
panic("Can't find property \"keyboard\".\n");
if (!prop->value)
panic("Can't find keyboard alias.\n");
keyboard = ofw_tree_lookup(prop->value);
if (!keyboard)
panic("Cannot find %s.", prop_kbd->value);
panic("Can't find %s\n", prop->value);
 
kbd_init(keyboard);
#endif
}
 
/** Initilize I/O on the Serengeti machine. */
static void serengeti_init(void)
/** Kernel thread for polling keyboard.
*
* @param arg Ignored.
*/
void kkbdpoll(void *arg)
{
#ifdef CONFIG_SGCN_KBD
indev_t *kbrdin;
kbrdin = sgcnin_init();
if (kbrdin)
srlnin_init(kbrdin);
thread_detach(THREAD);
 
#ifdef CONFIG_Z8530
if (kbd_type == KBD_Z8530) {
/*
* The z8530 driver is interrupt-driven.
*/
return;
}
#endif
#ifdef CONFIG_SGCN_PRN
sgcnout_init();
 
while (1) {
#ifdef CONFIG_NS16550
if (kbd_type == KBD_NS16550)
ns16550_poll();
#endif
}
 
/**
* Initialize input/output. Auto-detects the type of machine
* and calls the appropriate I/O init routine.
*/
void standalone_sparc64_console_init(void)
{
ofw_tree_node_t *aliases;
ofw_tree_property_t *prop;
aliases = ofw_tree_lookup("/aliases");
if (!aliases)
panic("Cannot find '/aliases'.");
/* "def-cn" = "default console" */
prop = ofw_tree_getprop(aliases, "def-cn");
if ((!prop) || (!prop->value) || (strcmp(prop->value, "/sgcn") != 0)) {
standard_console_init(aliases);
} else {
serengeti_init();
thread_usleep(KEYBOARD_POLL_PAUSE);
}
}
 
 
/** Acquire console back for kernel
*
*/
void arch_grab_console(void)
{
#ifdef CONFIG_FB
scr_redraw();
#endif
switch (kbd_type) {
#ifdef CONFIG_SGCN
case KBD_SGCN:
sgcn_grab();
#ifdef CONFIG_Z8530
case KBD_Z8530:
z8530_grab();
break;
#endif
#ifdef CONFIG_NS16550
case KBD_NS16550:
ns16550_grab();
break;
#endif
default:
break;
}
151,11 → 148,16
void arch_release_console(void)
{
switch (kbd_type) {
#ifdef CONFIG_SGCN
case KBD_SGCN:
sgcn_release();
#ifdef CONFIG_Z8530
case KBD_Z8530:
z8530_release();
break;
#endif
#ifdef CONFIG_NS16550
case KBD_NS16550:
ns16550_release();
break;
#endif
default:
break;
}
/branches/network/kernel/arch/sparc64/src/start.S
27,7 → 27,6
#
 
#include <arch/arch.h>
#include <arch/cpu.h>
#include <arch/regdef.h>
#include <arch/boot/boot.h>
#include <arch/stack.h>
48,16 → 47,6
#define BSP_FLAG 1
 
/*
* 2^PHYSMEM_ADDR_SIZE is the size of the physical address space on
* a given processor.
*/
#if defined (US)
#define PHYSMEM_ADDR_SIZE 41
#elif defined (US3)
#define PHYSMEM_ADDR_SIZE 43
#endif
 
/*
* Here is where the kernel is passed control from the boot loader.
*
* The registers are expected to be in this state:
78,13 → 67,11
and %o0, %l0, %l7 ! l7 <= bootstrap processor?
andn %o0, %l0, %l6 ! l6 <= start of physical memory
 
! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base.
! Get bits 40:13 of physmem_base.
srlx %l6, 13, %l5
sllx %l5, 13 + (63 - 40), %l5
srlx %l5, 63 - 40, %l5 ! l5 <= physmem_base[40:13]
! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13]
sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5
srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5
/*
* Setup basic runtime environment.
*/
96,8 → 83,6
! consistent
wrpr %g0, NWINDOWS - 1, %cleanwin ! prevent needless clean_window
! traps for kernel
wrpr %g0, 0, %wstate ! use default spill/fill trap
 
wrpr %g0, 0, %tl ! TL = 0, primary context
! register is used
259,8 → 244,7
 
/*
* Precompute kernel 8K TLB data template.
* %l5 contains starting physical address
* bits [(PHYSMEM_ADDR_SIZE - 1):13]
* %l5 contains starting physical address bits [40:13]
*/
sethi %hi(kernel_8k_tlb_data_template), %l4
ldx [%l4 + %lo(kernel_8k_tlb_data_template)], %l3
298,32 → 282,15
nop
 
 
1:
#ifdef CONFIG_SMP
/*
* Determine the width of the MID and save its mask to %g3. The width
* is
* * 5 for US and US-IIIi,
* * 10 for US3 except US-IIIi.
*/
#if defined(US)
mov 0x1f, %g3
#elif defined(US3)
mov 0x3ff, %g3
rdpr %ver, %g2
sllx %g2, 16, %g2
srlx %g2, 48, %g2
cmp %g2, IMPL_ULTRASPARCIII_I
move %xcc, 0x1f, %g3
#endif
 
/*
* Read MID from the processor.
*/
ldxa [%g0] ASI_ICBUS_CONFIG, %g1
srlx %g1, ICBUS_CONFIG_MID_SHIFT, %g1
and %g1, %g3, %g1
1:
ldxa [%g0] ASI_UPA_CONFIG, %g1
srlx %g1, UPA_CONFIG_MID_SHIFT, %g1
and %g1, UPA_CONFIG_MID_MASK, %g1
 
#ifdef CONFIG_SMP
/*
* Active loop for APs until the BSP picks them up. A processor cannot
* leave the loop until the global variable 'waking_up_mid' equals its
/branches/network/kernel/arch/sparc64/_link.ld.in
1,8 → 1,8
/** SPARC64 linker script
*
* It is ELF format, but its only section looks like this:
* kernel text
* kernel data
* kernel text
* kernel data
*
*/
 
11,7 → 11,7
ENTRY(kernel_image_start)
 
SECTIONS {
.image VMA: AT (LMA) {
.image VMA: AT (LMA) {
ktext_start = .;
*(K_TEXT_START)
*(.text);
21,23 → 21,23
*(K_DATA_START)
*(.rodata);
*(.rodata.*);
*(.data); /* initialized data */
*(.data); /* initialized data */
*(.sdata);
*(.sdata2);
*(.sbss);
. = ALIGN(8);
hardcoded_ktext_size = .;
QUAD(ktext_end - ktext_start);
QUAD(ktext_end - ktext_start);
hardcoded_kdata_size = .;
QUAD(kdata_end - kdata_start);
hardcoded_load_address = .;
QUAD(VMA);
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
 
symbol_table = .;
*(symtab.*); /* Symbol table, must be LAST symbol!*/
*(symtab.*); /* Symbol table, must be LAST symbol!*/
 
kdata_end = .;
}
44,5 → 44,5
/DISCARD/ : {
*(*);
}
 
}
/branches/network/kernel/arch/ia64/Makefile.inc
29,11 → 29,18
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
BFD_NAME = elf64-little
BFD_ARCH = ia64-elf64
TARGET = ia64-pc-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/ia64
 
INIT0_ADDRESS = 0xe000000004404000
INIT0_SIZE = 0x100000
 
CMN1 = -mconstant-gp -fno-unwind-tables -mfixed-range=f32-f127
GCC_CFLAGS += $(CMN1)
ICC_CFLAGS += $(CMN1)
41,35 → 48,58
LFLAGS += -EL
AFLAGS += -mconstant-gp
 
DEFS += -D__64_BITS__
DEFS += -D__64_BITS__ -DINIT0_ADDRESS=$(INIT0_ADDRESS) -DINIT0_SIZE=$(INIT0_SIZE) -D$(MACHINE)
 
 
## Compile with page hash table support.
#
 
CONFIG_PAGE_HT = y
DEFS += -DCONFIG_PAGE_HT
 
## Compile with support for address space identifiers.
#
 
CONFIG_ASID = y
CONFIG_ASID_FIFO = y
 
 
## Compile with support for software integer division.
#
 
CONFIG_SOFTINT = y
 
ARCH_SOURCES = \
arch/$(KARCH)/src/start.S \
arch/$(KARCH)/src/asm.S \
arch/$(KARCH)/src/dummy.s \
arch/$(KARCH)/src/ia64.c \
arch/$(KARCH)/src/fpu_context.c \
arch/$(KARCH)/src/context.S \
arch/$(KARCH)/src/cpu/cpu.c \
arch/$(KARCH)/src/ivt.S \
arch/$(KARCH)/src/interrupt.c \
arch/$(KARCH)/src/mm/as.c \
arch/$(KARCH)/src/mm/frame.c \
arch/$(KARCH)/src/mm/page.c \
arch/$(KARCH)/src/mm/tlb.c \
arch/$(KARCH)/src/mm/vhpt.c \
arch/$(KARCH)/src/proc/scheduler.c \
arch/$(KARCH)/src/ddi/ddi.c \
arch/$(KARCH)/src/smp/smp.c \
arch/$(KARCH)/src/drivers/it.c
arch/$(ARCH)/src/start.S \
arch/$(ARCH)/src/asm.S \
arch/$(ARCH)/src/dummy.s \
arch/$(ARCH)/src/ia64.c \
arch/$(ARCH)/src/fpu_context.c \
arch/$(ARCH)/src/context.S \
arch/$(ARCH)/src/cpu/cpu.c \
arch/$(ARCH)/src/ivt.S \
arch/$(ARCH)/src/interrupt.c \
arch/$(ARCH)/src/mm/as.c \
arch/$(ARCH)/src/mm/frame.c \
arch/$(ARCH)/src/mm/page.c \
arch/$(ARCH)/src/mm/tlb.c \
arch/$(ARCH)/src/mm/vhpt.c \
arch/$(ARCH)/src/proc/scheduler.c \
arch/$(ARCH)/src/ddi/ddi.c \
arch/$(ARCH)/src/drivers/it.c
 
ifeq ($(MACHINE),ski)
ARCH_SOURCES += arch/$(KARCH)/src/ski/ski.c
ARCH_SOURCES += arch/$(ARCH)/src/ski/ski.c
DEFS += -DSKI
# BFD = elf64-ia64-little
BFD = binary
endif
 
ifeq ($(MACHINE),i460GX)
DEFS += -DI460GX
ARCH_SOURCES += arch/$(ARCH)/src/drivers/ega.c
CONFIG_I8042 = y
DEFS += -DI460GX -DCONFIG_I8042
BFD = binary
 
endif
 
/branches/network/kernel/arch/ia64/src/smp/smp.c
File deleted
/branches/network/kernel/arch/ia64/src/asm.S
51,7 → 51,7
 
adds r14 = 7, in1
mov r2 = ar.lc
mov r8 = in0 ;;
mov r8 = in0
and r14 = -8, r14 ;;
cmp.ne p6, p7 = r14, in1
(p7) br.cond.dpnt 3f ;;
128,10 → 128,6
memsetb:
br _memsetb
 
.global memsetw
memsetw:
br _memsetw
 
.global cpu_halt
cpu_halt:
br cpu_halt
/branches/network/kernel/arch/ia64/src/mm/vhpt.c
41,8 → 41,7
 
uintptr_t vhpt_set_up(void)
{
vhpt_base = frame_alloc(VHPT_WIDTH - FRAME_WIDTH,
FRAME_KA | FRAME_ATOMIC);
vhpt_base = frame_alloc(VHPT_WIDTH - FRAME_WIDTH, FRAME_KA | FRAME_ATOMIC);
if (!vhpt_base)
panic("Kernel configured with VHPT but no memory for table.");
vhpt_invalidate_all();
/branches/network/kernel/arch/ia64/src/mm/tlb.c
92,7 → 92,7
 
/** Invalidate entries belonging to an address space.
*
* @param asid Address space identifier.
* @param asid Address space identifier.
*/
void tlb_invalidate_asid(asid_t asid)
{
131,45 → 131,59
uint64_t ps;
switch (b) {
case 0: /* cnt 1 - 3 */
case 0: /*cnt 1-3*/
ps = PAGE_WIDTH;
break;
case 1: /* cnt 4 - 15 */
ps = PAGE_WIDTH + 2;
va &= ~((1 << ps) - 1);
case 1: /*cnt 4-15*/
/*cnt=((cnt-1)/4)+1;*/
ps = PAGE_WIDTH+2;
va &= ~((1<<ps)-1);
break;
case 2: /* cnt 16 - 63 */
ps = PAGE_WIDTH + 4;
va &= ~((1 << ps) - 1);
case 2: /*cnt 16-63*/
/*cnt=((cnt-1)/16)+1;*/
ps = PAGE_WIDTH+4;
va &= ~((1<<ps)-1);
break;
case 3: /* cnt 64 - 255 */
ps = PAGE_WIDTH + 6;
va &= ~((1 << ps) - 1);
case 3: /*cnt 64-255*/
/*cnt=((cnt-1)/64)+1;*/
ps = PAGE_WIDTH+6;
va &= ~((1<<ps)-1);
break;
case 4: /* cnt 256 - 1023 */
ps = PAGE_WIDTH + 8;
va &= ~((1 << ps) - 1);
case 4: /*cnt 256-1023*/
/*cnt=((cnt-1)/256)+1;*/
ps = PAGE_WIDTH+8;
va &= ~((1<<ps)-1);
break;
case 5: /* cnt 1024 - 4095 */
ps = PAGE_WIDTH + 10;
va &= ~((1 << ps) - 1);
case 5: /*cnt 1024-4095*/
/*cnt=((cnt-1)/1024)+1;*/
ps = PAGE_WIDTH+10;
va &= ~((1<<ps)-1);
break;
case 6: /* cnt 4096 - 16383 */
ps = PAGE_WIDTH + 12;
va &= ~((1 << ps) - 1);
case 6: /*cnt 4096-16383*/
/*cnt=((cnt-1)/4096)+1;*/
ps = PAGE_WIDTH+12;
va &= ~((1<<ps)-1);
break;
case 7: /* cnt 16384 - 65535 */
case 8: /* cnt 65536 - (256K - 1) */
ps = PAGE_WIDTH + 14;
va &= ~((1 << ps) - 1);
case 7: /*cnt 16384-65535*/
case 8: /*cnt 65536-(256K-1)*/
/*cnt=((cnt-1)/16384)+1;*/
ps = PAGE_WIDTH+14;
va &= ~((1<<ps)-1);
break;
default:
ps = PAGE_WIDTH + 18;
va &= ~((1 << ps) - 1);
/*cnt=((cnt-1)/(16384*16))+1;*/
ps=PAGE_WIDTH+18;
va&=~((1<<ps)-1);
break;
}
for(; va < (page + cnt * PAGE_SIZE); va += (1 << ps))
asm volatile ("ptc.l %0, %1;;" :: "r" (va), "r" (ps << 2));
/*cnt+=(page!=va);*/
for(; va<(page+cnt*(PAGE_SIZE)); va += (1<<ps)) {
asm volatile (
"ptc.l %0,%1;;"
:
: "r" (va), "r" (ps<<2)
);
}
srlz_d();
srlz_i();
182,10 → 196,9
 
/** Insert data into data translation cache.
*
* @param va Virtual page address.
* @param asid Address space identifier.
* @param entry The rest of TLB entry as required by TLB insertion
* format.
* @param va Virtual page address.
* @param asid Address space identifier.
* @param entry The rest of TLB entry as required by TLB insertion format.
*/
void dtc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry)
{
194,10 → 207,9
 
/** Insert data into instruction translation cache.
*
* @param va Virtual page address.
* @param asid Address space identifier.
* @param entry The rest of TLB entry as required by TLB insertion
* format.
* @param va Virtual page address.
* @param asid Address space identifier.
* @param entry The rest of TLB entry as required by TLB insertion format.
*/
void itc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry)
{
206,12 → 218,10
 
/** Insert data into instruction or data translation cache.
*
* @param va Virtual page address.
* @param asid Address space identifier.
* @param entry The rest of TLB entry as required by TLB insertion
* format.
* @param dtc If true, insert into data translation cache, use
* instruction translation cache otherwise.
* @param va Virtual page address.
* @param asid Address space identifier.
* @param entry The rest of TLB entry as required by TLB insertion format.
* @param dtc If true, insert into data translation cache, use instruction translation cache otherwise.
*/
void tc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtc)
{
234,20 → 244,19
}
asm volatile (
"mov r8 = psr;;\n"
"mov r8=psr;;\n"
"rsm %0;;\n" /* PSR_IC_MASK */
"srlz.d;;\n"
"srlz.i;;\n"
"mov cr.ifa = %1\n" /* va */
"mov cr.itir = %2;;\n" /* entry.word[1] */
"cmp.eq p6,p7 = %4,r0;;\n" /* decide between itc and dtc */
"mov cr.ifa=%1\n" /* va */
"mov cr.itir=%2;;\n" /* entry.word[1] */
"cmp.eq p6,p7 = %4,r0;;\n" /* decide between itc and dtc */
"(p6) itc.i %3;;\n"
"(p7) itc.d %3;;\n"
"mov psr.l = r8;;\n"
"mov psr.l=r8;;\n"
"srlz.d;;\n"
:
: "i" (PSR_IC_MASK), "r" (va), "r" (entry.word[1]),
"r" (entry.word[0]), "r" (dtc)
: "i" (PSR_IC_MASK), "r" (va), "r" (entry.word[1]), "r" (entry.word[0]), "r" (dtc)
: "p6", "p7", "r8"
);
260,14 → 269,12
 
/** Insert data into instruction translation register.
*
* @param va Virtual page address.
* @param asid Address space identifier.
* @param entry The rest of TLB entry as required by TLB insertion
* format.
* @param tr Translation register.
* @param va Virtual page address.
* @param asid Address space identifier.
* @param entry The rest of TLB entry as required by TLB insertion format.
* @param tr Translation register.
*/
void
itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr)
void itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr)
{
tr_mapping_insert(va, asid, entry, false, tr);
}
274,14 → 281,12
 
/** Insert data into data translation register.
*
* @param va Virtual page address.
* @param asid Address space identifier.
* @param entry The rest of TLB entry as required by TLB insertion
* format.
* @param tr Translation register.
* @param va Virtual page address.
* @param asid Address space identifier.
* @param entry The rest of TLB entry as required by TLB insertion format.
* @param tr Translation register.
*/
void
dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr)
void dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr)
{
tr_mapping_insert(va, asid, entry, true, tr);
}
288,17 → 293,13
 
/** Insert data into instruction or data translation register.
*
* @param va Virtual page address.
* @param asid Address space identifier.
* @param entry The rest of TLB entry as required by TLB insertion
* format.
* @param dtr If true, insert into data translation register, use
* instruction translation register otherwise.
* @param tr Translation register.
* @param va Virtual page address.
* @param asid Address space identifier.
* @param entry The rest of TLB entry as required by TLB insertion format.
* @param dtr If true, insert into data translation register, use instruction translation register otherwise.
* @param tr Translation register.
*/
void
tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr,
index_t tr)
void tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr, index_t tr)
{
region_register rr;
bool restore_rr = false;
319,20 → 320,19
}
 
asm volatile (
"mov r8 = psr;;\n"
"mov r8=psr;;\n"
"rsm %0;;\n" /* PSR_IC_MASK */
"srlz.d;;\n"
"srlz.i;;\n"
"mov cr.ifa = %1\n" /* va */
"mov cr.itir = %2;;\n" /* entry.word[1] */
"cmp.eq p6,p7 = %5,r0;;\n" /* decide between itr and dtr */
"(p6) itr.i itr[%4] = %3;;\n"
"(p7) itr.d dtr[%4] = %3;;\n"
"mov psr.l = r8;;\n"
"mov cr.ifa=%1\n" /* va */
"mov cr.itir=%2;;\n" /* entry.word[1] */
"cmp.eq p6,p7=%5,r0;;\n" /* decide between itr and dtr */
"(p6) itr.i itr[%4]=%3;;\n"
"(p7) itr.d dtr[%4]=%3;;\n"
"mov psr.l=r8;;\n"
"srlz.d;;\n"
:
: "i" (PSR_IC_MASK), "r" (va), "r" (entry.word[1]),
"r" (entry.word[0]), "r" (tr), "r" (dtr)
: "i" (PSR_IC_MASK), "r" (va), "r" (entry.word[1]), "r" (entry.word[0]), "r" (tr), "r" (dtr)
: "p6", "p7", "r8"
);
345,15 → 345,12
 
/** Insert data into DTLB.
*
* @param page Virtual page address including VRN bits.
* @param frame Physical frame address.
* @param dtr If true, insert into data translation register, use data
* translation cache otherwise.
* @param tr Translation register if dtr is true, ignored otherwise.
* @param page Virtual page address including VRN bits.
* @param frame Physical frame address.
* @param dtr If true, insert into data translation register, use data translation cache otherwise.
* @param tr Translation register if dtr is true, ignored otherwise.
*/
void
dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr,
index_t tr)
void dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr, index_t tr)
{
tlb_entry_t entry;
379,18 → 376,18
*
* Purge DTR entries used by the kernel.
*
* @param page Virtual page address including VRN bits.
* @param width Width of the purge in bits.
* @param page Virtual page address including VRN bits.
* @param width Width of the purge in bits.
*/
void dtr_purge(uintptr_t page, count_t width)
{
asm volatile ("ptr.d %0, %1\n" : : "r" (page), "r" (width << 2));
asm volatile ("ptr.d %0, %1\n" : : "r" (page), "r" (width<<2));
}
 
 
/** Copy content of PTE into data translation cache.
*
* @param t PTE.
* @param t PTE.
*/
void dtc_pte_copy(pte_t *t)
{
416,7 → 413,7
 
/** Copy content of PTE into instruction translation cache.
*
* @param t PTE.
* @param t PTE.
*/
void itc_pte_copy(pte_t *t)
{
443,8 → 440,8
 
/** Instruction TLB fault handler for faults with VHPT turned off.
*
* @param vector Interruption vector.
* @param istate Structure with saved interruption state.
* @param vector Interruption vector.
* @param istate Structure with saved interruption state.
*/
void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate)
{
472,77 → 469,16
*/
page_table_unlock(AS, true);
if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) {
fault_if_from_uspace(istate,"Page fault at %p.",va);
panic("%s: va=%p, rid=%d, iip=%p.", __func__, va, rid,
istate->cr_iip);
fault_if_from_uspace(istate,"Page fault at %p",va);
panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid, istate->cr_iip);
}
}
}
 
static int is_io_page_accessible(int page)
{
if (TASK->arch.iomap)
return bitmap_get(TASK->arch.iomap, page);
else
return 0;
}
 
#define IO_FRAME_BASE 0xFFFFC000000
 
/**
* There is special handling of memory mapped legacy io, because of 4KB sized
* access for userspace.
*
* @param va Virtual address of page fault.
* @param istate Structure with saved interruption state.
*
* @return One on success, zero on failure.
*/
static int try_memmap_io_insertion(uintptr_t va, istate_t *istate)
{
if ((va >= IO_OFFSET ) && (va < IO_OFFSET + (1 << IO_PAGE_WIDTH))) {
if (TASK) {
uint64_t io_page = (va & ((1 << IO_PAGE_WIDTH) - 1)) >>
USPACE_IO_PAGE_WIDTH;
 
if (is_io_page_accessible(io_page)) {
uint64_t page, frame;
 
page = IO_OFFSET +
(1 << USPACE_IO_PAGE_WIDTH) * io_page;
frame = IO_FRAME_BASE +
(1 << USPACE_IO_PAGE_WIDTH) * io_page;
 
tlb_entry_t entry;
entry.word[0] = 0;
entry.word[1] = 0;
entry.p = true; /* present */
entry.ma = MA_UNCACHEABLE;
entry.a = true; /* already accessed */
entry.d = true; /* already dirty */
entry.pl = PL_USER;
entry.ar = AR_READ | AR_WRITE;
entry.ppn = frame >> PPN_SHIFT;
entry.ps = USPACE_IO_PAGE_WIDTH;
dtc_mapping_insert(page, TASK->as->asid, entry);
return 1;
} else {
fault_if_from_uspace(istate,
"IO access fault at %p.", va);
}
}
}
return 0;
}
 
/** Data TLB fault handler for faults with VHPT turned off.
*
* @param vector Interruption vector.
* @param istate Structure with saved interruption state.
* @param vector Interruption vector.
* @param istate Structure with saved interruption state.
*/
void alternate_data_tlb_fault(uint64_t vector, istate_t *istate)
{
575,17 → 511,13
dtc_pte_copy(t);
page_table_unlock(AS, true);
} else {
page_table_unlock(AS, true);
if (try_memmap_io_insertion(va, istate))
return;
/*
* Forward the page fault to the address space page fault
* handler.
* Forward the page fault to the address space page fault handler.
*/
page_table_unlock(AS, true);
if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
fault_if_from_uspace(istate,"Page fault at %p.",va);
panic("%s: va=%p, rid=%d, iip=%p.", __func__, va, rid,
istate->cr_iip);
fault_if_from_uspace(istate,"Page fault at %p",va);
panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid, istate->cr_iip);
}
}
}
594,18 → 526,18
*
* This fault should not occur.
*
* @param vector Interruption vector.
* @param istate Structure with saved interruption state.
* @param vector Interruption vector.
* @param istate Structure with saved interruption state.
*/
void data_nested_tlb_fault(uint64_t vector, istate_t *istate)
{
panic("%s.", __func__);
panic("%s\n", __func__);
}
 
/** Data Dirty bit fault handler.
*
* @param vector Interruption vector.
* @param istate Structure with saved interruption state.
* @param vector Interruption vector.
* @param istate Structure with saved interruption state.
*/
void data_dirty_bit_fault(uint64_t vector, istate_t *istate)
{
630,9 → 562,10
dtc_pte_copy(t);
} else {
if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) {
fault_if_from_uspace(istate,"Page fault at %p.",va);
panic("%s: va=%p, rid=%d, iip=%p.", __func__, va, rid,
istate->cr_iip);
fault_if_from_uspace(istate,"Page fault at %p",va);
panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid, istate->cr_iip);
t->d = true;
dtc_pte_copy(t);
}
}
page_table_unlock(AS, true);
640,8 → 573,8
 
/** Instruction access bit fault handler.
*
* @param vector Interruption vector.
* @param istate Structure with saved interruption state.
* @param vector Interruption vector.
* @param istate Structure with saved interruption state.
*/
void instruction_access_bit_fault(uint64_t vector, istate_t *istate)
{
666,9 → 599,10
itc_pte_copy(t);
} else {
if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) {
fault_if_from_uspace(istate, "Page fault at %p.", va);
panic("%s: va=%p, rid=%d, iip=%p.", __func__, va, rid,
istate->cr_iip);
fault_if_from_uspace(istate,"Page fault at %p",va);
panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid, istate->cr_iip);
t->a = true;
itc_pte_copy(t);
}
}
page_table_unlock(AS, true);
702,9 → 636,10
dtc_pte_copy(t);
} else {
if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
fault_if_from_uspace(istate, "Page fault at %p.", va);
panic("%s: va=%p, rid=%d, iip=%p.", __func__, va, rid,
istate->cr_iip);
fault_if_from_uspace(istate,"Page fault at %p",va);
panic("%s: va=%p, rid=%d, iip=%p\n", __func__, va, rid, istate->cr_iip);
t->a = true;
itc_pte_copy(t);
}
}
page_table_unlock(AS, true);
743,19 → 678,11
} else {
page_table_unlock(AS, true);
if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
fault_if_from_uspace(istate, "Page fault at %p.", va);
panic("%s: va=%p, rid=%d.", __func__, va, rid);
fault_if_from_uspace(istate,"Page fault at %p",va);
panic("%s: va=%p, rid=%d\n", __func__, va, rid);
}
}
}
 
void tlb_arch_init(void)
{
}
 
void tlb_print(void)
{
}
 
/** @}
*/
/branches/network/kernel/arch/ia64/src/mm/frame.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia64mm
/** @addtogroup ia64mm
* @{
*/
/** @file
36,55 → 36,26
#include <mm/frame.h>
#include <config.h>
#include <panic.h>
#include <arch/bootinfo.h>
#include <align.h>
#include <macros.h>
 
#define KERNEL_RESERVED_AREA_BASE (0x4400000)
#define KERNEL_RESERVED_AREA_SIZE (16 * 1024 * 1024)
/*
* This is Ski-specific and certainly not sufficient
* for real ia64 systems that provide memory map.
*/
#define MEMORY_SIZE (64 * 1024 * 1024)
#define MEMORY_BASE (64 * 1024 * 1024)
 
#define ROM_BASE 0xa0000 /* for simulators */
#define ROM_SIZE (384 * 1024) /* for simulators */
 
#define MIN_ZONE_SIZE (64 * 1024)
 
#define MINCONF 1
 
uintptr_t last_frame = 0;
 
#define ROM_BASE 0xa0000 //For ski
#define ROM_SIZE (384 * 1024) //For ski
void poke_char(int x,int y,char ch, char c);
void frame_arch_init(void)
{
if (config.cpu_active == 1) {
unsigned int i;
for (i = 0; i < bootinfo->memmap_items; i++) {
if (bootinfo->memmap[i].type == EFI_MEMMAP_FREE_MEM) {
uint64_t base = bootinfo->memmap[i].base;
uint64_t size = bootinfo->memmap[i].size;
uint64_t abase = ALIGN_UP(base, FRAME_SIZE);
 
if (size > FRAME_SIZE)
size -= abase - base;
 
if (size > MIN_ZONE_SIZE) {
zone_create(abase >> FRAME_WIDTH,
size >> FRAME_WIDTH,
max(MINCONF, abase >> FRAME_WIDTH),
0);
}
if (abase + size > last_frame)
last_frame = abase + size;
}
}
/*
* Blacklist ROM regions.
*/
frame_mark_unavailable(ADDR2PFN(ROM_BASE),
SIZE2FRAMES(ROM_SIZE));
 
frame_mark_unavailable(ADDR2PFN(KERNEL_RESERVED_AREA_BASE),
SIZE2FRAMES(KERNEL_RESERVED_AREA_SIZE));
}
zone_create(MEMORY_BASE >> FRAME_WIDTH, SIZE2FRAMES(MEMORY_SIZE), (MEMORY_SIZE) >> FRAME_WIDTH, 0);
/*
* Blacklist ROM regions.
*/
frame_mark_unavailable(ADDR2PFN(ROM_BASE), SIZE2FRAMES(ROM_SIZE));
}
 
/** @}
/branches/network/kernel/arch/ia64/src/mm/as.c
68,7 → 68,7
continue;
rr.word = rr_read(i);
rr.map.ve = false; /* disable VHPT walker */
rr.map.ve = false; /* disable VHPT walker */
rr.map.rid = ASID2RID(as->asid, i);
rr.map.ps = PAGE_WIDTH;
rr_write(i, rr.word);
/branches/network/kernel/arch/ia64/src/mm/page.c
27,7 → 27,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia64mm
/** @addtogroup ia64mm
* @{
*/
/** @file
47,7 → 47,6
#include <arch/asm.h>
#include <arch/barrier.h>
#include <memstr.h>
#include <align.h>
 
static void set_environment(void);
 
63,9 → 62,9
void set_environment(void)
{
region_register rr;
pta_register pta;
pta_register pta;
int i;
#ifdef CONFIG_VHPT
#ifdef CONFIG_VHPT
uintptr_t vhpt_base;
#endif
 
123,10 → 122,10
*
* Interrupts must be disabled.
*
* @param page Address of virtual page including VRN bits.
* @param asid Address space identifier.
* @param page Address of virtual page including VRN bits.
* @param asid Address space identifier.
*
* @return VHPT entry address.
* @return VHPT entry address.
*/
vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)
{
167,11 → 166,10
*
* Interrupts must be disabled.
*
* @param page Address of virtual page including VRN bits.
* @param asid Address space identifier.
* @param page Address of virtual page including VRN bits.
* @param asid Address space identifier.
*
* @return True if page and asid match the page and asid of t,
* false otherwise.
* @return True if page and asid match the page and asid of t, false otherwise.
*/
bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)
{
212,15 → 210,12
/** Set up one VHPT entry.
*
* @param v VHPT entry to be set up.
* @param page Virtual address of the page mapped by the entry.
* @param asid Address space identifier of the address space to which
* page belongs.
* @param frame Physical address of the frame to wich page is mapped.
* @param flags Different flags for the mapping.
* @param page Virtual address of the page mapped by the entry.
* @param asid Address space identifier of the address space to which page belongs.
* @param frame Physical address of the frame to wich page is mapped.
* @param flags Different flags for the mapping.
*/
void
vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame,
int flags)
void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags)
{
region_register rr_save, rr;
index_t vrn;
254,8 → 249,7
v->word[3] = 0;
v->present.p = true;
v->present.ma = (flags & PAGE_CACHEABLE) ?
MA_WRITEBACK : MA_UNCACHEABLE;
v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE;
v->present.a = false; /* not accessed */
v->present.d = false; /* not dirty */
v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
268,11 → 262,5
v->present.tag.tag_word = tag;
}
 
uintptr_t hw_map(uintptr_t physaddr, size_t size __attribute__ ((unused)))
{
/* THIS is a dirty hack. */
return (uintptr_t)((uint64_t)(PA2KA(physaddr)) + VIO_OFFSET);
}
 
/** @}
*/
/branches/network/kernel/arch/ia64/src/drivers/ega.c
0,0 → 1,139
/*
* Copyright (c) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
* @{
*/
/**
* @file
* @brief EGA driver.
*/
 
#include <putchar.h>
#include <mm/page.h>
#include <mm/as.h>
#include <arch/mm/page.h>
#include <synch/spinlock.h>
#include <arch/types.h>
#include <arch/asm.h>
#include <memstr.h>
#include <console/chardev.h>
#include <console/console.h>
#include <sysinfo/sysinfo.h>
#include <arch/drivers/ega.h>
 
/*
* The EGA driver.
* Simple and short. Function for displaying characters and "scrolling".
*/
 
SPINLOCK_INITIALIZE(egalock);
static uint32_t ega_cursor;
static uint8_t *videoram;
 
static void ega_putchar(chardev_t *d, const char ch);
 
chardev_t ega_console;
static chardev_operations_t ega_ops = {
.write = ega_putchar
};
 
 
void ega_init(void)
{
videoram = (uint8_t *) (VIDEORAM);
 
/*
* Clear the screen.
*/
_memsetw(videoram, SCREEN, 0x0720);
 
chardev_initialize("ega_out", &ega_console, &ega_ops);
stdout = &ega_console;
sysinfo_set_item_val("fb", NULL, true);
sysinfo_set_item_val("fb.kind", NULL, 2);
sysinfo_set_item_val("fb.width", NULL, ROW);
sysinfo_set_item_val("fb.height", NULL, ROWS);
sysinfo_set_item_val("fb.address.physical", NULL, VIDEORAM);
#ifndef CONFIG_FB
putchar('\n');
#endif
}
 
static void ega_display_char(char ch)
{
videoram[ega_cursor * 2] = ch;
videoram[ega_cursor * 2 + 1] = 7;
}
 
/*
* This function takes care of scrolling.
*/
static void ega_check_cursor(void)
{
if (ega_cursor < SCREEN)
return;
 
memcpy((void *) videoram, (void *) (videoram + ROW * 2), (SCREEN - ROW) * 2);
_memsetw(videoram + (SCREEN - ROW) * 2, ROW, 0x0720);
ega_cursor = ega_cursor - ROW;
}
 
void ega_putchar(chardev_t *d, const char ch)
{
ipl_t ipl;
 
ipl = interrupts_disable();
spinlock_lock(&egalock);
 
switch (ch) {
case '\n':
ega_cursor = (ega_cursor + ROW) - ega_cursor % ROW;
break;
case '\t':
ega_cursor = (ega_cursor + 8) - ega_cursor % 8;
break;
case '\b':
if (ega_cursor % ROW)
ega_cursor--;
break;
default:
ega_display_char(ch);
ega_cursor++;
break;
}
ega_check_cursor();
 
spinlock_unlock(&egalock);
interrupts_restore(ipl);
}
 
/** @}
*/
/branches/network/kernel/arch/ia64/src/drivers/it.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia64
/** @addtogroup ia64
* @{
*/
/** @file
44,44 → 44,25
#include <ddi/device.h>
#include <arch.h>
 
#define IT_SERVICE_CLOCKS 64
#define IT_SERVICE_CLOCKS 64
 
#define FREQ_NUMERATOR_SHIFT 32
#define FREQ_NUMERATOR_MASK 0xffffffff00000000ULL
 
#define FREQ_DENOMINATOR_SHIFT 0
#define FREQ_DENOMINATOR_MASK 0xffffffffULL
 
uint64_t it_delta;
 
static irq_t it_irq;
 
static irq_ownership_t it_claim(irq_t *);
static void it_interrupt(irq_t *);
static irq_ownership_t it_claim(void);
static void it_interrupt(irq_t *irq, void *arg, ...);
 
/** Initialize Interval Timer. */
void it_init(void)
{
cr_itv_t itv;
if (config.cpu_active == 1) {
irq_initialize(&it_irq);
it_irq.inr = INTERRUPT_TIMER;
it_irq.devno = device_assign_devno();
it_irq.claim = it_claim;
it_irq.handler = it_interrupt;
irq_register(&it_irq);
uint64_t base_freq;
base_freq = ((bootinfo->freq_scale) & FREQ_NUMERATOR_MASK) >>
FREQ_NUMERATOR_SHIFT;
base_freq *= bootinfo->sys_freq;
base_freq /= ((bootinfo->freq_scale) & FREQ_DENOMINATOR_MASK) >>
FREQ_DENOMINATOR_SHIFT;
it_delta = base_freq / HZ;
}
 
irq_initialize(&it_irq);
it_irq.inr = INTERRUPT_TIMER;
it_irq.devno = device_assign_devno();
it_irq.claim = it_claim;
it_irq.handler = it_interrupt;
irq_register(&it_irq);
 
/* initialize Interval Timer external interrupt vector */
itv.value = itv_read();
itv.vector = INTERRUPT_TIMER;
104,13 → 85,13
*
* @return Always IRQ_ACCEPT.
*/
irq_ownership_t it_claim(irq_t *irq)
irq_ownership_t it_claim(void)
{
return IRQ_ACCEPT;
}
 
/** Process Interval Timer interrupt. */
void it_interrupt(irq_t *irq)
void it_interrupt(irq_t *irq, void *arg, ...)
{
int64_t c;
int64_t m;
/branches/network/kernel/arch/ia64/src/ia64.c
50,91 → 50,64
#include <proc/uarg.h>
#include <syscall/syscall.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <arch/drivers/ega.h>
#include <arch/bootinfo.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <genarch/drivers/ega/ega.h>
#include <genarch/kbrd/kbrd.h>
#include <genarch/srln/srln.h>
#include <genarch/drivers/i8042/i8042.h>
#include <genarch/drivers/ns16550/ns16550.h>
#include <arch/drivers/kbd.h>
#include <smp/smp.h>
#include <smp/ipi.h>
#include <arch/atomic.h>
#include <panic.h>
#include <print.h>
#include <sysinfo/sysinfo.h>
#include <string.h>
#include <genarch/kbd/i8042.h>
 
/* NS16550 as a COM 1 */
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
 
bootinfo_t *bootinfo;
 
static uint64_t iosapic_base = 0xfec00000;
 
/** Performs ia64-specific initialization before main_bsp() is called. */
void arch_pre_main(void)
{
/* Setup usermode init tasks. */
 
//#ifdef I460GX
unsigned int i;
init.cnt = bootinfo->taskmap.count;
for (i = 0; i < init.cnt; i++) {
init.tasks[i].addr =
((unsigned long) bootinfo->taskmap.tasks[i].addr) |
VRN_MASK;
init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK;
init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,
CONFIG_TASK_NAME_BUFLEN);
}
/*
#else
init.cnt = 8;
init.tasks[0].addr = INIT0_ADDRESS;
init.tasks[0].size = INIT0_SIZE;
init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
init.tasks[1].size = INIT0_SIZE;
init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
init.tasks[2].size = INIT0_SIZE;
init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
init.tasks[3].size = INIT0_SIZE;
init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
init.tasks[4].size = INIT0_SIZE;
init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
init.tasks[5].size = INIT0_SIZE;
init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;
init.tasks[6].size = INIT0_SIZE;
init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;
init.tasks[7].size = INIT0_SIZE;
#endif*/
}
 
void arch_pre_mm_init(void)
{
/*
* Set Interruption Vector Address (i.e. location of interruption vector
* table).
*/
/* Set Interruption Vector Address (i.e. location of interruption vector table). */
iva_write((uintptr_t) &ivt);
srlz_d();
}
 
static void iosapic_init(void)
{
uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
int i;
int myid, myeid;
myid = ia64_get_cpu_id();
myeid = ia64_get_cpu_eid();
 
for (i = 0; i < 16; i++) {
if (i == 2)
continue; /* Disable Cascade interrupt */
((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
srlz_d();
((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
srlz_d();
((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
srlz_d();
((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
myeid << (48 - 32);
srlz_d();
}
 
}
 
void arch_post_mm_init(void)
{
if (config.cpu_active == 1) {
iosapic_init();
irq_init(INR_COUNT, INR_COUNT);
}
irq_init(INR_COUNT, INR_COUNT);
#ifdef SKI
ski_init_console();
#else
ega_init();
#endif
it_init();
}
 
146,55 → 119,51
{
}
 
 
#ifdef I460GX
#define POLL_INTERVAL 50000 /* 50 ms */
/** Kernel thread for polling keyboard. */
static void i8042_kkbdpoll(void *arg)
{
while (1) {
i8042_poll();
thread_usleep(POLL_INTERVAL);
}
}
#endif
 
void arch_post_smp_init(void)
{
 
if (config.cpu_active == 1) {
/*
* Create thread that polls keyboard.
*/
#ifdef SKI
indev_t *in;
in = skiin_init();
if (in)
srln_init(in);
skiout_init();
thread_t *t;
t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
if (!t)
panic("cannot create kkbdpoll\n");
thread_ready(t);
#endif
 
#ifdef I460GX
devno_t kbd = device_assign_devno();
devno_t mouse = device_assign_devno();
/* keyboard controller */
i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
 
thread_t *t;
t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
if (!t)
panic("cannot create kkbdpoll\n");
thread_ready(t);
 
#endif
#ifdef CONFIG_EGA
ega_init(EGA_BASE, EGA_VIDEORAM);
#endif
#ifdef CONFIG_NS16550
indev_t *kbrdin_ns16550
= ns16550_init((ns16550_t *) NS16550_BASE, NS16550_IRQ, NULL, NULL);
if (kbrdin_ns16550)
srln_init(kbrdin_ns16550);
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);
sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
sysinfo_set_item_val("kbd.address.physical", NULL,
(uintptr_t) NS16550_BASE);
sysinfo_set_item_val("kbd.address.kernel", NULL,
(uintptr_t) NS16550_BASE);
#endif
#ifdef CONFIG_I8042
indev_t *kbrdin_i8042 = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
if (kbrdin_i8042)
kbrd_init(kbrdin_i8042);
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
sysinfo_set_item_val("kbd.address.physical", NULL,
(uintptr_t) I8042_BASE);
sysinfo_set_item_val("kbd.address.kernel", NULL,
(uintptr_t) I8042_BASE);
#endif
sysinfo_set_item_val("ia64_iospace", NULL, true);
sysinfo_set_item_val("ia64_iospace.address", NULL, true);
sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
 
}
}
 
 
/** Enter userspace and never return. */
void userspace(uspace_arg_t *kernel_uarg)
{
203,25 → 172,26
 
psr.value = psr_read();
psr.cpl = PL_USER;
psr.i = true; /* start with interrupts enabled */
psr.i = true; /* start with interrupts enabled */
psr.ic = true;
psr.ri = 0; /* start with instruction #0 */
psr.bn = 1; /* start in bank 0 */
psr.ri = 0; /* start with instruction #0 */
psr.bn = 1; /* start in bank 0 */
 
asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
rsc.loadrs = 0;
rsc.be = false;
rsc.pl = PL_USER;
rsc.mode = 3; /* eager mode */
rsc.mode = 3; /* eager mode */
 
switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
(uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,
(uintptr_t) kernel_uarg->uspace_uarg,
psr.value, rsc.value);
 
while (1)
while (1) {
;
}
}
 
/** Set thread-local-storage pointer.
240,9 → 210,8
{
#ifdef SKI
ski_kbd_grab();
#endif
#endif
}
 
/** Return console to userspace
*
*/
255,27 → 224,9
 
void arch_reboot(void)
{
pio_write_8((ioport8_t *)0x64, 0xfe);
while (1)
;
// TODO
while (1);
}
 
/** Construct function pointer
*
* @param fptr function pointer structure
* @param addr function address
* @param caller calling function address
*
* @return address of the function pointer
*
*/
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
fptr->fnc = (unative_t) addr;
fptr->gp = ((unative_t *) caller)[1];
return (void *) fptr;
}
 
/** @}
*/
/branches/network/kernel/arch/ia64/src/start.S
32,15 → 32,19
#include <mm/asid.h>
 
#define RR_MASK (0xFFFFFFFF00000002)
#define RID_SHIFT 8
#define PS_SHIFT 2
#define RID_SHIFT 8
#define PS_SHIFT 2
 
#define KERNEL_TRANSLATION_I 0x0010000000000661
#define KERNEL_TRANSLATION_D 0x0010000000000661
#define KERNEL_TRANSLATION_VIO 0x0010000000000671
#define KERNEL_TRANSLATION_IO 0x00100FFFFC000671
#define KERNEL_TRANSLATION_FW 0x00100000F0000671
#define KERNEL_TRANSLATION_I 0x0010000000000661
#define KERNEL_TRANSLATION_D 0x0010000000000661
#define KERNEL_TRANSLATION_VIO 0x0010000000000671
#define KERNEL_TRANSLATION_IO 0x00100FFFFC000671
#define VIO_OFFSET 0x0002000000000000
 
#define IO_OFFSET 0x0001000000000000
 
 
 
.section K_TEXT_START, "ax"
 
.global kernel_image_start
49,19 → 53,6
kernel_image_start:
.auto
 
#ifdef CONFIG_SMP
# Identify self(CPU) in OS structures by ID / EID
 
mov r9 = cr64
mov r10 = 1
movl r12 = 0xffffffff
movl r8 = cpu_by_id_eid_list
and r8 = r8, r12
shr r9 = r9, 16
add r8 = r8, r9
st1 [r8] = r10
#endif
 
mov psr.l = r0
srlz.i
srlz.d
68,29 → 59,39
 
# Fill TR.i and TR.d using Region Register #VRN_KERNEL
 
 
movl r8 = (VRN_KERNEL << VRN_SHIFT)
mov r9 = rr[r8]
 
 
movl r10 = (RR_MASK)
and r9 = r10, r9
movl r10 = ((RID_KERNEL << RID_SHIFT) | (KERNEL_PAGE_WIDTH << PS_SHIFT))
or r9 = r10, r9
 
 
mov rr[r8] = r9
 
 
 
movl r8 = (VRN_KERNEL << VRN_SHIFT)
mov cr.ifa = r8
 
mov r11 = cr.itir
movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT)
or r10 = r10, r11
mov cr.itir = r10
mov r11 = cr.itir ;;
movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT);;
or r10 =r10 , r11 ;;
mov cr.itir = r10;;
 
movl r10 = (KERNEL_TRANSLATION_I)
itr.i itr[r0] = r10
 
movl r10 = (KERNEL_TRANSLATION_D)
itr.d dtr[r0] = r10
 
 
movl r7 = 1
movl r8 = (VRN_KERNEL << VRN_SHIFT) | VIO_OFFSET
mov cr.ifa = r8
97,13 → 98,15
movl r10 = (KERNEL_TRANSLATION_VIO)
itr.d dtr[r7] = r10
 
mov r11 = cr.itir
movl r10 = ~0xfc
and r10 = r10, r11
movl r11 = (IO_PAGE_WIDTH << PS_SHIFT)
or r10 = r10, r11
mov cr.itir = r10
 
mov r11 = cr.itir ;;
movl r10 = ~0xfc;;
and r10 =r10 , r11 ;;
movl r11 = (IO_PAGE_WIDTH << PS_SHIFT);;
or r10 =r10 , r11 ;;
mov cr.itir = r10;;
 
 
movl r7 = 2
movl r8 = (VRN_KERNEL << VRN_SHIFT) | IO_OFFSET
mov cr.ifa = r8
110,26 → 113,12
movl r10 = (KERNEL_TRANSLATION_IO)
itr.d dtr[r7] = r10
 
# Setup mapping for fimware arrea (also SAPIC)
 
mov r11 = cr.itir
movl r10 = ~0xfc
and r10 = r10, r11
movl r11 = (FW_PAGE_WIDTH << PS_SHIFT)
or r10 = r10, r11
mov cr.itir = r10
 
movl r7 = 3
movl r8 = (VRN_KERNEL << VRN_SHIFT) | FW_OFFSET
mov cr.ifa = r8
movl r10 = (KERNEL_TRANSLATION_FW)
itr.d dtr[r7] = r10
 
# Initialize PSR
 
# initialize PSR
movl r10 = (PSR_DT_MASK | PSR_RT_MASK | PSR_IT_MASK | PSR_IC_MASK) /* Enable paging */
mov r9 = psr
 
or r10 = r10, r9
mov cr.ipsr = r10
mov cr.ifs = r0
139,14 → 128,11
srlz.i
 
.explicit
 
/*
* Return From Interrupt is the only way to
* fill the upper half word of PSR.
* Return From Interupt is the only the way to fill upper half word of PSR.
*/
rfi ;;
rfi;;
 
 
.global paging_start
paging_start:
 
154,64 → 140,45
* Now we are paging.
*/
 
# Switch to register bank 1
# switch to register bank 1
bsw.1
 
#ifdef CONFIG_SMP
# Am I BSP or AP?
movl r20 = bsp_started ;;
ld8 r20 = [r20] ;;
cmp.eq p3, p2 = r20, r0 ;;
#else
cmp.eq p3, p2 = r0, r0 ;; /* you are BSP */
#endif /* CONFIG_SMP */
# Initialize register stack
# initialize register stack
mov ar.rsc = r0
movl r8 = (VRN_KERNEL << VRN_SHIFT) ;;
mov ar.bspstore = r8
loadrs
 
# Initialize memory stack to some sane value
# initialize memory stack to some sane value
movl r12 = stack0 ;;
add r12 = -16, r12 /* allocate a scratch area on the stack */
 
# Initialize gp (Global Pointer) register
# initialize gp (Global Pointer) register
movl r20 = (VRN_KERNEL << VRN_SHIFT);;
or r20 = r20,r1;;
movl r1 = _hardcoded_load_address
/*
* Initialize hardcoded_* variables. Do only BSP
* Initialize hardcoded_* variables.
*/
(p3) movl r14 = _hardcoded_ktext_size
(p3) movl r15 = _hardcoded_kdata_size
(p3) movl r16 = _hardcoded_load_address ;;
(p3) addl r17 = @gprel(hardcoded_ktext_size), gp
(p3) addl r18 = @gprel(hardcoded_kdata_size), gp
(p3) addl r19 = @gprel(hardcoded_load_address), gp
(p3) addl r21 = @gprel(bootinfo), gp
movl r14 = _hardcoded_ktext_size
movl r15 = _hardcoded_kdata_size
movl r16 = _hardcoded_load_address ;;
addl r17 = @gprel(hardcoded_ktext_size), gp
addl r18 = @gprel(hardcoded_kdata_size), gp
addl r19 = @gprel(hardcoded_load_address), gp
addl r21 = @gprel(bootinfo), gp
;;
(p3) st8 [r17] = r14
(p3) st8 [r18] = r15
(p3) st8 [r19] = r16
(p3) st8 [r21] = r20
st8 [r17] = r14
st8 [r18] = r15
st8 [r19] = r16
st8 [r21] = r20
 
ssm (1 << 19) ;; /* Disable f32 - f127 */
srlz.i
srlz.d ;;
 
#ifdef CONFIG_SMP
(p2) movl r18 = main_ap ;;
(p2) mov b1 = r18 ;;
(p2) br.call.sptk.many b0 = b1
 
# Mark that BSP is on
mov r20 = 1 ;;
movl r21 = bsp_started ;;
st8 [r21] = r20 ;;
#endif
 
br.call.sptk.many b0 = arch_pre_main
 
movl r18 = main_bsp ;;
218,51 → 185,6
mov b1 = r18 ;;
br.call.sptk.many b0 = b1
 
 
0:
br 0b
 
#ifdef CONFIG_SMP
 
.align 4096
kernel_image_ap_start:
.auto
 
# Identify self(CPU) in OS structures by ID / EID
 
mov r9 = cr64
mov r10 = 1
movl r12 = 0xffffffff
movl r8 = cpu_by_id_eid_list
and r8 = r8, r12
shr r9 = r9, 16
add r8 = r8, r9
st1 [r8] = r10
# Wait for wakeup synchro signal (#3 in cpu_by_id_eid_list)
kernel_image_ap_start_loop:
movl r11 = kernel_image_ap_start_loop
and r11 = r11, r12
mov b1 = r11
 
ld1 r20 = [r8] ;;
movl r21 = 3 ;;
cmp.eq p2, p3 = r20, r21 ;;
(p3) br.call.sptk.many b0 = b1
 
movl r11 = kernel_image_start
and r11 = r11, r12
mov b1 = r11
br.call.sptk.many b0 = b1
 
.align 16
.global bsp_started
bsp_started:
.space 8
 
.align 4096
.global cpu_by_id_eid_list
cpu_by_id_eid_list:
.space 65536
 
#endif /* CONFIG_SMP */
/branches/network/kernel/arch/ia64/src/interrupt.c
38,6 → 38,7
#include <ddi/irq.h>
#include <panic.h>
#include <print.h>
#include <symtab.h>
#include <debug.h>
#include <console/console.h>
#include <arch/types.h>
52,8 → 53,6
#include <ipc/irq.h>
#include <ipc/ipc.h>
#include <synch/spinlock.h>
#include <mm/tlb.h>
#include <symtab.h>
 
#define VECTORS_64_BUNDLE 20
#define VECTORS_16_BUNDLE 48
137,9 → 136,9
{
char *ifa, *iipa, *iip;
 
ifa = symtab_fmt_name_lookup(istate->cr_ifa);
iipa = symtab_fmt_name_lookup(istate->cr_iipa);
iip = symtab_fmt_name_lookup(istate->cr_iip);
ifa = get_symtab_entry(istate->cr_ifa);
iipa = get_symtab_entry(istate->cr_iipa);
iip = get_symtab_entry(istate->cr_iip);
 
putchar('\n');
printf("Interrupted context dump:\n");
186,21 → 185,21
break;
}
 
fault_if_from_uspace(istate, "General Exception (%s).", desc);
fault_if_from_uspace(istate, "General Exception (%s)", desc);
 
dump_interrupted_context(istate);
panic("General Exception (%s).", desc);
panic("General Exception (%s)\n", desc);
}
 
void disabled_fp_register(uint64_t vector, istate_t *istate)
{
#ifdef CONFIG_FPU_LAZY
scheduler_fpu_lazy_request();
#ifdef CONFIG_FPU_LAZY
scheduler_fpu_lazy_request();
#else
fault_if_from_uspace(istate, "Interruption: %#hx (%s).",
fault_if_from_uspace(istate, "Interruption: %#hx (%s)",
(uint16_t) vector, vector_to_string(vector));
dump_interrupted_context(istate);
panic("Interruption: %#hx (%s).", (uint16_t) vector,
panic("Interruption: %#hx (%s)\n", (uint16_t) vector,
vector_to_string(vector));
#endif
}
228,82 → 227,40
 
void universal_handler(uint64_t vector, istate_t *istate)
{
fault_if_from_uspace(istate, "Interruption: %#hx (%s).",
fault_if_from_uspace(istate, "Interruption: %#hx (%s)\n",
(uint16_t) vector, vector_to_string(vector));
dump_interrupted_context(istate);
panic("Interruption: %#hx (%s).", (uint16_t) vector,
panic("Interruption: %#hx (%s)\n", (uint16_t) vector,
vector_to_string(vector));
}
 
static void end_of_local_irq(void)
{
asm volatile ("mov cr.eoi=r0;;");
}
 
 
void external_interrupt(uint64_t vector, istate_t *istate)
{
irq_t *irq;
cr_ivr_t ivr;
irq_t *irq;
ivr.value = ivr_read();
srlz_d();
 
switch (ivr.vector) {
case INTERRUPT_SPURIOUS:
irq = irq_dispatch_and_lock(ivr.vector);
if (irq) {
irq->handler(irq, irq->arg);
spinlock_unlock(&irq->lock);
} else {
switch (ivr.vector) {
case INTERRUPT_SPURIOUS:
#ifdef CONFIG_DEBUG
printf("cpu%d: spurious interrupt\n", CPU->id);
printf("cpu%d: spurious interrupt\n", CPU->id);
#endif
break;
break;
 
#ifdef CONFIG_SMP
case VECTOR_TLB_SHOOTDOWN_IPI:
tlb_shootdown_ipi_recv();
end_of_local_irq();
break;
#endif
 
case INTERRUPT_TIMER:
irq = irq_dispatch_and_lock(ivr.vector);
if (irq) {
irq->handler(irq);
spinlock_unlock(&irq->lock);
} else {
panic("Unhandled Internal Timer Interrupt (%d).",
default:
panic("\nUnhandled External Interrupt Vector %d\n",
ivr.vector);
break;
}
break;
default:
irq = irq_dispatch_and_lock(ivr.vector);
if (irq) {
/*
* The IRQ handler was found.
*/
if (irq->preack) {
/* Send EOI before processing the interrupt */
end_of_local_irq();
}
irq->handler(irq);
if (!irq->preack)
end_of_local_irq();
spinlock_unlock(&irq->lock);
} else {
/*
* Unhandled interrupt.
*/
end_of_local_irq();
#ifdef CONFIG_DEBUG
printf("\nUnhandled External Interrupt Vector %d\n",
ivr.vector);
#endif
}
break;
}
}
 
void trap_virtual_enable_irqs(uint16_t irqmask)
{
}
 
/** @}
*/
/branches/network/kernel/arch/ia64/src/cpu/cpu.c
70,8 → 70,8
}
printf("cpu%d: %s (%s), archrev=%d, model=%d, revision=%d\n", CPU->id,
family_str, vendor, CPU->arch.cpuid3.archrev,
CPU->arch.cpuid3.model, CPU->arch.cpuid3.revision);
family_str, vendor, CPU->arch.cpuid3.archrev, CPU->arch.cpuid3.model,
CPU->arch.cpuid3.revision);
}
 
/** @}
/branches/network/kernel/arch/ia64/src/ski/ski.c
35,19 → 35,29
#include <arch/ski/ski.h>
#include <console/console.h>
#include <console/chardev.h>
#include <arch/interrupt.h>
#include <sysinfo/sysinfo.h>
#include <arch/types.h>
#include <ddi/device.h>
#include <ddi/irq.h>
#include <ipc/irq.h>
#include <proc/thread.h>
#include <synch/spinlock.h>
#include <arch/asm.h>
#include <arch/drivers/kbd.h>
#include <arch.h>
 
static indev_t skiin; /**< Ski input device. */
static outdev_t skiout; /**< Ski output device. */
#define SKI_KBD_INR 0
 
static irq_t ski_kbd_irq;
static devno_t ski_kbd_devno;
 
chardev_t ski_console;
chardev_t ski_uconsole;
 
static bool kbd_disabled;
 
static void ski_putchar(chardev_t *d, const char ch);
static int32_t ski_getchar(void);
 
/** Display character on debug console
*
* Use SSC (Simulator System Call) to
56,31 → 66,21
* @param d Character device.
* @param ch Character to be printed.
*/
static void ski_putchar(outdev_t *d, const char ch, bool silent)
void ski_putchar(chardev_t *d, const char ch)
{
if (!silent) {
asm volatile (
"mov r15 = %0\n"
"mov r32 = %1\n" /* r32 is in0 */
"break 0x80000\n" /* modifies r8 */
:
: "i" (SKI_PUTCHAR), "r" (ch)
: "r15", "in0", "r8"
);
if (ch == '\n')
ski_putchar(d, '\r', false);
}
asm volatile (
"mov r15 = %0\n"
"mov r32 = %1\n" /* r32 is in0 */
"break 0x80000\n" /* modifies r8 */
:
: "i" (SKI_PUTCHAR), "r" (ch)
: "r15", "in0", "r8"
);
if (ch == '\n')
ski_putchar(d, '\r');
}
 
static indev_operations_t skiin_ops = {
.poll = NULL
};
 
static outdev_operations_t skiout_ops = {
.write = ski_putchar
};
 
/** Ask debug console if a key was pressed.
*
* Use SSC (Simulator System Call) to
90,7 → 90,7
*
* @return ASCII code of pressed key or 0 if no key pressed.
*/
static int32_t ski_getchar(void)
int32_t ski_getchar(void)
{
uint64_t ch;
107,47 → 107,102
return (int32_t) ch;
}
 
/**
* This is a blocking wrapper for ski_getchar().
* To be used when the kernel crashes.
*/
static char ski_getchar_blocking(chardev_t *d)
{
int ch;
 
while(!(ch = ski_getchar()))
;
if(ch == '\r')
ch = '\n';
return (char) ch;
}
 
/** Ask keyboard if a key was pressed. */
static void poll_keyboard(void)
{
char ch;
if (kbd_disabled)
static char last;
ipl_t ipl;
 
ipl = interrupts_disable();
 
if (kbd_disabled) {
interrupts_restore(ipl);
return;
}
spinlock_lock(&ski_kbd_irq.lock);
 
ch = ski_getchar();
if(ch == '\r')
ch = '\n';
if (ch) {
indev_push_character(&skiin, ch);
if (ski_kbd_irq.notif_cfg.notify && ski_kbd_irq.notif_cfg.answerbox) {
chardev_push_character(&ski_uconsole, ch);
ipc_irq_send_notif(&ski_kbd_irq);
} else {
chardev_push_character(&ski_console, ch);
}
last = ch;
spinlock_unlock(&ski_kbd_irq.lock);
interrupts_restore(ipl);
return;
}
 
if (last) {
if (ski_kbd_irq.notif_cfg.notify && ski_kbd_irq.notif_cfg.answerbox) {
chardev_push_character(&ski_uconsole, 0);
ipc_irq_send_notif(&ski_kbd_irq);
}
last = 0;
}
 
spinlock_unlock(&ski_kbd_irq.lock);
interrupts_restore(ipl);
}
 
#define POLL_INTERVAL 10000 /* 10 ms */
/* Called from getc(). */
static void ski_kbd_enable(chardev_t *d)
{
kbd_disabled = false;
}
 
/** Kernel thread for polling keyboard. */
static void kkbdpoll(void *arg)
/* Called from getc(). */
static void ski_kbd_disable(chardev_t *d)
{
while (1) {
if (!silent) {
poll_keyboard();
}
thread_usleep(POLL_INTERVAL);
}
kbd_disabled = true;
}
 
/** Decline to service hardware IRQ.
*
* This is only a virtual IRQ, so always decline.
*
* @return Always IRQ_DECLINE.
*/
static irq_ownership_t ski_kbd_claim(void)
{
return IRQ_DECLINE;
}
 
static chardev_operations_t ski_ops = {
.resume = ski_kbd_enable,
.suspend = ski_kbd_disable,
.write = ski_putchar,
.read = ski_getchar_blocking
};
 
/** Initialize debug console
*
* Issue SSC (Simulator System Call) to
* to open debug console.
*/
static void ski_init(void)
void ski_init_console(void)
{
static bool initialized;
 
if (initialized)
return;
asm volatile (
"mov r15 = %0\n"
"break 0x80000\n"
155,46 → 210,54
: "i" (SKI_INIT_CONSOLE)
: "r15", "r8"
);
initialized = true;
}
 
indev_t *skiin_init(void)
{
ski_init();
chardev_initialize("ski_console", &ski_console, &ski_ops);
chardev_initialize("ski_uconsole", &ski_uconsole, &ski_ops);
stdin = &ski_console;
stdout = &ski_console;
 
indev_initialize("skiin", &skiin, &skiin_ops);
thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
if (t)
thread_ready(t);
else
return NULL;
ski_kbd_devno = device_assign_devno();
irq_initialize(&ski_kbd_irq);
ski_kbd_irq.inr = SKI_KBD_INR;
ski_kbd_irq.devno = ski_kbd_devno;
ski_kbd_irq.claim = ski_kbd_claim;
irq_register(&ski_kbd_irq);
 
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.type", NULL, KBD_SKI);
 
return &skiin;
sysinfo_set_item_val("kbd.inr", NULL, SKI_KBD_INR);
sysinfo_set_item_val("kbd.devno", NULL, ski_kbd_devno);
}
 
 
void skiout_init(void)
void ski_kbd_grab(void)
{
ski_init();
 
outdev_initialize("skiout", &skiout, &skiout_ops);
stdout = &skiout;
 
sysinfo_set_item_val("fb", NULL, false);
ipl_t ipl = interrupts_disable();
spinlock_lock(&ski_kbd_irq.lock);
ski_kbd_irq.notif_cfg.notify = false;
spinlock_unlock(&ski_kbd_irq.lock);
interrupts_restore(ipl);
}
 
void ski_kbd_grab(void)
void ski_kbd_release(void)
{
kbd_disabled = true;
ipl_t ipl = interrupts_disable();
spinlock_lock(&ski_kbd_irq.lock);
if (ski_kbd_irq.notif_cfg.answerbox)
ski_kbd_irq.notif_cfg.notify = true;
spinlock_unlock(&ski_kbd_irq.lock);
interrupts_restore(ipl);
}
 
void ski_kbd_release(void)
 
#define POLL_INTERVAL 50000 /* 50 ms */
 
/** Kernel thread for polling keyboard. */
void kkbdpoll(void *arg)
{
kbd_disabled = false;
while (1) {
poll_keyboard();
thread_usleep(POLL_INTERVAL);
}
}
 
/** @}
/branches/network/kernel/arch/ia64/src/ddi/ddi.c
1,6 → 1,5
/*
* Copyright (c) 2006 Jakub Jermar
* Copyright (c) 2008 Jakub vana
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
36,39 → 35,19
#include <ddi/ddi.h>
#include <proc/task.h>
#include <arch/types.h>
#include <mm/slab.h>
#include <errno.h>
 
#define IO_MEMMAP_PAGES 16384
#define PORTS_PER_PAGE 4
 
/** Enable I/O space range for task.
*
* Interrupts are disabled and task is locked.
*
* @param task Task.
* @param ioaddr Starting I/O space address.
* @param size Size of the enabled I/O range.
* @param task Task.
* @param ioaddr Startign I/O space address.
* @param size Size of the enabled I/O range.
*
* @return 0 on success or an error code from errno.h.
*/
int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
{
if (!task->arch.iomap) {
uint8_t *map;
 
task->arch.iomap = malloc(sizeof(bitmap_t), 0);
map = malloc(BITS2BYTES(IO_MEMMAP_PAGES), 0);
if(!map)
return ENOMEM;
bitmap_initialize(task->arch.iomap, map, IO_MEMMAP_PAGES);
bitmap_clear_range(task->arch.iomap, 0, IO_MEMMAP_PAGES);
}
uintptr_t iopage = ioaddr / PORTS_PER_PAGE;
size = ALIGN_UP(size + ioaddr - 4 * iopage, PORTS_PER_PAGE);
bitmap_set_range(task->arch.iomap, iopage, size / 4);
 
return 0;
}
 
/branches/network/kernel/arch/ia64/src/proc/scheduler.c
47,17 → 47,14
{
}
 
/** Prepare kernel stack pointers in bank 0 r22 and r23 and make sure the stack
* is mapped in DTR.
*/
/** Prepare kernel stack pointers in bank 0 r22 and r23 and make sure the stack is mapped in DTR. */
void before_thread_runs_arch(void)
{
uintptr_t base;
base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
base = ALIGN_DOWN(config.base, 1<<KERNEL_PAGE_WIDTH);
 
if ((uintptr_t) THREAD->kstack < base ||
(uintptr_t) THREAD->kstack > base + (1 << (KERNEL_PAGE_WIDTH))) {
if ((uintptr_t) THREAD->kstack < base || (uintptr_t) THREAD->kstack > base + (1<<(KERNEL_PAGE_WIDTH))) {
/*
* Kernel stack of this thread is not mapped by DTR[TR_KERNEL].
* Use DTR[TR_KSTACK1] and DTR[TR_KSTACK2] to map it.
67,11 → 64,8
dtr_purge((uintptr_t) THREAD->kstack, PAGE_WIDTH+1);
/* insert DTR[TR_STACK1] and DTR[TR_STACK2] */
dtlb_kernel_mapping_insert((uintptr_t) THREAD->kstack,
KA2PA(THREAD->kstack), true, DTR_KSTACK1);
dtlb_kernel_mapping_insert((uintptr_t) THREAD->kstack +
PAGE_SIZE, KA2PA(THREAD->kstack) + FRAME_SIZE, true,
DTR_KSTACK2);
dtlb_kernel_mapping_insert((uintptr_t) THREAD->kstack, KA2PA(THREAD->kstack), true, DTR_KSTACK1);
dtlb_kernel_mapping_insert((uintptr_t) THREAD->kstack + PAGE_SIZE, KA2PA(THREAD->kstack) + FRAME_SIZE, true, DTR_KSTACK2);
}
/*
/branches/network/kernel/arch/ia64/src/fpu_context.c
149,10 → 149,8
"stf.spill [%7] = f127, 0x80\n;;"
 
:
: "r" (&((fctx->fr)[0])), "r" (&((fctx->fr)[1])),
"r" (&((fctx->fr)[2])), "r" (&((fctx->fr)[3])),
"r" (&((fctx->fr)[4])), "r" (&((fctx->fr)[5])),
"r" (&((fctx->fr)[6])), "r" (&((fctx->fr)[7]))
: "r" (&((fctx->fr)[0])), "r" (&((fctx->fr)[1])), "r" (&((fctx->fr)[2])), "r" (&((fctx->fr)[3])),
"r" (&((fctx->fr)[4])), "r" (&((fctx->fr)[5])), "r" (&((fctx->fr)[6])), "r" (&((fctx->fr)[7]))
);
}
269,16 → 267,14
"ldf.fill f127 = [%7], 0x80\n;;"
 
:
: "r" (&((fctx->fr)[0])), "r" (&((fctx->fr)[1])),
"r" (&((fctx->fr)[2])), "r" (&((fctx->fr)[3])),
"r" (&((fctx->fr)[4])), "r" (&((fctx->fr)[5])),
"r" (&((fctx->fr)[6])), "r" (&((fctx->fr)[7]))
: "r" (&((fctx->fr)[0])), "r" (&((fctx->fr)[1])), "r" (&((fctx->fr)[2])), "r" (&((fctx->fr)[3])),
"r" (&((fctx->fr)[4])), "r" (&((fctx->fr)[5])), "r" (&((fctx->fr)[6])), "r" (&((fctx->fr)[7]))
);
}
 
void fpu_enable(void)
{
uint64_t a = 0;
uint64_t a = 0 ;
 
asm volatile (
"rsm %0 ;;"
/branches/network/kernel/arch/ia64/src/putchar.c
0,0 → 1,44
/*
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia64
* @{
*/
/** @file
*/
 
#include <putchar.h>
#include <arch/ski/ski.h>
 
void putchar(const char ch)
{
ski_write(ch);
}
 
/** @}
*/
/branches/network/kernel/arch/ia64/include/mm/page.h
46,25 → 46,8
/** Bit width of the TLB-locked portion of kernel address space. */
#define KERNEL_PAGE_WIDTH 28 /* 256M */
#define IO_PAGE_WIDTH 26 /* 64M */
#define FW_PAGE_WIDTH 28 /* 256M */
 
#define USPACE_IO_PAGE_WIDTH 12 /* 4K */
 
 
/*
* Statically mapped IO spaces - offsets to 0xe...00 of virtual addresses
* because of "minimal virtual bits implemented is 51" it is possible to
* have values up to 0x0007000000000000
*/
 
/* Firmware area (bellow 4GB in phys mem) */
#define FW_OFFSET 0x00000000F0000000
/* Legacy IO space */
#define IO_OFFSET 0x0001000000000000
/* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000 */
#define VIO_OFFSET 0x0002000000000000
 
 
#define PPN_SHIFT 12
 
#define VRN_SHIFT 61
79,8 → 62,8
 
#define REGION_REGISTERS 8
 
#define KA2PA(x) ((uintptr_t) (x - (VRN_KERNEL << VRN_SHIFT)))
#define PA2KA(x) ((uintptr_t) (x + (VRN_KERNEL << VRN_SHIFT)))
#define KA2PA(x) ((uintptr_t) (x-(VRN_KERNEL<<VRN_SHIFT)))
#define PA2KA(x) ((uintptr_t) (x+(VRN_KERNEL<<VRN_SHIFT)))
 
#define VHPT_WIDTH 20 /* 1M */
#define VHPT_SIZE (1 << VHPT_WIDTH)
/branches/network/kernel/arch/ia64/include/mm/frame.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia64mm
/** @addtogroup ia64mm
* @{
*/
/** @file
35,16 → 35,12
#ifndef KERN_ia64_FRAME_H_
#define KERN_ia64_FRAME_H_
 
#define FRAME_WIDTH 14 /* 16K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
#define FRAME_WIDTH 14 /* 16K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
#ifdef KERNEL
#ifndef __ASM__
 
#include <arch/types.h>
 
extern uintptr_t last_frame;
 
extern void frame_arch_init(void);
#define physmem_print()
 
/branches/network/kernel/arch/ia64/include/mm/tlb.h
35,6 → 35,9
#ifndef KERN_ia64_TLB_H_
#define KERN_ia64_TLB_H_
 
#define tlb_arch_init()
#define tlb_print()
 
#include <arch/mm/page.h>
#include <arch/mm/asid.h>
#include <arch/interrupt.h>
43,8 → 46,8
/** Data and instruction Translation Register indices. */
#define DTR_KERNEL 0
#define ITR_KERNEL 0
#define DTR_KSTACK1 4
#define DTR_KSTACK2 5
#define DTR_KSTACK1 1
#define DTR_KSTACK2 2
 
/** Portion of TLB insertion format data structure. */
union tlb_entry {
/branches/network/kernel/arch/ia64/include/mm/vhpt.h
44,8 → 44,8
{
vhpt_entry_t ventry;
ventry.word[0] = tentry.word[0];
ventry.word[1] = tentry.word[1];
ventry.word[0]=tentry.word[0];
ventry.word[1]=tentry.word[1];
return ventry;
}
/branches/network/kernel/arch/ia64/include/types.h
65,11 → 65,6
typedef uint64_t unative_t;
typedef int64_t native_t;
 
typedef struct {
unative_t fnc;
unative_t gp;
} fncptr_t;
 
#define PRIp "lx" /**< Format for uintptr_t. */
#define PRIs "lu" /**< Format for size_t. */
#define PRIc "lu" /**< Format for count_t. */
/branches/network/kernel/arch/ia64/include/asm.h
36,72 → 36,29
#define KERN_ia64_ASM_H_
 
#include <config.h>
#include <typedefs.h>
#include <arch/types.h>
#include <arch/register.h>
 
 
#define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL
 
static inline void pio_write_8(ioport8_t *port, uint8_t v)
static inline void outb(uint64_t port,uint8_t v)
{
uintptr_t prt = (uintptr_t) port;
*((char *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
 
*((uint8_t *)(IA64_IOSPACE_ADDRESS +
((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
 
asm volatile ("mf\n" ::: "memory");
}
 
static inline void pio_write_16(ioport16_t *port, uint16_t v)
{
uintptr_t prt = (uintptr_t) port;
 
*((uint16_t *)(IA64_IOSPACE_ADDRESS +
((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
 
asm volatile ("mf\n" ::: "memory");
}
 
static inline void pio_write_32(ioport32_t *port, uint32_t v)
static inline uint8_t inb(uint64_t port)
{
uintptr_t prt = (uintptr_t) port;
 
*((uint32_t *)(IA64_IOSPACE_ADDRESS +
((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
 
asm volatile ("mf\n" ::: "memory");
}
 
static inline uint8_t pio_read_8(ioport8_t *port)
{
uintptr_t prt = (uintptr_t) port;
 
asm volatile ("mf\n" ::: "memory");
 
return *((uint8_t *)(IA64_IOSPACE_ADDRESS +
((prt & 0xfff) | ((prt >> 2) << 12))));
return *((char *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 ))));
}
 
static inline uint16_t pio_read_16(ioport16_t *port)
{
uintptr_t prt = (uintptr_t) port;
 
asm volatile ("mf\n" ::: "memory");
 
return *((uint16_t *)(IA64_IOSPACE_ADDRESS +
((prt & 0xfff) | ((prt >> 2) << 12))));
}
 
static inline uint32_t pio_read_32(ioport32_t *port)
{
uintptr_t prt = (uintptr_t) port;
 
asm volatile ("mf\n" ::: "memory");
 
return *((uint32_t *)(IA64_IOSPACE_ADDRESS +
((prt & 0xfff) | ((prt >> 2) << 12))));
}
 
/** Return base address of current stack
*
* Return the base address of the current stack.
112,14 → 69,9
{
uint64_t v;
 
//I'm not sure why but this code bad inlines in scheduler,
//so THE shifts about 16B and causes kernel panic
//asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
//return v;
asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
//this code have the same meaning but inlines well
asm volatile ("mov %0 = r12" : "=r" (v) );
return v & (~(STACK_SIZE-1));
return v;
}
 
/** Return Processor State Register.
171,16 → 123,6
return v;
}
 
static inline uint64_t cr64_read(void)
{
uint64_t v;
asm volatile ("mov %0 = cr64\n" : "=r" (v));
return v;
}
 
 
/** Write ITC (Interval Timer Counter) register.
*
* @param v New counter value.
355,8 → 297,7
extern void cpu_sleep(void);
extern void asm_delay_loop(uint32_t t);
 
extern void switch_to_userspace(uintptr_t, uintptr_t, uintptr_t, uintptr_t,
uint64_t, uint64_t);
extern void switch_to_userspace(uintptr_t entry, uintptr_t sp, uintptr_t bsp, uintptr_t uspace_uarg, uint64_t ipsr, uint64_t rsc);
 
#endif
 
/branches/network/kernel/arch/ia64/include/drivers/kbd.h
File deleted
/branches/network/kernel/arch/ia64/include/drivers/ega.h
0,0 → 1,50
/*
* Copyright (c) 2001-2004 Jakub Jermar
* 2007 Jakub Vana
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
* @{
*/
/** @file
*/
 
#ifndef KERN_ia64_EGA_H
#define KERN_ia64_EGA_H
 
#define VIDEORAM (0xe0020000000B8000LL)
 
#define ROW 80
#define ROWS 25
#define SCREEN (ROW * ROWS)
 
extern void ega_init(void);
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ia64/include/drivers/i8042.h
0,0 → 1,71
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
* @{
*/
/** @file
*/
 
/**
* This file implements ia32 specific access to i8042 registers.
*/
 
#ifndef KERN_ia64_I8042_H_
#define KERN_ia64_I8042_H_
 
#include <arch/asm.h>
#include <arch/types.h>
 
#define i8042_DATA 0x60
#define i8042_STATUS 0x64
 
static inline void i8042_data_write(uint8_t data)
{
outb(i8042_DATA, data);
}
 
static inline uint8_t i8042_data_read(void)
{
return inb(i8042_DATA);
}
 
static inline uint8_t i8042_status_read(void)
{
return inb(i8042_STATUS);
}
 
static inline void i8042_command_write(uint8_t command)
{
outb(i8042_STATUS, command);
}
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ia64/include/drivers/it.h
41,7 → 41,7
* from firmware.
*
*/
#define IT_DELTA it_delta
#define IT_DELTA 100000
 
extern void it_init(void);
 
/branches/network/kernel/arch/ia64/include/interrupt.h
50,13 → 50,10
#define IVT_FIRST 0
 
/** External Interrupt vectors. */
 
#define VECTOR_TLB_SHOOTDOWN_IPI 0xf0
#define INTERRUPT_TIMER 255
#define IRQ_KBD (0x01 + LEGACY_INTERRUPT_BASE)
#define IRQ_MOUSE (0x0c + LEGACY_INTERRUPT_BASE)
#define IRQ_KBD 241
#define IRQ_MOUSE 252
#define INTERRUPT_SPURIOUS 15
#define LEGACY_INTERRUPT_BASE 0x20
 
/** General Exception codes. */
#define GE_ILLEGALOP 0
117,7 → 114,7
/*
* The following variables are defined only for break_instruction
* handler.
* handler.
*/
uint64_t in0;
uint64_t in1;
153,8 → 150,6
extern void external_interrupt(uint64_t vector, istate_t *istate);
extern void disabled_fp_register(uint64_t vector, istate_t *istate);
 
extern void trap_virtual_enable_irqs(uint16_t irqmask);
 
#endif
 
/** @}
/branches/network/kernel/arch/ia64/include/bootinfo.h
29,23 → 29,13
#ifndef KERN_ia64_BOOTINFO_H_
#define KERN_ia64_BOOTINFO_H_
 
#define BOOTINFO_ADDRESS 0x4401000
 
 
#define CONFIG_INIT_TASKS 32
 
#define MEMMAP_ITEMS 128
 
#define EFI_MEMMAP_FREE_MEM 0
#define EFI_MEMMAP_IO 1
#define EFI_MEMMAP_IO_PORTS 2
 
/** Size of buffer for storing task name in binit_task_t. */
#define BOOTINFO_TASK_NAME_BUFLEN 32
 
typedef struct {
void *addr;
unsigned long size;
char name[BOOTINFO_TASK_NAME_BUFLEN];
} binit_task_t;
typedef struct {
53,24 → 43,9
binit_task_t tasks[CONFIG_INIT_TASKS];
} binit_t;
 
typedef struct {
unsigned int type;
unsigned long base;
unsigned long size;
}efi_memmap_item_t;
 
 
typedef struct {
binit_t taskmap;
 
efi_memmap_item_t memmap[MEMMAP_ITEMS];
unsigned int memmap_items;
 
unsigned long * sapic;
unsigned long sys_freq;
unsigned long freq_scale;
unsigned int wakeup_intno;
int hello_configured;
} bootinfo_t;
 
extern bootinfo_t *bootinfo;
/branches/network/kernel/arch/ia64/include/fpu_context.h
35,6 → 35,7
#ifndef KERN_ia64_FPU_CONTEXT_H_
#define KERN_ia64_FPU_CONTEXT_H_
 
#define ARCH_HAS_FPU 1
#define FPU_CONTEXT_ALIGN 16
 
#include <arch/types.h>
/branches/network/kernel/arch/ia64/include/cpu.h
38,7 → 38,6
#include <arch/types.h>
#include <arch/register.h>
#include <arch/asm.h>
#include <arch/bootinfo.h>
 
#define FAMILY_ITANIUM 0x7
#define FAMILY_ITANIUM2 0x1f
64,32 → 63,6
return v;
}
 
 
#define CR64_ID_SHIFT 24
#define CR64_ID_MASK 0xff000000
#define CR64_EID_SHIFT 16
#define CR64_EID_MASK 0xff0000
 
static inline int ia64_get_cpu_id(void)
{
uint64_t cr64=cr64_read();
return ((CR64_ID_MASK)&cr64)>>CR64_ID_SHIFT;
}
 
static inline int ia64_get_cpu_eid(void)
{
uint64_t cr64=cr64_read();
return ((CR64_EID_MASK)&cr64)>>CR64_EID_SHIFT;
}
 
 
static inline void ipi_send_ipi(int id, int eid, int intno)
{
(bootinfo->sapic)[2 * (id * 256 + eid)] = intno;
srlz_d();
 
}
 
#endif
 
/** @}
/branches/network/kernel/arch/ia64/include/atomic.h
37,65 → 37,29
 
/** Atomic addition.
*
* @param val Atomic value.
* @param imm Value to add.
* @param val Atomic value.
* @param imm Value to add.
*
* @return Value before addition.
* @return Value before addition.
*/
static inline long atomic_add(atomic_t *val, int imm)
{
long v;
 
asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v),
"+m" (val->count) : "i" (imm));
asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm));
return v;
}
 
static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); }
static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); }
 
static inline uint64_t test_and_set(atomic_t *val) {
uint64_t v;
asm volatile (
"movl %0 = 0x01;;\n"
"xchg8 %0 = %1, %0;;\n"
: "=r" (v), "+m" (val->count)
);
return v;
}
static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; }
static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; }
 
static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); }
static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); }
 
static inline void atomic_inc(atomic_t *val)
{
atomic_add(val, 1);
}
 
static inline void atomic_dec(atomic_t *val)
{
atomic_add(val, -1);
}
 
static inline long atomic_preinc(atomic_t *val)
{
return atomic_add(val, 1) + 1;
}
 
static inline long atomic_predec(atomic_t *val)
{
return atomic_add(val, -1) - 1;
}
 
static inline long atomic_postinc(atomic_t *val)
{
return atomic_add(val, 1);
}
 
static inline long atomic_postdec(atomic_t *val)
{
return atomic_add(val, -1);
}
 
#endif
 
/** @}
/branches/network/kernel/arch/ia64/include/ski/ski.h
35,17 → 35,22
#ifndef KERN_ia64_SKI_H_
#define KERN_ia64_SKI_H_
 
#include <console/chardev.h>
#include <arch/types.h>
#include <console/console.h>
 
#define SKI_INIT_CONSOLE 20
#define SKI_GETCHAR 21
#define SKI_PUTCHAR 31
 
extern indev_t *skiin_init(void);
extern void skiout_init(void);
extern chardev_t ski_uconsole;
 
extern void ski_init_console(void);
 
extern void ski_kbd_grab(void);
extern void ski_kbd_release(void);
 
extern void kkbdpoll(void *arg);
 
#endif
 
/** @}
/branches/network/kernel/arch/ia64/include/arch.h
39,8 → 39,6
 
#include <arch/ski/ski.h>
 
extern void arch_pre_main(void);
 
#endif
 
/** @}
/branches/network/kernel/arch/ia64/include/proc/task.h
31,19 → 31,14
*/
/** @file
*/
#include <proc/task.h>
 
#ifndef KERN_ia64_TASK_H_
#define KERN_ia64_TASK_H_
 
#include <adt/bitmap.h>
 
typedef struct {
bitmap_t *iomap;
} task_arch_t;
 
 
#define task_create_arch(t) { (t)->arch.iomap = NULL; }
#define task_create_arch(t)
#define task_destroy_arch(t)
 
#endif
/branches/network/kernel/arch/ia64/include/register.h
40,11 → 40,11
#define PSR_I_MASK 0x4000
#define PSR_PK_MASK 0x8000
 
#define PSR_DT_MASK (1 << 17)
#define PSR_RT_MASK (1 << 27)
#define PSR_DT_MASK (1<<17)
#define PSR_RT_MASK (1<<27)
 
#define PSR_DFL_MASK (1 << 18)
#define PSR_DFH_MASK (1 << 19)
#define PSR_DFL_MASK (1<<18)
#define PSR_DFH_MASK (1<<19)
 
#define PSR_IT_MASK 0x0000001000000000
 
/branches/network/kernel/arch/ia64/include/debug.h
1,5 → 1,5
/*
* Copyright (c) 2005 Ondrej Palkovsky
* Copyright (c) 2005
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
/branches/network/kernel/arch/arm32/Makefile.inc
29,6 → 29,10
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
BFD_NAME = elf32-littlearm
BFD_ARCH = arm
BFD = binary
35,28 → 39,62
TARGET = arm-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/arm
 
KERNEL_LOAD_ADDRESS = 0x80200000
 
# ifeq ($(MACHINE), gxemul_testarm)
DMACHINE = MACHINE_GXEMUL_TESTARM
# endif
 
ATSIGN = %
 
GCC_CFLAGS += -fno-zero-initialized-in-bss
 
DEFS += -D__32_BITS__
DEFS += -D__32_BITS__ -DKERNEL_LOAD_ADDRESS=$(KERNEL_LOAD_ADDRESS) -D$(DMACHINE)
 
# Compile with framebuffer support
 
ifeq ($(CONFIG_FB), y)
DEFS += -DCONFIG_FB -DFB_INVERT_ENDIAN
endif
 
## Compile with hierarchical page tables support.
#
 
CONFIG_PAGE_PT = y
DEFS += -DCONFIG_PAGE_PT
 
## Compile with support for address space identifiers.
#
# no HW support for ASIDs
#CONFIG_ASID = y
#CONFIG_ASID_FIFO = y
 
## Compile with support with software division and multiplication.
#
 
CONFIG_SOFTINT = y
 
ARCH_SOURCES = \
arch/$(KARCH)/src/start.S \
arch/$(KARCH)/src/asm.S \
arch/$(KARCH)/src/arm32.c \
arch/$(KARCH)/src/context.S \
arch/$(KARCH)/src/dummy.S \
arch/$(KARCH)/src/panic.S \
arch/$(KARCH)/src/cpu/cpu.c \
arch/$(KARCH)/src/ddi/ddi.c \
arch/$(KARCH)/src/interrupt.c \
arch/$(KARCH)/src/console.c \
arch/$(KARCH)/src/exception.c \
arch/$(KARCH)/src/userspace.c \
arch/$(KARCH)/src/mm/as.c \
arch/$(KARCH)/src/mm/frame.c \
arch/$(KARCH)/src/mm/page.c \
arch/$(KARCH)/src/mm/tlb.c \
arch/$(KARCH)/src/mm/page_fault.c \
arch/$(KARCH)/src/drivers/gxemul.c
arch/$(ARCH)/src/start.S \
arch/$(ARCH)/src/asm.S \
arch/$(ARCH)/src/arm32.c \
arch/$(ARCH)/src/context.S \
arch/$(ARCH)/src/dummy.S \
arch/$(ARCH)/src/panic.S \
arch/$(ARCH)/src/cpu/cpu.c \
arch/$(ARCH)/src/ddi/ddi.c \
arch/$(ARCH)/src/interrupt.c \
arch/$(ARCH)/src/debug/print.c \
arch/$(ARCH)/src/console.c \
arch/$(ARCH)/src/exception.c \
arch/$(ARCH)/src/userspace.c \
arch/$(ARCH)/src/mm/as.c \
arch/$(ARCH)/src/mm/frame.c \
arch/$(ARCH)/src/mm/page.c \
arch/$(ARCH)/src/mm/tlb.c \
arch/$(ARCH)/src/mm/page_fault.c
 
# ifeq ($(MACHINE), gxemul_testarm)
ARCH_SOURCES += arch/$(ARCH)/src/drivers/gxemul.c
# endif
 
/branches/network/kernel/arch/arm32/src/userspace.c
90,11 → 90,12
 
/* set user mode, set registers, jump */
asm volatile (
"mov sp, %[ustate]\n"
"msr spsr_c, %[user_mode]\n"
"ldmfd sp!, {r0-r12, sp, lr}^\n"
"mov sp, %0 \n"
"msr spsr_c, %1 \n"
"ldmfd sp!, {r0-r12, sp, lr}^ \n"
"ldmfd sp!, {pc}^\n"
:: [ustate] "r" (&ustate), [user_mode] "r" (user_mode)
:
: "r" (&ustate), "r" (user_mode)
);
 
/* unreachable */
/branches/network/kernel/arch/arm32/src/exception.c
34,12 → 34,13
*/
 
#include <arch/exception.h>
#include <arch/debug/print.h>
#include <arch/memstr.h>
#include <arch/regutils.h>
#include <interrupt.h>
#include <arch/machine.h>
#include <arch/mm/page_fault.h>
#include <arch/barrier.h>
#include <arch/drivers/gxemul.h>
#include <print.h>
#include <syscall/syscall.h>
 
62,60 → 63,57
*
* Temporary exception stack is used to save a few registers
* before stack switch takes place.
*
*/
inline static void setup_stack_and_save_regs()
{
asm volatile (
"ldr r13, =exc_stack\n"
"stmfd r13!, {r0}\n"
"mrs r0, spsr\n"
"and r0, r0, #0x1f\n"
"cmp r0, #0x10\n"
"bne 1f\n"
asm volatile(
"ldr r13, =exc_stack \n"
"stmfd r13!, {r0} \n"
"mrs r0, spsr \n"
"and r0, r0, #0x1f \n"
"cmp r0, #0x10 \n"
"bne 1f \n"
 
/* prev mode was usermode */
"ldmfd r13!, {r0}\n"
"ldr r13, =supervisor_sp\n"
"ldr r13, [r13]\n"
"stmfd r13!, {lr}\n"
"stmfd r13!, {r0-r12}\n"
"stmfd r13!, {r13, lr}^\n"
"mrs r0, spsr\n"
"stmfd r13!, {r0}\n"
"b 2f\n"
"ldmfd r13!, {r0} \n"
"ldr r13, =supervisor_sp \n"
"ldr r13, [r13] \n"
"stmfd r13!, {lr} \n"
"stmfd r13!, {r0-r12} \n"
"stmfd r13!, {r13, lr}^ \n"
"mrs r0, spsr \n"
"stmfd r13!, {r0} \n"
"b 2f \n"
 
/* mode was not usermode */
"1:\n"
"stmfd r13!, {r1, r2, r3}\n"
"mrs r1, cpsr\n"
"mov r2, lr\n"
"bic r1, r1, #0x1f\n"
"orr r1, r1, r0\n"
"mrs r0, cpsr\n"
"msr cpsr_c, r1\n"
"mov r3, r13\n"
"stmfd r13!, {r2}\n"
"mov r2, lr\n"
"stmfd r13!, {r4-r12}\n"
"mov r1, r13\n"
/* the following two lines are for debugging */
"mov sp, #0\n"
"mov lr, #0\n"
"msr cpsr_c, r0\n"
"ldmfd r13!, {r4, r5, r6, r7}\n"
"stmfd r1!, {r4, r5, r6}\n"
"stmfd r1!, {r7}\n"
"stmfd r1!, {r2}\n"
"stmfd r1!, {r3}\n"
"mrs r0, spsr\n"
"stmfd r1!, {r0}\n"
"mov r13, r1\n"
"2:\n"
"1:\n"
"stmfd r13!, {r1, r2, r3} \n"
"mrs r1, cpsr \n"
"mov r2, lr \n"
"bic r1, r1, #0x1f \n"
"orr r1, r1, r0 \n"
"mrs r0, cpsr \n"
"msr cpsr_c, r1 \n"
 
"mov r3, r13 \n"
"stmfd r13!, {r2} \n"
"mov r2, lr \n"
"stmfd r13!, {r4-r12} \n"
"mov r1, r13 \n"
/* the following two lines are for debugging */
"mov sp, #0 \n"
"mov lr, #0 \n"
"msr cpsr_c, r0 \n"
 
"ldmfd r13!, {r4, r5, r6, r7} \n"
"stmfd r1!, {r4, r5, r6} \n"
"stmfd r1!, {r7} \n"
"stmfd r1!, {r2} \n"
"stmfd r1!, {r3} \n"
"mrs r0, spsr \n"
"stmfd r1!, {r0} \n"
"mov r13, r1 \n"
"2:\n"
);
}
 
191,13 → 189,10
}
 
/** Calls exception dispatch routine. */
#define CALL_EXC_DISPATCH(exception) \
asm volatile ( \
"mov r0, %[exc]\n" \
"mov r1, r13\n" \
"bl exc_dispatch\n" \
:: [exc] "i" (exception) \
);\
#define CALL_EXC_DISPATCH(exception) \
asm("mov r0, %0" : : "i" (exception)); \
asm("mov r1, r13"); \
asm("bl exc_dispatch");
 
/** General exception handler.
*
206,9 → 201,9
*
* @param exception Exception number.
*/
#define PROCESS_EXCEPTION(exception) \
setup_stack_and_save_regs(); \
CALL_EXC_DISPATCH(exception) \
#define PROCESS_EXCEPTION(exception) \
setup_stack_and_save_regs(); \
CALL_EXC_DISPATCH(exception) \
load_regs();
 
/** Updates specified exception vector to jump to given handler.
259,10 → 254,7
/** Low-level Prefetch Abort Exception handler. */
static void prefetch_abort_exception_entry(void)
{
asm volatile (
"sub lr, lr, #4"
);
asm("sub lr, lr, #4");
PROCESS_EXCEPTION(EXC_PREFETCH_ABORT);
}
 
269,10 → 261,7
/** Low-level Data Abort Exception handler. */
static void data_abort_exception_entry(void)
{
asm volatile (
"sub lr, lr, #8"
);
asm("sub lr, lr, #8");
PROCESS_EXCEPTION(EXC_DATA_ABORT);
}
 
284,10 → 273,7
*/
static void irq_exception_entry(void)
{
asm volatile (
"sub lr, lr, #4"
);
asm("sub lr, lr, #4");
setup_stack_and_save_regs();
switch_to_irq_servicing_mode();
307,12 → 293,6
istate->r3, istate->r4, istate->r5, istate->r6);
}
 
/** Returns the mask of active interrupts. */
static inline uint32_t gxemul_irqc_get_sources(void)
{
return *((uint32_t *) gxemul_irqc);
}
 
/** Interrupt Exception handler.
*
* Determines the sources of interrupt and calls their handlers.
319,23 → 299,7
*/
static void irq_exception(int exc_no, istate_t *istate)
{
uint32_t sources = gxemul_irqc_get_sources();
unsigned int i;
for (i = 0; i < GXEMUL_IRQC_MAX_IRQ; i++) {
if (sources & (1 << i)) {
irq_t *irq = irq_dispatch_and_lock(i);
if (irq) {
/* The IRQ handler was found. */
irq->handler(irq);
spinlock_unlock(&irq->lock);
} else {
/* Spurious interrupt.*/
printf("cpu%d: spurious interrupt (inum=%d)\n",
CPU->id, i);
}
}
}
machine_irq_exception(exc_no, istate);
}
 
/** Fills exception vectors with appropriate exception handlers. */
359,7 → 323,7
install_handler((unsigned) irq_exception_entry,
(unsigned *) EXC_IRQ_VEC);
install_handler((unsigned) fiq_exception_entry,
install_handler((unsigned)fiq_exception_entry,
(unsigned *) EXC_FIQ_VEC);
}
 
369,23 → 333,17
{
uint32_t control_reg;
asm volatile (
"mrc p15, 0, %[control_reg], c1, c1"
: [control_reg] "=r" (control_reg)
);
asm volatile("mrc p15, 0, %0, c1, c1" : "=r" (control_reg));
/* switch on the high vectors bit */
control_reg |= CP15_R1_HIGH_VECTORS_BIT;
asm volatile (
"mcr p15, 0, %[control_reg], c1, c1"
:: [control_reg] "r" (control_reg)
);
asm volatile("mcr p15, 0, %0, c1, c1" : : "r" (control_reg));
}
#endif
 
/** Initializes exception handling.
*
*
* Installs low-level exception handlers and then registers
* exceptions and their handlers to kernel exception dispatcher.
*/
409,18 → 367,18
*/
void print_istate(istate_t *istate)
{
printf("istate dump:\n");
printf(" r0: %x r1: %x r2: %x r3: %x\n",
dprintf("istate dump:\n");
 
dprintf(" r0: %x r1: %x r2: %x r3: %x\n",
istate->r0, istate->r1, istate->r2, istate->r3);
printf(" r4: %x r5: %x r6: %x r7: %x\n",
dprintf(" r4: %x r5: %x r6: %x r7: %x\n",
istate->r4, istate->r5, istate->r6, istate->r7);
printf(" r8: %x r8: %x r10: %x r11: %x\n",
dprintf(" r8: %x r8: %x r10: %x r11: %x\n",
istate->r8, istate->r9, istate->r10, istate->r11);
printf(" r12: %x sp: %x lr: %x spsr: %x\n",
dprintf(" r12: %x sp: %x lr: %x spsr: %x\n",
istate->r12, istate->sp, istate->lr, istate->spsr);
printf(" pc: %x\n", istate->pc);
 
dprintf(" pc: %x\n", istate->pc);
}
 
/** @}
/branches/network/kernel/arch/arm32/src/mm/page_fault.c
34,6 → 34,7
*/
#include <panic.h>
#include <arch/exception.h>
#include <arch/debug/print.h>
#include <arch/mm/page_fault.h>
#include <mm/as.h>
#include <genarch/mm/page_pt.h>
48,13 → 49,12
static inline fault_status_t read_fault_status_register(void)
{
fault_status_union_t fsu;
 
/* fault status is stored in CP15 register 5 */
asm volatile (
"mrc p15, 0, %[dummy], c5, c0, 0"
: [dummy] "=r" (fsu.dummy)
"mrc p15, 0, %0, c5, c0, 0"
: "=r"(fsu.dummy)
);
return fsu.fs;
}
 
61,18 → 61,17
/** Returns FAR (fault address register) content.
*
* @return FAR (fault address register) content (address that caused a page
* fault)
* fault)
*/
static inline uintptr_t read_fault_address_register(void)
{
uintptr_t ret;
 
/* fault adress is stored in CP15 register 6 */
asm volatile (
"mrc p15, 0, %[ret], c6, c0, 0"
: [ret] "=r" (ret)
"mrc p15, 0, %0, c6, c0, 0"
: "=r"(ret)
);
return ret;
}
 
81,26 → 80,29
* @param instr Instruction
*
* @return true when instruction is load/store, false otherwise
*
*/
static inline bool is_load_store_instruction(instruction_t instr)
{
/* load store immediate offset */
if (instr.type == 0x2)
if (instr.type == 0x2) {
return true;
}
 
/* load store register offset */
if ((instr.type == 0x3) && (instr.bit4 == 0))
if (instr.type == 0x3 && instr.bit4 == 0) {
return true;
}
 
/* load store multiple */
if (instr.type == 0x4)
if (instr.type == 0x4) {
return true;
}
 
/* oprocessor load/store */
if (instr.type == 0x6)
if (instr.type == 0x6) {
return true;
}
 
return false;
}
 
113,11 → 115,12
static inline bool is_swap_instruction(instruction_t instr)
{
/* swap, swapb instruction */
if ((instr.type == 0x0) &&
((instr.opcode == 0x8) || (instr.opcode == 0xa)) &&
(instr.access == 0x0) && (instr.bits567 == 0x4) && (instr.bit4 == 1))
if (instr.type == 0x0 &&
(instr.opcode == 0x8 || instr.opcode == 0xa) &&
instr.access == 0x0 && instr.bits567 == 0x4 && instr.bit4 == 1) {
return true;
}
 
return false;
}
 
139,8 → 142,8
 
/* undefined instructions */
if (instr.condition == 0xf) {
panic("page_fault - instruction does not access memory "
"(instr_code: %x, badvaddr:%x).", instr, badvaddr);
panic("page_fault - instruction doesn't access memory "
"(instr_code: %x, badvaddr:%x)", instr, badvaddr);
return PF_ACCESS_EXEC;
}
 
159,7 → 162,7
}
 
panic("page_fault - instruction doesn't access memory "
"(instr_code: %x, badvaddr:%x).", instr, badvaddr);
"(instr_code: %x, badvaddr:%x)", instr, badvaddr);
 
return PF_ACCESS_EXEC;
}
181,12 → 184,12
 
if (ret == AS_PF_FAULT) {
print_istate(istate);
printf("page fault - pc: %x, va: %x, status: %x(%x), "
dprintf("page fault - pc: %x, va: %x, status: %x(%x), "
"access:%d\n", istate->pc, badvaddr, fsr.status, fsr,
access);
fault_if_from_uspace(istate, "Page fault: %#x.", badvaddr);
panic("Page fault.");
 
fault_if_from_uspace(istate, "Page fault: %#x", badvaddr);
panic("page fault\n");
}
}
 
200,9 → 203,9
int ret = as_page_fault(istate->pc, PF_ACCESS_EXEC, istate);
 
if (ret == AS_PF_FAULT) {
printf("prefetch_abort\n");
dprintf("prefetch_abort\n");
print_istate(istate);
panic("page fault - prefetch_abort at address: %x.",
panic("page fault - prefetch_abort at address: %x\n",
istate->pc);
}
}
/branches/network/kernel/arch/arm32/src/mm/frame.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32mm
/** @addtogroup arm32mm
* @{
*/
/** @file
35,8 → 35,9
 
#include <mm/frame.h>
#include <arch/mm/frame.h>
#include <arch/drivers/gxemul.h>
#include <arch/machine.h>
#include <config.h>
#include <arch/debug/print.h>
 
/** Address of the last frame in the memory. */
uintptr_t last_frame = 0;
44,12 → 45,11
/** Creates memory zones. */
void frame_arch_init(void)
{
last_frame = *((uintptr_t *) (GXEMUL_MP_ADDRESS + GXEMUL_MP_MEMSIZE_OFFSET));
/* All memory as one zone */
zone_create(0, ADDR2PFN(last_frame),
/* all memory as one zone */
zone_create(0, ADDR2PFN(machine_get_memory_size()),
BOOT_PAGE_TABLE_START_FRAME + BOOT_PAGE_TABLE_SIZE_IN_FRAMES, 0);
last_frame = machine_get_memory_size();
 
/* blacklist boot page table */
frame_mark_unavailable(BOOT_PAGE_TABLE_START_FRAME,
BOOT_PAGE_TABLE_SIZE_IN_FRAMES);
58,9 → 58,10
/** Frees the boot page table. */
void boot_page_table_free(void)
{
unsigned int i;
for (i = 0; i < BOOT_PAGE_TABLE_SIZE_IN_FRAMES; i++)
int i;
for (i = 0; i < BOOT_PAGE_TABLE_SIZE_IN_FRAMES; i++) {
frame_free(i * FRAME_SIZE + BOOT_PAGE_TABLE_ADDRESS);
}
}
 
/** @}
/branches/network/kernel/arch/arm32/src/mm/tlb.c
48,7 → 48,7
asm volatile (
"eor r1, r1\n"
"mcr p15, 0, r1, c8, c7, 0\n"
::: "r1"
: : : "r1"
);
}
 
68,8 → 68,9
static inline void invalidate_page(uintptr_t page)
{
asm volatile (
"mcr p15, 0, %[page], c8, c7, 1\n"
:: [page] "r" (page)
"mcr p15, 0, %0, c8, c7, 1"
:
: "r" (page)
);
}
 
80,7 → 81,7
* @param page Address of the first page whose entry is to be invalidated.
* @param cnt Number of entries to invalidate.
*/
void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, count_t cnt)
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
{
unsigned int i;
 
88,13 → 89,5
invalidate_page(page + i * PAGE_SIZE);
}
 
void tlb_arch_init(void)
{
}
 
void tlb_print(void)
{
}
 
/** @}
*/
/branches/network/kernel/arch/arm32/src/mm/page.c
51,15 → 51,19
*/
void page_arch_init(void)
{
int flags = PAGE_CACHEABLE;
uintptr_t cur;
int flags;
 
page_mapping_operations = &pt_mapping_operations;
uintptr_t cur;
/* Kernel identity mapping */
for (cur = 0; cur < last_frame; cur += FRAME_SIZE)
 
flags = PAGE_CACHEABLE;
 
/* PA2KA(identity) mapping for all frames until last_frame */
for (cur = 0; cur < last_frame; cur += FRAME_SIZE) {
page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
}
/* Create mapping for exception table at high offset */
/* create mapping for exception table at high offset */
#ifdef HIGH_EXCEPTION_VECTORS
void *virtaddr = frame_alloc(ONE_FRAME, FRAME_KA);
page_mapping_insert(AS_KERNEL, EXC_BASE_ADDRESS, KA2PA(virtaddr), flags);
66,9 → 70,9
#else
#error "Only high exception vector supported now"
#endif
 
as_switch(NULL, AS_KERNEL);
 
boot_page_table_free();
}
 
86,10 → 90,10
{
if (last_frame + ALIGN_UP(size, PAGE_SIZE) >
KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH)) {
panic("Unable to map physical memory %p (%d bytes).",
panic("Unable to map physical memory %p (%d bytes)",
physaddr, size)
}
 
uintptr_t virtaddr = PA2KA(last_frame);
pfn_t i;
for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) {
97,7 → 101,7
physaddr + PFN2ADDR(i),
PAGE_NOT_CACHEABLE | PAGE_READ | PAGE_WRITE | PAGE_KERNEL);
}
 
last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
return virtaddr;
}
/branches/network/kernel/arch/arm32/src/arm32.c
34,37 → 34,36
*/
 
#include <arch.h>
#include <arch/boot.h>
#include <config.h>
#include <arch/console.h>
#include <ddi/device.h>
#include <genarch/fb/fb.h>
#include <genarch/fb/visuals.h>
#include <genarch/drivers/dsrln/dsrlnin.h>
#include <genarch/drivers/dsrln/dsrlnout.h>
#include <genarch/srln/srln.h>
#include <sysinfo/sysinfo.h>
#include <ddi/irq.h>
#include <arch/drivers/gxemul.h>
#include <arch/debug/print.h>
#include <print.h>
#include <config.h>
#include <interrupt.h>
#include <arch/regutils.h>
#include <arch/machine.h>
#include <userspace.h>
#include <macros.h>
#include <string.h>
 
/** Performs arm32-specific initialization before main_bsp() is called. */
void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
/** Information about loaded tasks. */
bootinfo_t bootinfo;
 
/** Performs arm32 specific initialization before main_bsp() is called. */
void arch_pre_main(void)
{
unsigned int i;
 
init.cnt = bootinfo.cnt;
 
for (i = 0; i < bootinfo.cnt; ++i) {
init.tasks[i].addr = bootinfo.tasks[i].addr;
init.tasks[i].size = bootinfo.tasks[i].size;
}
init.cnt = bootinfo->cnt;
for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); ++i) {
init.tasks[i].addr = bootinfo->tasks[i].addr;
init.tasks[i].size = bootinfo->tasks[i].size;
strncpy(init.tasks[i].name, bootinfo->tasks[i].name,
CONFIG_TASK_NAME_BUFLEN);
}
}
 
/** Performs arm32 specific initialization before mm is initialized. */
77,27 → 76,18
/** Performs arm32 specific initialization afterr mm is initialized. */
void arch_post_mm_init(void)
{
gxemul_init();
machine_hw_map_init();
 
/* Initialize exception dispatch table */
exception_init();
 
interrupt_init();
console_init(device_assign_devno());
 
#ifdef CONFIG_FB
fb_properties_t prop = {
.addr = GXEMUL_FB_ADDRESS,
.offset = 0,
.x = 640,
.y = 480,
.scan = 1920,
.visual = VISUAL_BGR_8_8_8,
};
fb_init(&prop);
#else
#ifdef CONFIG_ARM_PRN
dsrlnout_init((ioport8_t *) gxemul_kbd);
#endif /* CONFIG_ARM_PRN */
#endif /* CONFIG_FB */
fb_init(machine_get_fb_address(), 640, 480, 1920, VISUAL_RGB_8_8_8);
#endif
}
 
/** Performs arm32 specific tasks needed after cpu is initialized.
126,23 → 116,6
*/
void arch_post_smp_init(void)
{
#ifdef CONFIG_ARM_KBD
/*
* Initialize the msim/GXemul keyboard port. Then initialize the serial line
* module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts.
*/
indev_t *kbrdin = dsrlnin_init((dsrlnin_t *) gxemul_kbd, GXEMUL_KBD_IRQ);
if (kbrdin)
srln_init(kbrdin);
/*
* This is the necessary evil until the userspace driver is entirely
* self-sufficient.
*/
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);
sysinfo_set_item_val("kbd.address.virtual", NULL, (unative_t) gxemul_kbd);
#endif
}
 
 
176,8 → 149,7
/** Halts CPU. */
void cpu_halt(void)
{
*((char *) (gxemul_kbd + GXEMUL_HALT_OFFSET))
= 0;
machine_cpu_halt();
}
 
/** Reboot. */
184,22 → 156,9
void arch_reboot()
{
/* not implemented */
while (1);
for (;;)
;
}
 
/** Construct function pointer
*
* @param fptr function pointer structure
* @param addr function address
* @param caller calling function address
*
* @return address of the function pointer
*
*/
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
return addr;
}
 
/** @}
*/
/branches/network/kernel/arch/arm32/src/debug/print.c
0,0 → 1,97
/*
* Copyright (c) 2007 Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32
* @{
*/
/** @file
* @brief Debug print functions.
*/
 
#include <printf/printf_core.h>
#include <arch/debug/print.h>
#include <arch/machine.h>
 
/** Prints a character to the console.
*
* @param ch Character to be printed.
*/
static void putc(char ch)
{
machine_debug_putc(ch);
}
 
/** Prints a string to the console.
*
* @param str String to be printed.
* @param count Number of characters to be printed.
* @param unused Unused parameter.
*
* @return Number of printed characters.
*/
static int debug_write(const char *str, size_t count, void *unused)
{
unsigned int i;
for (i = 0; i < count; ++i)
putc(str[i]);
return i;
}
 
/** Prints a formated string.
*
* @param fmt "Printf-like" format.
*/
void debug_printf(const char *fmt, ...)
{
va_list args;
va_start (args, fmt);
 
struct printf_spec ps = {
(int (*)(void *, size_t, void *)) debug_write,
NULL
};
printf_core(fmt, &ps, args);
 
va_end(args);
}
 
/** Prints a string.
*
* @param str String to print.
*/
void debug_puts(const char *str)
{
while (*str) {
putc(*str);
str++;
}
}
 
/** @}
*/
/branches/network/kernel/arch/arm32/src/cpu/cpu.c
36,7 → 36,7
#include <arch/cpu.h>
#include <cpu.h>
#include <arch.h>
#include <print.h>
#include <print.h>
 
/** Number of indexes left out in the #imp_data array */
#define IMP_DATA_START_OFFSET 0x40
82,10 → 82,10
{
uint32_t ident;
asm volatile (
"mrc p15, 0, %[ident], c0, c0, 0\n"
: [ident] "=r" (ident)
"mrc p15, 0, %0, c0, c0, 0\n"
: "=r" (ident)
);
 
cpu->imp_num = ident >> 24;
cpu->variant_num = (ident << 8) >> 28;
cpu->arch_num = (ident << 12) >> 28;
/branches/network/kernel/arch/arm32/src/console.c
26,28 → 26,32
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32
/** @addtogroup arm32
* @{
*/
/** @file
/** @file
* @brief Console.
*/
 
#include <console/console.h>
#include <arch/console.h>
#include <genarch/fb/fb.h>
#include <arch/machine.h>
 
void console_init(devno_t devno)
{
machine_console_init(devno);
}
 
/** Acquire console back for kernel. */
void arch_grab_console(void)
{
#ifdef CONFIG_FB
fb_redraw();
#endif
machine_grab_console();
}
 
/** Return console to userspace. */
void arch_release_console(void)
{
machine_release_console();
}
 
/** @}
/branches/network/kernel/arch/arm32/src/panic.S
31,5 → 31,5
.global panic_printf
 
panic_printf:
bl printf
bl debug_printf
bl cpu_halt
/branches/network/kernel/arch/arm32/src/interrupt.c
35,16 → 35,13
 
#include <arch/asm.h>
#include <arch/regutils.h>
#include <arch/drivers/gxemul.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <arch/machine.h>
#include <interrupt.h>
 
/** Initial size of a table holding interrupt handlers. */
#define IRQ_COUNT 8
 
static irq_t gxemul_timer_irq;
 
/** Disable interrupts.
*
* @return Old interrupt priority level.
52,7 → 49,7
ipl_t interrupts_disable(void)
{
ipl_t ipl = current_status_reg_read();
 
current_status_reg_control_write(STATUS_REG_IRQ_DISABLED_BIT | ipl);
return ipl;
65,9 → 62,9
ipl_t interrupts_enable(void)
{
ipl_t ipl = current_status_reg_read();
 
current_status_reg_control_write(ipl & ~STATUS_REG_IRQ_DISABLED_BIT);
 
return ipl;
}
 
91,41 → 88,6
return current_status_reg_read();
}
 
/** Starts gxemul Real Time Clock device, which asserts regular interrupts.
*
* @param frequency Interrupts frequency (0 disables RTC).
*/
static void gxemul_timer_start(uint32_t frequency)
{
*((uint32_t *) (gxemul_rtc + GXEMUL_RTC_FREQ_OFFSET))
= frequency;
}
 
static irq_ownership_t gxemul_timer_claim(irq_t *irq)
{
return IRQ_ACCEPT;
}
 
/** Timer interrupt handler.
*
* @param irq Interrupt information.
* @param arg Not used.
*/
static void gxemul_timer_irq_handler(irq_t *irq)
{
/*
* We are holding a lock which prevents preemption.
* Release the lock, call clock() and reacquire the lock again.
*/
spinlock_unlock(&irq->lock);
clock();
spinlock_lock(&irq->lock);
/* acknowledge tick */
*((uint32_t *) (gxemul_rtc + GXEMUL_RTC_ACK_OFFSET))
= 0;
}
 
/** Initialize basic tables for exception dispatching
* and starts the timer.
*/
132,16 → 94,7
void interrupt_init(void)
{
irq_init(IRQ_COUNT, IRQ_COUNT);
irq_initialize(&gxemul_timer_irq);
gxemul_timer_irq.devno = device_assign_devno();
gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;
gxemul_timer_irq.claim = gxemul_timer_claim;
gxemul_timer_irq.handler = gxemul_timer_irq_handler;
irq_register(&gxemul_timer_irq);
gxemul_timer_start(GXEMUL_TIMER_FREQ);
machine_timer_irq_start();
}
 
/** @}
/branches/network/kernel/arch/arm32/src/start.S
40,12 → 40,30
mrs r3, cpsr
bic r3, r3, #0x1f
orr r3, r3, #0x13
msr cpsr_c, r3
msr cpsr_c, r3
ldr sp, =temp_stack
 
cmp r2, #0
beq bootinfo_end
 
ldr r3, =bootinfo
 
bootinfo_loop:
ldr r4, [r1]
str r4, [r3]
 
add r1, r1, #4
add r3, r3, #4
add r2, r2, #-4
 
cmp r2, #0
bne bootinfo_loop
bootinfo_end:
 
bl arch_pre_main
 
bl main_bsp
 
.space TEMP_STACK_SIZE
56,3 → 74,4
 
supervisor_sp:
.space 4
 
/branches/network/kernel/arch/arm32/src/drivers/gxemul.c
33,19 → 33,361
* @brief GXemul drivers.
*/
 
#include <interrupt.h>
#include <ipc/irq.h>
#include <console/chardev.h>
#include <arch/drivers/gxemul.h>
#include <console/console.h>
#include <sysinfo/sysinfo.h>
#include <print.h>
#include <ddi/device.h>
#include <mm/page.h>
#include <arch/machine.h>
#include <arch/debug/print.h>
 
void *gxemul_kbd;
void *gxemul_rtc;
void *gxemul_irqc;
/* Addresses of devices. */
#define GXEMUL_VIDEORAM 0x10000000
#define GXEMUL_KBD 0x10000000
#define GXEMUL_HALT_OFFSET 0x10
#define GXEMUL_RTC 0x15000000
#define GXEMUL_RTC_FREQ_OFFSET 0x100
#define GXEMUL_RTC_ACK_OFFSET 0x110
#define GXEMUL_IRQC 0x16000000
#define GXEMUL_IRQC_MASK_OFFSET 0x4
#define GXEMUL_IRQC_UNMASK_OFFSET 0x8
#define GXEMUL_MP 0x11000000
#define GXEMUL_MP_MEMSIZE_OFFSET 0x0090
#define GXEMUL_FB 0x12000000
 
void gxemul_init(void)
/* IRQs */
#define GXEMUL_KBD_IRQ 2
#define GXEMUL_TIMER_IRQ 4
 
static gxemul_hw_map_t gxemul_hw_map;
static chardev_t console;
static irq_t gxemul_console_irq;
static irq_t gxemul_timer_irq;
 
static bool hw_map_init_called = false;
 
static void gxemul_kbd_enable(chardev_t *dev);
static void gxemul_kbd_disable(chardev_t *dev);
static void gxemul_write(chardev_t *dev, const char ch);
static char gxemul_do_read(chardev_t *dev);
 
static chardev_operations_t gxemul_ops = {
.resume = gxemul_kbd_enable,
.suspend = gxemul_kbd_disable,
.write = gxemul_write,
.read = gxemul_do_read,
};
 
 
/** Returns the mask of active interrupts. */
static inline uint32_t gxemul_irqc_get_sources(void)
{
gxemul_kbd = (void *) hw_map(GXEMUL_KBD_ADDRESS, PAGE_SIZE);
gxemul_rtc = (void *) hw_map(GXEMUL_RTC_ADDRESS, PAGE_SIZE);
gxemul_irqc = (void *) hw_map(GXEMUL_IRQC_ADDRESS, PAGE_SIZE);
return *((uint32_t *) gxemul_hw_map.irqc);
}
 
 
/** Masks interrupt.
*
* @param irq interrupt number
*/
static inline void gxemul_irqc_mask(uint32_t irq)
{
*((uint32_t *) gxemul_hw_map.irqc_mask) = irq;
}
 
 
/** Unmasks interrupt.
*
* @param irq interrupt number
*/
static inline void gxemul_irqc_unmask(uint32_t irq)
{
*((uint32_t *) gxemul_hw_map.irqc_unmask) = irq;
}
 
 
/** Initializes #gxemul_hw_map. */
void gxemul_hw_map_init(void)
{
gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE);
gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE);
gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE);
gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE);
 
gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET;
gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET;
gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET;
gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc +
GXEMUL_IRQC_UNMASK_OFFSET;
 
hw_map_init_called = true;
}
 
 
/** Putchar that works with gxemul.
*
* @param dev Not used.
* @param ch Characted to be printed.
*/
static void gxemul_write(chardev_t *dev, const char ch)
{
*((char *) gxemul_hw_map.videoram) = ch;
}
 
/** Enables gxemul keyboard (interrupt unmasked).
*
* @param dev Not used.
*
* Called from getc().
*/
static void gxemul_kbd_enable(chardev_t *dev)
{
gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
}
 
/** Disables gxemul keyboard (interrupt masked).
*
* @param dev not used
*
* Called from getc().
*/
static void gxemul_kbd_disable(chardev_t *dev)
{
gxemul_irqc_mask(GXEMUL_KBD_IRQ);
}
 
/** Read character using polling, assume interrupts disabled.
*
* @param dev Not used.
*/
static char gxemul_do_read(chardev_t *dev)
{
char ch;
 
while (1) {
ch = *((volatile char *) gxemul_hw_map.kbd);
if (ch) {
if (ch == '\r')
return '\n';
if (ch == 0x7f)
return '\b';
return ch;
}
}
}
 
/** Process keyboard interrupt.
*
* @param irq IRQ information.
* @param arg Not used.
*/
static void gxemul_irq_handler(irq_t *irq, void *arg, ...)
{
if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox)) {
ipc_irq_send_notif(irq);
} else {
char ch = 0;
ch = *((char *) gxemul_hw_map.kbd);
if (ch == '\r') {
ch = '\n';
}
if (ch == 0x7f) {
ch = '\b';
}
chardev_push_character(&console, ch);
}
}
 
static irq_ownership_t gxemul_claim(void)
{
return IRQ_ACCEPT;
}
 
 
/** Acquire console back for kernel. */
void gxemul_grab_console(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&gxemul_console_irq.lock);
gxemul_console_irq.notif_cfg.notify = false;
spinlock_unlock(&gxemul_console_irq.lock);
interrupts_restore(ipl);
}
 
/** Return console to userspace. */
void gxemul_release_console(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&gxemul_console_irq.lock);
if (gxemul_console_irq.notif_cfg.answerbox) {
gxemul_console_irq.notif_cfg.notify = true;
}
spinlock_unlock(&gxemul_console_irq.lock);
interrupts_restore(ipl);
}
 
/** Initializes console object representing gxemul console.
*
* @param devno device number.
*/
void gxemul_console_init(devno_t devno)
{
chardev_initialize("gxemul_console", &console, &gxemul_ops);
stdin = &console;
stdout = &console;
irq_initialize(&gxemul_console_irq);
gxemul_console_irq.devno = devno;
gxemul_console_irq.inr = GXEMUL_KBD_IRQ;
gxemul_console_irq.claim = gxemul_claim;
gxemul_console_irq.handler = gxemul_irq_handler;
irq_register(&gxemul_console_irq);
gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.devno", NULL, devno);
sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);
sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd);
}
 
/** Starts gxemul Real Time Clock device, which asserts regular interrupts.
*
* @param frequency Interrupts frequency (0 disables RTC).
*/
static void gxemul_timer_start(uint32_t frequency)
{
*((uint32_t*) gxemul_hw_map.rtc_freq) = frequency;
}
 
static irq_ownership_t gxemul_timer_claim(void)
{
return IRQ_ACCEPT;
}
 
/** Timer interrupt handler.
*
* @param irq Interrupt information.
* @param arg Not used.
*/
static void gxemul_timer_irq_handler(irq_t *irq, void *arg, ...)
{
/*
* We are holding a lock which prevents preemption.
* Release the lock, call clock() and reacquire the lock again.
*/
spinlock_unlock(&irq->lock);
clock();
spinlock_lock(&irq->lock);
 
/* acknowledge tick */
*((uint32_t*) gxemul_hw_map.rtc_ack) = 0;
}
 
/** Initializes and registers timer interrupt handler. */
static void gxemul_timer_irq_init(void)
{
irq_initialize(&gxemul_timer_irq);
gxemul_timer_irq.devno = device_assign_devno();
gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;
gxemul_timer_irq.claim = gxemul_timer_claim;
gxemul_timer_irq.handler = gxemul_timer_irq_handler;
 
irq_register(&gxemul_timer_irq);
}
 
 
/** Starts timer.
*
* Initiates regular timer interrupts after initializing
* corresponding interrupt handler.
*/
void gxemul_timer_irq_start(void)
{
gxemul_timer_irq_init();
gxemul_timer_start(GXEMUL_TIMER_FREQ);
}
 
/** Returns the size of emulated memory.
*
* @return Size in bytes.
*/
size_t gxemul_get_memory_size(void)
{
return *((int *) (GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET));
}
 
/** Prints a character.
*
* @param ch Character to be printed.
*/
void gxemul_debug_putc(char ch)
{
char *addr = 0;
if (!hw_map_init_called) {
addr = (char *) GXEMUL_KBD;
} else {
addr = (char *) gxemul_hw_map.videoram;
}
 
*(addr) = ch;
}
 
/** Stops gxemul. */
void gxemul_cpu_halt(void)
{
char * addr = 0;
if (!hw_map_init_called) {
addr = (char *) GXEMUL_KBD;
} else {
addr = (char *) gxemul_hw_map.videoram;
}
*(addr + GXEMUL_HALT_OFFSET) = '\0';
}
 
/** Gxemul specific interrupt exception handler.
*
* Determines sources of the interrupt from interrupt controller and
* calls high-level handlers for them.
*
* @param exc_no Interrupt exception number.
* @param istate Saved processor state.
*/
void gxemul_irq_exception(int exc_no, istate_t *istate)
{
uint32_t sources = gxemul_irqc_get_sources();
int i;
for (i = 0; i < GXEMUL_IRQC_MAX_IRQ; i++) {
if (sources & (1 << i)) {
irq_t *irq = irq_dispatch_and_lock(i);
if (irq) {
/* The IRQ handler was found. */
irq->handler(irq, irq->arg);
spinlock_unlock(&irq->lock);
} else {
/* Spurious interrupt.*/
dprintf("cpu%d: spurious interrupt (inum=%d)\n",
CPU->id, i);
}
}
}
}
 
/** Returns address of framebuffer device.
*
* @return Address of framebuffer device.
*/
uintptr_t gxemul_get_fb_address(void)
{
return (uintptr_t) GXEMUL_FB;
}
 
/** @}
*/
/branches/network/kernel/arch/arm32/include/mm/page.h
193,8 → 193,9
static inline void set_ptl0_addr(pte_level0_t *pt)
{
asm volatile (
"mcr p15, 0, %[pt], c2, c0, 0\n"
:: [pt] "r" (pt)
"mcr p15, 0, %0, c2, c0, 0 \n"
:
: "r"(pt)
);
}
 
/branches/network/kernel/arch/arm32/include/mm/frame.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32mm
/** @addtogroup arm32mm
* @{
*/
/** @file
36,8 → 36,8
#ifndef KERN_arm32_FRAME_H_
#define KERN_arm32_FRAME_H_
 
#define FRAME_WIDTH 12 /* 4KB frames */
#define FRAME_SIZE (1 << FRAME_WIDTH)
#define FRAME_WIDTH 12 /* 4KB frames */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
#ifdef KERNEL
#ifndef __ASM__
44,8 → 44,8
 
#include <arch/types.h>
 
#define BOOT_PAGE_TABLE_SIZE 0x4000
#define BOOT_PAGE_TABLE_ADDRESS 0x4000
#define BOOT_PAGE_TABLE_SIZE 0x4000
#define BOOT_PAGE_TABLE_ADDRESS 0x4000
 
#define BOOT_PAGE_TABLE_START_FRAME (BOOT_PAGE_TABLE_ADDRESS >> FRAME_WIDTH)
#define BOOT_PAGE_TABLE_SIZE_IN_FRAMES (BOOT_PAGE_TABLE_SIZE >> FRAME_WIDTH)
/branches/network/kernel/arch/arm32/include/mm/tlb.h
36,6 → 36,9
#ifndef KERN_arm32_TLB_H_
#define KERN_arm32_TLB_H_
 
#define tlb_arch_init()
#define tlb_print()
 
#endif
 
/** @}
/branches/network/kernel/arch/arm32/include/barrier.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32
/** @addtogroup arm32
* @{
*/
/** @file
39,12 → 39,12
/*
* TODO: implement true ARM memory barriers for macros below.
*/
#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory")
#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory")
#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory")
#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory")
 
#define memory_barrier() asm volatile ("" ::: "memory")
#define read_barrier() asm volatile ("" ::: "memory")
#define write_barrier() asm volatile ("" ::: "memory")
#define memory_barrier() asm volatile ("" ::: "memory")
#define read_barrier() asm volatile ("" ::: "memory")
#define write_barrier() asm volatile ("" ::: "memory")
 
#define smc_coherence(a)
#define smc_coherence_block(a, l)
/branches/network/kernel/arch/arm32/include/types.h
64,9 → 64,6
typedef uint32_t unative_t;
typedef int32_t native_t;
 
typedef struct {
} fncptr_t;
 
#define PRIp "x" /**< Format for uintptr_t. */
#define PRIs "u" /**< Format for size_t. */
#define PRIc "u" /**< Format for count_t. */
/branches/network/kernel/arch/arm32/include/asm/boot.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32
/** @addtogroup arm32
* @{
*/
/** @file
37,9 → 37,26
#define KERN_arm32_ASM_BOOT_H_
 
/** Size of a temporary stack used for initial kernel start. */
#define TEMP_STACK_SIZE 0x100
#define TEMP_STACK_SIZE 0x100
 
#ifndef __ASM__
 
/** Kernel entry point.
*
* Implemented in assembly. Copies boot_bootinfo (declared as bootinfo in
* boot/arch/arm32/loader/main.c) to #bootinfo struct. Then jumps to
* #arch_pre_main and #main_bsp.
*
* @param entry Entry point address (not used).
* @param boot_bootinfo Struct holding information about loaded tasks.
* @param bootinfo_size Size of the bootinfo structure.
*/
extern void kernel_image_start(void *entry, void *boot_bootinfo,
unsigned int bootinfo_size);
 
#endif
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/arm32/include/interrupt.h
37,7 → 37,6
#define KERN_arm32_INTERRUPT_H_
 
#include <arch/types.h>
#include <arch/exception.h>
 
/** Initial size of exception dispatch table. */
#define IVT_ITEMS 6
/branches/network/kernel/arch/arm32/include/regutils.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32
/** @addtogroup arm32
* @{
*/
/**
57,10 → 57,7
static inline uint32_t nm## _status_reg_read(void) \
{ \
uint32_t retval; \
asm volatile( \
"mrs %[retval], " #reg \
: [retval] "=r" (retval) \
); \
asm volatile("mrs %0, " #reg : "=r" (retval)); \
return retval; \
}
 
67,10 → 64,7
#define GEN_STATUS_WRITE(nm,reg,fieldname, field) \
static inline void nm## _status_reg_ ##fieldname## _write(uint32_t value) \
{ \
asm volatile( \
"msr " #reg "_" #field ", %[value]" \
:: [value] "r" (value) \
); \
asm volatile("msr " #reg "_" #field ", %0" : : "r" (value)); \
}
 
 
/branches/network/kernel/arch/arm32/include/debug/print.h
0,0 → 1,56
/*
* Copyright (c) 2007 Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32
* @{
*/
/** @file
* @brief Debug printing functions.
*/
 
#ifndef KERN_arm32_DEBUG_PRINT_H_
#define KERN_arm32_DEBUG_PRINT_H_
 
#include <stdarg.h>
#include <arch/types.h>
 
extern void debug_puts(const char *str);
extern void debug_printf(const char *fmt, ...);
 
#ifdef CONFIG_DEBUG
# define dprintf(arg1...) debug_printf(arg1)
# define dputs(arg1) debug_puts(arg1)
#else
# define dprintf(arg1...)
# define dputs(arg1)
#endif
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/arm32/include/console.h
36,6 → 36,13
#ifndef KERN_arm32_CONSOLE_H_
#define KERN_arm32_CONSOLE_H_
 
 
/** Initializes console.
*
* @param devno Console device number.
*/
extern void console_init(devno_t devno);
 
#endif
 
/** @}
/branches/network/kernel/arch/arm32/include/boot.h
0,0 → 1,76
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32
* @{
*/
/** @file
* @brief Bootinfo declarations.
*
* Reflects boot/arch/arm32/loader/main.h.
*/
 
#ifndef KERN_arm32_BOOT_H_
#define KERN_arm32_BOOT_H_
 
#include <arch/types.h>
 
/** Maximum number of tasks in the #bootinfo_t struct. */
#define TASKMAP_MAX_RECORDS 32
 
 
/** Struct holding information about single loaded uspace task. */
typedef struct {
 
/** Address where the task was placed. */
uintptr_t addr;
 
/** Size of the task's binary. */
uint32_t size;
} utask_t;
 
 
/** Struct holding information about loaded uspace tasks. */
typedef struct {
 
/** Number of loaded tasks. */
uint32_t cnt;
 
/** Array of loaded tasks. */
utask_t tasks[TASKMAP_MAX_RECORDS];
} bootinfo_t;
 
 
/** Bootinfo that is filled in #kernel_image_start. */
extern bootinfo_t bootinfo;
 
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/arm32/include/machine.h
0,0 → 1,122
/*
* Copyright (c) 2007 Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32
* @{
*/
/** @file
* @brief Declarations of machine specific functions.
*
* These functions enable to differentiate more kinds of ARM emulators
* or CPUs. It's the same concept as "arch" functions on the architecture
* level.
*/
 
#ifndef KERN_arm32_MACHINE_H_
#define KERN_arm32_MACHINE_H_
 
#include <console/console.h>
#include <arch/types.h>
#include <arch/exception.h>
#include <arch/drivers/gxemul.h>
 
 
/** Initializes console.
*
* @param devno Console device number.
*/
extern void machine_console_init(devno_t devno);
 
 
/** Acquire console back for kernel. */
extern void machine_grab_console(void);
 
 
/** Return console to userspace. */
extern void machine_release_console(void);
 
 
/** Maps HW devices to the kernel address space using #hw_map. */
extern void machine_hw_map_init(void);
 
 
/** Starts timer. */
extern void machine_timer_irq_start(void);
 
 
/** Halts CPU. */
extern void machine_cpu_halt(void);
 
 
/** Returns size of available memory.
*
* @return Size of available memory.
*/
extern size_t machine_get_memory_size(void);
 
 
/** Prints a character.
*
* @param ch Character to be printed.
*/
extern void machine_debug_putc(char ch);
 
 
/** Interrupt exception handler.
*
* @param exc_no Interrupt exception number.
* @param istate Saved processor state.
*/
extern void machine_irq_exception(int exc_no, istate_t *istate);
 
 
/** Returns address of framebuffer device.
*
* @return Address of framebuffer device.
*/
extern uintptr_t machine_get_fb_address(void);
 
 
#ifdef MACHINE_GXEMUL_TESTARM
#define machine_console_init(devno) gxemul_console_init(devno)
#define machine_grab_console gxemul_grab_console
#define machine_release_console gxemul_release_console
#define machine_hw_map_init gxemul_hw_map_init
#define machine_timer_irq_start gxemul_timer_irq_start
#define machine_cpu_halt gxemul_cpu_halt
#define machine_get_memory_size gxemul_get_memory_size
#define machine_debug_putc(ch) gxemul_debug_putc(ch)
#define machine_irq_exception(exc_no, istate) \
gxemul_irq_exception(exc_no, istate)
#define machine_get_fb_address gxemul_get_fb_address
#endif
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/arm32/include/atomic.h
26,10 → 26,10
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32
/** @addtogroup arm32
* @{
*/
/** @file
/** @file
* @brief Atomic operations.
*/
 
42,26 → 42,26
* @param i Value to be added.
*
* @return Value after addition.
*
*/
static inline long atomic_add(atomic_t *val, int i)
{
int ret;
volatile long *mem = &(val->count);
 
asm volatile (
"1:\n"
"ldr r2, [%[mem]]\n"
"add r3, r2, %[i]\n"
"str r3, %[ret]\n"
"swp r3, r3, [%[mem]]\n"
"cmp r3, r2\n"
"bne 1b\n"
: [ret] "=m" (ret)
: [mem] "r" (mem), [i] "r" (i)
"1:\n"
"ldr r2, [%1] \n"
"add r3, r2, %2 \n"
"str r3, %0 \n"
"swp r3, r3, [%1] \n"
"cmp r3, r2 \n"
"bne 1b \n"
 
: "=m" (ret)
: "r" (mem), "r" (i)
: "r3", "r2"
);
 
return ret;
}
 
/branches/network/kernel/arch/arm32/include/arch.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32
/** @addtogroup arm32
* @{
*/
/** @file
36,26 → 36,6
#ifndef KERN_arm32_ARCH_H_
#define KERN_arm32_ARCH_H_
 
#define TASKMAP_MAX_RECORDS 32
#define CPUMAP_MAX_RECORDS 32
 
#define BOOTINFO_TASK_NAME_BUFLEN 32
 
#include <typedefs.h>
 
typedef struct {
uintptr_t addr;
uint32_t size;
char name[BOOTINFO_TASK_NAME_BUFLEN];
} utask_t;
 
typedef struct {
uint32_t cnt;
utask_t tasks[TASKMAP_MAX_RECORDS];
} bootinfo_t;
 
extern void arch_pre_main(void *entry, bootinfo_t *bootinfo);
 
#endif
 
/** @}
/branches/network/kernel/arch/arm32/include/asm.h
26,10 → 26,10
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32
/** @addtogroup arm32
* @{
*/
/** @file
/** @file
* @brief Declarations of functions implemented in assembly.
*/
 
36,7 → 36,6
#ifndef KERN_arm32_ASM_H_
#define KERN_arm32_ASM_H_
 
#include <typedefs.h>
#include <arch/types.h>
#include <arch/stack.h>
#include <config.h>
47,50 → 46,19
{
}
 
static inline void pio_write_8(ioport8_t *port, uint8_t v)
{
*port = v;
}
 
static inline void pio_write_16(ioport16_t *port, uint16_t v)
{
*port = v;
}
 
static inline void pio_write_32(ioport32_t *port, uint32_t v)
{
*port = v;
}
 
static inline uint8_t pio_read_8(ioport8_t *port)
{
return *port;
}
 
static inline uint16_t pio_read_16(ioport16_t *port)
{
return *port;
}
 
static inline uint32_t pio_read_32(ioport32_t *port)
{
return *port;
}
 
/** Return base address of current stack.
*
*
* Return the base address of the current stack.
* The stack is assumed to be STACK_SIZE bytes long.
* The stack must start on page boundary.
*
*/
static inline uintptr_t get_stack_base(void)
{
uintptr_t v;
asm volatile (
"and %[v], sp, %[size]\n"
: [v] "=r" (v)
: [size] "r" (~(STACK_SIZE - 1))
"and %0, sp, %1\n"
: "=r" (v)
: "r" (~(STACK_SIZE - 1))
);
return v;
}
/branches/network/kernel/arch/arm32/include/drivers/gxemul.h
38,33 → 38,41
#ifndef KERN_arm32_GXEMUL_H_
#define KERN_arm32_GXEMUL_H_
 
/** Last interrupt number (beginning from 0) whose status is probed
#include <console/chardev.h>
 
/** Last interrupt number (beginning from 0) whose status is probed
* from interrupt controller
*/
#define GXEMUL_IRQC_MAX_IRQ 8
#define GXEMUL_KBD_IRQ 2
#define GXEMUL_TIMER_IRQ 4
#define GXEMUL_IRQC_MAX_IRQ 8
 
/** Timer frequency */
#define GXEMUL_TIMER_FREQ 100
#define GXEMUL_TIMER_FREQ 100
 
#define GXEMUL_KBD_ADDRESS 0x10000000
#define GXEMUL_MP_ADDRESS 0x11000000
#define GXEMUL_FB_ADDRESS 0x12000000
#define GXEMUL_RTC_ADDRESS 0x15000000
#define GXEMUL_IRQC_ADDRESS 0x16000000
/** Struct containing mappings of gxemul HW devices into kernel part
* of virtual address space.
*/
typedef struct {
uintptr_t videoram;
uintptr_t kbd;
uintptr_t rtc;
uintptr_t rtc_freq;
uintptr_t rtc_ack;
uintptr_t irqc;
uintptr_t irqc_mask;
uintptr_t irqc_unmask;
} gxemul_hw_map_t;
 
extern void *gxemul_kbd;
extern void *gxemul_rtc;
extern void *gxemul_irqc;
extern void gxemul_hw_map_init(void);
extern void gxemul_console_init(devno_t devno);
extern void gxemul_release_console(void);
extern void gxemul_grab_console(void);
extern void gxemul_timer_irq_start(void);
extern void gxemul_debug_putc(char ch);
extern void gxemul_cpu_halt(void);
extern void gxemul_irq_exception(int exc_no, istate_t *istate);
extern size_t gxemul_get_memory_size(void);
extern uintptr_t gxemul_get_fb_address(void);
 
#define GXEMUL_HALT_OFFSET 0x010
#define GXEMUL_RTC_FREQ_OFFSET 0x100
#define GXEMUL_MP_MEMSIZE_OFFSET 0x090
#define GXEMUL_RTC_ACK_OFFSET 0x110
 
extern void gxemul_init(void);
 
#endif
 
/** @}
/branches/network/kernel/arch/arm32/_link.ld.in
1,16 → 1,15
/*
* ARM linker script
*
* ARM linker script
*
* kernel text
* kernel data
*
*
*/
 
#define KERNEL_LOAD_ADDRESS 0x80200000
 
OUTPUT_ARCH(arm)
ENTRY(kernel_image_start)
ENTRY(kernel_image_start)
 
 
SECTIONS {
. = KERNEL_LOAD_ADDRESS;
.text : {
20,29 → 19,29
}
.data : {
kdata_start = .;
*(.data); /* initialized data */
*(.data); /* initialized data */
hardcoded_ktext_size = .;
LONG(ktext_end - ktext_start);
LONG(ktext_end - ktext_start);
hardcoded_kdata_size = .;
LONG(kdata_end - kdata_start);
hardcoded_load_address = .;
LONG(KERNEL_LOAD_ADDRESS);
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
 
*(.rodata*);
*(.sdata);
*(.reginfo);
symbol_table = .;
*(symtab.*);
*(symtab.*);
}
.sbss : {
*(.sbss);
*(.scommon);
}
 
kdata_end = .;
 
/DISCARD/ : {
*(.mdebug*);
*(.pdr);
49,4 → 48,5
*(.comment);
*(.note);
}
 
}
/branches/network/kernel/arch/ppc32/Makefile.inc
29,6 → 29,10
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
BFD_NAME = elf32-powerpc
BFD_ARCH = powerpc:common
BFD = binary
41,22 → 45,44
 
DEFS += -D__32_BITS__
 
## Own configuration directives
#
 
CONFIG_FB = y
 
## Compile with hierarchical page tables support.
#
 
CONFIG_PAGE_PT = y
DEFS += -DCONFIG_PAGE_PT
 
## Compile with support for address space identifiers.
#
 
CONFIG_ASID = y
CONFIG_ASID_FIFO = y
 
## Compile with support for software integer division.
#
 
CONFIG_SOFTINT = y
 
ARCH_SOURCES = \
arch/$(KARCH)/src/context.S \
arch/$(KARCH)/src/debug/panic.s \
arch/$(KARCH)/src/fpu_context.S \
arch/$(KARCH)/src/boot/boot.S \
arch/$(KARCH)/src/ppc32.c \
arch/$(KARCH)/src/dummy.s \
arch/$(KARCH)/src/exception.S \
arch/$(KARCH)/src/interrupt.c \
arch/$(KARCH)/src/asm.S \
arch/$(KARCH)/src/cpu/cpu.c \
arch/$(KARCH)/src/proc/scheduler.c \
arch/$(KARCH)/src/ddi/ddi.c \
arch/$(KARCH)/src/drivers/cuda.c \
arch/$(KARCH)/src/mm/as.c \
arch/$(KARCH)/src/mm/frame.c \
arch/$(KARCH)/src/mm/page.c \
arch/$(KARCH)/src/mm/tlb.c \
arch/$(KARCH)/src/drivers/pic.c
arch/$(ARCH)/src/context.S \
arch/$(ARCH)/src/debug/panic.s \
arch/$(ARCH)/src/fpu_context.S \
arch/$(ARCH)/src/boot/boot.S \
arch/$(ARCH)/src/ppc32.c \
arch/$(ARCH)/src/dummy.s \
arch/$(ARCH)/src/exception.S \
arch/$(ARCH)/src/interrupt.c \
arch/$(ARCH)/src/asm.S \
arch/$(ARCH)/src/cpu/cpu.c \
arch/$(ARCH)/src/proc/scheduler.c \
arch/$(ARCH)/src/ddi/ddi.c \
arch/$(ARCH)/src/drivers/cuda.c \
arch/$(ARCH)/src/mm/as.c \
arch/$(ARCH)/src/mm/frame.c \
arch/$(ARCH)/src/mm/page.c \
arch/$(ARCH)/src/mm/tlb.c \
arch/$(ARCH)/src/drivers/pic.c
/branches/network/kernel/arch/ppc32/include/regutils.h
File deleted
/branches/network/kernel/arch/ppc32/include/mm/page.h
120,7 → 120,7
 
/* Macros for querying the last-level PTEs. */
#define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0)
#define PTE_PRESENT_ARCH(pte) ((pte)->present != 0)
#define PTE_PRESENT_ARCH(pte) ((pte)->p != 0)
#define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12)
#define PTE_WRITABLE_ARCH(pte) 1
#define PTE_EXECUTABLE_ARCH(pte) 1
134,13 → 134,13
{
pte_t *p = &pt[i];
return (((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT) |
((!p->present) << PAGE_PRESENT_SHIFT) |
return ((1 << PAGE_CACHEABLE_SHIFT) |
((!p->p) << PAGE_PRESENT_SHIFT) |
(1 << PAGE_USER_SHIFT) |
(1 << PAGE_READ_SHIFT) |
(1 << PAGE_WRITE_SHIFT) |
(1 << PAGE_EXEC_SHIFT) |
(p->global << PAGE_GLOBAL_SHIFT));
(p->g << PAGE_GLOBAL_SHIFT));
}
 
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
147,9 → 147,8
{
pte_t *p = &pt[i];
p->page_cache_disable = !(flags & PAGE_CACHEABLE);
p->present = !(flags & PAGE_NOT_PRESENT);
p->global = (flags & PAGE_GLOBAL) != 0;
p->p = !(flags & PAGE_NOT_PRESENT);
p->g = (flags & PAGE_GLOBAL) != 0;
p->valid = 1;
}
 
/branches/network/kernel/arch/ppc32/include/mm/tlb.h
39,11 → 39,6
#include <arch/types.h>
#include <typedefs.h>
 
#define WIMG_GUARDED 0x01
#define WIMG_COHERENT 0x02
#define WIMG_NO_CACHE 0x04
#define WIMG_WRITETHRU 0x08
 
typedef struct {
unsigned v : 1; /**< Valid */
unsigned vsid : 24; /**< Virtual Segment ID */
58,27 → 53,9
unsigned pp : 2; /**< Page protection */
} phte_t;
 
typedef struct {
unsigned v : 1;
unsigned vsid : 24;
unsigned reserved0 : 1;
unsigned api : 6;
} ptehi_t;
 
typedef struct {
unsigned rpn : 20;
unsigned xpn : 3;
unsigned reserved0 : 1;
unsigned c : 1;
unsigned wimg : 4;
unsigned x : 1;
unsigned pp : 2;
} ptelo_t;
 
extern void pht_refill(int n, istate_t *istate);
extern bool pht_real_refill(int n, istate_t *istate) __attribute__ ((section("K_UNMAPPED_TEXT_START")));
extern void pht_init(void);
extern void pht_refill(int n, istate_t *istate);
extern bool pht_refill_real(int n, istate_t *istate) __attribute__ ((section("K_UNMAPPED_TEXT_START")));
extern void tlb_refill_real(int n, uint32_t tlbmiss, ptehi_t ptehi, ptelo_t ptelo, istate_t *istate) __attribute__ ((section("K_UNMAPPED_TEXT_START")));
 
#endif
 
/branches/network/kernel/arch/ppc32/include/mm/frame.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc32mm
/** @addtogroup ppc32mm
* @{
*/
/** @file
35,13 → 35,13
#ifndef KERN_ppc32_FRAME_H_
#define KERN_ppc32_FRAME_H_
 
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
#ifdef KERNEL
#ifndef __ASM__
 
#include <arch/types.h>
#include <arch/types.h>
 
extern uintptr_t last_frame;
 
/branches/network/kernel/arch/ppc32/include/barrier.h
55,7 → 55,6
"dcbst 0, %0\n"
"sync\n"
"icbi 0, %0\n"
"sync\n"
"isync\n"
:: "r" (addr)
);
77,10 → 76,7
asm volatile ("icbi 0, %0\n" :: "r" (addr + i));
}
 
asm volatile (
"sync\n"
"isync\n"
);
asm volatile ("isync");
}
 
#endif
/branches/network/kernel/arch/ppc32/include/exception.h
36,7 → 36,6
#define KERN_ppc32_EXCEPTION_H_
 
#include <arch/types.h>
#include <arch/regutils.h>
 
typedef struct {
uint32_t r0;
75,7 → 74,6
uint32_t lr;
uint32_t ctr;
uint32_t xer;
uint32_t dar;
uint32_t r12;
uint32_t sp;
} istate_t;
86,10 → 84,11
}
 
/** Return true if exception happened while in userspace */
#include <panic.h>
static inline int istate_from_uspace(istate_t *istate)
{
/* true if privilege level PR (copied from MSR) == 1 */
return (istate->srr1 & MSR_PR) != 0;
panic("istate_from_uspace not yet implemented");
return 0;
}
 
static inline unative_t istate_get_pc(istate_t *istate)
/branches/network/kernel/arch/ppc32/include/boot/boot.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc32
/** @addtogroup ppc32
* @{
*/
/** @file
35,24 → 35,21
#ifndef KERN_ppc32_BOOT_H_
#define KERN_ppc32_BOOT_H_
 
#define BOOT_OFFSET 0x8000
#define BOOT_OFFSET 0x8000
 
/* Temporary stack size for boot process */
#define TEMP_STACK_SIZE 0x1000
#define TEMP_STACK_SIZE 0x1000
 
#define TASKMAP_MAX_RECORDS 32
#define MEMMAP_MAX_RECORDS 32
#define TASKMAP_MAX_RECORDS 32
#define MEMMAP_MAX_RECORDS 32
 
#ifndef __ASM__
 
#define BOOTINFO_TASK_NAME_BUFLEN 32
 
#include <arch/types.h>
 
typedef struct {
uintptr_t addr;
uint32_t size;
char name[BOOTINFO_TASK_NAME_BUFLEN];
} utask_t;
 
typedef struct {
82,13 → 79,13
typedef struct {
uintptr_t addr;
unsigned int size;
} macio_t;
} keyboard_t;
 
typedef struct {
memmap_t memmap;
taskmap_t taskmap;
screen_t screen;
macio_t macio;
keyboard_t keyboard;
} bootinfo_t;
 
extern bootinfo_t bootinfo;
/branches/network/kernel/arch/ppc32/include/drivers/cuda.h
38,8 → 38,10
#include <arch/types.h>
#include <typedefs.h>
 
extern void cuda_init(uintptr_t base, size_t size);
extern void cuda_init(devno_t devno, uintptr_t base, size_t size);
extern int cuda_get_scancode(void);
extern void cuda_grab(void);
extern void cuda_release(void);
 
#endif
 
/branches/network/kernel/arch/ppc32/include/types.h
57,9 → 57,6
typedef uint32_t unative_t;
typedef int32_t native_t;
 
typedef struct {
} fncptr_t;
 
/**< Formats for uintptr_t, size_t, count_t and index_t */
#define PRIp "x"
#define PRIs "u"
87,13 → 84,11
 
/** Page Table Entry. */
typedef struct {
unsigned present : 1; /**< Present bit. */
unsigned page_write_through : 1; /**< Write thought caching. */
unsigned page_cache_disable : 1; /**< No caching. */
unsigned accessed : 1; /**< Accessed bit. */
unsigned global : 1; /**< Global bit. */
unsigned valid : 1; /**< Valid content even if not present. */
unsigned pfn : 20; /**< Physical frame number. */
unsigned p : 1; /**< Present bit. */
unsigned a : 1; /**< Accessed bit. */
unsigned g : 1; /**< Global bit. */
unsigned valid : 1; /**< Valid content even if not present. */
unsigned pfn : 20; /**< Physical frame number. */
} pte_t;
 
#endif
/branches/network/kernel/arch/ppc32/include/asm/regname.h
211,19 → 211,15
#define dbat2l 541
#define dbat3u 542
#define dbat3l 543
#define tlbmiss 980
#define ptehi 981
#define ptelo 982
#define hid0 1008
 
/* MSR bits */
#define msr_dr (1 << 4)
#define msr_ir (1 << 5)
#define msr_ir (1 << 4)
#define msr_dr (1 << 5)
#define msr_pr (1 << 14)
#define msr_ee (1 << 15)
 
/* HID0 bits */
#define hid0_sten (1 << 24)
#define hid0_ice (1 << 15)
#define hid0_dce (1 << 14)
#define hid0_icfi (1 << 11)
/branches/network/kernel/arch/ppc32/include/arch.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc32
/** @addtogroup ppc32
* @{
*/
/** @file
35,7 → 35,7
#ifndef KERN_ppc32_ARCH_H_
#define KERN_ppc32_ARCH_H_
 
extern void arch_pre_main(void);
#include <arch/drivers/cuda.h>
 
#endif
 
/branches/network/kernel/arch/ppc32/include/asm.h
36,7 → 36,6
#define KERN_ppc32_ASM_H_
 
#include <arch/types.h>
#include <typedefs.h>
#include <config.h>
 
/** Enable interrupts.
150,36 → 149,6
 
extern void userspace_asm(uintptr_t uspace_uarg, uintptr_t stack, uintptr_t entry);
 
static inline void pio_write_8(ioport8_t *port, uint8_t v)
{
*port = v;
}
 
static inline void pio_write_16(ioport16_t *port, uint16_t v)
{
*port = v;
}
 
static inline void pio_write_32(ioport32_t *port, uint32_t v)
{
*port = v;
}
 
static inline uint8_t pio_read_8(ioport8_t *port)
{
return *port;
}
 
static inline uint16_t pio_read_16(ioport16_t *port)
{
return *port;
}
 
static inline uint32_t pio_read_32(ioport32_t *port)
{
return *port;
}
 
#endif
 
/** @}
/branches/network/kernel/arch/ppc32/src/asm.S
66,9 → 66,9
mr sp, r4
 
# %r6 is defined to hold pcb_ptr - set it to 0
# %r3 is defined to hold pcb_ptr - set it to 0
 
xor r6, r6, r6
xor r3, r3, r3
# jump to userspace
131,8 → 131,8
lwz r12, 148(sp)
mtxer r12
lwz r12, 156(sp)
lwz sp, 160(sp)
lwz r12, 152(sp)
lwz sp, 156(sp)
rfi
 
197,8 → 197,8
lwz r12, 148(sp)
mtxer r12
lwz r12, 156(sp)
lwz sp, 160(sp)
lwz r12, 152(sp)
lwz sp, 156(sp)
 
rfi
/branches/network/kernel/arch/ppc32/src/mm/tlb.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc32mm
/** @addtogroup ppc32mm
* @{
*/
/** @file
35,22 → 35,12
#include <mm/tlb.h>
#include <arch/mm/tlb.h>
#include <arch/interrupt.h>
#include <interrupt.h>
#include <mm/as.h>
#include <arch.h>
#include <print.h>
#include <macros.h>
#include <symtab.h>
 
static unsigned int seed = 10;
static unsigned int seed_real __attribute__ ((section("K_UNMAPPED_DATA_START"))) = 42;
 
 
#define TLB_FLUSH \
"tlbie %0\n" \
"addi %0, %0, 0x1000\n"
 
 
/** Try to find PTE for faulting address
*
* Try to find PTE for faulting address.
75,7 → 65,7
* Check if the mapping exists in page tables.
*/
pte_t *pte = page_mapping_find(as, badvaddr);
if ((pte) && (pte->present)) {
if ((pte) && (pte->p)) {
/*
* Mapping found in page tables.
* Immediately succeed.
97,7 → 87,7
*/
page_table_lock(as, lock);
pte = page_mapping_find(as, badvaddr);
ASSERT((pte) && (pte->present));
ASSERT((pte) && (pte->p));
*pfrc = 0;
return pte;
case AS_PF_DEFER:
106,10 → 96,11
return NULL;
case AS_PF_FAULT:
page_table_lock(as, lock);
printf("Page fault.\n");
*pfrc = rc;
return NULL;
default:
panic("Unexpected rc (%d).", rc);
panic("unexpected rc (%d)\n", rc);
}
}
}
117,20 → 108,21
 
static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate)
{
char *symbol;
char *sym2;
char *symbol = "";
char *sym2 = "";
 
symbol = symtab_fmt_name_lookup(istate->pc);
sym2 = symtab_fmt_name_lookup(istate->lr);
 
fault_if_from_uspace(istate,
"PHT Refill Exception on %p.", badvaddr);
panic("%p: PHT Refill Exception at %p (%s<-%s).", badvaddr,
char *s = get_symtab_entry(istate->pc);
if (s)
symbol = s;
s = get_symtab_entry(istate->lr);
if (s)
sym2 = s;
panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr,
istate->pc, symbol, sym2);
}
 
 
static void pht_insert(const uintptr_t vaddr, const pte_t *pte)
static void pht_insert(const uintptr_t vaddr, const pfn_t pfn)
{
uint32_t page = (vaddr >> 12) & 0xffff;
uint32_t api = (vaddr >> 22) & 0x3f;
156,12 → 148,11
uint32_t i;
bool found = false;
/* Find colliding PTE in PTEG */
/* Find unused or colliding
PTE in PTEG */
for (i = 0; i < 8; i++) {
if ((phte[base + i].v)
&& (phte[base + i].vsid == vsid)
&& (phte[base + i].api == api)
&& (phte[base + i].h == 0)) {
if ((!phte[base + i].v) || ((phte[base + i].vsid == vsid) &&
(phte[base + i].api == api))) {
found = true;
break;
}
168,25 → 159,86
}
if (!found) {
/* Find unused PTE in PTEG */
/* Secondary hash (not) */
uint32_t base2 = (~hash & 0x3ff) << 3;
/* Find unused or colliding
PTE in PTEG */
for (i = 0; i < 8; i++) {
if (!phte[base + i].v) {
if ((!phte[base2 + i].v) ||
((phte[base2 + i].vsid == vsid) &&
(phte[base2 + i].api == api))) {
found = true;
base = base2;
h = 1;
break;
}
}
if (!found) {
// TODO: A/C precedence groups
i = page % 8;
}
}
phte[base + i].v = 1;
phte[base + i].vsid = vsid;
phte[base + i].h = h;
phte[base + i].api = api;
phte[base + i].rpn = pfn;
phte[base + i].r = 0;
phte[base + i].c = 0;
phte[base + i].pp = 2; // FIXME
}
 
 
static void pht_real_insert(const uintptr_t vaddr, const pfn_t pfn)
{
uint32_t page = (vaddr >> 12) & 0xffff;
uint32_t api = (vaddr >> 22) & 0x3f;
uint32_t vsid;
asm volatile (
"mfsrin %0, %1\n"
: "=r" (vsid)
: "r" (vaddr)
);
uint32_t sdr1;
asm volatile (
"mfsdr1 %0\n"
: "=r" (sdr1)
);
phte_t *phte_physical = (phte_t *) (sdr1 & 0xffff0000);
/* Primary hash (xor) */
uint32_t h = 0;
uint32_t hash = vsid ^ page;
uint32_t base = (hash & 0x3ff) << 3;
uint32_t i;
bool found = false;
/* Find unused or colliding
PTE in PTEG */
for (i = 0; i < 8; i++) {
if ((!phte_physical[base + i].v) ||
((phte_physical[base + i].vsid == vsid) &&
(phte_physical[base + i].api == api))) {
found = true;
break;
}
}
if (!found) {
/* Secondary hash (not) */
uint32_t base2 = (~hash & 0x3ff) << 3;
/* Find colliding PTE in PTEG */
/* Find unused or colliding
PTE in PTEG */
for (i = 0; i < 8; i++) {
if ((phte[base2 + i].v)
&& (phte[base2 + i].vsid == vsid)
&& (phte[base2 + i].api == api)
&& (phte[base2 + i].h == 1)) {
if ((!phte_physical[base2 + i].v) ||
((phte_physical[base2 + i].vsid == vsid) &&
(phte_physical[base2 + i].api == api))) {
found = true;
base = base2;
h = 1;
195,37 → 247,26
}
if (!found) {
/* Find unused PTE in PTEG */
for (i = 0; i < 8; i++) {
if (!phte[base2 + i].v) {
found = true;
base = base2;
h = 1;
break;
}
}
// TODO: A/C precedence groups
i = page % 8;
}
if (!found)
i = RANDI(seed) % 8;
}
phte[base + i].v = 1;
phte[base + i].vsid = vsid;
phte[base + i].h = h;
phte[base + i].api = api;
phte[base + i].rpn = pte->pfn;
phte[base + i].r = 0;
phte[base + i].c = 0;
phte[base + i].wimg = (pte->page_cache_disable ? WIMG_NO_CACHE : 0);
phte[base + i].pp = 2; // FIXME
phte_physical[base + i].v = 1;
phte_physical[base + i].vsid = vsid;
phte_physical[base + i].h = h;
phte_physical[base + i].api = api;
phte_physical[base + i].rpn = pfn;
phte_physical[base + i].r = 0;
phte_physical[base + i].c = 0;
phte_physical[base + i].pp = 2; // FIXME
}
 
 
/** Process Instruction/Data Storage Exception
/** Process Instruction/Data Storage Interrupt
*
* @param n Exception vector number.
* @param istate Interrupted register context.
* @param n Interrupt vector number.
* @param istate Interrupted register context.
*
*/
void pht_refill(int n, istate_t *istate)
244,9 → 285,12
lock = true;
}
if (n == VECTOR_DATA_STORAGE)
badvaddr = istate->dar;
else
if (n == VECTOR_DATA_STORAGE) {
asm volatile (
"mfdar %0\n"
: "=r" (badvaddr)
);
} else
badvaddr = istate->pc;
page_table_lock(as, lock);
266,12 → 310,12
page_table_unlock(as, lock);
return;
default:
panic("Unexpected pfrc (%d).", pfrc);
panic("Unexpected pfrc (%d)\n", pfrc);
}
}
pte->accessed = 1; /* Record access to PTE */
pht_insert(badvaddr, pte);
pte->a = 1; /* Record access to PTE */
pht_insert(badvaddr, pte->pfn);
page_table_unlock(as, lock);
return;
282,19 → 326,22
}
 
 
/** Process Instruction/Data Storage Exception in Real Mode
/** Process Instruction/Data Storage Interrupt in Real Mode
*
* @param n Exception vector number.
* @param istate Interrupted register context.
* @param n Interrupt vector number.
* @param istate Interrupted register context.
*
*/
bool pht_refill_real(int n, istate_t *istate)
bool pht_real_refill(int n, istate_t *istate)
{
uintptr_t badvaddr;
if (n == VECTOR_DATA_STORAGE)
badvaddr = istate->dar;
else
if (n == VECTOR_DATA_STORAGE) {
asm volatile (
"mfdar %0\n"
: "=r" (badvaddr)
);
} else
badvaddr = istate->pc;
uint32_t physmem;
303,140 → 350,15
: "=r" (physmem)
);
if ((badvaddr < PA2KA(0)) || (badvaddr >= PA2KA(physmem)))
return false;
uint32_t page = (badvaddr >> 12) & 0xffff;
uint32_t api = (badvaddr >> 22) & 0x3f;
uint32_t vsid;
asm volatile (
"mfsrin %0, %1\n"
: "=r" (vsid)
: "r" (badvaddr)
);
uint32_t sdr1;
asm volatile (
"mfsdr1 %0\n"
: "=r" (sdr1)
);
phte_t *phte_real = (phte_t *) (sdr1 & 0xffff0000);
/* Primary hash (xor) */
uint32_t h = 0;
uint32_t hash = vsid ^ page;
uint32_t base = (hash & 0x3ff) << 3;
uint32_t i;
bool found = false;
/* Find colliding PTE in PTEG */
for (i = 0; i < 8; i++) {
if ((phte_real[base + i].v)
&& (phte_real[base + i].vsid == vsid)
&& (phte_real[base + i].api == api)
&& (phte_real[base + i].h == 0)) {
found = true;
break;
}
if ((badvaddr >= PA2KA(0)) && (badvaddr < PA2KA(physmem))) {
pht_real_insert(badvaddr, KA2PA(badvaddr) >> 12);
return true;
}
if (!found) {
/* Find unused PTE in PTEG */
for (i = 0; i < 8; i++) {
if (!phte_real[base + i].v) {
found = true;
break;
}
}
}
if (!found) {
/* Secondary hash (not) */
uint32_t base2 = (~hash & 0x3ff) << 3;
/* Find colliding PTE in PTEG */
for (i = 0; i < 8; i++) {
if ((phte_real[base2 + i].v)
&& (phte_real[base2 + i].vsid == vsid)
&& (phte_real[base2 + i].api == api)
&& (phte_real[base2 + i].h == 1)) {
found = true;
base = base2;
h = 1;
break;
}
}
if (!found) {
/* Find unused PTE in PTEG */
for (i = 0; i < 8; i++) {
if (!phte_real[base2 + i].v) {
found = true;
base = base2;
h = 1;
break;
}
}
}
if (!found) {
/* Use secondary hash to avoid collisions
with usual PHT refill handler. */
i = RANDI(seed_real) % 8;
base = base2;
h = 1;
}
}
phte_real[base + i].v = 1;
phte_real[base + i].vsid = vsid;
phte_real[base + i].h = h;
phte_real[base + i].api = api;
phte_real[base + i].rpn = KA2PA(badvaddr) >> 12;
phte_real[base + i].r = 0;
phte_real[base + i].c = 0;
phte_real[base + i].wimg = 0;
phte_real[base + i].pp = 2; // FIXME
return true;
return false;
}
 
 
/** Process ITLB/DTLB Miss Exception in Real Mode
*
*
*/
void tlb_refill_real(int n, uint32_t tlbmiss, ptehi_t ptehi, ptelo_t ptelo, istate_t *istate)
{
uint32_t badvaddr = tlbmiss & 0xfffffffc;
uint32_t physmem;
asm volatile (
"mfsprg3 %0\n"
: "=r" (physmem)
);
if ((badvaddr < PA2KA(0)) || (badvaddr >= PA2KA(physmem)))
return; // FIXME
ptelo.rpn = KA2PA(badvaddr) >> 12;
ptelo.wimg = 0;
ptelo.pp = 2; // FIXME
uint32_t index = 0;
asm volatile (
"mtspr 981, %0\n"
"mtspr 982, %1\n"
"tlbld %2\n"
"tlbli %2\n"
: "=r" (index)
: "r" (ptehi),
"r" (ptelo)
);
}
 
 
void tlb_arch_init(void)
{
tlb_invalidate_all();
445,87 → 367,9
 
void tlb_invalidate_all(void)
{
uint32_t index;
asm volatile (
"li %0, 0\n"
"sync\n"
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
"eieio\n"
"tlbia\n"
"tlbsync\n"
"sync\n"
: "=r" (index)
);
}
 
594,7 → 438,7
: "=r" (vsid)
: "r" (sr << 28)
);
printf("sr[%02u]: vsid=%.*p (asid=%u)%s%s\n", sr,
printf("vsid[%d]: VSID=%.*p (ASID=%d)%s%s\n", sr,
sizeof(vsid) * 2, vsid & 0xffffff, (vsid & 0xffffff) >> 4,
((vsid >> 30) & 1) ? " supervisor" : "",
((vsid >> 29) & 1) ? " user" : "");
/branches/network/kernel/arch/ppc32/src/mm/page.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc32mm
/** @addtogroup ppc32mm
* @{
*/
/** @file
49,7 → 49,7
{
if (last_frame + ALIGN_UP(size, PAGE_SIZE) >
KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
panic("Unable to map physical memory %p (%" PRIs " bytes).",
panic("Unable to map physical memory %p (%" PRIs " bytes)",
physaddr, size)
uintptr_t virtaddr = PA2KA(last_frame);
/branches/network/kernel/arch/ppc32/src/mm/frame.c
74,7 → 74,7
if (last_frame < ALIGN_UP(bootinfo.memmap.zones[i].start + bootinfo.memmap.zones[i].size, FRAME_SIZE))
last_frame = ALIGN_UP(bootinfo.memmap.zones[i].start + bootinfo.memmap.zones[i].size, FRAME_SIZE);
}
 
/* First is exception vector, second is 'implementation specific',
third and fourth is reserved, other contain real mode code */
frame_mark_unavailable(0, 8);
/branches/network/kernel/arch/ppc32/src/interrupt.c
73,7 → 73,7
ack = true;
}
irq->handler(irq);
irq->handler(irq, irq->arg);
spinlock_unlock(&irq->lock);
} else {
/*
92,8 → 92,8
 
static void exception_decrementer(int n, istate_t *istate)
{
clock();
start_decrementer();
clock();
}
 
 
/branches/network/kernel/arch/ppc32/src/ppc32.c
42,27 → 42,24
#include <userspace.h>
#include <proc/uarg.h>
#include <console/console.h>
#include <ddi/device.h>
#include <ddi/irq.h>
#include <arch/drivers/pic.h>
#include <macros.h>
#include <string.h>
 
#define IRQ_COUNT 64
#define IRQ_COUNT 64
 
bootinfo_t bootinfo;
 
/** Performs ppc32-specific initialization before main_bsp() is called. */
void arch_pre_main(void)
{
/* Setup usermode */
init.cnt = bootinfo.taskmap.count;
uint32_t i;
for (i = 0; i < min3(bootinfo.taskmap.count, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
for (i = 0; i < bootinfo.taskmap.count; i++) {
init.tasks[i].addr = PA2KA(bootinfo.taskmap.tasks[i].addr);
init.tasks[i].size = bootinfo.taskmap.tasks[i].size;
strncpy(init.tasks[i].name, bootinfo.taskmap.tasks[i].name,
CONFIG_TASK_NAME_BUFLEN);
}
}
 
78,50 → 75,35
void arch_post_mm_init(void)
{
if (config.cpu_active == 1) {
 
#ifdef CONFIG_FB
/* Initialize framebuffer */
if (bootinfo.screen.addr) {
unsigned int visual;
switch (bootinfo.screen.bpp) {
case 8:
visual = VISUAL_INDIRECT_8;
break;
case 16:
visual = VISUAL_RGB_5_5_5;
break;
case 24:
visual = VISUAL_RGB_8_8_8;
break;
case 32:
visual = VISUAL_RGB_0_8_8_8;
break;
default:
panic("Unsupported bits per pixel.");
}
fb_properties_t prop = {
.addr = bootinfo.screen.addr,
.offset = 0,
.x = bootinfo.screen.width,
.y = bootinfo.screen.height,
.scan = bootinfo.screen.scanline,
.visual = visual,
};
fb_init(&prop);
unsigned int visual;
switch (bootinfo.screen.bpp) {
case 8:
visual = VISUAL_INDIRECT_8;
break;
case 16:
visual = VISUAL_RGB_5_5_5;
break;
case 24:
visual = VISUAL_RGB_8_8_8;
break;
case 32:
visual = VISUAL_RGB_0_8_8_8;
break;
default:
panic("Unsupported bits per pixel");
}
#endif
fb_init(bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height, bootinfo.screen.scanline, visual);
/* Initialize IRQ routing */
irq_init(IRQ_COUNT, IRQ_COUNT);
/* Initialize PIC */
pic_init(bootinfo.keyboard.addr, PAGE_SIZE);
if (bootinfo.macio.addr) {
/* Initialize PIC */
pic_init(bootinfo.macio.addr, PAGE_SIZE);
/* Initialize I/O controller */
cuda_init(bootinfo.macio.addr + 0x16000, 2 * PAGE_SIZE);
}
/* Initialize I/O controller */
cuda_init(device_assign_devno(), bootinfo.keyboard.addr + 0x16000, 2 * PAGE_SIZE);
/* Merge all zones to 1 big zone */
zone_merge_all();
146,13 → 128,11
 
void userspace(uspace_arg_t *kernel_uarg)
{
userspace_asm((uintptr_t) kernel_uarg->uspace_uarg,
(uintptr_t) kernel_uarg->uspace_stack +
THREAD_STACK_SIZE - SP_DELTA,
(uintptr_t) kernel_uarg->uspace_entry);
userspace_asm((uintptr_t) kernel_uarg->uspace_uarg, (uintptr_t) kernel_uarg->uspace_stack + THREAD_STACK_SIZE - SP_DELTA, (uintptr_t) kernel_uarg->uspace_entry);
/* Unreachable */
while (true);
for (;;)
;
}
 
/** Acquire console back for kernel
160,9 → 140,7
*/
void arch_grab_console(void)
{
#ifdef CONFIG_FB
fb_redraw();
#endif
cuda_grab();
}
 
/** Return console to userspace
170,21 → 148,8
*/
void arch_release_console(void)
{
cuda_release();
}
 
/** Construct function pointer
*
* @param fptr function pointer structure
* @param addr function address
* @param caller calling function address
*
* @return address of the function pointer
*
*/
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
return addr;
}
 
/** @}
*/
/branches/network/kernel/arch/ppc32/src/drivers/cuda.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc32
/** @addtogroup ppc32
* @{
*/
/** @file
33,6 → 33,7
*/
 
#include <arch/drivers/cuda.h>
#include <ipc/irq.h>
#include <arch/asm.h>
#include <console/console.h>
#include <console/chardev.h>
40,7 → 41,6
#include <sysinfo/sysinfo.h>
#include <interrupt.h>
#include <stdarg.h>
#include <ddi/device.h>
 
#define CUDA_IRQ 10
#define SPECIAL '?'
205,52 → 205,101
}
 
 
static indev_t kbrd;
static indev_operations_t ops = {
.poll = NULL
/* Called from getc(). */
static void cuda_resume(chardev_t *d)
{
}
 
 
/* Called from getc(). */
static void cuda_suspend(chardev_t *d)
{
}
 
 
static char key_read(chardev_t *d)
{
char ch;
ch = 0;
return ch;
}
 
 
static chardev_t kbrd;
static chardev_operations_t ops = {
.suspend = cuda_suspend,
.resume = cuda_resume,
.read = key_read
};
 
 
int cuda_get_scancode(void)
{
if (cuda) {
uint8_t kind;
uint8_t data[4];
receive_packet(&kind, 4, data);
if ((kind == PACKET_ADB) && (data[0] == 0x40) && (data[1] == 0x2c))
return data[2];
}
uint8_t kind;
uint8_t data[4];
receive_packet(&kind, 4, data);
if ((kind == PACKET_ADB) && (data[0] == 0x40) && (data[1] == 0x2c))
return data[2];
return -1;
}
 
static void cuda_irq_handler(irq_t *irq)
static void cuda_irq_handler(irq_t *irq, void *arg, ...)
{
int scan_code = cuda_get_scancode();
if (scan_code != -1) {
uint8_t scancode = (uint8_t) scan_code;
if ((scancode & 0x80) != 0x80)
indev_push_character(&kbrd, lchars[scancode & 0x7f]);
if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
ipc_irq_send_notif(irq);
else {
int scan_code = cuda_get_scancode();
if (scan_code != -1) {
uint8_t scancode = (uint8_t) scan_code;
if ((scancode & 0x80) != 0x80)
chardev_push_character(&kbrd, lchars[scancode & 0x7f]);
}
}
}
 
static irq_ownership_t cuda_claim(irq_t *irq)
static irq_ownership_t cuda_claim(void)
{
return IRQ_ACCEPT;
}
 
void cuda_init(uintptr_t base, size_t size)
 
/** Initialize keyboard and service interrupts using kernel routine */
void cuda_grab(void)
{
cuda = (uint8_t *) hw_map(base, size);
ipl_t ipl = interrupts_disable();
spinlock_lock(&cuda_irq.lock);
cuda_irq.notif_cfg.notify = false;
spinlock_unlock(&cuda_irq.lock);
interrupts_restore(ipl);
}
 
 
/** Resume the former interrupt vector */
void cuda_release(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&cuda_irq.lock);
if (cuda_irq.notif_cfg.answerbox)
cuda_irq.notif_cfg.notify = true;
spinlock_unlock(&cuda_irq.unlock);
interrupts_restore(ipl);
}
 
 
void cuda_init(devno_t devno, uintptr_t base, size_t size)
{
cuda = (uint8_t *) hw_map(base, size);
indev_initialize("cuda_kbd", &kbrd, &ops);
chardev_initialize("cuda_kbd", &kbrd, &ops);
stdin = &kbrd;
irq_initialize(&cuda_irq);
cuda_irq.devno = device_assign_devno();
cuda_irq.devno = devno;
cuda_irq.inr = CUDA_IRQ;
cuda_irq.claim = cuda_claim;
cuda_irq.handler = cuda_irq_handler;
257,8 → 306,9
irq_register(&cuda_irq);
pic_enable_interrupt(CUDA_IRQ);
 
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.devno", NULL, devno);
sysinfo_set_item_val("kbd.inr", NULL, CUDA_IRQ);
sysinfo_set_item_val("kbd.address.virtual", NULL, base);
}
295,9 → 345,7
}
 
void arch_reboot(void) {
if (cuda)
send_packet(PACKET_CUDA, 1, CUDA_RESET);
send_packet(PACKET_CUDA, 1, CUDA_RESET);
asm volatile (
"b 0\n"
);
/branches/network/kernel/arch/ppc32/src/drivers/pic.c
38,7 → 38,7
#include <byteorder.h>
#include <bitops.h>
 
static volatile uint32_t *pic = NULL;
static volatile uint32_t *pic;
 
void pic_init(uintptr_t base, size_t size)
{
47,11 → 47,10
 
void pic_enable_interrupt(int intnum)
{
if (pic) {
if (intnum < 32)
pic[PIC_MASK_LOW] = pic[PIC_MASK_LOW] | (1 << intnum);
else
pic[PIC_MASK_HIGH] = pic[PIC_MASK_HIGH] | (1 << (intnum - 32));
if (intnum < 32) {
pic[PIC_MASK_LOW] = pic[PIC_MASK_LOW] | (1 << intnum);
} else {
pic[PIC_MASK_HIGH] = pic[PIC_MASK_HIGH] | (1 << (intnum - 32));
}
}
58,39 → 57,34
 
void pic_disable_interrupt(int intnum)
{
if (pic) {
if (intnum < 32)
pic[PIC_MASK_LOW] = pic[PIC_MASK_LOW] & (~(1 << intnum));
else
pic[PIC_MASK_HIGH] = pic[PIC_MASK_HIGH] & (~(1 << (intnum - 32)));
if (intnum < 32) {
pic[PIC_MASK_LOW] = pic[PIC_MASK_LOW] & (~(1 << intnum));
} else {
pic[PIC_MASK_HIGH] = pic[PIC_MASK_HIGH] & (~(1 << (intnum - 32)));
}
}
 
void pic_ack_interrupt(int intnum)
{
if (pic) {
if (intnum < 32)
pic[PIC_ACK_LOW] = 1 << intnum;
else
pic[PIC_ACK_HIGH] = 1 << (intnum - 32);
}
if (intnum < 32)
pic[PIC_ACK_LOW] = 1 << intnum;
else
pic[PIC_ACK_HIGH] = 1 << (intnum - 32);
}
 
/** Return number of pending interrupt */
int pic_get_pending(void)
{
if (pic) {
int pending;
pending = pic[PIC_PENDING_LOW];
if (pending)
return fnzb32(pending);
pending = pic[PIC_PENDING_HIGH];
if (pending)
return fnzb32(pending) + 32;
}
int pending;
 
pending = pic[PIC_PENDING_LOW];
if (pending)
return fnzb32(pending);
pending = pic[PIC_PENDING_HIGH];
if (pending)
return fnzb32(pending) + 32;
return -1;
}
 
/branches/network/kernel/arch/ppc32/src/exception.S
60,7 → 60,7
2:
subi sp, sp, 164
subi sp, sp, 160
stw r0, 8(sp)
stw r2, 12(sp)
stw r3, 16(sp)
109,14 → 109,11
mfxer r12
stw r12, 148(sp)
mfdar r12
mfsprg1 r12
stw r12, 152(sp)
mfsprg1 r12
mfsprg2 r12
stw r12, 156(sp)
mfsprg2 r12
stw r12, 160(sp)
.endm
 
.org 0x100
140,7 → 137,16
exc_data_storage:
CONTEXT_STORE
b data_storage
li r3, 2
mr r4, sp
addi r4, r4, 8
bl pht_real_refill
cmpwi r3, 0
bne iret_real
li r3, 2
b jump_to_kernel
 
.org 0x400
.global exc_instruction_storage
147,8 → 153,17
exc_instruction_storage:
CONTEXT_STORE
b instruction_storage
li r3, 3
mr r4, sp
addi r4, r4, 8
bl pht_real_refill
cmpwi r3, 0
bne iret_real
 
li r3, 3
b jump_to_kernel
 
.org 0x500
.global exc_external
exc_external:
208,7 → 223,7
.org 0xc00
.global exc_syscall
exc_syscall:
CONTEXT_STORE
CONTEXT_STORE
b jump_to_kernel_syscall
 
220,63 → 235,7
li r3, 12
b jump_to_kernel
 
.org 0x1000
.global exc_itlb_miss
exc_itlb_miss:
CONTEXT_STORE
b tlb_miss
 
.org 0x1100
.global exc_dtlb_miss_load
exc_dtlb_miss_load:
CONTEXT_STORE
b tlb_miss
 
.org 0x1200
.global exc_dtlb_miss_store
exc_dtlb_miss_store:
CONTEXT_STORE
b tlb_miss
 
.org 0x4000
data_storage:
li r3, 2
mr r4, sp
addi r4, r4, 8
bl pht_refill_real
cmpwi r3, 0
bne iret_real
li r3, 2
b jump_to_kernel
 
instruction_storage:
li r3, 3
mr r4, sp
addi r4, r4, 8
bl pht_refill_real
cmpwi r3, 0
bne iret_real
li r3, 3
b jump_to_kernel
 
tlb_miss:
li r3, 16
mfspr r4, tlbmiss
mfspr r5, ptehi
mfspr r6, ptelo
mr r7, sp
addi r7, r7, 20
bl tlb_refill_real
b iret_real
 
jump_to_kernel:
lis r12, iret@ha
addi r12, r12, iret@l
313,6 → 272,7
rfi
 
iret_real:
lwz r0, 8(sp)
lwz r2, 12(sp)
lwz r3, 16(sp)
362,7 → 322,7
lwz r12, 148(sp)
mtxer r12
lwz r12, 156(sp)
lwz sp, 160(sp)
lwz r12, 152(sp)
lwz sp, 156(sp)
rfi
/branches/network/kernel/arch/ppc32/src/boot/boot.S
33,7 → 33,7
 
.global kernel_image_start
kernel_image_start:
 
# load temporal kernel stack
lis sp, kernel_stack@ha
52,7 → 52,7
beq bootinfo_end
addis r3, r3, 0x8000
 
lis r31, bootinfo@ha
addi r31, r31, bootinfo@l # r31 = bootinfo
/branches/network/kernel/arch/ppc32/_link.ld.in
1,11 → 1,11
/** PPC32 linker script
*
* umapped section:
* kernel text
* kernel data
* kernel text
* kernel data
* mapped section:
* kernel text
* kernel data
* kernel text
* kernel data
*
*/
 
27,7 → 27,7
unmapped_kdata_start = .;
}
.mapped PA2KA(BOOT_OFFSET): AT (BOOT_OFFSET) {
.mapped PA2KA(BOOT_OFFSET): AT (BOOT_OFFSET) {
ktext_start = .;
*(K_TEXT_START);
*(.text);
37,22 → 37,22
*(K_DATA_START);
*(.rodata);
*(.rodata.*);
*(.data); /* initialized data */
*(.data); /* initialized data */
*(.sdata);
*(.sdata2);
*(.sbss);
hardcoded_ktext_size = .;
LONG(ktext_end - ktext_start);
LONG(ktext_end - ktext_start);
hardcoded_kdata_size = .;
LONG(kdata_end - kdata_start);
hardcoded_load_address = .;
LONG(PA2KA(BOOT_OFFSET));
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
 
symbol_table = .;
*(symtab.*); /* Symbol table, must be LAST symbol!*/
*(symtab.*); /* Symbol table, must be LAST symbol!*/
 
kdata_end = .;
}
}
/branches/network/kernel/arch/ia32xen/Makefile.inc
0,0 → 1,144
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
BFD_NAME = elf32-i386
BFD_ARCH = i386
BFD = elf32-i386
TARGET = i686-pc-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/i686
 
DEFS += -DMACHINE=$(MACHINE) -D__32_BITS__
 
CMN1 = -m32
GCC_CFLAGS += $(CMN1)
ICC_CFLAGS += $(CMN1)
SUNCC_CFLAGS += $(CMN1)
 
## Accepted CPUs
#
 
ifeq ($(MACHINE),athlon-xp)
CMN2 = -march=athlon-xp -mmmx -msse -m3dnow
GCC_CFLAGS += $(CMN2)
ICC_CFLAGS += $(CMN2)
SUNCC_CFLAGS += -xarch=ssea
DEFS += -DCONFIG_FENCES_P3
CONFIG_SMP = n
CONFIG_HT = n
endif
ifeq ($(MACHINE),athlon-mp)
CMN2 = -march=athlon-mp -mmmx -msse -m3dnow
GCC_CFLAGS += $(CMN2)
ICC_CFLAGS += $(CMN2)
SUNCC_CFLAGS += -xarch=ssea
DEFS += -DCONFIG_FENCES_P3
CONFIG_HT = n
endif
ifeq ($(MACHINE),pentium3)
CMN2 = -march=pentium3 -mmmx -msse
GCC_CFLAGS += $(CMN2)
ICC_CFLAGS += $(CMN2)
SUNCC_CFLAGS += -xarch=sse
DEFS += -DCONFIG_FENCES_P3
CONFIG_HT = n
endif
ifeq ($(MACHINE),core)
CMN2 = -march=prescott -mfpmath=sse -mmmx -msse -msse2 -msse3
GCC_CFLAGS += $(CMN2)
ICC_CFLAGS += $(CMN2)
SUNCC_CFLAGS += -xarch=sse3
DEFS += -DCONFIG_FENCES_P4
endif
ifeq ($(MACHINE),pentium4)
GCC_CFLAGS += -march=pentium4 -mfpmath=sse -mmmx -msse -msse2
ICC_CFLAGS += -march=pentium4
SUNCC_CFLAGS += -xarch=sse2
DEFS += -DCONFIG_FENCES_P4
endif
 
## Own configuration directives
#
 
CONFIG_ACPI = y
 
## Compile with hierarchical page tables support.
#
 
CONFIG_PAGE_PT = y
DEFS += -DCONFIG_PAGE_PT
 
## Accepted configuration directives
#
 
ifeq ($(CONFIG_SMP),y)
DEFS += -DCONFIG_SMP
endif
ifeq ($(CONFIG_HT),y)
DEFS += -DCONFIG_HT
endif
 
## Compile with support for software integer division.
#
 
CONFIG_SOFTINT = y
 
ARCH_SOURCES = \
arch/$(ARCH)/src/context.S \
arch/$(ARCH)/src/debug/panic.s \
arch/$(ARCH)/src/delay.s \
arch/$(ARCH)/src/asm.S \
arch/$(ARCH)/src/proc/scheduler.c \
arch/$(ARCH)/src/proc/task.c \
arch/$(ARCH)/src/proc/thread.c \
arch/$(ARCH)/src/bios/bios.c \
arch/$(ARCH)/src/smp/apic.c \
arch/$(ARCH)/src/smp/mps.c \
arch/$(ARCH)/src/smp/smp.c \
arch/$(ARCH)/src/atomic.S \
arch/$(ARCH)/src/smp/ipi.c \
arch/$(ARCH)/src/ia32xen.c \
arch/$(ARCH)/src/interrupt.c \
arch/$(ARCH)/src/pm.c \
arch/$(ARCH)/src/userspace.c \
arch/$(ARCH)/src/cpu/cpu.c \
arch/$(ARCH)/src/mm/as.c \
arch/$(ARCH)/src/mm/frame.c \
arch/$(ARCH)/src/mm/page.c \
arch/$(ARCH)/src/mm/tlb.c \
arch/$(ARCH)/src/ddi/ddi.c \
arch/$(ARCH)/src/drivers/xconsole.c \
arch/$(ARCH)/src/boot/boot.S \
arch/$(ARCH)/src/fpu_context.c \
arch/$(ARCH)/src/debugger.c
/branches/network/kernel/arch/ia32xen/src/asm.S
0,0 → 1,124
#
# Copyright (c) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
## very low and hardware-level functions
 
# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
# and 1 means interrupt with error word
#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
 
.text
 
.global xen_callback
.global xen_failsafe_callback
.global enable_l_apic_in_msr
.global memcpy
.global memcpy_from_uspace
.global memcpy_from_uspace_failover_address
.global memcpy_to_uspace
.global memcpy_to_uspace_failover_address
 
 
xen_callback:
iret
 
xen_failsafe_callback:
iret
 
 
#define MEMCPY_DST 4
#define MEMCPY_SRC 8
#define MEMCPY_SIZE 12
 
/** Copy memory to/from userspace.
*
* This is almost conventional memcpy().
* The difference is that there is a failover part
* to where control is returned from a page fault
* if the page fault occurs during copy_from_uspace()
* or copy_to_uspace().
*
* @param MEMCPY_DST(%esp) Destination address.
* @param MEMCPY_SRC(%esp) Source address.
* @param MEMCPY_SIZE(%esp) Size.
*
* @return MEMCPY_DST(%esp) on success and 0 on failure.
*/
memcpy:
memcpy_from_uspace:
memcpy_to_uspace:
movl %edi, %edx /* save %edi */
movl %esi, %eax /* save %esi */
movl MEMCPY_SIZE(%esp), %ecx
shrl $2, %ecx /* size / 4 */
movl MEMCPY_DST(%esp), %edi
movl MEMCPY_SRC(%esp), %esi
rep movsl /* copy as much as possible word by word */
 
movl MEMCPY_SIZE(%esp), %ecx
andl $3, %ecx /* size % 4 */
jz 0f
rep movsb /* copy the rest byte by byte */
 
0:
movl %edx, %edi
movl %eax, %esi
movl MEMCPY_DST(%esp), %eax /* MEMCPY_DST(%esp), success */
ret
/*
* We got here from as_page_fault() after the memory operations
* above had caused a page fault.
*/
memcpy_from_uspace_failover_address:
memcpy_to_uspace_failover_address:
movl %edx, %edi
movl %eax, %esi
xorl %eax, %eax /* return 0, failure */
ret
 
 
## Enable local APIC
#
# Enable local APIC in MSR.
#
enable_l_apic_in_msr:
push %eax
 
movl $0x1b, %ecx
rdmsr
orl $(1<<11),%eax
orl $(0xfee00000),%eax
wrmsr
 
pop %eax
ret
/branches/network/kernel/arch/ia32xen/src/userspace.c
0,0 → 1,93
/*
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen
* @{
*/
/** @file
*/
 
#include <userspace.h>
#include <arch/pm.h>
#include <arch/types.h>
#include <arch.h>
#include <proc/uarg.h>
#include <mm/as.h>
 
 
/** Enter userspace
*
* Change CPU protection level to 3, enter userspace.
*
*/
void userspace(uspace_arg_t *kernel_uarg)
{
uint32_t ipl = interrupts_disable();
 
asm volatile (
/*
* Clear nested task flag.
*/
"pushfl\n"
"pop %%eax\n"
"and $0xffffbfff, %%eax\n"
"push %%eax\n"
"popfl\n"
 
/* Set up GS register (TLS) */
"movl %6, %%gs\n"
 
"pushl %0\n"
"pushl %1\n"
"pushl %2\n"
"pushl %3\n"
"pushl %4\n"
"movl %5, %%eax\n"
 
/* %ebx is defined to hold pcb_ptr - set it to 0 */
"xorl %%ebx, %%ebx\n"
 
"iret\n"
:
: "i" (selector(UDATA_DES) | PL_USER),
"r" (kernel_uarg->uspace_stack + THREAD_STACK_SIZE),
"r" (ipl),
"i" (selector(UTEXT_DES) | PL_USER),
"r" (kernel_uarg->uspace_entry),
"r" (kernel_uarg->uspace_uarg),
"r" (selector(TLS_DES))
: "eax"
);
/* Unreachable */
for(;;)
;
}
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/ia32xen.c
0,0 → 1,218
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen
* @{
*/
/** @file
*/
 
#include <arch.h>
#include <main/main.h>
 
#include <arch/types.h>
#include <align.h>
 
#include <arch/pm.h>
 
#include <arch/drivers/xconsole.h>
#include <arch/mm/page.h>
 
#include <arch/context.h>
 
#include <config.h>
 
#include <arch/interrupt.h>
#include <arch/asm.h>
#include <genarch/acpi/acpi.h>
 
#include <arch/bios/bios.h>
 
#include <interrupt.h>
#include <arch/debugger.h>
#include <proc/thread.h>
#include <syscall/syscall.h>
#include <console/console.h>
#include <ddi/irq.h>
 
start_info_t start_info;
memzone_t meminfo;
 
extern void xen_callback(void);
extern void xen_failsafe_callback(void);
 
void arch_pre_main(void)
{
pte_t pte;
memsetb(&pte, sizeof(pte), 0);
pte.present = 1;
pte.writeable = 1;
pte.frame_address = ADDR2PFN((uintptr_t) start_info.shared_info);
ASSERT(xen_update_va_mapping(&shared_info, pte, UVMF_INVLPG) == 0);
if (!(start_info.flags & SIF_INITDOMAIN)) {
/* Map console frame */
pte.present = 1;
pte.writeable = 1;
pte.frame_address = start_info.console.domU.mfn;
ASSERT(xen_update_va_mapping(&console_page, pte, UVMF_INVLPG) == 0);
} else
start_info.console.domU.evtchn = 0;
ASSERT(xen_set_callbacks(XEN_CS, xen_callback, XEN_CS, xen_failsafe_callback) == 0);
/* Create identity mapping */
meminfo.start = ADDR2PFN(ALIGN_UP(KA2PA(start_info.ptl0), PAGE_SIZE)) + start_info.pt_frames;
meminfo.size = start_info.frames - meminfo.start;
meminfo.reserved = 0;
 
uintptr_t pa;
index_t last_ptl0 = 0;
for (pa = PFN2ADDR(meminfo.start); pa < PFN2ADDR(meminfo.start + meminfo.size); pa += FRAME_SIZE) {
uintptr_t va = PA2KA(pa);
if ((PTL0_INDEX(va) != last_ptl0) && (GET_PTL1_FLAGS(start_info.ptl0, PTL0_INDEX(va)) & PAGE_NOT_PRESENT)) {
/* New page directory entry needed */
uintptr_t tpa = PFN2ADDR(meminfo.start + meminfo.reserved);
uintptr_t tva = PA2KA(tpa);
memsetb((void *) tva, PAGE_SIZE, 0);
pte_t *tptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(tva)));
SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), 0);
SET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va), tpa);
SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), tpa);
last_ptl0 = PTL0_INDEX(va);
meminfo.reserved++;
}
pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va)));
SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(va), pa);
SET_FRAME_FLAGS(ptl3, PTL3_INDEX(va), PAGE_PRESENT | PAGE_WRITE);
}
/* Put initial stack safely in the mapped area */
stack_safe = PA2KA(PFN2ADDR(meminfo.start + meminfo.reserved));
}
 
void arch_pre_mm_init(void)
{
pm_init();
 
if (config.cpu_active == 1) {
interrupt_init();
// bios_init();
}
}
 
void arch_post_mm_init(void)
{
if (config.cpu_active == 1) {
/* Initialize IRQ routing */
irq_init(IRQ_COUNT, IRQ_COUNT);
/* Video */
xen_console_init();
/* Enable debugger */
debugger_init();
/* Merge all memory zones to 1 big zone */
zone_merge_all();
}
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
if (config.cpu_active == 1) {
#ifdef CONFIG_SMP
acpi_init();
#endif /* CONFIG_SMP */
}
}
 
void arch_post_smp_init(void)
{
}
 
void calibrate_delay_loop(void)
{
// i8254_calibrate_delay_loop();
if (config.cpu_active == 1) {
/*
* This has to be done only on UP.
* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
*/
// i8254_normal_operation();
}
}
 
/** Set thread-local-storage pointer
*
* TLS pointer is set in GS register. That means, the GS contains
* selector, and the descriptor->base is the correct address.
*/
unative_t sys_tls_set(unative_t addr)
{
THREAD->arch.tls = addr;
set_tls_desc(addr);
 
return 0;
}
 
/** Acquire console back for kernel
*
*/
void arch_grab_console(void)
{
}
 
/** Return console to userspace
*
*/
void arch_release_console(void)
{
}
 
void arch_reboot(void)
{
// TODO
while (1);
}
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/pm.c
0,0 → 1,206
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen
* @{
*/
/** @file
*/
 
#include <arch/pm.h>
#include <config.h>
#include <arch/types.h>
#include <arch/interrupt.h>
#include <arch/asm.h>
#include <arch/context.h>
#include <panic.h>
#include <arch/mm/page.h>
#include <mm/slab.h>
#include <memstr.h>
#include <interrupt.h>
 
/*
* Early ia32xen configuration functions and data structures.
*/
 
/*
* We have no use for segmentation so we set up flat mode. In this
* mode, we use, for each privilege level, two segments spanning the
* whole memory. One is for code and one is for data.
*
* One is for GS register which holds pointer to the TLS thread
* structure in it's base.
*/
descriptor_t gdt[GDT_ITEMS] = {
/* NULL descriptor */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
/* KTEXT descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
/* KDATA descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
/* UTEXT descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
/* UDATA descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
/* TSS descriptor - set up will be completed later */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
/* TLS descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
};
 
static trap_info_t traps[IDT_ITEMS + 1];
 
static tss_t tss;
 
tss_t *tss_p = NULL;
 
/* gdtr is changed by kmp before next CPU is initialized */
ptr_16_32_t bootstrap_gdtr = { .limit = sizeof(gdt), .base = KA2PA((uintptr_t) gdt) };
ptr_16_32_t gdtr = { .limit = sizeof(gdt), .base = (uintptr_t) gdt };
 
void gdt_setbase(descriptor_t *d, uintptr_t base)
{
d->base_0_15 = base & 0xffff;
d->base_16_23 = ((base) >> 16) & 0xff;
d->base_24_31 = ((base) >> 24) & 0xff;
}
 
void gdt_setlimit(descriptor_t *d, uint32_t limit)
{
d->limit_0_15 = limit & 0xffff;
d->limit_16_19 = (limit >> 16) & 0xf;
}
 
void tss_initialize(tss_t *t)
{
memsetb(t, sizeof(struct tss), 0);
}
 
static void trap(void)
{
}
 
void traps_init(void)
{
index_t i;
for (i = 0; i < IDT_ITEMS; i++) {
traps[i].vector = i;
if (i == VECTOR_SYSCALL)
traps[i].flags = 3;
else
traps[i].flags = 0;
traps[i].cs = XEN_CS;
traps[i].address = trap;
}
traps[IDT_ITEMS].vector = 0;
traps[IDT_ITEMS].flags = 0;
traps[IDT_ITEMS].cs = 0;
traps[IDT_ITEMS].address = NULL;
}
 
 
/* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */
static void clean_IOPL_NT_flags(void)
{
// asm volatile (
// "pushfl\n"
// "pop %%eax\n"
// "and $0xffff8fff, %%eax\n"
// "push %%eax\n"
// "popfl\n"
// : : : "eax"
// );
}
 
/* Clean AM(18) flag in CR0 register */
static void clean_AM_flag(void)
{
// asm volatile (
// "mov %%cr0, %%eax\n"
// "and $0xfffbffff, %%eax\n"
// "mov %%eax, %%cr0\n"
// : : : "eax"
// );
}
 
void pm_init(void)
{
descriptor_t *gdt_p = (descriptor_t *) gdtr.base;
 
// gdtr_load(&gdtr);
if (config.cpu_active == 1) {
traps_init();
xen_set_trap_table(traps);
/*
* NOTE: bootstrap CPU has statically allocated TSS, because
* the heap hasn't been initialized so far.
*/
tss_p = &tss;
} else {
tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
if (!tss_p)
panic("could not allocate TSS\n");
}
 
// tss_initialize(tss_p);
gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
gdt_p[TSS_DES].special = 1;
gdt_p[TSS_DES].granularity = 0;
gdt_setbase(&gdt_p[TSS_DES], (uintptr_t) tss_p);
gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1);
 
/*
* As of this moment, the current CPU has its own GDT pointing
* to its own TSS. We just need to load the TR register.
*/
// tr_load(selector(TSS_DES));
clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels and clear NT flag. */
clean_AM_flag(); /* Disable alignment check */
}
 
void set_tls_desc(uintptr_t tls)
{
ptr_16_32_t cpugdtr;
descriptor_t *gdt_p;
 
gdtr_store(&cpugdtr);
gdt_p = (descriptor_t *) cpugdtr.base;
gdt_setbase(&gdt_p[TLS_DES], tls);
/* Reload gdt register to update GS in CPU */
gdtr_load(&cpugdtr);
}
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/smp/smp.c
0,0 → 1,174
/*
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen
* @{
*/
/** @file
*/
 
#include <smp/smp.h>
#include <arch/smp/smp.h>
#include <arch/smp/mps.h>
#include <arch/smp/ap.h>
#include <genarch/acpi/acpi.h>
#include <genarch/acpi/madt.h>
#include <config.h>
#include <synch/waitq.h>
#include <synch/synch.h>
#include <arch/pm.h>
#include <func.h>
#include <panic.h>
#include <debug.h>
#include <arch/asm.h>
#include <mm/frame.h>
#include <mm/page.h>
#include <mm/slab.h>
#include <mm/as.h>
#include <print.h>
#include <memstr.h>
 
#ifdef CONFIG_SMP
 
static struct smp_config_operations *ops = NULL;
 
void smp_init(void)
{
uintptr_t l_apic_address, io_apic_address;
 
if (acpi_madt) {
acpi_madt_parse();
ops = &madt_config_operations;
}
if (config.cpu_count == 1) {
mps_init();
ops = &mps_config_operations;
}
 
l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA);
if (!l_apic_address)
panic("cannot allocate address for l_apic\n");
 
io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA);
if (!io_apic_address)
panic("cannot allocate address for io_apic\n");
 
if (config.cpu_count > 1) {
page_mapping_insert(AS_KERNEL, l_apic_address, (uintptr_t) l_apic,
PAGE_NOT_CACHEABLE | PAGE_WRITE);
page_mapping_insert(AS_KERNEL, io_apic_address, (uintptr_t) io_apic,
PAGE_NOT_CACHEABLE | PAGE_WRITE);
l_apic = (uint32_t *) l_apic_address;
io_apic = (uint32_t *) io_apic_address;
}
}
 
/*
* Kernel thread for bringing up application processors. It becomes clear
* that we need an arrangement like this (AP's being initialized by a kernel
* thread), for a thread has its dedicated stack. (The stack used during the
* BSP initialization (prior the very first call to scheduler()) will be used
* as an initialization stack for each AP.)
*/
void kmp(void *arg)
{
unsigned int i;
ASSERT(ops != NULL);
 
waitq_initialize(&ap_completion_wq);
 
/*
* We need to access data in frame 0.
* We boldly make use of kernel address space mapping.
*/
 
/*
* Save 0xa to address 0xf of the CMOS RAM.
* BIOS will not do the POST after the INIT signal.
*/
outb(0x70,0xf);
outb(0x71,0xa);
 
// pic_disable_irqs(0xffff);
apic_init();
 
for (i = 0; i < ops->cpu_count(); i++) {
struct descriptor *gdt_new;
/*
* Skip processors marked unusable.
*/
if (!ops->cpu_enabled(i))
continue;
 
/*
* The bootstrap processor is already up.
*/
if (ops->cpu_bootstrap(i))
continue;
 
if (ops->cpu_apic_id(i) == l_apic_id()) {
printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i);
continue;
}
/*
* Prepare new GDT for CPU in question.
*/
if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS * sizeof(struct descriptor), FRAME_ATOMIC)))
panic("couldn't allocate memory for GDT\n");
 
memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor));
memsetb(&gdt_new[TSS_DES], sizeof(struct descriptor), 0);
gdtr.base = (uintptr_t) gdt_new;
 
if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
/*
* There may be just one AP being initialized at
* the time. After it comes completely up, it is
* supposed to wake us up.
*/
if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT)
printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i));
} else
printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i));
}
}
 
int smp_irq_to_pin(unsigned int irq)
{
ASSERT(ops != NULL);
return ops->irq_to_pin(irq);
}
 
#endif /* CONFIG_SMP */
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/smp/mps.c
0,0 → 1,433
/*
* Copyright (c) 2001-2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen
* @{
*/
/** @file
*/
 
#ifdef CONFIG_SMP
 
#include <config.h>
#include <print.h>
#include <debug.h>
#include <arch/smp/mps.h>
#include <arch/smp/apic.h>
#include <arch/smp/smp.h>
#include <func.h>
#include <arch/types.h>
#include <cpu.h>
#include <arch/asm.h>
#include <arch/bios/bios.h>
#include <mm/frame.h>
 
/*
* MultiProcessor Specification detection code.
*/
 
#define FS_SIGNATURE 0x5f504d5f
#define CT_SIGNATURE 0x504d4350
 
int mps_fs_check(uint8_t *base);
int mps_ct_check(void);
 
int configure_via_ct(void);
int configure_via_default(uint8_t n);
 
int ct_processor_entry(struct __processor_entry *pr);
void ct_bus_entry(struct __bus_entry *bus);
void ct_io_apic_entry(struct __io_apic_entry *ioa);
void ct_io_intr_entry(struct __io_intr_entry *iointr);
void ct_l_intr_entry(struct __l_intr_entry *lintr);
 
void ct_extended_entries(void);
 
static struct mps_fs *fs;
static struct mps_ct *ct;
 
struct __processor_entry *processor_entries = NULL;
struct __bus_entry *bus_entries = NULL;
struct __io_apic_entry *io_apic_entries = NULL;
struct __io_intr_entry *io_intr_entries = NULL;
struct __l_intr_entry *l_intr_entries = NULL;
 
unsigned int processor_entry_cnt = 0;
unsigned int bus_entry_cnt = 0;
unsigned int io_apic_entry_cnt = 0;
unsigned int io_intr_entry_cnt = 0;
unsigned int l_intr_entry_cnt = 0;
 
waitq_t ap_completion_wq;
 
/*
* Implementation of IA-32 SMP configuration interface.
*/
static count_t get_cpu_count(void);
static bool is_cpu_enabled(index_t i);
static bool is_bsp(index_t i);
static uint8_t get_cpu_apic_id(index_t i);
static int mps_irq_to_pin(unsigned int irq);
 
struct smp_config_operations mps_config_operations = {
.cpu_count = get_cpu_count,
.cpu_enabled = is_cpu_enabled,
.cpu_bootstrap = is_bsp,
.cpu_apic_id = get_cpu_apic_id,
.irq_to_pin = mps_irq_to_pin
};
 
count_t get_cpu_count(void)
{
return processor_entry_cnt;
}
 
bool is_cpu_enabled(index_t i)
{
ASSERT(i < processor_entry_cnt);
return processor_entries[i].cpu_flags & 0x1;
}
 
bool is_bsp(index_t i)
{
ASSERT(i < processor_entry_cnt);
return processor_entries[i].cpu_flags & 0x2;
}
 
uint8_t get_cpu_apic_id(index_t i)
{
ASSERT(i < processor_entry_cnt);
return processor_entries[i].l_apic_id;
}
 
 
/*
* Used to check the integrity of the MP Floating Structure.
*/
int mps_fs_check(uint8_t *base)
{
int i;
uint8_t sum;
for (i = 0, sum = 0; i < 16; i++)
sum += base[i];
return !sum;
}
 
/*
* Used to check the integrity of the MP Configuration Table.
*/
int mps_ct_check(void)
{
uint8_t *base = (uint8_t *) ct;
uint8_t *ext = base + ct->base_table_length;
uint8_t sum;
int i;
/* count the checksum for the base table */
for (i=0,sum=0; i < ct->base_table_length; i++)
sum += base[i];
if (sum)
return 0;
/* count the checksum for the extended table */
for (i=0,sum=0; i < ct->ext_table_length; i++)
sum += ext[i];
return sum == ct->ext_table_checksum;
}
 
void mps_init(void)
{
uint8_t *addr[2] = { NULL, (uint8_t *) PA2KA(0xf0000) };
int i, j, length[2] = { 1024, 64*1024 };
 
/*
* Find MP Floating Pointer Structure
* 1a. search first 1K of EBDA
* 1b. if EBDA is undefined, search last 1K of base memory
* 2. search 64K starting at 0xf0000
*/
 
addr[0] = (uint8_t *) PA2KA(ebda ? ebda : 639 * 1024);
for (i = 0; i < 2; i++) {
for (j = 0; j < length[i]; j += 16) {
if (*((uint32_t *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
fs = (struct mps_fs *) &addr[i][j];
goto fs_found;
}
}
}
 
return;
fs_found:
printf("%p: MPS Floating Pointer Structure\n", fs);
 
if (fs->config_type == 0 && fs->configuration_table) {
if (fs->mpfib2 >> 7) {
printf("%s: PIC mode not supported\n", __func__);
return;
}
 
ct = (struct mps_ct *)PA2KA((uintptr_t)fs->configuration_table);
config.cpu_count = configure_via_ct();
}
else
config.cpu_count = configure_via_default(fs->config_type);
 
return;
}
 
int configure_via_ct(void)
{
uint8_t *cur;
int i, cnt;
if (ct->signature != CT_SIGNATURE) {
printf("%s: bad ct->signature\n", __func__);
return 1;
}
if (!mps_ct_check()) {
printf("%s: bad ct checksum\n", __func__);
return 1;
}
if (ct->oem_table) {
printf("%s: ct->oem_table not supported\n", __func__);
return 1;
}
l_apic = (uint32_t *)(uintptr_t)ct->l_apic;
 
cnt = 0;
cur = &ct->base_table[0];
for (i=0; i < ct->entry_count; i++) {
switch (*cur) {
/* Processor entry */
case 0:
processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
processor_entry_cnt++;
cnt += ct_processor_entry((struct __processor_entry *) cur);
cur += 20;
break;
 
/* Bus entry */
case 1:
bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
bus_entry_cnt++;
ct_bus_entry((struct __bus_entry *) cur);
cur += 8;
break;
/* I/O Apic */
case 2:
io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
io_apic_entry_cnt++;
ct_io_apic_entry((struct __io_apic_entry *) cur);
cur += 8;
break;
/* I/O Interrupt Assignment */
case 3:
io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
io_intr_entry_cnt++;
ct_io_intr_entry((struct __io_intr_entry *) cur);
cur += 8;
break;
 
/* Local Interrupt Assignment */
case 4:
l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
l_intr_entry_cnt++;
ct_l_intr_entry((struct __l_intr_entry *) cur);
cur += 8;
break;
 
default:
/*
* Something is wrong. Fallback to UP mode.
*/
printf("%s: ct badness\n", __func__);
return 1;
}
}
/*
* Process extended entries.
*/
ct_extended_entries();
return cnt;
}
 
int configure_via_default(uint8_t n)
{
/*
* Not yet implemented.
*/
printf("%s: not supported\n", __func__);
return 1;
}
 
 
int ct_processor_entry(struct __processor_entry *pr)
{
/*
* Ignore processors which are not marked enabled.
*/
if ((pr->cpu_flags & (1<<0)) == 0)
return 0;
apic_id_mask |= (1<<pr->l_apic_id);
return 1;
}
 
void ct_bus_entry(struct __bus_entry *bus)
{
#ifdef MPSCT_VERBOSE
char buf[7];
memcpy((void *) buf, (void *) bus->bus_type, 6);
buf[6] = 0;
printf("bus%d: %s\n", bus->bus_id, buf);
#endif
}
 
void ct_io_apic_entry(struct __io_apic_entry *ioa)
{
static int io_apic_count = 0;
 
/* this ioapic is marked unusable */
if ((ioa->io_apic_flags & 1) == 0)
return;
if (io_apic_count++ > 0) {
/*
* Multiple IO APIC's are currently not supported.
*/
return;
}
io_apic = (uint32_t *)(uintptr_t)ioa->io_apic;
}
 
//#define MPSCT_VERBOSE
void ct_io_intr_entry(struct __io_intr_entry *iointr)
{
#ifdef MPSCT_VERBOSE
switch (iointr->intr_type) {
case 0: printf("INT"); break;
case 1: printf("NMI"); break;
case 2: printf("SMI"); break;
case 3: printf("ExtINT"); break;
}
putchar(',');
switch (iointr->poel&3) {
case 0: printf("bus-like"); break;
case 1: printf("active high"); break;
case 2: printf("reserved"); break;
case 3: printf("active low"); break;
}
putchar(',');
switch ((iointr->poel>>2)&3) {
case 0: printf("bus-like"); break;
case 1: printf("edge-triggered"); break;
case 2: printf("reserved"); break;
case 3: printf("level-triggered"); break;
}
putchar(',');
printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
putchar(',');
printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
putchar('\n');
#endif
}
 
void ct_l_intr_entry(struct __l_intr_entry *lintr)
{
#ifdef MPSCT_VERBOSE
switch (lintr->intr_type) {
case 0: printf("INT"); break;
case 1: printf("NMI"); break;
case 2: printf("SMI"); break;
case 3: printf("ExtINT"); break;
}
putchar(',');
switch (lintr->poel&3) {
case 0: printf("bus-like"); break;
case 1: printf("active high"); break;
case 2: printf("reserved"); break;
case 3: printf("active low"); break;
}
putchar(',');
switch ((lintr->poel>>2)&3) {
case 0: printf("bus-like"); break;
case 1: printf("edge-triggered"); break;
case 2: printf("reserved"); break;
case 3: printf("level-triggered"); break;
}
putchar(',');
printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
putchar(',');
printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
putchar('\n');
#endif
}
 
void ct_extended_entries(void)
{
uint8_t *ext = (uint8_t *) ct + ct->base_table_length;
uint8_t *cur;
 
for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
switch (cur[CT_EXT_ENTRY_TYPE]) {
default:
printf("%p: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
break;
}
}
}
 
int mps_irq_to_pin(unsigned int irq)
{
unsigned int i;
for (i = 0; i < io_intr_entry_cnt; i++) {
if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
return io_intr_entries[i].dst_io_apic_pin;
}
return -1;
}
 
#endif /* CONFIG_SMP */
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/smp/apic.c
0,0 → 1,581
/*
* Copyright (c) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen
* @{
*/
/** @file
*/
 
#include <arch/types.h>
#include <arch/smp/apic.h>
#include <arch/smp/ap.h>
#include <arch/smp/mps.h>
#include <mm/page.h>
#include <time/delay.h>
#include <interrupt.h>
#include <arch/interrupt.h>
#include <print.h>
#include <arch/asm.h>
#include <arch.h>
 
#ifdef CONFIG_SMP
 
/*
* Advanced Programmable Interrupt Controller for SMP systems.
* Tested on:
* Bochs 2.0.2 - Bochs 2.2.6 with 2-8 CPUs
* Simics 2.0.28 - Simics 2.2.19 2-15 CPUs
* VMware Workstation 5.5 with 2 CPUs
* QEMU 0.8.0 with 2-15 CPUs
* ASUS P/I-P65UP5 + ASUS C-P55T2D REV. 1.41 with 2x 200Mhz Pentium CPUs
* ASUS PCH-DL with 2x 3000Mhz Pentium 4 Xeon (HT) CPUs
* MSI K7D Master-L with 2x 2100MHz Athlon MP CPUs
*/
 
/*
* These variables either stay configured as initilalized, or are changed by
* the MP configuration code.
*
* Pay special attention to the volatile keyword. Without it, gcc -O2 would
* optimize the code too much and accesses to l_apic and io_apic, that must
* always be 32-bit, would use byte oriented instructions.
*/
volatile uint32_t *l_apic = (uint32_t *) 0xfee00000;
volatile uint32_t *io_apic = (uint32_t *) 0xfec00000;
 
uint32_t apic_id_mask = 0;
 
static int apic_poll_errors(void);
 
#ifdef LAPIC_VERBOSE
static char *delmod_str[] = {
"Fixed",
"Lowest Priority",
"SMI",
"Reserved",
"NMI",
"INIT",
"STARTUP",
"ExtInt"
};
 
static char *destmod_str[] = {
"Physical",
"Logical"
};
 
static char *trigmod_str[] = {
"Edge",
"Level"
};
 
static char *mask_str[] = {
"Unmasked",
"Masked"
};
 
static char *delivs_str[] = {
"Idle",
"Send Pending"
};
 
static char *tm_mode_str[] = {
"One-shot",
"Periodic"
};
 
static char *intpol_str[] = {
"Polarity High",
"Polarity Low"
};
#endif /* LAPIC_VERBOSE */
 
 
static void apic_spurious(int n, istate_t *istate);
static void l_apic_timer_interrupt(int n, istate_t *istate);
 
/** Initialize APIC on BSP. */
void apic_init(void)
{
io_apic_id_t idreg;
unsigned int i;
 
exc_register(VECTOR_APIC_SPUR, "apic_spurious", (iroutine) apic_spurious);
 
enable_irqs_function = io_apic_enable_irqs;
disable_irqs_function = io_apic_disable_irqs;
eoi_function = l_apic_eoi;
/*
* Configure interrupt routing.
* IRQ 0 remains masked as the time signal is generated by l_apic's themselves.
* Other interrupts will be forwarded to the lowest priority CPU.
*/
io_apic_disable_irqs(0xffff);
exc_register(VECTOR_CLK, "l_apic_timer", (iroutine) l_apic_timer_interrupt);
for (i = 0; i < IRQ_COUNT; i++) {
int pin;
if ((pin = smp_irq_to_pin(i)) != -1) {
io_apic_change_ioredtbl(pin, DEST_ALL, IVT_IRQBASE+i, LOPRI);
}
}
/*
* Ensure that io_apic has unique ID.
*/
idreg.value = io_apic_read(IOAPICID);
if ((1 << idreg.apic_id) & apic_id_mask) { /* see if IO APIC ID is used already */
for (i = 0; i < APIC_ID_COUNT; i++) {
if (!((1<<i) & apic_id_mask)) {
idreg.apic_id = i;
io_apic_write(IOAPICID, idreg.value);
break;
}
}
}
 
/*
* Configure the BSP's lapic.
*/
l_apic_init();
 
l_apic_debug();
}
 
/** APIC spurious interrupt handler.
*
* @param n Interrupt vector.
* @param istate Interrupted state.
*/
void apic_spurious(int n, istate_t *istate)
{
#ifdef CONFIG_DEBUG
printf("cpu%d: APIC spurious interrupt\n", CPU->id);
#endif
}
 
/** Poll for APIC errors.
*
* Examine Error Status Register and report all errors found.
*
* @return 0 on error, 1 on success.
*/
int apic_poll_errors(void)
{
esr_t esr;
esr.value = l_apic[ESR];
if (esr.send_checksum_error)
printf("Send Checksum Error\n");
if (esr.receive_checksum_error)
printf("Receive Checksum Error\n");
if (esr.send_accept_error)
printf("Send Accept Error\n");
if (esr.receive_accept_error)
printf("Receive Accept Error\n");
if (esr.send_illegal_vector)
printf("Send Illegal Vector\n");
if (esr.received_illegal_vector)
printf("Received Illegal Vector\n");
if (esr.illegal_register_address)
printf("Illegal Register Address\n");
 
return !esr.err_bitmap;
}
 
/** Send all CPUs excluding CPU IPI vector.
*
* @param vector Interrupt vector to be sent.
*
* @return 0 on failure, 1 on success.
*/
int l_apic_broadcast_custom_ipi(uint8_t vector)
{
icr_t icr;
 
icr.lo = l_apic[ICRlo];
icr.delmod = DELMOD_FIXED;
icr.destmod = DESTMOD_LOGIC;
icr.level = LEVEL_ASSERT;
icr.shorthand = SHORTHAND_ALL_EXCL;
icr.trigger_mode = TRIGMOD_LEVEL;
icr.vector = vector;
 
l_apic[ICRlo] = icr.lo;
 
icr.lo = l_apic[ICRlo];
if (icr.delivs == DELIVS_PENDING) {
#ifdef CONFIG_DEBUG
printf("IPI is pending.\n");
#endif
}
 
return apic_poll_errors();
}
 
/** Universal Start-up Algorithm for bringing up the AP processors.
*
* @param apicid APIC ID of the processor to be brought up.
*
* @return 0 on failure, 1 on success.
*/
int l_apic_send_init_ipi(uint8_t apicid)
{
icr_t icr;
int i;
 
/*
* Read the ICR register in and zero all non-reserved fields.
*/
icr.lo = l_apic[ICRlo];
icr.hi = l_apic[ICRhi];
icr.delmod = DELMOD_INIT;
icr.destmod = DESTMOD_PHYS;
icr.level = LEVEL_ASSERT;
icr.trigger_mode = TRIGMOD_LEVEL;
icr.shorthand = SHORTHAND_NONE;
icr.vector = 0;
icr.dest = apicid;
l_apic[ICRhi] = icr.hi;
l_apic[ICRlo] = icr.lo;
 
/*
* According to MP Specification, 20us should be enough to
* deliver the IPI.
*/
delay(20);
 
if (!apic_poll_errors())
return 0;
 
icr.lo = l_apic[ICRlo];
if (icr.delivs == DELIVS_PENDING) {
#ifdef CONFIG_DEBUG
printf("IPI is pending.\n");
#endif
}
 
icr.delmod = DELMOD_INIT;
icr.destmod = DESTMOD_PHYS;
icr.level = LEVEL_DEASSERT;
icr.shorthand = SHORTHAND_NONE;
icr.trigger_mode = TRIGMOD_LEVEL;
icr.vector = 0;
l_apic[ICRlo] = icr.lo;
 
/*
* Wait 10ms as MP Specification specifies.
*/
delay(10000);
 
if (!is_82489DX_apic(l_apic[LAVR])) {
/*
* If this is not 82489DX-based l_apic we must send two STARTUP IPI's.
*/
for (i = 0; i < 2; i++) {
icr.lo = l_apic[ICRlo];
icr.delmod = DELMOD_STARTUP;
icr.destmod = DESTMOD_PHYS;
icr.level = LEVEL_ASSERT;
icr.shorthand = SHORTHAND_NONE;
icr.trigger_mode = TRIGMOD_LEVEL;
l_apic[ICRlo] = icr.lo;
delay(200);
}
}
return apic_poll_errors();
}
 
/** Initialize Local APIC. */
void l_apic_init(void)
{
lvt_error_t error;
lvt_lint_t lint;
tpr_t tpr;
svr_t svr;
icr_t icr;
tdcr_t tdcr;
lvt_tm_t tm;
ldr_t ldr;
dfr_t dfr;
uint32_t t1, t2;
 
/* Initialize LVT Error register. */
error.value = l_apic[LVT_Err];
error.masked = true;
l_apic[LVT_Err] = error.value;
 
/* Initialize LVT LINT0 register. */
lint.value = l_apic[LVT_LINT0];
lint.masked = true;
l_apic[LVT_LINT0] = lint.value;
 
/* Initialize LVT LINT1 register. */
lint.value = l_apic[LVT_LINT1];
lint.masked = true;
l_apic[LVT_LINT1] = lint.value;
 
/* Task Priority Register initialization. */
tpr.value = l_apic[TPR];
tpr.pri_sc = 0;
tpr.pri = 0;
l_apic[TPR] = tpr.value;
/* Spurious-Interrupt Vector Register initialization. */
svr.value = l_apic[SVR];
svr.vector = VECTOR_APIC_SPUR;
svr.lapic_enabled = true;
svr.focus_checking = true;
l_apic[SVR] = svr.value;
 
if (CPU->arch.family >= 6)
enable_l_apic_in_msr();
/* Interrupt Command Register initialization. */
icr.lo = l_apic[ICRlo];
icr.delmod = DELMOD_INIT;
icr.destmod = DESTMOD_PHYS;
icr.level = LEVEL_DEASSERT;
icr.shorthand = SHORTHAND_ALL_INCL;
icr.trigger_mode = TRIGMOD_LEVEL;
l_apic[ICRlo] = icr.lo;
/* Timer Divide Configuration Register initialization. */
tdcr.value = l_apic[TDCR];
tdcr.div_value = DIVIDE_1;
l_apic[TDCR] = tdcr.value;
 
/* Program local timer. */
tm.value = l_apic[LVT_Tm];
tm.vector = VECTOR_CLK;
tm.mode = TIMER_PERIODIC;
tm.masked = false;
l_apic[LVT_Tm] = tm.value;
 
/*
* Measure and configure the timer to generate timer
* interrupt with period 1s/HZ seconds.
*/
t1 = l_apic[CCRT];
l_apic[ICRT] = 0xffffffff;
 
while (l_apic[CCRT] == t1)
;
t1 = l_apic[CCRT];
delay(1000000/HZ);
t2 = l_apic[CCRT];
l_apic[ICRT] = t1-t2;
/* Program Logical Destination Register. */
ldr.value = l_apic[LDR];
if (CPU->id < sizeof(CPU->id) * 8) /* size in bits */
ldr.id = (1 << CPU->id);
l_apic[LDR] = ldr.value;
/* Program Destination Format Register for Flat mode. */
dfr.value = l_apic[DFR];
dfr.model = MODEL_FLAT;
l_apic[DFR] = dfr.value;
}
 
/** Local APIC End of Interrupt. */
void l_apic_eoi(void)
{
l_apic[EOI] = 0;
}
 
/** Dump content of Local APIC registers. */
void l_apic_debug(void)
{
#ifdef LAPIC_VERBOSE
lvt_tm_t tm;
lvt_lint_t lint;
lvt_error_t error;
printf("LVT on cpu%d, LAPIC ID: %d\n", CPU->id, l_apic_id());
 
tm.value = l_apic[LVT_Tm];
printf("LVT Tm: vector=%hhd, %s, %s, %s\n", tm.vector, delivs_str[tm.delivs], mask_str[tm.masked], tm_mode_str[tm.mode]);
lint.value = l_apic[LVT_LINT0];
printf("LVT LINT0: vector=%hhd, %s, %s, %s, irr=%d, %s, %s\n", tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], mask_str[lint.masked]);
lint.value = l_apic[LVT_LINT1];
printf("LVT LINT1: vector=%hhd, %s, %s, %s, irr=%d, %s, %s\n", tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], mask_str[lint.masked]);
error.value = l_apic[LVT_Err];
printf("LVT Err: vector=%hhd, %s, %s\n", error.vector, delivs_str[error.delivs], mask_str[error.masked]);
#endif
}
 
/** Local APIC Timer Interrupt.
*
* @param n Interrupt vector number.
* @param istate Interrupted state.
*/
void l_apic_timer_interrupt(int n, istate_t *istate)
{
l_apic_eoi();
clock();
}
 
/** Get Local APIC ID.
*
* @return Local APIC ID.
*/
uint8_t l_apic_id(void)
{
l_apic_id_t idreg;
idreg.value = l_apic[L_APIC_ID];
return idreg.apic_id;
}
 
/** Read from IO APIC register.
*
* @param address IO APIC register address.
*
* @return Content of the addressed IO APIC register.
*/
uint32_t io_apic_read(uint8_t address)
{
io_regsel_t regsel;
regsel.value = io_apic[IOREGSEL];
regsel.reg_addr = address;
io_apic[IOREGSEL] = regsel.value;
return io_apic[IOWIN];
}
 
/** Write to IO APIC register.
*
* @param address IO APIC register address.
* @param x Content to be written to the addressed IO APIC register.
*/
void io_apic_write(uint8_t address, uint32_t x)
{
io_regsel_t regsel;
regsel.value = io_apic[IOREGSEL];
regsel.reg_addr = address;
io_apic[IOREGSEL] = regsel.value;
io_apic[IOWIN] = x;
}
 
/** Change some attributes of one item in I/O Redirection Table.
*
* @param pin IO APIC pin number.
* @param dest Interrupt destination address.
* @param v Interrupt vector to trigger.
* @param flags Flags.
*/
void io_apic_change_ioredtbl(uint8_t pin, uint8_t dest, uint8_t v, int flags)
{
io_redirection_reg_t reg;
int dlvr = DELMOD_FIXED;
if (flags & LOPRI)
dlvr = DELMOD_LOWPRI;
 
reg.lo = io_apic_read(IOREDTBL + pin * 2);
reg.hi = io_apic_read(IOREDTBL + pin * 2 + 1);
reg.dest = dest;
reg.destmod = DESTMOD_LOGIC;
reg.trigger_mode = TRIGMOD_EDGE;
reg.intpol = POLARITY_HIGH;
reg.delmod = dlvr;
reg.intvec = v;
 
io_apic_write(IOREDTBL + pin * 2, reg.lo);
io_apic_write(IOREDTBL + pin * 2 + 1, reg.hi);
}
 
/** Mask IRQs in IO APIC.
*
* @param irqmask Bitmask of IRQs to be masked (0 = do not mask, 1 = mask).
*/
void io_apic_disable_irqs(uint16_t irqmask)
{
io_redirection_reg_t reg;
unsigned int i;
int pin;
for (i = 0; i < 16; i++) {
if (irqmask & (1 << i)) {
/*
* Mask the signal input in IO APIC if there is a
* mapping for the respective IRQ number.
*/
pin = smp_irq_to_pin(i);
if (pin != -1) {
reg.lo = io_apic_read(IOREDTBL + pin * 2);
reg.masked = true;
io_apic_write(IOREDTBL + pin*2, reg.lo);
}
}
}
}
 
/** Unmask IRQs in IO APIC.
*
* @param irqmask Bitmask of IRQs to be unmasked (0 = do not unmask, 1 = unmask).
*/
void io_apic_enable_irqs(uint16_t irqmask)
{
unsigned int i;
int pin;
io_redirection_reg_t reg;
for (i = 0; i < 16; i++) {
if (irqmask & (1 << i)) {
/*
* Unmask the signal input in IO APIC if there is a
* mapping for the respective IRQ number.
*/
pin = smp_irq_to_pin(i);
if (pin != -1) {
reg.lo = io_apic_read(IOREDTBL + pin * 2);
reg.masked = false;
io_apic_write(IOREDTBL + pin*2, reg.lo);
}
}
}
}
 
#endif /* CONFIG_SMP */
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/smp/ipi.c
0,0 → 1,48
/*
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen
* @{
*/
/** @file
*/
 
#ifdef CONFIG_SMP
 
#include <smp/ipi.h>
#include <arch/smp/apic.h>
 
void ipi_broadcast_arch(int ipi)
{
(void) l_apic_broadcast_custom_ipi((uint8_t) ipi);
}
 
#endif /* CONFIG_SMP */
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/context.S
0,0 → 1,0
link ../../ia32/src/context.S
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/src/mm/tlb.c
0,0 → 1,75
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen_mm
* @{
*/
/** @file
* @ingroup ia32xen_mm
*/
 
#include <mm/tlb.h>
#include <arch/mm/asid.h>
#include <arch/asm.h>
#include <arch/types.h>
#include <arch/hypercall.h>
 
/** Invalidate all entries in TLB. */
void tlb_invalidate_all(void)
{
mmuext_op_t mmu_ext;
mmu_ext.cmd = MMUEXT_TLB_FLUSH_LOCAL;
xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF);
}
 
/** Invalidate all entries in TLB that belong to specified address space.
*
* @param asid This parameter is ignored as the architecture doesn't support it.
*/
void tlb_invalidate_asid(asid_t asid)
{
tlb_invalidate_all();
}
 
/** Invalidate TLB entries for specified page range belonging to specified address space.
*
* @param asid This parameter is ignored as the architecture doesn't support it.
* @param page Address of the first page whose entry is to be invalidated.
* @param cnt Number of entries to invalidate.
*/
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
{
unsigned int i;
 
for (i = 0; i < cnt; i++)
invlpg(page + i * PAGE_SIZE);
}
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/mm/frame.c
0,0 → 1,57
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen_mm
* @{
*/
/** @file
* @ingroup ia32xen_mm
*/
 
#include <mm/frame.h>
#include <config.h>
 
void physmem_print(void)
{
printf("Base Size Reserved\n");
printf("---------- ---------- ---------\n");
printf("%#10x %#10x %#10x\n", PFN2ADDR(meminfo.start),
PFN2ADDR(meminfo.size), PFN2ADDR(meminfo.reserved));
}
 
void frame_arch_init(void)
{
if (config.cpu_active == 1) {
/* The only memory zone */
zone_create(meminfo.start, meminfo.size, meminfo.start + meminfo.reserved, 0);
frame_mark_unavailable(meminfo.start, meminfo.reserved);
}
}
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/mm/page.c
0,0 → 1,86
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen_mm
* @{
*/
/** @file
*/
 
#include <arch/mm/page.h>
#include <genarch/mm/page_pt.h>
#include <arch/mm/frame.h>
#include <mm/frame.h>
#include <mm/page.h>
#include <mm/as.h>
#include <arch/types.h>
#include <align.h>
#include <config.h>
#include <func.h>
#include <arch/interrupt.h>
#include <arch/asm.h>
#include <debug.h>
#include <memstr.h>
#include <print.h>
#include <interrupt.h>
 
void page_arch_init(void)
{
if (config.cpu_active == 1) {
page_mapping_operations = &pt_mapping_operations;
AS_KERNEL->genarch.page_table = (pte_t *) KA2PA(start_info.ptl0);
} else
SET_PTL0_ADDRESS_ARCH(AS_KERNEL->genarch.page_table);
}
 
void page_fault(int n, istate_t *istate)
{
uintptr_t page;
pf_access_t access;
page = read_cr2();
if (istate->error_word & PFERR_CODE_RSVD)
panic("Reserved bit set in page directory.\n");
if (istate->error_word & PFERR_CODE_RW)
access = PF_ACCESS_WRITE;
else
access = PF_ACCESS_READ;
if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
fault_if_from_uspace(istate, "Page fault: %#x", page);
decode_istate(istate);
printf("page fault address: %#x\n", page);
panic("page fault\n");
}
}
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/mm/as.c
0,0 → 1,46
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen_mm
* @{
*/
/** @file
* @ingroup ia32xen_mm
*/
 
#include <arch/mm/as.h>
#include <genarch/mm/page_pt.h>
 
/** Architecture dependent address space init. */
void as_arch_init(void)
{
as_operations = &as_pt_operations;
}
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/interrupt.c
0,0 → 1,248
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen_interrupt
* @{
*/
/** @file
*/
 
#include <arch/interrupt.h>
#include <syscall/syscall.h>
#include <print.h>
#include <debug.h>
#include <panic.h>
#include <func.h>
#include <cpu.h>
#include <arch/asm.h>
#include <mm/tlb.h>
#include <mm/as.h>
#include <arch.h>
#include <symtab.h>
#include <proc/thread.h>
#include <proc/task.h>
#include <synch/spinlock.h>
#include <arch/ddi/ddi.h>
#include <ipc/sysipc.h>
#include <interrupt.h>
#include <ddi/irq.h>
 
/*
* Interrupt and exception dispatching.
*/
 
void (* disable_irqs_function)(uint16_t irqmask) = NULL;
void (* enable_irqs_function)(uint16_t irqmask) = NULL;
void (* eoi_function)(void) = NULL;
 
void decode_istate(istate_t *istate)
{
char *symbol = get_symtab_entry(istate->eip);
 
if (!symbol)
symbol = "";
 
if (CPU)
printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id);
else
printf("----------------EXCEPTION OCCURED----------------\n");
printf("%%eip: %#x (%s)\n",istate->eip,symbol);
printf("ERROR_WORD=%#x\n", istate->error_word);
printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags);
printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n", istate->eax,istate->ecx,istate->edx,&istate->stack[0]);
#ifdef CONFIG_DEBUG_ALLREGS
printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n", istate->esi,istate->edi,istate->ebp,istate->ebx);
#endif
printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]);
printf(" %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]);
}
 
static void trap_virtual_eoi(void)
{
if (eoi_function)
eoi_function();
else
panic("no eoi_function\n");
 
}
 
static void null_interrupt(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "unserviced interrupt: %d", n);
 
decode_istate(istate);
panic("unserviced interrupt: %d\n", n);
}
 
/** General Protection Fault. */
static void gp_fault(int n, istate_t *istate)
{
if (TASK) {
count_t ver;
spinlock_lock(&TASK->lock);
ver = TASK->arch.iomapver;
spinlock_unlock(&TASK->lock);
if (CPU->arch.iomapver_copy != ver) {
/*
* This fault can be caused by an early access
* to I/O port because of an out-dated
* I/O Permission bitmap installed on CPU.
* Install the fresh copy and restart
* the instruction.
*/
io_perm_bitmap_install();
return;
}
fault_if_from_uspace(istate, "general protection fault");
}
 
decode_istate(istate);
panic("general protection fault\n");
}
 
static void ss_fault(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "stack fault");
 
decode_istate(istate);
panic("stack fault\n");
}
 
static void simd_fp_exception(int n, istate_t *istate)
{
uint32_t mxcsr;
asm
(
"stmxcsr %0;\n"
:"=m"(mxcsr)
);
fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zx",
(unative_t)mxcsr);
 
decode_istate(istate);
printf("MXCSR: %#zx\n",(unative_t)(mxcsr));
panic("SIMD FP exception(19)\n");
}
 
static void nm_fault(int n, istate_t *istate)
{
#ifdef CONFIG_FPU_LAZY
scheduler_fpu_lazy_request();
#else
fault_if_from_uspace(istate, "fpu fault");
panic("fpu fault");
#endif
}
 
#ifdef CONFIG_SMP
static void tlb_shootdown_ipi(int n, istate_t *istate)
{
trap_virtual_eoi();
tlb_shootdown_ipi_recv();
}
#endif
 
/** Handler of IRQ exceptions */
static void irq_interrupt(int n, istate_t *istate)
{
ASSERT(n >= IVT_IRQBASE);
int inum = n - IVT_IRQBASE;
bool ack = false;
ASSERT(inum < IRQ_COUNT);
ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
irq_t *irq = irq_dispatch_and_lock(inum);
if (irq) {
/*
* The IRQ handler was found.
*/
if (irq->preack) {
/* Send EOI before processing the interrupt */
trap_virtual_eoi();
ack = true;
}
irq->handler(irq, irq->arg);
spinlock_unlock(&irq->lock);
} else {
/*
* Spurious interrupt.
*/
#ifdef CONFIG_DEBUG
printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, inum);
#endif
}
if (!ack)
trap_virtual_eoi();
}
 
void interrupt_init(void)
{
int i;
for (i = 0; i < IVT_ITEMS; i++)
exc_register(i, "null", (iroutine) null_interrupt);
for (i = 0; i < IRQ_COUNT; i++) {
if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
exc_register(IVT_IRQBASE + i, "irq", (iroutine) irq_interrupt);
}
exc_register(7, "nm_fault", (iroutine) nm_fault);
exc_register(12, "ss_fault", (iroutine) ss_fault);
exc_register(13, "gp_fault", (iroutine) gp_fault);
exc_register(19, "simd_fp", (iroutine) simd_fp_exception);
#ifdef CONFIG_SMP
exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", (iroutine) tlb_shootdown_ipi);
#endif
}
 
void trap_virtual_enable_irqs(uint16_t irqmask)
{
if (enable_irqs_function)
enable_irqs_function(irqmask);
else
panic("no enable_irqs_function\n");
}
 
void trap_virtual_disable_irqs(uint16_t irqmask)
{
if (disable_irqs_function)
disable_irqs_function(irqmask);
else
panic("no disable_irqs_function\n");
}
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/boot/boot.S
0,0 → 1,102
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/mm/page.h>
#include <arch/hypercall.h>
 
#define ELFNOTE(name, type, desctype, descval) \
.section .note.name; \
.align 4; \
.long 2f - 1f; \
.long 4f - 3f; \
.long type; \
1:.asciz #name; \
2:.align 4; \
3:desctype descval; \
4:.align 4
 
ELFNOTE(Xen, XEN_ELFNOTE_GUEST_OS, .asciz, "HelenOS")
ELFNOTE(Xen, XEN_ELFNOTE_GUEST_VERSION, .asciz, RELEASE)
ELFNOTE(Xen, XEN_ELFNOTE_XEN_VERSION, .asciz, "xen-3.0")
ELFNOTE(Xen, XEN_ELFNOTE_VIRT_BASE, .long, PA2KA(BOOT_OFFSET))
ELFNOTE(Xen, XEN_ELFNOTE_PADDR_OFFSET, .long, 0)
ELFNOTE(Xen, XEN_ELFNOTE_ENTRY, .long, kernel_image_start)
ELFNOTE(Xen, XEN_ELFNOTE_HYPERCALL_PAGE, .long, hypercall_page)
ELFNOTE(Xen, XEN_ELFNOTE_FEATURES, .asciz, "auto_translated_physmap|supervisor_mode_kernel")
ELFNOTE(Xen, XEN_ELFNOTE_PAE_MODE, .asciz, "no")
ELFNOTE(Xen, XEN_ELFNOTE_LOADER, .asciz, "generic")
 
.text
 
.code32
.align 4
.global kernel_image_start
kernel_image_start:
# copy start_info (esi initialized by Xen)
movl $start_info, %edi
movl $START_INFO_SIZE >> 2, %ecx
cld
rep movsb
# switch to temporal kernel stack
movl $kernel_stack, %esp
call arch_pre_main
call main_bsp # never returns
 
cli
hlt
 
kernel_stack_bottom:
.space TEMP_STACK_SIZE
kernel_stack:
 
.section K_TEXT_START, "aw", @progbits
.global hypercall_page
.org 0
hypercall_page:
.space PAGE_SIZE
 
.global shared_info
.org 0x1000
shared_info:
.space PAGE_SIZE
 
.global console_page
.org 0x2000
console_page:
.space PAGE_SIZE
 
# Xen 3.0.3 ELF loader is somehow buggy
# thus this workaround
.global dummy_fill
dummy_fill:
.space (1024 * 1024)
/branches/network/kernel/arch/ia32xen/src/proc/scheduler.c
0,0 → 1,81
/*
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen_proc
* @{
*/
/** @file
*/
 
#include <proc/scheduler.h>
#include <cpu.h>
#include <proc/task.h>
#include <proc/thread.h>
#include <arch.h>
#include <arch/context.h> /* SP_DELTA */
#include <arch/debugger.h>
#include <arch/pm.h>
#include <arch/asm.h>
#include <arch/ddi/ddi.h>
 
/** Perform ia32 specific tasks needed before the new task is run.
*
* Interrupts are disabled.
*/
void before_task_runs_arch(void)
{
// io_perm_bitmap_install();
}
 
/** Perform ia32 specific tasks needed before the new thread is scheduled.
*
* THREAD is locked and interrupts are disabled.
*/
void before_thread_runs_arch(void)
{
CPU->arch.tss->esp0 = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
CPU->arch.tss->ss0 = selector(KDATA_DES);
 
/* Set up TLS in GS register */
// set_tls_desc(THREAD->arch.tls);
 
#ifdef CONFIG_DEBUG_AS_WATCHPOINT
/* Set watchpoint on AS to ensure that nobody sets it to zero */
if (CPU->id < BKPOINTS_MAX)
breakpoint_add(&((the_t *) THREAD->kstack)->as,
BKPOINT_WRITE | BKPOINT_CHECK_ZERO,
CPU->id);
#endif
}
 
void after_thread_ran_arch(void)
{
}
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/proc/task.c
0,0 → 1,61
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen_proc
* @{
*/
/** @file
*/
 
#include <proc/task.h>
#include <arch/types.h>
#include <adt/bitmap.h>
#include <mm/slab.h>
 
/** Perform ia32 specific task initialization.
*
* @param t Task to be initialized.
*/
void task_create_arch(task_t *t)
{
t->arch.iomapver = 0;
bitmap_initialize(&t->arch.iomap, NULL, 0);
}
 
/** Perform ia32 specific task destruction.
*
* @param t Task to be initialized.
*/
void task_destroy_arch(task_t *t)
{
if (t->arch.iomap.map)
free(t->arch.iomap.map);
}
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/proc/thread.c
0,0 → 1,47
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen_proc
* @{
*/
/** @file
*/
 
#include <proc/thread.h>
 
/** Perform ia32xen specific thread initialization.
*
* @param t Thread to be initialized.
*/
void thread_create_arch(thread_t *t)
{
t->arch.tls = 0;
}
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/drivers/xconsole.c
0,0 → 1,83
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen
* @{
*/
/**
* @file
* @brief ia32xen console driver.
*/
 
#include <arch/drivers/xconsole.h>
#include <putchar.h>
#include <console/chardev.h>
#include <console/console.h>
#include <arch/hypercall.h>
 
#define MASK_INDEX(index, ring) ((index) & (sizeof(ring) - 1))
 
static void xen_putchar(chardev_t *d, const char ch);
 
chardev_t xen_console;
static chardev_operations_t xen_ops = {
.write = xen_putchar
};
 
void xen_console_init(void)
{
chardev_initialize("xen_out", &xen_console, &xen_ops);
stdout = &xen_console;
}
 
void xen_putchar(chardev_t *d, const char ch)
{
if (start_info.console.domU.evtchn != 0) {
uint32_t cons = console_page.out_cons;
uint32_t prod = console_page.out_prod;
memory_barrier();
if ((prod - cons) > sizeof(console_page.out))
return;
if (ch == '\n')
console_page.out[MASK_INDEX(prod++, console_page.out)] = '\r';
console_page.out[MASK_INDEX(prod++, console_page.out)] = ch;
write_barrier();
console_page.out_prod = prod;
xen_notify_remote(start_info.console.domU.evtchn);
} else
xen_console_io(CONSOLE_IO_WRITE, 1, &ch);
}
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/src/fpu_context.c
0,0 → 1,0
link ../../ia32/src/fpu_context.c
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/src/debug
0,0 → 1,0
link ../../ia32/src/debug
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/src/cpu
0,0 → 1,0
link ../../ia32/src/cpu
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/src/bios
0,0 → 1,0
link ../../ia32/src/bios
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/src/delay.s
0,0 → 1,0
link ../../ia32/src/delay.s
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/src/ddi
0,0 → 1,0
link ../../ia32/src/ddi
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/src/debugger.c
0,0 → 1,0
link ../../ia32/src/debugger.c
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/src/atomic.S
0,0 → 1,0
link ../../ia32/src/atomic.S
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/mm/page.h
0,0 → 1,257
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen_mm
* @{
*/
/** @file
*/
 
#ifndef KERN_ia32xen_PAGE_H_
#define KERN_ia32xen_PAGE_H_
 
#include <arch/mm/frame.h>
 
#define PAGE_WIDTH FRAME_WIDTH
#define PAGE_SIZE FRAME_SIZE
 
#ifdef KERNEL
 
#ifndef __ASM__
# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
#else
# define KA2PA(x) ((x) - 0x80000000)
# define PA2KA(x) ((x) + 0x80000000)
#endif
 
/*
* Implementation of generic 4-level page table interface.
* IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
*/
 
/* Number of entries in each level. */
#define PTL0_ENTRIES_ARCH 1024
#define PTL1_ENTRIES_ARCH 0
#define PTL2_ENTRIES_ARCH 0
#define PTL3_ENTRIES_ARCH 1024
 
/* Page table size for each level. */
#define PTL0_SIZE_ARCH ONE_FRAME
#define PTL1_SIZE_ARCH 0
#define PTL2_SIZE_ARCH 0
#define PTL3_SIZE_ARCH ONE_FRAME
 
/* Macros calculating indices into page tables in each level. */
#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)
#define PTL1_INDEX_ARCH(vaddr) 0
#define PTL2_INDEX_ARCH(vaddr) 0
#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff)
 
/* Get PTE address accessors for each level. */
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
((pte_t *) MA2PA((((pte_t *) (ptl0))[(i)].frame_address) << 12))
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
(ptl1)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
(ptl2)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
((uintptr_t) MA2PA((((pte_t *) (ptl3))[(i)].frame_address) << 12))
 
/* Set PTE address accessors for each level. */
#define SET_PTL0_ADDRESS_ARCH(ptl0) \
{ \
mmuext_op_t mmu_ext; \
\
mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \
mmu_ext.mfn = ADDR2PFN(PA2MA(ptl0)); \
ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \
}
 
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
{ \
mmuext_op_t mmu_ext; \
\
mmu_ext.cmd = MMUEXT_PIN_L1_TABLE; \
mmu_ext.mfn = ADDR2PFN(PA2MA(a)); \
ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \
\
mmu_update_t update; \
\
update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \
update.val = PA2MA(a); \
ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \
}
 
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
{ \
mmu_update_t update; \
\
update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl3))[(i)])); \
update.val = PA2MA(a); \
ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \
}
 
/* Get PTE flags accessors for each level. */
#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
get_pt_flags((pte_t *) (ptl0), (index_t) (i))
#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
PAGE_PRESENT
#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
PAGE_PRESENT
#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
get_pt_flags((pte_t *) (ptl3), (index_t) (i))
 
/* Set PTE flags accessors for each level. */
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
 
/* Query macros for the last level. */
#define PTE_VALID_ARCH(p) \
(*((uint32_t *) (p)) != 0)
#define PTE_PRESENT_ARCH(p) \
((p)->present != 0)
#define PTE_GET_FRAME_ARCH(p) \
((p)->frame_address << FRAME_WIDTH)
#define PTE_WRITABLE_ARCH(p) \
((p)->writeable != 0)
#define PTE_EXECUTABLE_ARCH(p) \
1
 
#ifndef __ASM__
 
#include <mm/mm.h>
#include <arch/hypercall.h>
#include <arch/interrupt.h>
 
/* Page fault error codes. */
 
/** When bit on this position is 0, the page fault was caused by a not-present
* page.
*/
#define PFERR_CODE_P (1 << 0)
 
/** When bit on this position is 1, the page fault was caused by a write. */
#define PFERR_CODE_RW (1 << 1)
 
/** When bit on this position is 1, the page fault was caused in user mode. */
#define PFERR_CODE_US (1 << 2)
 
/** When bit on this position is 1, a reserved bit was set in page directory. */
#define PFERR_CODE_RSVD (1 << 3)
 
typedef struct {
uint64_t ptr; /**< Machine address of PTE */
union { /**< New contents of PTE */
uint64_t val;
pte_t pte;
};
} mmu_update_t;
 
typedef struct {
unsigned int cmd;
union {
unsigned long mfn;
unsigned long linear_addr;
};
union {
unsigned int nr_ents;
void *vcpumask;
};
} mmuext_op_t;
 
static inline int xen_update_va_mapping(const void *va, const pte_t pte,
const unsigned int flags)
{
return hypercall4(XEN_UPDATE_VA_MAPPING, va, pte, 0, flags);
}
 
static inline int xen_mmu_update(const mmu_update_t *req,
const unsigned int count, unsigned int *success_count, domid_t domid)
{
return hypercall4(XEN_MMU_UPDATE, req, count, success_count, domid);
}
 
static inline int xen_mmuext_op(const mmuext_op_t *op, const unsigned int count,
unsigned int *success_count, domid_t domid)
{
return hypercall4(XEN_MMUEXT_OP, op, count, success_count, domid);
}
 
static inline int get_pt_flags(pte_t *pt, index_t i)
{
pte_t *p = &pt[i];
return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT |
(!p->present) << PAGE_PRESENT_SHIFT |
p->uaccessible << PAGE_USER_SHIFT |
1 << PAGE_READ_SHIFT |
p->writeable << PAGE_WRITE_SHIFT |
1 << PAGE_EXEC_SHIFT |
p->global << PAGE_GLOBAL_SHIFT);
}
 
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
{
pte_t p = pt[i];
p.page_cache_disable = !(flags & PAGE_CACHEABLE);
p.present = !(flags & PAGE_NOT_PRESENT);
p.uaccessible = (flags & PAGE_USER) != 0;
p.writeable = (flags & PAGE_WRITE) != 0;
p.global = (flags & PAGE_GLOBAL) != 0;
/*
* Ensure that there is at least one bit set even if the present bit is cleared.
*/
p.soft_valid = true;
mmu_update_t update;
update.ptr = PA2MA(KA2PA(&(pt[i])));
update.pte = p;
xen_mmu_update(&update, 1, NULL, DOMID_SELF);
}
 
extern void page_arch_init(void);
extern void page_fault(int n, istate_t *istate);
 
#endif /* __ASM__ */
 
#endif /* KERNEL */
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/include/mm/frame.h
0,0 → 1,57
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen_mm
* @{
*/
/** @file
*/
 
#ifndef KERN_ia32xen_FRAME_H_
#define KERN_ia32xen_FRAME_H_
 
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
 
#ifdef KERNEL
#ifndef __ASM__
 
#define PA2MA(x) ((start_info.pm_map[((uintptr_t) (x)) >> 12] << 12) + (((uintptr_t) (x)) & 0xfff))
#define MA2PA(x) ((mp_map[((uintptr_t) (x)) >> 12] << 12) + (((uintptr_t) (x)) & 0xfff))
 
extern void frame_arch_init(void);
extern void physmem_print(void);
 
#endif /* __ASM__ */
#endif /* KERNEL */
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/include/mm/as.h
0,0 → 1,64
/*
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen_mm
* @{
*/
/** @file
*/
 
#ifndef KERN_ia32xen_AS_H_
#define KERN_ia32xen_AS_H_
 
#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0
 
#define KERNEL_ADDRESS_SPACE_START_ARCH ((unsigned long) 0x80000000)
#define KERNEL_ADDRESS_SPACE_END_ARCH ((unsigned long) 0xffffffff)
#define USER_ADDRESS_SPACE_START_ARCH ((unsigned long) 0x00000000)
#define USER_ADDRESS_SPACE_END_ARCH ((unsigned long) 0x7fffffff)
 
#define USTACK_ADDRESS_ARCH (USER_ADDRESS_SPACE_END_ARCH-(PAGE_SIZE-1))
 
typedef struct {
} as_arch_t;
 
#include <genarch/mm/as_pt.h>
 
#define as_constructor_arch(as, flags) (as != as)
#define as_destructor_arch(as) (as != as)
#define as_create_arch(as, flags) (as != as)
#define as_install_arch(as)
#define as_deinstall_arch(as)
#define as_invalidate_translation_cache(as, page, cnt)
 
extern void as_arch_init(void);
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/include/mm/asid.h
0,0 → 1,55
/*
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen_mm
* @{
*/
/** @file
* @ingroup ia32xen_mm
*/
 
/*
* ia32xen has no hardware support for address space identifiers.
* This file is provided to do nop-implementation of mm/asid.h
* interface.
*/
 
#ifndef KERN_ia32xen_ASID_H_
#define KERN_ia32xen_ASID_H_
 
typedef int asid_t;
 
#define ASID_MAX_ARCH 3
 
#define asid_get() (ASID_START+1)
#define asid_put(asid)
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/include/mm/tlb.h
0,0 → 1,44
/*
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen_mm
* @{
*/
/** @file
*/
 
#ifndef KERN_ia32xen_TLB_H_
#define KERN_ia32xen_TLB_H_
 
#define tlb_arch_init()
#define tlb_print()
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/include/types.h
0,0 → 1,83
/*
* Copyright (c) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen
* @{
*/
/** @file
*/
 
#ifndef KERN_ia32xen_TYPES_H_
#define KERN_ia32xen_TYPES_H_
 
#define NULL 0
#define false 0
#define true 1
 
typedef signed char int8_t;
typedef signed short int16_t;
typedef signed long int32_t;
typedef signed long long int64_t;
 
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned long uint32_t;
typedef unsigned long long uint64_t;
 
typedef uint32_t size_t;
typedef uint32_t count_t;
typedef uint32_t index_t;
 
typedef uint32_t uintptr_t;
typedef uint32_t pfn_t;
 
typedef uint8_t ipl_t;
 
typedef uint32_t unative_t;
typedef int32_t native_t;
 
/** Page Table Entry. */
typedef struct {
unsigned present : 1;
unsigned writeable : 1;
unsigned uaccessible : 1;
unsigned page_write_through : 1;
unsigned page_cache_disable : 1;
unsigned accessed : 1;
unsigned dirty : 1;
unsigned pat : 1;
unsigned global : 1;
unsigned soft_valid : 1; /**< Valid content even if the present bit is not set. */
unsigned avl : 2;
unsigned frame_address : 20;
} __attribute__ ((packed)) pte_t;
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/include/context_offset.h
0,0 → 1,0
link ../../ia32/include/context_offset.h
Property changes:
Added: svn:special
+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/pm.h
0,0 → 1,159
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen
* @{
*/
/** @file
*/
 
#ifndef KERN_ia32xen_PM_H_
#define KERN_ia32xen_PM_H_
 
#define IDT_ITEMS 64
#define GDT_ITEMS 7
 
#define NULL_DES 0
#define KTEXT_DES 1
#define KDATA_DES 2
#define UTEXT_DES 3
#define UDATA_DES 4
#define TSS_DES 5
#define TLS_DES 6 /* Pointer to Thread-Local-Storage data */
 
#define selector(des) ((des) << 3)
 
#define PL_KERNEL 1
#define PL_USER 3
 
#define AR_PRESENT (1<<7)
#define AR_DATA (2<<3)
#define AR_CODE (3<<3)
#define AR_WRITABLE (1<<1)
#define AR_INTERRUPT (0xe)
#define AR_TSS (0x9)
 
#define DPL_KERNEL (PL_KERNEL<<5)
#define DPL_USER (PL_USER<<5)
 
#define TSS_BASIC_SIZE 104
#define TSS_IOMAP_SIZE (16*1024+1) /* 16K for bitmap + 1 terminating byte for convenience */
 
#define IO_PORTS (64*1024)
 
#ifndef __ASM__
 
#include <arch/types.h>
#include <arch/context.h>
 
struct ptr_16_32 {
uint16_t limit;
uint32_t base;
} __attribute__ ((packed));
typedef struct ptr_16_32 ptr_16_32_t;
 
struct descriptor {
unsigned limit_0_15: 16;
unsigned base_0_15: 16;
unsigned base_16_23: 8;
unsigned access: 8;
unsigned limit_16_19: 4;
unsigned available: 1;
unsigned unused: 1;
unsigned special: 1;
unsigned granularity : 1;
unsigned base_24_31: 8;
} __attribute__ ((packed));
typedef struct descriptor descriptor_t;
 
struct tss {
uint16_t link;
unsigned : 16;
uint32_t esp0;
uint16_t ss0;
unsigned : 16;
uint32_t esp1;
uint16_t ss1;
unsigned : 16;
uint32_t esp2;
uint16_t ss2;
unsigned : 16;
uint32_t cr3;
uint32_t eip;
uint32_t eflags;
uint32_t eax;
uint32_t ecx;
uint32_t edx;
uint32_t ebx;
uint32_t esp;
uint32_t ebp;
uint32_t esi;
uint32_t edi;
uint16_t es;
unsigned : 16;
uint16_t cs;
unsigned : 16;
uint16_t ss;
unsigned : 16;
uint16_t ds;
unsigned : 16;
uint16_t fs;
unsigned : 16;
uint16_t gs;
unsigned : 16;
uint16_t ldtr;
unsigned : 16;
unsigned : 16;
uint16_t iomap_base;
uint8_t iomap[TSS_IOMAP_SIZE];
} __attribute__ ((packed));
typedef struct tss tss_t;
 
extern ptr_16_32_t gdtr;
extern ptr_16_32_t bootstrap_gdtr;
extern ptr_16_32_t protected_ap_gdtr;
extern struct tss *tss_p;
 
extern descriptor_t gdt[];
 
extern void pm_init(void);
 
extern void gdt_setbase(descriptor_t *d, uintptr_t base);
extern void gdt_setlimit(descriptor_t *d, uint32_t limit);
 
extern void traps_init(void);
 
extern void tss_initialize(tss_t *t);
extern void set_tls_desc(uintptr_t tls);
 
#endif /* __ASM__ */
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/include/hypercall.h
0,0 → 1,381
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef KERN_ia32xen_HYPERCALL_H_
#define KERN_ia32xen_HYPERCALL_H_
 
#ifndef __ASM__
# include <arch/types.h>
# include <macros.h>
#endif
 
#define GUEST_CMDLINE 1024
#define VIRT_CPUS 32
#define START_INFO_SIZE 1104
 
#define BOOT_OFFSET 0x0000
#define TEMP_STACK_SIZE 0x1000
 
#define XEN_VIRT_START 0xFC000000
#define XEN_CS 0xe019
 
#define XEN_ELFNOTE_INFO 0
#define XEN_ELFNOTE_ENTRY 1
#define XEN_ELFNOTE_HYPERCALL_PAGE 2
#define XEN_ELFNOTE_VIRT_BASE 3
#define XEN_ELFNOTE_PADDR_OFFSET 4
#define XEN_ELFNOTE_XEN_VERSION 5
#define XEN_ELFNOTE_GUEST_OS 6
#define XEN_ELFNOTE_GUEST_VERSION 7
#define XEN_ELFNOTE_LOADER 8
#define XEN_ELFNOTE_PAE_MODE 9
#define XEN_ELFNOTE_FEATURES 10
#define XEN_ELFNOTE_BSD_SYMTAB 11
 
#define mp_map ((pfn_t *) XEN_VIRT_START)
 
#define SIF_PRIVILEGED (1 << 0) /**< Privileged domain */
#define SIF_INITDOMAIN (1 << 1) /**< Iinitial control domain */
 
#define XEN_CONSOLE_VGA 0x03
#define XEN_CONSOLE_VESA 0x23
 
#define XEN_SET_TRAP_TABLE 0
#define XEN_MMU_UPDATE 1
#define XEN_SET_CALLBACKS 4
#define XEN_UPDATE_VA_MAPPING 14
#define XEN_EVENT_CHANNEL_OP 16
#define XEN_VERSION 17
#define XEN_CONSOLE_IO 18
#define XEN_MMUEXT_OP 26
 
 
/*
* Commands for XEN_CONSOLE_IO
*/
#define CONSOLE_IO_WRITE 0
#define CONSOLE_IO_READ 1
 
 
#define MMUEXT_PIN_L1_TABLE 0
#define MMUEXT_PIN_L2_TABLE 1
#define MMUEXT_PIN_L3_TABLE 2
#define MMUEXT_PIN_L4_TABLE 3
#define MMUEXT_UNPIN_TABLE 4
#define MMUEXT_NEW_BASEPTR 5
#define MMUEXT_TLB_FLUSH_LOCAL 6
#define MMUEXT_INVLPG_LOCAL 7
#define MMUEXT_TLB_FLUSH_MULTI 8
#define MMUEXT_INVLPG_MULTI 9
#define MMUEXT_TLB_FLUSH_ALL 10
#define MMUEXT_INVLPG_ALL 11
#define MMUEXT_FLUSH_CACHE 12
#define MMUEXT_SET_LDT 13
#define MMUEXT_NEW_USER_BASEPTR 15
 
 
#define EVTCHNOP_SEND 4
 
 
#define UVMF_NONE 0 /**< No flushing at all */
#define UVMF_TLB_FLUSH 1 /**< Flush entire TLB(s) */
#define UVMF_INVLPG 2 /**< Flush only one entry */
#define UVMF_FLUSHTYPE_MASK 3
#define UVMF_MULTI 0 /**< Flush subset of TLBs */
#define UVMF_LOCAL 0 /**< Flush local TLB */
#define UVMF_ALL (1 << 2) /**< Flush all TLBs */
 
 
#define DOMID_SELF (0x7FF0U)
#define DOMID_IO (0x7FF1U)
 
#ifndef __ASM__
 
typedef uint16_t domid_t;
typedef uint32_t evtchn_t;
 
typedef struct {
uint32_t version;
uint32_t pad0;
uint64_t tsc_timestamp; /**< TSC at last update of time vals */
uint64_t system_time; /**< Time, in nanosecs, since boot */
uint32_t tsc_to_system_mul;
int8_t tsc_shift;
int8_t pad1[3];
} vcpu_time_info_t;
 
typedef struct {
uint32_t cr2;
uint32_t pad[5];
} arch_vcpu_info_t;
 
typedef struct arch_shared_info {
pfn_t max_pfn; /**< max pfn that appears in table */
uint32_t pfn_to_mfn_frame_list_list;
uint32_t nmi_reason;
} arch_shared_info_t;
 
typedef struct {
uint8_t evtchn_upcall_pending;
ipl_t evtchn_upcall_mask;
evtchn_t evtchn_pending_sel;
arch_vcpu_info_t arch;
vcpu_time_info_t time;
} vcpu_info_t;
 
typedef struct {
vcpu_info_t vcpu_info[VIRT_CPUS];
evtchn_t evtchn_pending[32];
evtchn_t evtchn_mask[32];
uint32_t wc_version; /**< Version counter */
uint32_t wc_sec; /**< Secs 00:00:00 UTC, Jan 1, 1970 */
uint32_t wc_nsec; /**< Nsecs 00:00:00 UTC, Jan 1, 1970 */
arch_shared_info_t arch;
} shared_info_t;
 
typedef struct {
int8_t magic[32]; /**< "xen-<version>-<platform>" */
uint32_t frames; /**< Available frames */
shared_info_t *shared_info; /**< Shared info structure (machine address) */
uint32_t flags; /**< SIF_xxx flags */
pfn_t store_mfn; /**< Shared page (machine page) */
evtchn_t store_evtchn; /**< Event channel for store communication */
union {
struct {
pfn_t mfn; /**< Console page (machine page) */
evtchn_t evtchn; /**< Event channel for console messages */
} domU;
struct {
uint32_t info_off; /**< Offset of console_info struct */
uint32_t info_size; /**< Size of console_info struct from start */
} dom0;
} console;
pte_t *ptl0; /**< Boot PTL0 (kernel address) */
uint32_t pt_frames; /**< Number of bootstrap page table frames */
pfn_t *pm_map; /**< Physical->machine frame map (kernel address) */
void *mod_start; /**< Modules start (kernel address) */
uint32_t mod_len; /**< Modules size (bytes) */
int8_t cmd_line[GUEST_CMDLINE];
} start_info_t;
 
typedef struct {
uint8_t video_type;
 
union {
struct {
uint16_t font_height;
uint16_t cursor_x;
uint16_t cursor_y;
uint16_t rows;
uint16_t columns;
} vga;
 
struct {
uint16_t width;
uint16_t height;
uint16_t bytes_per_line;
uint16_t bits_per_pixel;
uint32_t lfb_base;
uint32_t lfb_size;
uint8_t red_pos;
uint8_t red_size;
uint8_t green_pos;
uint8_t green_size;
uint8_t blue_pos;
uint8_t blue_size;
uint8_t rsvd_pos;
uint8_t rsvd_size;
} vesa_lfb;
} info;
} console_info_t;
 
typedef struct {
pfn_t start;
pfn_t size;
pfn_t reserved;
} memzone_t;
 
extern start_info_t start_info;
extern shared_info_t shared_info;
extern memzone_t meminfo;
 
typedef struct {
uint8_t vector; /**< Exception vector */
uint8_t flags; /**< 0-3: privilege level; 4: clear event enable */
uint16_t cs; /**< Code selector */
void *address; /**< Code offset */
} trap_info_t;
 
typedef struct {
evtchn_t port;
} evtchn_send_t;
 
typedef struct {
uint32_t cmd;
union {
evtchn_send_t send;
};
} evtchn_op_t;
 
#define force_evtchn_callback() ((void) xen_version(0, 0))
 
#define hypercall0(id) \
({ \
unative_t ret; \
asm volatile ( \
"call hypercall_page + (" STRING(id) " * 32)\n" \
: "=a" (ret) \
: \
: "memory" \
); \
ret; \
})
 
#define hypercall1(id, p1) \
({ \
unative_t ret, __ign1; \
asm volatile ( \
"call hypercall_page + (" STRING(id) " * 32)\n" \
: "=a" (ret), \
"=b" (__ign1) \
: "1" (p1) \
: "memory" \
); \
ret; \
})
 
#define hypercall2(id, p1, p2) \
({ \
unative_t ret, __ign1, __ign2; \
asm volatile ( \
"call hypercall_page + (" STRING(id) " * 32)\n" \
: "=a" (ret), \
"=b" (__ign1), \
"=c" (__ign2) \
: "1" (p1), \
"2" (p2) \
: "memory" \
); \
ret; \
})
 
#define hypercall3(id, p1, p2, p3) \
({ \
unative_t ret, __ign1, __ign2, __ign3; \
asm volatile ( \
"call hypercall_page + (" STRING(id) " * 32)\n" \
: "=a" (ret), \
"=b" (__ign1), \
"=c" (__ign2), \
"=d" (__ign3) \
: "1" (p1), \
"2" (p2), \
"3" (p3) \
: "memory" \
); \
ret; \
})
 
#define hypercall4(id, p1, p2, p3, p4) \
({ \
unative_t ret, __ign1, __ign2, __ign3, __ign4; \
asm volatile ( \
"call hypercall_page + (" STRING(id) " * 32)\n" \
: "=a" (ret), \
"=b" (__ign1), \
"=c" (__ign2), \
"=d" (__ign3), \
"=S" (__ign4) \
: "1" (p1), \
"2" (p2), \
"3" (p3), \
"4" (p4) \
: "memory" \
); \
ret; \
})
 
#define hypercall5(id, p1, p2, p3, p4, p5) \
({ \
unative_t ret, __ign1, __ign2, __ign3, __ign4, __ign5; \
asm volatile ( \
"call hypercall_page + (" STRING(id) " * 32)\n" \
: "=a" (ret), \
"=b" (__ign1), \
"=c" (__ign2), \
"=d" (__ign3), \
"=S" (__ign4), \
"=D" (__ign5) \
: "1" (p1), \
"2" (p2), \
"3" (p3), \
"4" (p4), \
"5" (p5) \
: "memory" \
); \
ret; \
})
 
 
static inline int xen_console_io(const unsigned int cmd, const unsigned int count, const char *str)
{
return hypercall3(XEN_CONSOLE_IO, cmd, count, str);
}
 
static inline int xen_set_callbacks(const unsigned int event_selector, const void *event_address, const unsigned int failsafe_selector, void *failsafe_address)
{
return hypercall4(XEN_SET_CALLBACKS, event_selector, event_address, failsafe_selector, failsafe_address);
}
 
static inline int xen_set_trap_table(const trap_info_t *table)
{
return hypercall1(XEN_SET_TRAP_TABLE, table);
}
 
static inline int xen_version(const unsigned int cmd, const void *arg)
{
return hypercall2(XEN_VERSION, cmd, arg);
}
 
static inline int xen_notify_remote(evtchn_t channel)
{
evtchn_op_t op;
op.cmd = EVTCHNOP_SEND;
op.send.port = channel;
return hypercall1(XEN_EVENT_CHANNEL_OP, &op);
}
 
#endif
 
#endif
/branches/network/kernel/arch/ia32xen/include/asm.h
0,0 → 1,272
/*
* Copyright (c) 2001-2004 Jakub Jermar
* Copyright (c) 2005 Sergey Bondari
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen
* @{
*/
/** @file
*/
 
#ifndef KERN_ia32xen_ASM_H_
#define KERN_ia32xen_ASM_H_
 
#include <arch/pm.h>
#include <arch/types.h>
#include <arch/barrier.h>
#include <config.h>
 
extern void enable_l_apic_in_msr(void);
 
 
extern void asm_delay_loop(uint32_t t);
extern void asm_fake_loop(uint32_t t);
 
 
/** Halt CPU
*
* Halt the current CPU until interrupt event.
*/
#define cpu_halt() ((void) 0)
#define cpu_sleep() ((void) 0)
 
#define GEN_READ_REG(reg) static inline unative_t read_ ##reg (void) \
{ \
unative_t res; \
asm volatile ("movl %%" #reg ", %0" : "=r" (res) ); \
return res; \
}
 
#define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \
{ \
asm volatile ("movl %0, %%" #reg : : "r" (regn)); \
}
 
GEN_READ_REG(cr0);
GEN_READ_REG(cr2);
 
GEN_READ_REG(dr0);
GEN_READ_REG(dr1);
GEN_READ_REG(dr2);
GEN_READ_REG(dr3);
GEN_READ_REG(dr6);
GEN_READ_REG(dr7);
 
GEN_WRITE_REG(dr0);
GEN_WRITE_REG(dr1);
GEN_WRITE_REG(dr2);
GEN_WRITE_REG(dr3);
GEN_WRITE_REG(dr6);
GEN_WRITE_REG(dr7);
 
/** Byte to port
*
* Output byte to port
*
* @param port Port to write to
* @param val Value to write
*/
static inline void outb(uint16_t port, uint8_t val) { asm volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
 
/** Word to port
*
* Output word to port
*
* @param port Port to write to
* @param val Value to write
*/
static inline void outw(uint16_t port, uint16_t val) { asm volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) ); }
 
/** Double word to port
*
* Output double word to port
*
* @param port Port to write to
* @param val Value to write
*/
static inline void outl(uint16_t port, uint32_t val) { asm volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) ); }
 
/** Byte from port
*
* Get byte from port
*
* @param port Port to read from
* @return Value read
*/
static inline uint8_t inb(uint16_t port) { uint8_t val; asm volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
 
/** Word from port
*
* Get word from port
*
* @param port Port to read from
* @return Value read
*/
static inline uint16_t inw(uint16_t port) { uint16_t val; asm volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) ); return val; }
 
/** Double word from port
*
* Get double word from port
*
* @param port Port to read from
* @return Value read
*/
static inline uint32_t inl(uint16_t port) { uint32_t val; asm volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; }
 
/** Enable interrupts.
*
* Enable interrupts and return previous
* value of EFLAGS.
*
* @return Old interrupt priority level.
*/
static inline ipl_t interrupts_enable(void)
{
// FIXME SMP
ipl_t v = shared_info.vcpu_info[0].evtchn_upcall_mask;
write_barrier();
shared_info.vcpu_info[0].evtchn_upcall_mask = 0;
write_barrier();
if (shared_info.vcpu_info[0].evtchn_upcall_pending)
force_evtchn_callback();
return v;
}
 
/** Disable interrupts.
*
* Disable interrupts and return previous
* value of EFLAGS.
*
* @return Old interrupt priority level.
*/
static inline ipl_t interrupts_disable(void)
{
// FIXME SMP
ipl_t v = shared_info.vcpu_info[0].evtchn_upcall_mask;
shared_info.vcpu_info[0].evtchn_upcall_mask = 1;
write_barrier();
return v;
}
 
/** Restore interrupt priority level.
*
* Restore EFLAGS.
*
* @param ipl Saved interrupt priority level.
*/
static inline void interrupts_restore(ipl_t ipl)
{
if (ipl == 0)
interrupts_enable();
else
interrupts_disable();
}
 
/** Return interrupt priority level.
*
* @return EFLAFS.
*/
static inline ipl_t interrupts_read(void)
{
// FIXME SMP
return shared_info.vcpu_info[0].evtchn_upcall_mask;
}
 
/** Return base address of current stack
*
* Return the base address of the current stack.
* The stack is assumed to be STACK_SIZE bytes long.
* The stack must start on page boundary.
*/
static inline uintptr_t get_stack_base(void)
{
uintptr_t v;
asm volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
return v;
}
 
/** Return current IP address */
static inline uintptr_t * get_ip()
{
uintptr_t *ip;
 
asm volatile (
"mov %%eip, %0"
: "=r" (ip)
);
return ip;
}
 
/** Invalidate TLB Entry.
*
* @param addr Address on a page whose TLB entry is to be invalidated.
*/
static inline void invlpg(uintptr_t addr)
{
asm volatile ("invlpg %0\n" :: "m" (*(unative_t *)addr));
}
 
/** Load GDTR register from memory.
*
* @param gdtr_reg Address of memory from where to load GDTR.
*/
static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
{
asm volatile ("lgdtl %0\n" : : "m" (*gdtr_reg));
}
 
/** Store GDTR register to memory.
*
* @param gdtr_reg Address of memory to where to load GDTR.
*/
static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
{
asm volatile ("sgdtl %0\n" : : "m" (*gdtr_reg));
}
 
/** Load TR from descriptor table.
*
* @param sel Selector specifying descriptor of TSS segment.
*/
static inline void tr_load(uint16_t sel)
{
asm volatile ("ltr %0" : : "r" (sel));
}
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/include/drivers/xconsole.h
0,0 → 1,56
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32xen
* @{
*/
/** @file
*/
 
#ifndef KERN_ia32xen_XCONSOLE_H_
#define KERN_ia32xen_XCONSOLE_H_
 
#include <arch/types.h>
 
typedef struct {
char in[1024];
char out[2048];
uint32_t in_cons;
uint32_t in_prod;
uint32_t out_cons;
uint32_t out_prod;
} xencons_t;
 
extern xencons_t console_page;
 
extern void xen_console_init(void);
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ia32xen/include/cycle.h
0,0 → 1,0
link ../../ia32/include/cycle.h
Property changes:
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+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/interrupt.h
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+*
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/branches/network/kernel/arch/ia32xen/include/fpu_context.h
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+*
\ No newline at end of property
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+*
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/branches/network/kernel/arch/ia32xen/include/elf.h
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+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/bios
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+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/memstr.h
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+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/arg.h
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+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/smp
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link ../../ia32/include/smp
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+*
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/branches/network/kernel/arch/ia32xen/include/ddi
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link ../../ia32/include/ddi
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+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/atomic.h
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+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/arch.h
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link ../../ia32/include/arch.h
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+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/proc
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link ../../ia32/include/proc
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+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/faddr.h
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link ../../ia32/include/faddr.h
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/branches/network/kernel/arch/ia32xen/include/debugger.h
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link ../../ia32/include/debugger.h
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\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/context.h
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link ../../ia32/include/context.h
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+*
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/branches/network/kernel/arch/ia32xen/include/debug.h
0,0 → 1,0
link ../../ia32/include/debug.h
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+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/barrier.h
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link ../../ia32/include/barrier.h
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+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/include/cpu.h
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link ../../ia32/include/cpu.h
Property changes:
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+*
\ No newline at end of property
/branches/network/kernel/arch/ia32xen/_link.ld.in
0,0 → 1,45
/** ia32xen linker script
*/
 
#include <arch/hypercall.h>
#include <arch/mm/page.h>
 
ENTRY(kernel_image_start)
 
PHDRS {
image PT_LOAD FLAGS(7); /* RWE */
note PT_NOTE FLAGS(4); /* R__ */
}
 
SECTIONS {
.image PA2KA(BOOT_OFFSET): AT (BOOT_OFFSET) {
ktext_start = .;
*(K_TEXT_START);
*(.text);
ktext_end = .;
kdata_start = .;
*(.data); /* initialized data */
*(.rodata*); /* string literals */
*(COMMON); /* global variables */
hardcoded_load_address = .;
LONG(PA2KA(0));
hardcoded_ktext_size = .;
LONG(ktext_end - ktext_start);
hardcoded_kdata_size = .;
LONG(kdata_end - kdata_start);
symbol_table = .;
*(symtab.*); /* Symbol table, must be LAST symbol! */
*(.bss); /* uninitialized static variables */
kdata_end = .;
} :image
.notes : {
*(.note.Xen);
} :note
 
/DISCARD/ : {
*(.note.GNU-stack);
*(.comment);
}
}
/branches/network/kernel/arch/ppc64/Makefile.inc
0,0 → 1,76
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
BFD_NAME = elf64-powerpc
BFD_ARCH = powerpc:common64
BFD = binary
TARGET = ppc64-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/ppc64
 
GCC_CFLAGS += -mcpu=powerpc64 -msoft-float -m64
AFLAGS += -a64
LFLAGS += -no-check-sections -N
 
DEFS += -D__64_BITS__
 
## Own configuration directives
#
 
CONFIG_FB = y
 
## Compile with hierarchical page tables support.
#
 
CONFIG_PAGE_PT = y
DEFS += -DCONFIG_PAGE_PT
 
ARCH_SOURCES = \
arch/$(ARCH)/src/context.S \
arch/$(ARCH)/src/debug/panic.s \
arch/$(ARCH)/src/fpu_context.S \
arch/$(ARCH)/src/boot/boot.S \
arch/$(ARCH)/src/ppc64.c \
arch/$(ARCH)/src/dummy.s \
arch/$(ARCH)/src/exception.S \
arch/$(ARCH)/src/interrupt.c \
arch/$(ARCH)/src/asm.S \
arch/$(ARCH)/src/cpu/cpu.c \
arch/$(ARCH)/src/proc/scheduler.c \
arch/$(ARCH)/src/ddi/ddi.c \
arch/$(ARCH)/src/mm/as.c \
arch/$(ARCH)/src/mm/frame.c \
arch/$(ARCH)/src/mm/page.c \
arch/$(ARCH)/src/mm/tlb.c \
arch/$(ARCH)/src/drivers/pic.c
/branches/network/kernel/arch/ppc64/include/mm/page.h
0,0 → 1,184
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64mm
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_PAGE_H_
#define KERN_ppc64_PAGE_H_
 
#include <arch/mm/frame.h>
 
#define PAGE_WIDTH FRAME_WIDTH
#define PAGE_SIZE FRAME_SIZE
 
#ifdef KERNEL
 
#ifndef __ASM__
# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
#else
# define KA2PA(x) ((x) - 0x80000000)
# define PA2KA(x) ((x) + 0x80000000)
#endif
 
/*
* Implementation of generic 4-level page table interface,
* the hardware Page Hash Table is used as cache.
*
* Page table layout:
* - 32-bit virtual addressess
* - Offset is 12 bits => pages are 4K long
* - PTL0 has 1024 entries (10 bits)
* - PTL1 is not used
* - PTL2 is not used
* - PLT3 has 1024 entries (10 bits)
*/
 
/* Number of entries in each level. */
#define PTL0_ENTRIES_ARCH 1024
#define PTL1_ENTRIES_ARCH 0
#define PTL2_ENTRIES_ARCH 0
#define PTL3_ENTRIES_ARCH 1024
 
/* Sizes of page tables in each level. */
#define PTL0_SIZE_ARCH ONE_FRAME
#define PTL1_SIZE_ARCH 0
#define PTL2_SIZE_ARCH 0
#define PTL3_SIZE_ARCH ONE_FRAME
 
/* Macros calculating indices into page tables in each level. */
#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)
#define PTL1_INDEX_ARCH(vaddr) 0
#define PTL2_INDEX_ARCH(vaddr) 0
#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff)
 
/* Get PTE address accessors for each level. */
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
(((pte_t *) (ptl0))[(i)].pfn << 12)
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
(ptl1)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
(ptl2)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
(((pte_t *) (ptl3))[(i)].pfn << 12)
 
/* Set PTE address accessors for each level. */
#define SET_PTL0_ADDRESS_ARCH(ptl0)
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
(((pte_t *) (ptl0))[(i)].pfn = (a) >> 12)
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
(((pte_t *) (ptl3))[(i)].pfn = (a) >> 12)
 
/* Get PTE flags accessors for each level. */
#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
get_pt_flags((pte_t *) (ptl0), (index_t) (i))
#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
PAGE_PRESENT
#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
PAGE_PRESENT
#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
get_pt_flags((pte_t *) (ptl3), (index_t) (i))
 
/* Set PTE flags accessors for each level. */
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
 
/* Macros for querying the last-level PTEs. */
#define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0)
#define PTE_PRESENT_ARCH(pte) ((pte)->p != 0)
#define PTE_GET_FRAME_ARCH(pte) ((uintptr_t) ((pte)->pfn << 12))
#define PTE_WRITABLE_ARCH(pte) 1
#define PTE_EXECUTABLE_ARCH(pte) 1
 
#ifndef __ASM__
 
#include <mm/mm.h>
#include <arch/interrupt.h>
 
static inline int get_pt_flags(pte_t *pt, index_t i)
{
pte_t *p = &pt[i];
return ((1 << PAGE_CACHEABLE_SHIFT) |
((!p->p) << PAGE_PRESENT_SHIFT) |
(1 << PAGE_USER_SHIFT) |
(1 << PAGE_READ_SHIFT) |
(1 << PAGE_WRITE_SHIFT) |
(1 << PAGE_EXEC_SHIFT) |
(p->g << PAGE_GLOBAL_SHIFT));
}
 
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
{
pte_t *p = &pt[i];
p->p = !(flags & PAGE_NOT_PRESENT);
p->g = (flags & PAGE_GLOBAL) != 0;
p->valid = 1;
}
 
extern void page_arch_init(void);
 
#define PHT_BITS 16
#define PHT_ORDER 4
 
typedef struct {
unsigned v : 1; /**< Valid */
unsigned vsid : 24; /**< Virtual Segment ID */
unsigned h : 1; /**< Primary/secondary hash */
unsigned api : 6; /**< Abbreviated Page Index */
unsigned rpn : 20; /**< Real Page Number */
unsigned reserved0 : 3;
unsigned r : 1; /**< Reference */
unsigned c : 1; /**< Change */
unsigned wimg : 4; /**< Access control */
unsigned reserved1 : 1;
unsigned pp : 2; /**< Page protection */
} phte_t;
 
extern void pht_refill(bool data, istate_t *istate);
extern void pht_init(void);
 
#endif /* __ASM__ */
 
#endif /* KERNEL */
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/mm/frame.h
0,0 → 1,57
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64mm
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_FRAME_H_
#define KERN_ppc64_FRAME_H_
 
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
#ifdef KERNEL
#ifndef __ASM__
 
#include <arch/types.h>
 
extern uintptr_t last_frame;
 
extern void frame_arch_init(void);
extern void physmem_print(void);
 
#endif /* __ASM__ */
#endif /* KERNEL */
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/mm/as.h
0,0 → 1,64
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64mm
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_AS_H_
#define KERN_ppc64_AS_H_
 
#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0
 
#define KERNEL_ADDRESS_SPACE_START_ARCH ((unsigned long) 0x80000000)
#define KERNEL_ADDRESS_SPACE_END_ARCH ((unsigned long) 0xffffffff)
#define USER_ADDRESS_SPACE_START_ARCH ((unsigned long) 0x00000000)
#define USER_ADDRESS_SPACE_END_ARCH ((unsigned long) 0x7fffffff)
 
#define USTACK_ADDRESS_ARCH (0x7fffffff - (PAGE_SIZE - 1))
 
typedef struct {
} as_arch_t;
 
#include <genarch/mm/as_pt.h>
 
#define as_constructor_arch(as, flags) (as != as)
#define as_destructor_arch(as) (as != as)
#define as_create_arch(as, flags) (as != as)
#define as_install_arch(as)
#define as_deinstall_arch(as)
#define as_invalidate_translation_cache(as, page, cnt)
 
extern void as_arch_init(void);
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/mm/asid.h
0,0 → 1,48
/*
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64mm
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_ASID_H_
#define KERN_ppc64_ASID_H_
 
typedef int asid_t;
 
#define ASID_MAX_ARCH 3
 
#define asid_get() (ASID_START+1)
#define asid_put(asid)
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/mm/tlb.h
0,0 → 1,41
/*
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64mm
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_TLB_H_
#define KERN_ppc64_TLB_H_
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/barrier.h
0,0 → 1,51
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_BARRIER_H_
#define KERN_ppc64_BARRIER_H_
 
#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory")
#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory")
 
#define memory_barrier() asm volatile ("sync" ::: "memory")
#define read_barrier() asm volatile ("sync" ::: "memory")
#define write_barrier() asm volatile ("eieio" ::: "memory")
 
#define smc_coherence(a)
#define smc_coherence_block(a, l)
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/memstr.h
0,0 → 1,48
/*
* Copyright (c) 2005 Sergey Bondari
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_MEMSTR_H_
#define KERN_ppc64_MEMSTR_H_
 
#define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt))
 
extern void memsetw(void *dst, size_t cnt, uint16_t x);
extern void memsetb(void *dst, size_t cnt, uint8_t x);
 
extern int memcmp(const void *a, const void *b, size_t cnt);
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/exception.h
0,0 → 1,102
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_EXCEPTION_H_
#define KERN_ppc64_EXCEPTION_H_
 
#include <arch/types.h>
 
typedef struct {
uint64_t r0;
uint64_t r2;
uint64_t r3;
uint64_t r4;
uint64_t r5;
uint64_t r6;
uint64_t r7;
uint64_t r8;
uint64_t r9;
uint64_t r10;
uint64_t r11;
uint64_t r13;
uint64_t r14;
uint64_t r15;
uint64_t r16;
uint64_t r17;
uint64_t r18;
uint64_t r19;
uint64_t r20;
uint64_t r21;
uint64_t r22;
uint64_t r23;
uint64_t r24;
uint64_t r25;
uint64_t r26;
uint64_t r27;
uint64_t r28;
uint64_t r29;
uint64_t r30;
uint64_t r31;
uint64_t cr;
uint64_t pc;
uint64_t srr1;
uint64_t lr;
uint64_t ctr;
uint64_t xer;
uint64_t r12;
uint64_t sp;
} istate_t;
 
static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
{
istate->pc = retaddr;
}
 
/** Return true if exception happened while in userspace */
#include <panic.h>
static inline int istate_from_uspace(istate_t *istate)
{
panic("istate_from_uspace not yet implemented");
return 0;
}
 
static inline unative_t istate_get_pc(istate_t *istate)
{
return istate->pc;
}
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/types.h
0,0 → 1,72
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_TYPES_H_
#define KERN_ppc64_TYPES_H_
 
typedef signed char int8_t;
typedef signed short int16_t;
typedef signed int int32_t;
typedef signed long int64_t;
 
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned int uint32_t;
typedef unsigned long uint64_t;
 
typedef uint64_t size_t;
typedef uint64_t count_t;
typedef uint64_t index_t;
 
typedef uint64_t uintptr_t;
typedef uint64_t pfn_t;
 
typedef uint64_t ipl_t;
 
typedef uint64_t unative_t;
typedef int64_t native_t;
 
/** Page Table Entry. */
typedef struct {
unsigned p : 1; /**< Present bit. */
unsigned a : 1; /**< Accessed bit. */
unsigned g : 1; /**< Global bit. */
unsigned valid : 1; /**< Valid content even if not present. */
unsigned pfn : 20; /**< Physical frame number. */
} pte_t;
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/context_offset.h
0,0 → 1,132
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef KERN_ppc64_CONTEXT_OFFSET_H_
#define KERN_ppc64_CONTEXT_OFFSET_H_
 
#define OFFSET_SP 0x0
#define OFFSET_PC 0x8
#define OFFSET_R2 0x10
#define OFFSET_R13 0x18
#define OFFSET_R14 0x20
#define OFFSET_R15 0x28
#define OFFSET_R16 0x30
#define OFFSET_R17 0x38
#define OFFSET_R18 0x40
#define OFFSET_R19 0x48
#define OFFSET_R20 0x50
#define OFFSET_R21 0x58
#define OFFSET_R22 0x60
#define OFFSET_R23 0x68
#define OFFSET_R24 0x70
#define OFFSET_R25 0x78
#define OFFSET_R26 0x80
#define OFFSET_R27 0x88
#define OFFSET_R28 0x90
#define OFFSET_R29 0x98
#define OFFSET_R30 0xa0
#define OFFSET_R31 0xa8
#define OFFSET_CR 0xb0
 
#define OFFSET_FR14 0x0
#define OFFSET_FR15 0x8
#define OFFSET_FR16 0x10
#define OFFSET_FR17 0x18
#define OFFSET_FR18 0x20
#define OFFSET_FR19 0x28
#define OFFSET_FR20 0x30
#define OFFSET_FR21 0x38
#define OFFSET_FR22 0x40
#define OFFSET_FR23 0x48
#define OFFSET_FR24 0x50
#define OFFSET_FR25 0x58
#define OFFSET_FR26 0x60
#define OFFSET_FR27 0x68
#define OFFSET_FR28 0x70
#define OFFSET_FR29 0x78
#define OFFSET_FR30 0x80
#define OFFSET_FR31 0x88
#define OFFSET_FPSCR 0x90
 
 
#ifdef __ASM__
# include <arch/asm/regname.h>
 
# ctx: address of the structure with saved context
.macro CONTEXT_SAVE_ARCH_CORE ctx:req
stw sp, OFFSET_SP(\ctx)
stw r2, OFFSET_R2(\ctx)
stw r13, OFFSET_R13(\ctx)
stw r14, OFFSET_R14(\ctx)
stw r15, OFFSET_R15(\ctx)
stw r16, OFFSET_R16(\ctx)
stw r17, OFFSET_R17(\ctx)
stw r18, OFFSET_R18(\ctx)
stw r19, OFFSET_R19(\ctx)
stw r20, OFFSET_R20(\ctx)
stw r21, OFFSET_R21(\ctx)
stw r22, OFFSET_R22(\ctx)
stw r23, OFFSET_R23(\ctx)
stw r24, OFFSET_R24(\ctx)
stw r25, OFFSET_R25(\ctx)
stw r26, OFFSET_R26(\ctx)
stw r27, OFFSET_R27(\ctx)
stw r28, OFFSET_R28(\ctx)
stw r29, OFFSET_R29(\ctx)
stw r30, OFFSET_R30(\ctx)
stw r31, OFFSET_R31(\ctx)
.endm
 
# ctx: address of the structure with saved context
.macro CONTEXT_RESTORE_ARCH_CORE ctx:req
lwz sp, OFFSET_SP(\ctx)
lwz r2, OFFSET_R2(\ctx)
lwz r13, OFFSET_R13(\ctx)
lwz r14, OFFSET_R14(\ctx)
lwz r15, OFFSET_R15(\ctx)
lwz r16, OFFSET_R16(\ctx)
lwz r17, OFFSET_R17(\ctx)
lwz r18, OFFSET_R18(\ctx)
lwz r19, OFFSET_R19(\ctx)
lwz r20, OFFSET_R20(\ctx)
lwz r21, OFFSET_R21(\ctx)
lwz r22, OFFSET_R22(\ctx)
lwz r23, OFFSET_R23(\ctx)
lwz r24, OFFSET_R24(\ctx)
lwz r25, OFFSET_R25(\ctx)
lwz r26, OFFSET_R26(\ctx)
lwz r27, OFFSET_R27(\ctx)
lwz r28, OFFSET_R28(\ctx)
lwz r29, OFFSET_R29(\ctx)
lwz r30, OFFSET_R30(\ctx)
lwz r31, OFFSET_R31(\ctx)
.endm
 
#endif /* __ASM__ */
 
#endif
/branches/network/kernel/arch/ppc64/include/byteorder.h
0,0 → 1,43
/*
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_BYTEORDER_H_
#define KERN_ppc64_BYTEORDER_H_
 
#define ARCH_IS_BIG_ENDIAN
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/cpu.h
0,0 → 1,48
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_CPU_H_
#define KERN_ppc64_CPU_H_
 
#include <arch/asm.h>
 
typedef struct {
int version;
int revision;
} cpu_arch_t;
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/drivers/pic.h
0,0 → 1,56
/*
* Copyright (c) 2006 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_PIC_H_
#define KERN_ppc64_PIC_H_
 
#include <arch/types.h>
 
#define PIC_PENDING_LOW 8
#define PIC_PENDING_HIGH 4
#define PIC_MASK_LOW 9
#define PIC_MASK_HIGH 5
#define PIC_ACK_LOW 10
#define PIC_ACK_HIGH 6
 
void pic_init(uintptr_t base, size_t size);
void pic_enable_interrupt(int intnum);
void pic_disable_interrupt(int intnum);
void pic_ack_interrupt(int intnum);
int pic_get_pending(void);
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/fpu_context.h
0,0 → 1,67
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_FPU_CONTEXT_H_
#define KERN_ppc64_FPU_CONTEXT_H_
 
#ifndef KERN_ppc64_TYPES_H_
# include <arch/types.h>
#endif
 
typedef struct {
uint64_t fr14;
uint64_t fr15;
uint64_t fr16;
uint64_t fr17;
uint64_t fr18;
uint64_t fr19;
uint64_t fr20;
uint64_t fr21;
uint64_t fr22;
uint64_t fr23;
uint64_t fr24;
uint64_t fr25;
uint64_t fr26;
uint64_t fr27;
uint64_t fr28;
uint64_t fr29;
uint64_t fr30;
uint64_t fr31;
uint32_t fpscr;
} __attribute__ ((packed)) fpu_context_t;
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/context.h
0,0 → 1,75
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_CONTEXT_H_
#define KERN_ppc64_CONTEXT_H_
 
#include <arch/types.h>
 
#define SP_DELTA 16
 
typedef struct {
uintptr_t sp;
uintptr_t pc;
uint64_t r2;
uint64_t r13;
uint64_t r14;
uint64_t r15;
uint64_t r16;
uint64_t r17;
uint64_t r18;
uint64_t r19;
uint64_t r20;
uint64_t r21;
uint64_t r22;
uint64_t r23;
uint64_t r24;
uint64_t r25;
uint64_t r26;
uint64_t r27;
uint64_t r28;
uint64_t r29;
uint64_t r30;
uint64_t r31;
uint64_t cr;
ipl_t ipl;
} __attribute__ ((packed)) context_t;
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/cpuid.h
0,0 → 1,56
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_CPUID_H_
#define KERN_ppc64_CPUID_H_
 
#include <arch/types.h>
 
typedef struct {
uint16_t version;
uint16_t revision;
} __attribute__ ((packed)) cpu_info_t;
 
static inline void cpu_version(cpu_info_t *info)
{
asm volatile (
"mfpvr %0\n"
: "=r" (*info)
);
}
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/asm/regname.h
0,0 → 1,215
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_REGNAME_H_
#define KERN_ppc64_REGNAME_H_
 
/* Condition Register Bit Fields */
#define cr0 0
#define cr1 1
#define cr2 2
#define cr3 3
#define cr4 4
#define cr5 5
#define cr6 6
#define cr7 7
 
/* General Purpose Registers (GPRs) */
#define r0 0
#define r1 1
#define r2 2
#define r3 3
#define r4 4
#define r5 5
#define r6 6
#define r7 7
#define r8 8
#define r9 9
#define r10 10
#define r11 11
#define r12 12
#define r13 13
#define r14 14
#define r15 15
#define r16 16
#define r17 17
#define r18 18
#define r19 19
#define r20 20
#define r21 21
#define r22 22
#define r23 23
#define r24 24
#define r25 25
#define r26 26
#define r27 27
#define r28 28
#define r29 29
#define r30 30
#define r31 31
 
/* GPR Aliases */
#define sp 1
 
/* Floating Point Registers (FPRs) */
#define fr0 0
#define fr1 1
#define fr2 2
#define fr3 3
#define fr4 4
#define fr5 5
#define fr6 6
#define fr7 7
#define fr8 8
#define fr9 9
#define fr10 10
#define fr11 11
#define fr12 12
#define fr13 13
#define fr14 14
#define fr15 15
#define fr16 16
#define fr17 17
#define fr18 18
#define fr19 19
#define fr20 20
#define fr21 21
#define fr22 22
#define fr23 23
#define fr24 24
#define fr25 25
#define fr26 26
#define fr27 27
#define fr28 28
#define fr29 29
#define fr30 30
#define fr31 31
 
#define vr0 0
#define vr1 1
#define vr2 2
#define vr3 3
#define vr4 4
#define vr5 5
#define vr6 6
#define vr7 7
#define vr8 8
#define vr9 9
#define vr10 10
#define vr11 11
#define vr12 12
#define vr13 13
#define vr14 14
#define vr15 15
#define vr16 16
#define vr17 17
#define vr18 18
#define vr19 19
#define vr20 20
#define vr21 21
#define vr22 22
#define vr23 23
#define vr24 24
#define vr25 25
#define vr26 26
#define vr27 27
#define vr28 28
#define vr29 29
#define vr30 30
#define vr31 31
 
#define evr0 0
#define evr1 1
#define evr2 2
#define evr3 3
#define evr4 4
#define evr5 5
#define evr6 6
#define evr7 7
#define evr8 8
#define evr9 9
#define evr10 10
#define evr11 11
#define evr12 12
#define evr13 13
#define evr14 14
#define evr15 15
#define evr16 16
#define evr17 17
#define evr18 18
#define evr19 19
#define evr20 20
#define evr21 21
#define evr22 22
#define evr23 23
#define evr24 24
#define evr25 25
#define evr26 26
#define evr27 27
#define evr28 28
#define evr29 29
#define evr30 30
#define evr31 31
 
/* Special Purpose Registers (SPRs) */
#define xer 1
#define lr 8
#define ctr 9
#define dec 22
#define sdr1 25
#define srr0 26
#define srr1 27
#define sprg0 272
#define sprg1 273
#define sprg2 274
#define sprg3 275
#define prv 287
#define hid0 1008
 
/* MSR bits */
#define msr_ir (1 << 4)
#define msr_dr (1 << 5)
#define msr_pr (1 << 14)
#define msr_ee (1 << 15)
 
/* HID0 bits */
#define hid0_ice (1 << 15)
#define hid0_dce (1 << 14)
#define hid0_icfi (1 << 11)
#define hid0_dci (1 << 10)
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/interrupt.h
0,0 → 1,55
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64interrupt
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_INTERRUPT_H_
#define KERN_ppc64_INTERRUPT_H_
 
#include <arch/exception.h>
 
#define IVT_ITEMS 16
#define IVT_FIRST 0
 
#define VECTOR_DATA_STORAGE 2
#define VECTOR_INSTRUCTION_STORAGE 3
#define VECTOR_EXTERNAL 4
#define VECTOR_DECREMENTER 8
 
extern void start_decrementer(void);
extern void interrupt_init(void);
extern void extint_handler(int n, istate_t *istate);
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/cycle.h
0,0 → 1,46
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_CYCLE_H_
#define KERN_ppc64_CYCLE_H_
 
static inline uint64_t get_cycle(void)
{
return 0;
}
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/elf.h
0,0 → 1,45
/*
* Copyright (c) 2006 Sergey Bondari
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_ELF_H_
#define KERN_ppc64_ELF_H_
 
#define ELF_MACHINE EM_PPC64
#define ELF_DATA_ENCODING ELFDATA2MSB
#define ELF_CLASS ELFCLASS32
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/arg.h
0,0 → 1,43
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_ARG_H_
#define KERN_ppc64_ARG_H_
 
#include <stdarg.h>
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/atomic.h
0,0 → 1,97
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_ATOMIC_H_
#define KERN_ppc64_ATOMIC_H_
 
static inline void atomic_inc(atomic_t *val)
{
long tmp;
 
asm volatile (
"1:\n"
"lwarx %0, 0, %2\n"
"addic %0, %0, 1\n"
"stwcx. %0, 0, %2\n"
"bne- 1b"
: "=&r" (tmp), "=m" (val->count)
: "r" (&val->count), "m" (val->count)
: "cc"
);
}
 
static inline void atomic_dec(atomic_t *val)
{
long tmp;
 
asm volatile (
"1:\n"
"lwarx %0, 0, %2\n"
"addic %0, %0, -1\n"
"stwcx. %0, 0, %2\n"
"bne- 1b"
: "=&r" (tmp), "=m" (val->count)
: "r" (&val->count), "m" (val->count)
: "cc"
);
}
 
static inline long atomic_postinc(atomic_t *val)
{
atomic_inc(val);
return val->count - 1;
}
 
static inline long atomic_postdec(atomic_t *val)
{
atomic_dec(val);
return val->count + 1;
}
 
static inline long atomic_preinc(atomic_t *val)
{
atomic_inc(val);
return val->count;
}
 
static inline long atomic_predec(atomic_t *val)
{
atomic_dec(val);
return val->count;
}
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/boot/boot.h
0,0 → 1,92
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_BOOT_H_
#define KERN_ppc64_BOOT_H_
 
#define BOOT_OFFSET 0x4000
 
/* Temporary stack size for boot process */
#define TEMP_STACK_SIZE 0x100
 
#define TASKMAP_MAX_RECORDS 32
#define MEMMAP_MAX_RECORDS 32
 
#ifndef __ASM__
 
#include <arch/types.h>
 
typedef struct {
uintptr_t addr;
uint64_t size;
} utask_t;
 
typedef struct {
uint32_t count;
utask_t tasks[TASKMAP_MAX_RECORDS];
} taskmap_t;
 
typedef struct {
uintptr_t start;
uint64_t size;
} memzone_t;
 
typedef struct {
uint64_t total;
uint32_t count;
memzone_t zones[MEMMAP_MAX_RECORDS];
} memmap_t;
 
typedef struct {
uintptr_t addr;
unsigned int width;
unsigned int height;
unsigned int bpp;
unsigned int scanline;
} screen_t;
 
typedef struct {
taskmap_t taskmap;
memmap_t memmap;
screen_t screen;
} bootinfo_t;
 
extern bootinfo_t bootinfo;
 
#endif
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/arch.h
0,0 → 1,41
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_ARCH_H_
#define KERN_ppc64_ARCH_H_
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/proc/task.h
0,0 → 1,47
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64proc
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_TASK_H_
#define KERN_ppc64_TASK_H_
 
typedef struct {
} task_arch_t;
 
#define task_create_arch(t)
#define task_destroy_arch(t)
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/proc/thread.h
0,0 → 1,48
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64proc
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_THREAD_H_
#define KERN_ppc64_THREAD_H_
 
typedef struct {
} thread_arch_t;
 
#define thr_constructor_arch(t)
#define thr_destructor_arch(t)
#define thread_create_arch(t)
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/asm.h
0,0 → 1,161
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_ASM_H_
#define KERN_ppc64_ASM_H_
 
#include <arch/types.h>
#include <config.h>
 
/** Enable interrupts.
*
* Enable interrupts and return previous
* value of EE.
*
* @return Old interrupt priority level.
*/
static inline ipl_t interrupts_enable(void)
{
ipl_t v;
ipl_t tmp;
asm volatile (
"mfmsr %0\n"
"mfmsr %1\n"
"ori %1, %1, 1 << 15\n"
"mtmsr %1\n"
: "=r" (v), "=r" (tmp)
);
return v;
}
 
/** Disable interrupts.
*
* Disable interrupts and return previous
* value of EE.
*
* @return Old interrupt priority level.
*/
static inline ipl_t interrupts_disable(void)
{
ipl_t v;
ipl_t tmp;
asm volatile (
"mfmsr %0\n"
"mfmsr %1\n"
"rlwinm %1, %1, 0, 17, 15\n"
"mtmsr %1\n"
: "=r" (v), "=r" (tmp)
);
return v;
}
 
/** Restore interrupt priority level.
*
* Restore EE.
*
* @param ipl Saved interrupt priority level.
*/
static inline void interrupts_restore(ipl_t ipl)
{
ipl_t tmp;
asm volatile (
"mfmsr %1\n"
"rlwimi %0, %1, 0, 17, 15\n"
"cmpw 0, %0, %1\n"
"beq 0f\n"
"mtmsr %0\n"
"0:\n"
: "=r" (ipl), "=r" (tmp)
: "0" (ipl)
: "cr0"
);
}
 
/** Return interrupt priority level.
*
* Return EE.
*
* @return Current interrupt priority level.
*/
static inline ipl_t interrupts_read(void)
{
ipl_t v;
asm volatile (
"mfmsr %0\n"
: "=r" (v)
);
return v;
}
 
/** Return base address of current stack.
*
* Return the base address of the current stack.
* The stack is assumed to be STACK_SIZE bytes long.
* The stack must start on page boundary.
*/
static inline uintptr_t get_stack_base(void)
{
uintptr_t v;
asm volatile (
"and %0, %%sp, %1\n"
: "=r" (v)
: "r" (~(STACK_SIZE - 1))
);
return v;
}
 
static inline void cpu_sleep(void)
{
}
 
static inline void cpu_halt(void)
{
asm volatile (
"b 0\n"
);
}
 
void asm_delay_loop(uint32_t t);
 
extern void userspace_asm(uintptr_t uspace_uarg, uintptr_t stack, uintptr_t entry);
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/faddr.h
0,0 → 1,45
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_FADDR_H_
#define KERN_ppc64_FADDR_H_
 
#include <arch/types.h>
 
#define FADDR(fptr) ((uintptr_t) (fptr))
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/include/debug.h
0,0 → 1,41
/*
* Copyright (c) 2005
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64debug
* @{
*/
/** @file
*/
 
#ifndef KERN_ppc64_DEBUG_H_
#define KERN_ppc64_DEBUG_H_
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/ppc64/src/asm.S
0,0 → 1,315
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/asm/regname.h>
 
.text
 
.global userspace_asm
.global iret
.global iret_syscall
.global memsetb
.global memcpy
.global memcpy_from_uspace
.global memcpy_to_uspace
.global memcpy_from_uspace_failover_address
.global memcpy_to_uspace_failover_address
 
userspace_asm:
 
# r3 = uspace_uarg
# r4 = stack
# r5 = entry
# disable interrupts
 
mfmsr r31
rlwinm r31, r31, 0, 17, 15
mtmsr r31
# set entry point
mtsrr0 r5
# set problem state, enable interrupts
ori r31, r31, msr_pr
ori r31, r31, msr_ee
mtsrr1 r31
# set stack
mr sp, r4
# %r3 is defined to hold pcb_ptr - set it to 0
 
xor r3, r3, r3
 
# jump to userspace
rfi
 
iret:
# disable interrupts
mfmsr r31
rlwinm r31, r31, 0, 17, 15
mtmsr r31
lwz r0, 8(sp)
lwz r2, 12(sp)
lwz r3, 16(sp)
lwz r4, 20(sp)
lwz r5, 24(sp)
lwz r6, 28(sp)
lwz r7, 32(sp)
lwz r8, 36(sp)
lwz r9, 40(sp)
lwz r10, 44(sp)
lwz r11, 48(sp)
lwz r13, 52(sp)
lwz r14, 56(sp)
lwz r15, 60(sp)
lwz r16, 64(sp)
lwz r17, 68(sp)
lwz r18, 72(sp)
lwz r19, 76(sp)
lwz r20, 80(sp)
lwz r21, 84(sp)
lwz r22, 88(sp)
lwz r23, 92(sp)
lwz r24, 96(sp)
lwz r25, 100(sp)
lwz r26, 104(sp)
lwz r27, 108(sp)
lwz r28, 112(sp)
lwz r29, 116(sp)
lwz r30, 120(sp)
lwz r31, 124(sp)
lwz r12, 128(sp)
mtcr r12
lwz r12, 132(sp)
mtsrr0 r12
lwz r12, 136(sp)
mtsrr1 r12
lwz r12, 140(sp)
mtlr r12
lwz r12, 144(sp)
mtctr r12
lwz r12, 148(sp)
mtxer r12
lwz r12, 152(sp)
lwz sp, 156(sp)
rfi
 
iret_syscall:
# reset decrementer
 
li r31, 1000
mtdec r31
# disable interrupts
mfmsr r31
rlwinm r31, r31, 0, 17, 15
mtmsr r31
lwz r0, 8(sp)
lwz r2, 12(sp)
lwz r4, 20(sp)
lwz r5, 24(sp)
lwz r6, 28(sp)
lwz r7, 32(sp)
lwz r8, 36(sp)
lwz r9, 40(sp)
lwz r10, 44(sp)
lwz r11, 48(sp)
lwz r13, 52(sp)
lwz r14, 56(sp)
lwz r15, 60(sp)
lwz r16, 64(sp)
lwz r17, 68(sp)
lwz r18, 72(sp)
lwz r19, 76(sp)
lwz r20, 80(sp)
lwz r21, 84(sp)
lwz r22, 88(sp)
lwz r23, 92(sp)
lwz r24, 96(sp)
lwz r25, 100(sp)
lwz r26, 104(sp)
lwz r27, 108(sp)
lwz r28, 112(sp)
lwz r29, 116(sp)
lwz r30, 120(sp)
lwz r31, 124(sp)
lwz r12, 128(sp)
mtcr r12
lwz r12, 132(sp)
mtsrr0 r12
lwz r12, 136(sp)
mtsrr1 r12
lwz r12, 140(sp)
mtlr r12
lwz r12, 144(sp)
mtctr r12
lwz r12, 148(sp)
mtxer r12
lwz r12, 152(sp)
lwz sp, 156(sp)
 
rfi
memsetb:
rlwimi r5, r5, 8, 16, 23
rlwimi r5, r5, 16, 0, 15
addi r14, r3, -4
cmplwi 0, r4, 4
blt 7f
stwu r5, 4(r14)
beqlr
andi. r15, r14, 3
add r4, r15, r4
subf r14, r15, r14
srwi r15, r4, 2
mtctr r15
bdz 6f
1:
stwu r5, 4(r14)
bdnz 1b
6:
andi. r4, r4, 3
7:
cmpwi 0, r4, 0
beqlr
mtctr r4
addi r6, r6, 3
8:
stbu r5, 1(r14)
bdnz 8b
blr
 
memcpy:
memcpy_from_uspace:
memcpy_to_uspace:
 
srwi. r7, r5, 3
addi r6, r3, -4
addi r4, r4, -4
beq 2f
andi. r0, r6, 3
mtctr r7
bne 5f
1:
lwz r7, 4(r4)
lwzu r8, 8(r4)
stw r7, 4(r6)
stwu r8, 8(r6)
bdnz 1b
andi. r5, r5, 7
2:
cmplwi 0, r5, 4
blt 3f
lwzu r0, 4(r4)
addi r5, r5, -4
stwu r0, 4(r6)
3:
cmpwi 0, r5, 0
beqlr
mtctr r5
addi r4, r4, 3
addi r6, r6, 3
4:
lbzu r0, 1(r4)
stbu r0, 1(r6)
bdnz 4b
blr
5:
subfic r0, r0, 4
mtctr r0
6:
lbz r7, 4(r4)
addi r4, r4, 1
stb r7, 4(r6)
addi r6, r6, 1
bdnz 6b
subf r5, r0, r5
rlwinm. r7, r5, 32-3, 3, 31
beq 2b
mtctr r7
b 1b
 
memcpy_from_uspace_failover_address:
memcpy_to_uspace_failover_address:
b memcpy_from_uspace_failover_address
/branches/network/kernel/arch/ppc64/src/mm/page.c
0,0 → 1,305
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64mm
* @{
*/
/** @file
*/
 
#include <arch/mm/page.h>
#include <genarch/mm/page_pt.h>
#include <arch/mm/frame.h>
#include <arch/asm.h>
#include <mm/frame.h>
#include <mm/page.h>
#include <mm/as.h>
#include <arch.h>
#include <arch/types.h>
#include <arch/exception.h>
#include <align.h>
#include <config.h>
#include <print.h>
#include <symtab.h>
 
static phte_t *phte;
 
 
/** Try to find PTE for faulting address
*
* Try to find PTE for faulting address.
* The as->lock must be held on entry to this function
* if lock is true.
*
* @param as Address space.
* @param lock Lock/unlock the address space.
* @param badvaddr Faulting virtual address.
* @param access Access mode that caused the fault.
* @param istate Pointer to interrupted state.
* @param pfrc Pointer to variable where as_page_fault() return code will be stored.
* @return PTE on success, NULL otherwise.
*
*/
static pte_t *find_mapping_and_check(as_t *as, bool lock, uintptr_t badvaddr, int access,
istate_t *istate, int *pfrc)
{
/*
* Check if the mapping exists in page tables.
*/
pte_t *pte = page_mapping_find(as, badvaddr);
if ((pte) && (pte->p)) {
/*
* Mapping found in page tables.
* Immediately succeed.
*/
return pte;
} else {
int rc;
/*
* Mapping not found in page tables.
* Resort to higher-level page fault handler.
*/
page_table_unlock(as, lock);
switch (rc = as_page_fault(badvaddr, access, istate)) {
case AS_PF_OK:
/*
* The higher-level page fault handler succeeded,
* The mapping ought to be in place.
*/
page_table_lock(as, lock);
pte = page_mapping_find(as, badvaddr);
ASSERT((pte) && (pte->p));
*pfrc = 0;
return pte;
case AS_PF_DEFER:
page_table_lock(as, lock);
*pfrc = rc;
return NULL;
case AS_PF_FAULT:
page_table_lock(as, lock);
printf("Page fault.\n");
*pfrc = rc;
return NULL;
default:
panic("unexpected rc (%d)\n", rc);
}
}
}
 
 
static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate)
{
char *symbol = "";
char *sym2 = "";
 
char *s = get_symtab_entry(istate->pc);
if (s)
symbol = s;
s = get_symtab_entry(istate->lr);
if (s)
sym2 = s;
panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2);
}
 
 
static void pht_insert(const uintptr_t vaddr, const pfn_t pfn)
{
uint32_t page = (vaddr >> 12) & 0xffff;
uint32_t api = (vaddr >> 22) & 0x3f;
uint32_t vsid;
asm volatile (
"mfsrin %0, %1\n"
: "=r" (vsid)
: "r" (vaddr)
);
/* Primary hash (xor) */
uint32_t h = 0;
uint32_t hash = vsid ^ page;
uint32_t base = (hash & 0x3ff) << 3;
uint32_t i;
bool found = false;
/* Find unused or colliding
PTE in PTEG */
for (i = 0; i < 8; i++) {
if ((!phte[base + i].v) || ((phte[base + i].vsid == vsid) && (phte[base + i].api == api))) {
found = true;
break;
}
}
if (!found) {
/* Secondary hash (not) */
uint32_t base2 = (~hash & 0x3ff) << 3;
/* Find unused or colliding
PTE in PTEG */
for (i = 0; i < 8; i++) {
if ((!phte[base2 + i].v) || ((phte[base2 + i].vsid == vsid) && (phte[base2 + i].api == api))) {
found = true;
base = base2;
h = 1;
break;
}
}
if (!found) {
// TODO: A/C precedence groups
i = page % 8;
}
}
phte[base + i].v = 1;
phte[base + i].vsid = vsid;
phte[base + i].h = h;
phte[base + i].api = api;
phte[base + i].rpn = pfn;
phte[base + i].r = 0;
phte[base + i].c = 0;
phte[base + i].pp = 2; // FIXME
}
 
 
/** Process Instruction/Data Storage Interrupt
*
* @param data True if Data Storage Interrupt.
* @param istate Interrupted register context.
*
*/
void pht_refill(bool data, istate_t *istate)
{
uintptr_t badvaddr;
pte_t *pte;
int pfrc;
as_t *as;
bool lock;
if (AS == NULL) {
as = AS_KERNEL;
lock = false;
} else {
as = AS;
lock = true;
}
if (data) {
asm volatile (
"mfdar %0\n"
: "=r" (badvaddr)
);
} else
badvaddr = istate->pc;
page_table_lock(as, lock);
pte = find_mapping_and_check(as, lock, badvaddr, PF_ACCESS_READ /* FIXME */, istate, &pfrc);
if (!pte) {
switch (pfrc) {
case AS_PF_FAULT:
goto fail;
break;
case AS_PF_DEFER:
/*
* The page fault came during copy_from_uspace()
* or copy_to_uspace().
*/
page_table_unlock(as, lock);
return;
default:
panic("Unexpected pfrc (%d)\n", pfrc);
}
}
pte->a = 1; /* Record access to PTE */
pht_insert(badvaddr, pte->pfn);
page_table_unlock(as, lock);
return;
fail:
page_table_unlock(as, lock);
pht_refill_fail(badvaddr, istate);
}
 
 
void pht_init(void)
{
memsetb(phte, 1 << PHT_BITS, 0);
}
 
 
void page_arch_init(void)
{
if (config.cpu_active == 1) {
page_mapping_operations = &pt_mapping_operations;
uintptr_t cur;
int flags;
for (cur = 128 << 20; cur < last_frame; cur += FRAME_SIZE) {
flags = PAGE_CACHEABLE | PAGE_WRITE;
if ((PA2KA(cur) >= config.base) && (PA2KA(cur) < config.base + config.kernel_size))
flags |= PAGE_GLOBAL;
page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
}
/* Allocate page hash table */
phte_t *physical_phte = (phte_t *) frame_alloc(PHT_ORDER, FRAME_KA | FRAME_ATOMIC);
ASSERT((uintptr_t) physical_phte % (1 << PHT_BITS) == 0);
pht_init();
asm volatile (
"mtsdr1 %0\n"
:
: "r" ((uintptr_t) physical_phte)
);
}
}
 
 
uintptr_t hw_map(uintptr_t physaddr, size_t size)
{
if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
panic("Unable to map physical memory %p (%" PRIs " bytes)", physaddr, size)
uintptr_t virtaddr = PA2KA(last_frame);
pfn_t i;
for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE | PAGE_WRITE);
last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
return virtaddr;
}
 
/** @}
*/
/branches/network/kernel/arch/ppc64/src/mm/frame.c
0,0 → 1,84
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64mm
* @{
*/
/** @file
*/
 
#include <arch/boot/boot.h>
#include <arch/mm/frame.h>
#include <mm/frame.h>
#include <align.h>
#include <macros.h>
#include <print.h>
 
uintptr_t last_frame = 0;
 
void physmem_print(void)
{
unsigned int i;
printf("Base Size\n");
printf("---------- ----------\n");
for (i = 0; i < bootinfo.memmap.count; i++) {
printf("%#10x %#10x\n", bootinfo.memmap.zones[i].start,
bootinfo.memmap.zones[i].size);
}
}
 
void frame_arch_init(void)
{
pfn_t minconf = 2;
count_t i;
pfn_t start, conf;
size_t size;
for (i = 0; i < bootinfo.memmap.count; i++) {
start = ADDR2PFN(ALIGN_UP(bootinfo.memmap.zones[i].start, FRAME_SIZE));
size = SIZE2FRAMES(ALIGN_DOWN(bootinfo.memmap.zones[i].size, FRAME_SIZE));
if ((minconf < start) || (minconf >= start + size))
conf = start;
else
conf = minconf;
zone_create(start, size, conf, 0);
if (last_frame < ALIGN_UP(bootinfo.memmap.zones[i].start + bootinfo.memmap.zones[i].size, FRAME_SIZE))
last_frame = ALIGN_UP(bootinfo.memmap.zones[i].start + bootinfo.memmap.zones[i].size, FRAME_SIZE);
}
 
/* First is exception vector, second is 'implementation specific', third and fourth is reserved */
frame_mark_unavailable(0, 4);
}
 
/** @}
*/
/branches/network/kernel/arch/ppc64/src/mm/as.c
0,0 → 1,46
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64mm
* @{
*/
/** @file
*/
 
#include <arch/mm/as.h>
#include <genarch/mm/page_pt.h>
 
/** Architecture dependent address space init. */
void as_arch_init(void)
{
as_operations = &as_pt_operations;
}
 
/** @}
*/
 
/branches/network/kernel/arch/ppc64/src/mm/tlb.c
0,0 → 1,86
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64mm
* @{
*/
/** @file
*/
 
#include <mm/tlb.h>
 
 
/** Initialize Page Hash Table.
*
* Setup the Page Hash Table with no entries.
*
*/
void tlb_arch_init(void)
{
tlb_invalidate_all();
}
 
 
void tlb_invalidate_all(void)
{
asm volatile (
"tlbia\n"
"tlbsync\n"
);
}
 
 
/** Invalidate all entries in TLB that belong to specified address space.
*
* @param asid This parameter is ignored as the architecture doesn't support it.
*/
void tlb_invalidate_asid(asid_t asid)
{
tlb_invalidate_all();
}
 
/** Invalidate TLB entries for specified page range belonging to specified address space.
*
* @param asid This parameter is ignored as the architecture doesn't support it.
* @param page Address of the first page whose entry is to be invalidated.
* @param cnt Number of entries to invalidate.
*/
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
{
tlb_invalidate_all();
}
 
 
 
/** Print contents of Page Hash Table. */
void tlb_print(void)
{
}
 
/** @}
*/
/branches/network/kernel/arch/ppc64/src/cpu/cpu.c
0,0 → 1,60
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#include <arch/cpu.h>
#include <arch/cpuid.h>
#include <cpu.h>
#include <arch.h>
#include <print.h>
 
void cpu_arch_init(void)
{
}
 
void cpu_identify(void)
{
cpu_info_t info;
cpu_version(&info);
CPU->arch.version = info.version;
CPU->arch.revision = info.revision;
}
 
void cpu_print_report(cpu_t *m)
{
printf("cpu%u: version=%d, revision=%d\n", m->id, m->arch.version, m->arch.revision);
}
 
/** @}
*/
/branches/network/kernel/arch/ppc64/src/interrupt.c
0,0 → 1,108
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64interrupt
* @{
*/
/** @file
*/
 
#include <ddi/irq.h>
#include <interrupt.h>
#include <arch/interrupt.h>
#include <arch/types.h>
#include <arch.h>
#include <time/clock.h>
#include <ipc/sysipc.h>
#include <arch/drivers/pic.h>
#include <arch/mm/tlb.h>
#include <print.h>
 
 
void start_decrementer(void)
{
asm volatile (
"mtdec %0\n"
:
: "r" (1000)
);
}
 
 
/** Handler of external interrupts */
static void exception_external(int n, istate_t *istate)
{
int inum;
while ((inum = pic_get_pending()) != -1) {
bool ack = false;
irq_t *irq = irq_dispatch_and_lock(inum);
if (irq) {
/*
* The IRQ handler was found.
*/
if (irq->preack) {
/* Acknowledge the interrupt before processing */
pic_ack_interrupt(inum);
ack = true;
}
irq->handler(irq, irq->arg);
spinlock_unlock(&irq->lock);
} else {
/*
* Spurious interrupt.
*/
#ifdef CONFIG_DEBUG
printf("cpu%u: spurious interrupt (inum=%d)\n", CPU->id, inum);
#endif
}
if (!ack)
pic_ack_interrupt(inum);
}
}
 
 
static void exception_decrementer(int n, istate_t *istate)
{
clock();
start_decrementer();
}
 
 
/* Initialize basic tables for exception dispatching */
void interrupt_init(void)
{
exc_register(VECTOR_EXTERNAL, "external", exception_external);
exc_register(VECTOR_DECREMENTER, "timer", exception_decrementer);
}
 
/** @}
*/
/branches/network/kernel/arch/ppc64/src/context.S
0,0 → 1,61
#
# Copyright (c) 2005 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/asm/regname.h>
#include <arch/context_offset.h>
 
.text
 
.global context_save_arch
.global context_restore_arch
 
context_save_arch:
CONTEXT_SAVE_ARCH_CORE r3
mflr r4
stw r4, OFFSET_PC(r3)
mfcr r4
stw r4, OFFSET_CR(r3)
# context_save returns 1
li r3, 1
blr
context_restore_arch:
CONTEXT_RESTORE_ARCH_CORE r3
lwz r4, OFFSET_CR(r3)
mtcr r4
lwz r4, OFFSET_PC(r3)
mtlr r4
# context_restore returns 0
li r3, 0
blr
/branches/network/kernel/arch/ppc64/src/ppc64.c
0,0 → 1,144
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
#include <arch.h>
#include <arch/boot/boot.h>
#include <arch/interrupt.h>
#include <genarch/fb/fb.h>
#include <genarch/fb/visuals.h>
#include <userspace.h>
#include <proc/uarg.h>
#include <console/console.h>
 
bootinfo_t bootinfo;
 
void arch_pre_main(void)
{
/* Setup usermode */
init.cnt = bootinfo.taskmap.count;
uint32_t i;
for (i = 0; i < bootinfo.taskmap.count; i++) {
init.tasks[i].addr = PA2KA(bootinfo.taskmap.tasks[i].addr);
init.tasks[i].size = bootinfo.taskmap.tasks[i].size;
}
}
 
void arch_pre_mm_init(void)
{
/* Initialize dispatch table */
interrupt_init();
/* Start decrementer */
start_decrementer();
}
 
void arch_post_mm_init(void)
{
if (config.cpu_active == 1) {
/* Initialize framebuffer */
unsigned int visual;
switch (bootinfo.screen.bpp) {
case 8:
visual = VISUAL_INDIRECT_8;
break;
case 16:
visual = VISUAL_RGB_5_5_5;
break;
case 24:
visual = VISUAL_RGB_8_8_8;
break;
case 32:
visual = VISUAL_RGB_0_8_8_8;
break;
default:
panic("Unsupported bits per pixel");
}
fb_init(bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height, bootinfo.screen.scanline, visual);
/* Merge all zones to 1 big zone */
zone_merge_all();
}
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
void arch_post_smp_init(void)
{
}
 
void calibrate_delay_loop(void)
{
}
 
void userspace(uspace_arg_t *kernel_uarg)
{
userspace_asm((uintptr_t) kernel_uarg->uspace_uarg, (uintptr_t) kernel_uarg->uspace_stack + THREAD_STACK_SIZE - SP_DELTA, (uintptr_t) kernel_uarg->uspace_entry);
/* Unreachable */
for (;;)
;
}
 
/** Acquire console back for kernel
*
*/
void arch_grab_console(void)
{
}
 
/** Return console to userspace
*
*/
void arch_release_console(void)
{
}
 
void arch_reboot(void)
{
// TODO
while (1);
}
 
/** @}
*/
/branches/network/kernel/arch/ppc64/src/ddi/ddi.c
0,0 → 1,55
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64ddi
* @{
*/
/** @file
*/
 
#include <ddi/ddi.h>
#include <proc/task.h>
#include <arch/types.h>
 
/** Enable I/O space range for task.
*
* Interrupts are disabled and task is locked.
*
* @param task Task.
* @param ioaddr Startign I/O space address.
* @param size Size of the enabled I/O range.
*
* @return 0 on success or an error code from errno.h.
*/
int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
{
return 0;
}
 
/** @}
*/
/branches/network/kernel/arch/ppc64/src/drivers/pic.c
0,0 → 1,94
/*
* Copyright (c) 2006 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64
* @{
*/
/** @file
*/
 
 
#include <arch/drivers/pic.h>
#include <mm/page.h>
#include <byteorder.h>
#include <bitops.h>
 
static volatile uint32_t *pic;
 
void pic_init(uintptr_t base, size_t size)
{
pic = (uint32_t *) hw_map(base, size);
}
 
 
 
void pic_enable_interrupt(int intnum)
{
if (intnum < 32) {
pic[PIC_MASK_LOW] = pic[PIC_MASK_LOW] | (1 << intnum);
} else {
pic[PIC_MASK_HIGH] = pic[PIC_MASK_HIGH] | (1 << (intnum - 32));
}
}
 
void pic_disable_interrupt(int intnum)
{
if (intnum < 32) {
pic[PIC_MASK_LOW] = pic[PIC_MASK_LOW] & (~(1 << intnum));
} else {
pic[PIC_MASK_HIGH] = pic[PIC_MASK_HIGH] & (~(1 << (intnum - 32)));
}
}
 
void pic_ack_interrupt(int intnum)
{
if (intnum < 32)
pic[PIC_ACK_LOW] = 1 << intnum;
else
pic[PIC_ACK_HIGH] = 1 << (intnum - 32);
}
 
/** Return number of pending interrupt */
int pic_get_pending(void)
{
int pending;
 
pending = pic[PIC_PENDING_LOW];
if (pending)
return fnzb32(pending);
pending = pic[PIC_PENDING_HIGH];
if (pending)
return fnzb32(pending) + 32;
return -1;
}
 
/** @}
*/
/branches/network/kernel/arch/ppc64/src/exception.S
0,0 → 1,237
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/asm/regname.h>
#include <arch/mm/page.h>
 
.section K_UNMAPPED_TEXT_START, "ax"
 
.macro CONTEXT_STORE
# save R12 in SPRG1, backup CR in R12
# save SP in SPRG2
 
mtsprg1 r12
mfcr r12
mtsprg2 sp
# check whether SP is in kernel
andis. sp, sp, 0x8000
bne 1f
# stack is in user-space
mfsprg0 sp
b 2f
1:
# stack is in kernel
mfsprg2 sp
subis sp, sp, 0x8000
2:
subi sp, sp, 160
stw r0, 8(sp)
stw r2, 12(sp)
stw r3, 16(sp)
stw r4, 20(sp)
stw r5, 24(sp)
stw r6, 28(sp)
stw r7, 32(sp)
stw r8, 36(sp)
stw r9, 40(sp)
stw r10, 44(sp)
stw r11, 48(sp)
stw r13, 52(sp)
stw r14, 56(sp)
stw r15, 60(sp)
stw r16, 64(sp)
stw r17, 68(sp)
stw r18, 72(sp)
stw r19, 76(sp)
stw r20, 80(sp)
stw r21, 84(sp)
stw r22, 88(sp)
stw r23, 92(sp)
stw r24, 96(sp)
stw r25, 100(sp)
stw r26, 104(sp)
stw r27, 108(sp)
stw r28, 112(sp)
stw r29, 116(sp)
stw r30, 120(sp)
stw r31, 124(sp)
stw r12, 128(sp)
mfsrr0 r12
stw r12, 132(sp)
mfsrr1 r12
stw r12, 136(sp)
mflr r12
stw r12, 140(sp)
mfctr r12
stw r12, 144(sp)
mfxer r12
stw r12, 148(sp)
mfsprg1 r12
stw r12, 152(sp)
mfsprg2 r12
stw r12, 156(sp)
.endm
 
.org 0x060
jump_to_kernel:
lis r12, iret@ha
addi r12, r12, iret@l
mtlr r12
 
mfmsr r12
ori r12, r12, (msr_ir | msr_dr)@l
mtsrr1 r12
addis sp, sp, 0x8000
mr r4, sp
addi r4, r4, 8
rfi
 
jump_to_kernel_syscall:
lis r12, syscall_handler@ha
addi r12, r12, syscall_handler@l
mtsrr0 r12
lis r12, iret_syscall@ha
addi r12, r12, iret_syscall@l
mtlr r12
 
mfmsr r12
ori r12, r12, (msr_ir | msr_dr)@l
mtsrr1 r12
addis sp, sp, 0x8000
rfi
 
.org 0x100
.global exc_system_reset
exc_system_reset:
b exc_system_reset
 
.org 0x200
.global exc_machine_check
exc_machine_check:
b exc_machine_check
 
.org 0x300
.global exc_data_storage
exc_data_storage:
CONTEXT_STORE
lis r12, pht_refill@ha
addi r12, r12, pht_refill@l
mtsrr0 r12
li r3, 1
b jump_to_kernel
 
.org 0x400
.global exc_instruction_storage
exc_instruction_storage:
CONTEXT_STORE
lis r12, pht_refill@ha
addi r12, r12, pht_refill@l
mtsrr0 r12
li r3, 0
b jump_to_kernel
 
.org 0x500
.global exc_external
exc_external:
b exc_external
 
.org 0x600
.global exc_alignment
exc_alignment:
b exc_alignment
 
.org 0x700
.global exc_program
exc_program:
b exc_program
 
.org 0x800
.global exc_fp_unavailable
exc_fp_unavailable:
b exc_fp_unavailable
 
.org 0x900
.global exc_decrementer
exc_decrementer:
CONTEXT_STORE
 
lis r12, exc_dispatch@ha
addi r12, r12, exc_dispatch@l
mtsrr0 r12
li r3, 10
b jump_to_kernel
 
.org 0xa00
.global exc_reserved0
exc_reserved0:
b exc_reserved0
 
.org 0xb00
.global exc_reserved1
exc_reserved1:
b exc_reserved1
 
.org 0xc00
.global exc_syscall
exc_syscall:
CONTEXT_STORE
b jump_to_kernel_syscall
 
.org 0xd00
.global exc_trace
exc_trace:
b exc_trace
/branches/network/kernel/arch/ppc64/src/fpu_context.S
0,0 → 1,105
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/asm/regname.h>
#include <arch/context_offset.h>
 
.text
 
.global fpu_context_save
.global fpu_context_restore
.global fpu_init
.global fpu_enable
.global fpu_disable
 
.macro FPU_CONTEXT_STORE r
stfd fr14, OFFSET_FR14(\r)
stfd fr15, OFFSET_FR15(\r)
stfd fr16, OFFSET_FR16(\r)
stfd fr17, OFFSET_FR17(\r)
stfd fr18, OFFSET_FR18(\r)
stfd fr19, OFFSET_FR19(\r)
stfd fr20, OFFSET_FR20(\r)
stfd fr21, OFFSET_FR21(\r)
stfd fr22, OFFSET_FR22(\r)
stfd fr23, OFFSET_FR23(\r)
stfd fr24, OFFSET_FR24(\r)
stfd fr25, OFFSET_FR25(\r)
stfd fr26, OFFSET_FR26(\r)
stfd fr27, OFFSET_FR27(\r)
stfd fr28, OFFSET_FR28(\r)
stfd fr29, OFFSET_FR29(\r)
stfd fr30, OFFSET_FR30(\r)
stfd fr31, OFFSET_FR31(\r)
.endm
 
.macro FPU_CONTEXT_LOAD r
lfd fr14, OFFSET_FR14(\r)
lfd fr15, OFFSET_FR15(\r)
lfd fr16, OFFSET_FR16(\r)
lfd fr17, OFFSET_FR17(\r)
lfd fr18, OFFSET_FR18(\r)
lfd fr19, OFFSET_FR19(\r)
lfd fr20, OFFSET_FR20(\r)
lfd fr21, OFFSET_FR21(\r)
lfd fr22, OFFSET_FR22(\r)
lfd fr23, OFFSET_FR23(\r)
lfd fr24, OFFSET_FR24(\r)
lfd fr25, OFFSET_FR25(\r)
lfd fr26, OFFSET_FR26(\r)
lfd fr27, OFFSET_FR27(\r)
lfd fr28, OFFSET_FR28(\r)
lfd fr29, OFFSET_FR29(\r)
lfd fr30, OFFSET_FR30(\r)
lfd fr31, OFFSET_FR31(\r)
.endm
 
fpu_context_save:
// FPU_CONTEXT_STORE r3
//
// mffs fr0
// stfd fr0, OFFSET_FPSCR(r3)
blr
fpu_context_restore:
// FPU_CONTEXT_LOAD r3
//
// lfd fr0, OFFSET_FPSCR(r3)
// mtfsf 7, fr0
blr
 
fpu_init:
blr
 
fpu_enable:
blr
 
fpu_disable:
blr
/branches/network/kernel/arch/ppc64/src/boot/boot.S
0,0 → 1,81
#
# Copyright (c) 2005 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/asm/regname.h>
#include <arch/boot/boot.h>
 
.section K_TEXT_START, "ax"
 
.global kernel_image_start
kernel_image_start:
 
# load temporal kernel stack
lis sp, kernel_stack@ha
addi sp, sp, kernel_stack@l
# set kernel stack for interrupt handling
mr r31, sp
subis r31, r31, 0x8000
mtsprg0 r31
# r3 contains physical address of bootinfo_t
# r4 contains size of bootinfo_t
addis r3, r3, 0x8000
 
lis r31, bootinfo@ha
addi r31, r31, bootinfo@l # r31 = bootinfo
cmpwi r4, 0
beq bootinfo_end
bootinfo_loop:
lwz r30, 0(r3)
stw r30, 0(r31)
addi r3, r3, 4
addi r31, r31, 4
subi r4, r4, 4
cmpwi r4, 0
bgt bootinfo_loop
bootinfo_end:
bl arch_pre_main
b main_bsp
 
.section K_DATA_START, "aw", @progbits
 
.align 12
kernel_stack_bottom:
.space TEMP_STACK_SIZE
kernel_stack:
/branches/network/kernel/arch/ppc64/src/proc/scheduler.c
0,0 → 1,63
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc64proc
* @{
*/
/** @file
*/
 
#include <arch/mm/page.h>
#include <arch/boot/boot.h>
#include <proc/scheduler.h>
#include <proc/thread.h>
#include <arch.h>
 
/** Perform ppc64 specific tasks needed before the new task is run. */
void before_task_runs_arch(void)
{
}
 
/** Perform ppc64 specific tasks needed before the new thread is scheduled. */
void before_thread_runs_arch(void)
{
pht_init();
tlb_invalidate_all();
asm volatile (
"mtsprg0 %0\n"
:
: "r" (KA2PA(&THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA]))
);
}
 
void after_thread_ran_arch(void)
{
}
 
/** @}
*/
/branches/network/kernel/arch/ppc64/src/debug/panic.s
0,0 → 1,38
#
# Copyright (c) 2005 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/asm/macro.h>
 
.text
.global panic_printf
 
panic_printf:
lis %r14, halt@ha
addi %r14, %r14, halt@l
mtlr %r14 # fake stack to make printf return to halt
b printf
/branches/network/kernel/arch/ppc64/src/dummy.s
0,0 → 1,38
#
# Copyright (c) 2005 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.text
 
.global asm_delay_loop
.global sys_tls_set
 
sys_tls_set:
b sys_tls_set
 
asm_delay_loop:
blr
/branches/network/kernel/arch/ppc64/_link.ld.in
0,0 → 1,58
/** PPC64 linker script
*
* umapped section:
* kernel text
* kernel data
* mapped section:
* kernel text
* kernel data
*
*/
 
#include <arch/boot/boot.h>
#include <arch/mm/page.h>
 
ENTRY(kernel_image_start)
OUTPUT_FORMAT("elf64-powerpc")
OUTPUT_ARCH(powerpc:common64)
 
SECTIONS {
.unmapped 0: AT (0) {
unmapped_ktext_start = .;
*(K_UNMAPPED_TEXT_START);
unmapped_ktext_end = .;
unmapped_kdata_start = .;
*(K_UNMAPPED_DATA_START);
unmapped_kdata_start = .;
}
.mapped PA2KA(BOOT_OFFSET): AT (BOOT_OFFSET) {
ktext_start = .;
*(K_TEXT_START);
*(.text);
ktext_end = .;
kdata_start = .;
*(K_DATA_START);
*(.rodata);
*(.rodata.*);
*(.data); /* initialized data */
*(.sdata);
*(.sdata2);
*(.sbss);
hardcoded_ktext_size = .;
LONG(ktext_end - ktext_start);
hardcoded_kdata_size = .;
LONG(kdata_end - kdata_start);
hardcoded_load_address = .;
LONG(PA2KA(BOOT_OFFSET));
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
 
symbol_table = .;
*(symtab.*); /* Symbol table, must be LAST symbol!*/
 
kdata_end = .;
}
}
/branches/network/kernel/arch/mips32/Makefile.inc
29,49 → 29,90
## Toolchain configuration
#
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
BFD_ARCH = mips
BFD = binary
TARGET = mipsel-linux-gnu
TOOLCHAIN_DIR = $(CROSS_PREFIX)/mipsel
 
GCC_CFLAGS += -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mips3
KERNEL_LOAD_ADDRESS = 0x80100000
INIT_ADDRESS = 0x81000000
INIT_SIZE = 262144
 
DEFS += -D__32_BITS__
GCC_CFLAGS += -mno-abicalls -G 0 -fno-zero-initialized-in-bss
 
DEFS += -D__32_BITS__ -DMACHINE=$(MACHINE) -DKERNEL_LOAD_ADDRESS=${KERNEL_LOAD_ADDRESS} -DINIT_ADDRESS=${INIT_ADDRESS} -DINIT_SIZE=${INIT_SIZE}
 
## Compile with hierarchical page tables support.
#
 
CONFIG_PAGE_PT = y
DEFS += -DCONFIG_PAGE_PT
 
## Compile with support for address space identifiers.
#
 
CONFIG_ASID = y
CONFIG_ASID_FIFO = y
 
## Accepted MACHINEs
#
 
ifeq ($(MACHINE),lgxemul)
BFD_NAME = elf32-tradlittlemips
BFD = binary
GCC_CFLAGS += -DFB_INVERT_ENDIAN -DARCH_HAS_FPU -mips3
endif
ifeq ($(MACHINE),bgxemul)
BFD_NAME = elf32-tradbigmips
TOOLCHAIN_DIR = $(CROSS_PREFIX)/mips
TARGET = mips-linux-gnu
GCC_CFLAGS += -DBIG_ENDIAN
BFD_NAME = elf32-bigmips
BFD = ecoff-bigmips
TARGET = mips-sgi-irix5
TOOLCHAIN_DIR = $(CROSS_PREFIX)/mips/bin
GCC_CFLAGS += -EB -DBIG_ENDIAN -DARCH_HAS_FPU -mips3
INIT_ADDRESS = 0x81800000
endif
ifeq ($(MACHINE),simics)
# SIMICS 4kc emulation is broken, although for instructions
# that do not bother us
BFD_NAME = elf32-tradlittlemips
BFD = elf32-tradlittlemips
GCC_CFLAGS += -mhard-float -mips3 -DTLBCNT=16
TLBCNT = 16
endif
ifeq ($(MACHINE),msim)
BFD_NAME = elf32-tradlittlemips
GCC_CFLAGS += -mhard-float
BFD = binary
GCC_CFLAGS += -mhard-float -mips3
endif
 
## Compile with support for software integer division.
#
 
CONFIG_SOFTINT = y
 
 
ARCH_SOURCES = \
arch/$(KARCH)/src/start.S \
arch/$(KARCH)/src/context.S \
arch/$(KARCH)/src/panic.S \
arch/$(KARCH)/src/mips32.c \
arch/$(KARCH)/src/console.c \
arch/$(KARCH)/src/asm.S \
arch/$(KARCH)/src/exception.c \
arch/$(KARCH)/src/interrupt.c \
arch/$(KARCH)/src/cache.c \
arch/$(KARCH)/src/debugger.c \
arch/$(KARCH)/src/cpu/cpu.c \
arch/$(KARCH)/src/mm/frame.c \
arch/$(KARCH)/src/mm/page.c \
arch/$(KARCH)/src/mm/tlb.c \
arch/$(KARCH)/src/mm/as.c \
arch/$(KARCH)/src/fpu_context.c \
arch/$(KARCH)/src/ddi/ddi.c \
arch/$(KARCH)/src/smp/dorder.c \
arch/$(KARCH)/src/smp/smp.c
arch/$(ARCH)/src/start.S \
arch/$(ARCH)/src/context.S \
arch/$(ARCH)/src/panic.S \
arch/$(ARCH)/src/mips32.c \
arch/$(ARCH)/src/dummy.S \
arch/$(ARCH)/src/console.c \
arch/$(ARCH)/src/asm.S \
arch/$(ARCH)/src/exception.c \
arch/$(ARCH)/src/interrupt.c \
arch/$(ARCH)/src/cache.c \
arch/$(ARCH)/src/debugger.c \
arch/$(ARCH)/src/cpu/cpu.c \
arch/$(ARCH)/src/mm/frame.c \
arch/$(ARCH)/src/mm/page.c \
arch/$(ARCH)/src/mm/tlb.c \
arch/$(ARCH)/src/mm/as.c \
arch/$(ARCH)/src/fpu_context.c \
arch/$(ARCH)/src/ddi/ddi.c \
arch/$(ARCH)/src/drivers/msim.c \
arch/$(ARCH)/src/drivers/serial.c \
arch/$(ARCH)/src/smp/order.c
/branches/network/kernel/arch/mips32/src/asm.S
27,17 → 27,17
#
 
#include <arch/asm/regname.h>
 
.text
 
.macro cp0_read reg
mfc0 $2, \reg
mfc0 $2,\reg
j $31
nop
.endm
 
.macro cp0_write reg
mtc0 $4, \reg
mtc0 $4,\reg
j $31
nop
.endm
46,11 → 46,6
.set noreorder
.set nomacro
 
.global asm_delay_loop
asm_delay_loop:
j $31
nop
 
.global cpu_halt
cpu_halt:
j cpu_halt
71,238 → 66,235
memcpy:
memcpy_from_uspace:
memcpy_to_uspace:
move $t2, $a0 # save dst
addiu $v0, $a1, 3
li $v1, -4 # 0xfffffffffffffffc
and $v0, $v0, $v1
beq $a1, $v0, 3f
move $t0, $a0
0:
beq $a2, $zero, 2f
move $a3, $zero
1:
addu $v0, $a1, $a3
lbu $a0, 0($v0)
addu $v1, $t0, $a3
addiu $a3, $a3, 1
bne $a3, $a2, 1b
sb $a0, 0($v1)
2:
jr $ra
move $v0, $t2
3:
addiu $v0, $a0, 3
and $v0, $v0, $v1
bne $a0, $v0, 0b
srl $t1, $a2, 2
beq $t1, $zero, 5f
move $a3, $zero
move $a3, $zero
move $a0, $zero
4:
addu $v0, $a1, $a0
lw $v1, 0($v0)
addiu $a3, $a3, 1
addu $v0, $t0, $a0
sw $v1, 0($v0)
bne $a3, $t1, 4b
addiu $a0, $a0, 4
5:
andi $a2, $a2, 0x3
beq $a2, $zero, 2b
nop
sll $v0, $a3, 2
addu $t1, $v0, $t0
move $a3, $zero
addu $t0, $v0, $a1
6:
addu $v0, $t0, $a3
lbu $a0, 0($v0)
addu $v1, $t1, $a3
addiu $a3, $a3, 1
bne $a3, $a2, 6b
sb $a0, 0($v1)
jr $ra
move $v0, $t2
addiu $v0,$a1,3
li $v1,-4 # 0xfffffffffffffffc
and $v0,$v0,$v1
beq $a1,$v0,3f
move $t0,$a0
move $t2,$a0 # save dst
 
0:
beq $a2,$zero,2f
move $a3,$zero
 
1:
addu $v0,$a1,$a3
lbu $a0,0($v0)
addu $v1,$t0,$a3
addiu $a3,$a3,1
bne $a3,$a2,1b
sb $a0,0($v1)
 
2:
jr $ra
move $v0,$t2
 
3:
addiu $v0,$a0,3
and $v0,$v0,$v1
bne $a0,$v0,0b
srl $t1,$a2,2
 
beq $t1,$zero,5f
move $a3,$zero
 
move $a3,$zero
move $a0,$zero
4:
addu $v0,$a1,$a0
lw $v1,0($v0)
addiu $a3,$a3,1
addu $v0,$t0,$a0
sw $v1,0($v0)
bne $a3,$t1,4b
addiu $a0,$a0,4
 
5:
andi $a2,$a2,0x3
beq $a2,$zero,2b
nop
 
sll $v0,$a3,2
addu $t1,$v0,$t0
move $a3,$zero
addu $t0,$v0,$a1
6:
addu $v0,$t0,$a3
lbu $a0,0($v0)
addu $v1,$t1,$a3
addiu $a3,$a3,1
bne $a3,$a2,6b
sb $a0,0($v1)
 
jr $ra
move $v0,$t2
 
memcpy_from_uspace_failover_address:
memcpy_to_uspace_failover_address:
jr $ra
move $v0, $zero
jr $ra
move $v0, $zero
 
 
 
.macro fpu_gp_save reg ctx
mfc1 $t0, $\reg
sw $t0, \reg * 4(\ctx)
mfc1 $t0,$\reg
sw $t0, \reg*4(\ctx)
.endm
 
.macro fpu_gp_restore reg ctx
lw $t0, \reg * 4(\ctx)
mtc1 $t0, $\reg
lw $t0, \reg*4(\ctx)
mtc1 $t0,$\reg
.endm
 
.macro fpu_ct_save reg ctx
cfc1 $t0, $1
sw $t0, (\reg + 32) * 4(\ctx)
cfc1 $t0,$1
sw $t0, (\reg+32)*4(\ctx)
.endm
 
.macro fpu_ct_restore reg ctx
lw $t0, (\reg + 32) * 4(\ctx)
ctc1 $t0, $\reg
lw $t0, (\reg+32)*4(\ctx)
ctc1 $t0,$\reg
.endm
 
 
.global fpu_context_save
fpu_context_save:
#ifdef CONFIG_FPU
fpu_gp_save 0, $a0
fpu_gp_save 1, $a0
fpu_gp_save 2, $a0
fpu_gp_save 3, $a0
fpu_gp_save 4, $a0
fpu_gp_save 5, $a0
fpu_gp_save 6, $a0
fpu_gp_save 7, $a0
fpu_gp_save 8, $a0
fpu_gp_save 9, $a0
fpu_gp_save 10, $a0
fpu_gp_save 11, $a0
fpu_gp_save 12, $a0
fpu_gp_save 13, $a0
fpu_gp_save 14, $a0
fpu_gp_save 15, $a0
fpu_gp_save 16, $a0
fpu_gp_save 17, $a0
fpu_gp_save 18, $a0
fpu_gp_save 19, $a0
fpu_gp_save 20, $a0
fpu_gp_save 21, $a0
fpu_gp_save 22, $a0
fpu_gp_save 23, $a0
fpu_gp_save 24, $a0
fpu_gp_save 25, $a0
fpu_gp_save 26, $a0
fpu_gp_save 27, $a0
fpu_gp_save 28, $a0
fpu_gp_save 29, $a0
fpu_gp_save 30, $a0
fpu_gp_save 31, $a0
fpu_ct_save 1, $a0
fpu_ct_save 2, $a0
fpu_ct_save 3, $a0
fpu_ct_save 4, $a0
fpu_ct_save 5, $a0
fpu_ct_save 6, $a0
fpu_ct_save 7, $a0
fpu_ct_save 8, $a0
fpu_ct_save 9, $a0
fpu_ct_save 10, $a0
fpu_ct_save 11, $a0
fpu_ct_save 12, $a0
fpu_ct_save 13, $a0
fpu_ct_save 14, $a0
fpu_ct_save 15, $a0
fpu_ct_save 16, $a0
fpu_ct_save 17, $a0
fpu_ct_save 18, $a0
fpu_ct_save 19, $a0
fpu_ct_save 20, $a0
fpu_ct_save 21, $a0
fpu_ct_save 22, $a0
fpu_ct_save 23, $a0
fpu_ct_save 24, $a0
fpu_ct_save 25, $a0
fpu_ct_save 26, $a0
fpu_ct_save 27, $a0
fpu_ct_save 28, $a0
fpu_ct_save 29, $a0
fpu_ct_save 30, $a0
fpu_ct_save 31, $a0
#endif
#ifdef ARCH_HAS_FPU
fpu_gp_save 0,$a0
fpu_gp_save 1,$a0
fpu_gp_save 2,$a0
fpu_gp_save 3,$a0
fpu_gp_save 4,$a0
fpu_gp_save 5,$a0
fpu_gp_save 6,$a0
fpu_gp_save 7,$a0
fpu_gp_save 8,$a0
fpu_gp_save 9,$a0
fpu_gp_save 10,$a0
fpu_gp_save 11,$a0
fpu_gp_save 12,$a0
fpu_gp_save 13,$a0
fpu_gp_save 14,$a0
fpu_gp_save 15,$a0
fpu_gp_save 16,$a0
fpu_gp_save 17,$a0
fpu_gp_save 18,$a0
fpu_gp_save 19,$a0
fpu_gp_save 20,$a0
fpu_gp_save 21,$a0
fpu_gp_save 22,$a0
fpu_gp_save 23,$a0
fpu_gp_save 24,$a0
fpu_gp_save 25,$a0
fpu_gp_save 26,$a0
fpu_gp_save 27,$a0
fpu_gp_save 28,$a0
fpu_gp_save 29,$a0
fpu_gp_save 30,$a0
fpu_gp_save 31,$a0
 
fpu_ct_save 1,$a0
fpu_ct_save 2,$a0
fpu_ct_save 3,$a0
fpu_ct_save 4,$a0
fpu_ct_save 5,$a0
fpu_ct_save 6,$a0
fpu_ct_save 7,$a0
fpu_ct_save 8,$a0
fpu_ct_save 9,$a0
fpu_ct_save 10,$a0
fpu_ct_save 11,$a0
fpu_ct_save 12,$a0
fpu_ct_save 13,$a0
fpu_ct_save 14,$a0
fpu_ct_save 15,$a0
fpu_ct_save 16,$a0
fpu_ct_save 17,$a0
fpu_ct_save 18,$a0
fpu_ct_save 19,$a0
fpu_ct_save 20,$a0
fpu_ct_save 21,$a0
fpu_ct_save 22,$a0
fpu_ct_save 23,$a0
fpu_ct_save 24,$a0
fpu_ct_save 25,$a0
fpu_ct_save 26,$a0
fpu_ct_save 27,$a0
fpu_ct_save 28,$a0
fpu_ct_save 29,$a0
fpu_ct_save 30,$a0
fpu_ct_save 31,$a0
#endif
j $ra
nop
 
.global fpu_context_restore
fpu_context_restore:
#ifdef CONFIG_FPU
fpu_gp_restore 0, $a0
fpu_gp_restore 1, $a0
fpu_gp_restore 2, $a0
fpu_gp_restore 3, $a0
fpu_gp_restore 4, $a0
fpu_gp_restore 5, $a0
fpu_gp_restore 6, $a0
fpu_gp_restore 7, $a0
fpu_gp_restore 8, $a0
fpu_gp_restore 9, $a0
fpu_gp_restore 10, $a0
fpu_gp_restore 11, $a0
fpu_gp_restore 12, $a0
fpu_gp_restore 13, $a0
fpu_gp_restore 14, $a0
fpu_gp_restore 15, $a0
fpu_gp_restore 16, $a0
fpu_gp_restore 17, $a0
fpu_gp_restore 18, $a0
fpu_gp_restore 19, $a0
fpu_gp_restore 20, $a0
fpu_gp_restore 21, $a0
fpu_gp_restore 22, $a0
fpu_gp_restore 23, $a0
fpu_gp_restore 24, $a0
fpu_gp_restore 25, $a0
fpu_gp_restore 26, $a0
fpu_gp_restore 27, $a0
fpu_gp_restore 28, $a0
fpu_gp_restore 29, $a0
fpu_gp_restore 30, $a0
fpu_gp_restore 31, $a0
fpu_ct_restore 1, $a0
fpu_ct_restore 2, $a0
fpu_ct_restore 3, $a0
fpu_ct_restore 4, $a0
fpu_ct_restore 5, $a0
fpu_ct_restore 6, $a0
fpu_ct_restore 7, $a0
fpu_ct_restore 8, $a0
fpu_ct_restore 9, $a0
fpu_ct_restore 10, $a0
fpu_ct_restore 11, $a0
fpu_ct_restore 12, $a0
fpu_ct_restore 13, $a0
fpu_ct_restore 14, $a0
fpu_ct_restore 15, $a0
fpu_ct_restore 16, $a0
fpu_ct_restore 17, $a0
fpu_ct_restore 18, $a0
fpu_ct_restore 19, $a0
fpu_ct_restore 20, $a0
fpu_ct_restore 21, $a0
fpu_ct_restore 22, $a0
fpu_ct_restore 23, $a0
fpu_ct_restore 24, $a0
fpu_ct_restore 25, $a0
fpu_ct_restore 26, $a0
fpu_ct_restore 27, $a0
fpu_ct_restore 28, $a0
fpu_ct_restore 29, $a0
fpu_ct_restore 30, $a0
fpu_ct_restore 31, $a0
#endif
#ifdef ARCH_HAS_FPU
fpu_gp_restore 0,$a0
fpu_gp_restore 1,$a0
fpu_gp_restore 2,$a0
fpu_gp_restore 3,$a0
fpu_gp_restore 4,$a0
fpu_gp_restore 5,$a0
fpu_gp_restore 6,$a0
fpu_gp_restore 7,$a0
fpu_gp_restore 8,$a0
fpu_gp_restore 9,$a0
fpu_gp_restore 10,$a0
fpu_gp_restore 11,$a0
fpu_gp_restore 12,$a0
fpu_gp_restore 13,$a0
fpu_gp_restore 14,$a0
fpu_gp_restore 15,$a0
fpu_gp_restore 16,$a0
fpu_gp_restore 17,$a0
fpu_gp_restore 18,$a0
fpu_gp_restore 19,$a0
fpu_gp_restore 20,$a0
fpu_gp_restore 21,$a0
fpu_gp_restore 22,$a0
fpu_gp_restore 23,$a0
fpu_gp_restore 24,$a0
fpu_gp_restore 25,$a0
fpu_gp_restore 26,$a0
fpu_gp_restore 27,$a0
fpu_gp_restore 28,$a0
fpu_gp_restore 29,$a0
fpu_gp_restore 30,$a0
fpu_gp_restore 31,$a0
 
fpu_ct_restore 1,$a0
fpu_ct_restore 2,$a0
fpu_ct_restore 3,$a0
fpu_ct_restore 4,$a0
fpu_ct_restore 5,$a0
fpu_ct_restore 6,$a0
fpu_ct_restore 7,$a0
fpu_ct_restore 8,$a0
fpu_ct_restore 9,$a0
fpu_ct_restore 10,$a0
fpu_ct_restore 11,$a0
fpu_ct_restore 12,$a0
fpu_ct_restore 13,$a0
fpu_ct_restore 14,$a0
fpu_ct_restore 15,$a0
fpu_ct_restore 16,$a0
fpu_ct_restore 17,$a0
fpu_ct_restore 18,$a0
fpu_ct_restore 19,$a0
fpu_ct_restore 20,$a0
fpu_ct_restore 21,$a0
fpu_ct_restore 22,$a0
fpu_ct_restore 23,$a0
fpu_ct_restore 24,$a0
fpu_ct_restore 25,$a0
fpu_ct_restore 26,$a0
fpu_ct_restore 27,$a0
fpu_ct_restore 28,$a0
fpu_ct_restore 29,$a0
fpu_ct_restore 30,$a0
fpu_ct_restore 31,$a0
#endif
j $ra
nop
/branches/network/kernel/arch/mips32/src/mm/frame.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32mm
/** @addtogroup mips32mm
* @{
*/
/** @file
40,22 → 40,22
#include <mm/asid.h>
#include <config.h>
#include <arch/drivers/msim.h>
#include <arch/drivers/serial.h>
#include <print.h>
 
#define ZERO_PAGE_MASK TLB_PAGE_MASK_256K
#define ZERO_FRAMES 2048
#define ZERO_PAGE_WIDTH 18 /* 256K */
#define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH)
#define ZERO_PAGE_ASID ASID_INVALID
#define ZERO_PAGE_TLBI 0
#define ZERO_PAGE_ADDR 0
#define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
#define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
#define ZERO_PAGE_MASK TLB_PAGE_MASK_256K
#define ZERO_FRAMES 2048
#define ZERO_PAGE_WIDTH 18 /* 256K */
#define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH)
#define ZERO_PAGE_ASID ASID_INVALID
#define ZERO_PAGE_TLBI 0
#define ZERO_PAGE_ADDR 0
#define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
#define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
 
#define ZERO_PAGE_VALUE_KSEG1(frame) \
(((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
#define ZERO_PAGE_VALUE_KSEG1(frame) (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
 
#define MAX_REGIONS 32
#define MAX_REGIONS 32
 
typedef struct {
pfn_t start;
65,6 → 65,7
static count_t phys_regions_count = 0;
static phys_region_t phys_regions[MAX_REGIONS];
 
 
/** Check whether frame is available
*
* Returns true if given frame is generally available for use.
74,7 → 75,7
*/
static bool frame_available(pfn_t frame)
{
#ifdef MACHINE_msim
#if MACHINE == msim
/* MSIM device (dprinter) */
if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
return false;
83,8 → 84,14
if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
return false;
#endif
#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
 
#if MACHINE == simics
/* Simics device (serial line) */
if (frame == (KA2PA(SERIAL_ADDRESS) >> ZERO_PAGE_WIDTH))
return false;
#endif
 
#if (MACHINE == lgxemul) || (MACHINE == bgxemul)
/* gxemul devices */
if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
0x10000000, MB2SIZE(256)))
211,7 → 218,7
ZERO_PAGE_VALUE = 0xdeadbeef;
if (ZERO_PAGE_VALUE != 0xdeadbeef)
avail = false;
#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
#if (MACHINE == lgxemul) || (MACHINE == bgxemul)
else {
ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;
if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)
/branches/network/kernel/arch/mips32/src/mm/tlb.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32mm
/** @addtogroup mips32mm
* @{
*/
/** @file
40,21 → 40,22
#include <arch/cp0.h>
#include <panic.h>
#include <arch.h>
#include <synch/mutex.h>
#include <symtab.h>
#include <synch/spinlock.h>
#include <print.h>
#include <debug.h>
#include <align.h>
#include <interrupt.h>
#include <symtab.h>
 
static void tlb_refill_fail(istate_t *);
static void tlb_invalid_fail(istate_t *);
static void tlb_modified_fail(istate_t *);
static void tlb_refill_fail(istate_t *istate);
static void tlb_invalid_fail(istate_t *istate);
static void tlb_modified_fail(istate_t *istate);
 
static pte_t *find_mapping_and_check(uintptr_t, int, istate_t *, int *);
static pte_t *find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate, int *pfrc);
 
/** Initialize TLB.
/** Initialize TLB
*
* Initialize TLB.
* Invalidate all entries and mark wired entries.
*/
void tlb_arch_init(void)
80,9 → 81,11
cp0_wired_write(TLB_WIRED);
}
 
/** Process TLB Refill Exception.
/** Process TLB Refill Exception
*
* @param istate Interrupted register context.
* Process TLB Refill Exception.
*
* @param istate Interrupted register context.
*/
void tlb_refill(istate_t *istate)
{
92,15 → 95,15
uintptr_t badvaddr;
pte_t *pte;
int pfrc;
 
badvaddr = cp0_badvaddr_read();
mutex_lock(&AS->lock);
 
spinlock_lock(&AS->lock);
asid = AS->asid;
mutex_unlock(&AS->lock);
spinlock_unlock(&AS->lock);
 
page_table_lock(AS, true);
 
pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate, &pfrc);
if (!pte) {
switch (pfrc) {
115,7 → 118,7
page_table_unlock(AS, true);
return;
default:
panic("Unexpected pfrc (%d).", pfrc);
panic("unexpected pfrc (%d)\n", pfrc);
}
}
 
125,14 → 128,13
pte->a = 1;
 
tlb_prepare_entry_hi(&hi, asid, badvaddr);
tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable,
pte->pfn);
tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable, pte->pfn);
 
/*
* New entry is to be inserted into TLB
*/
cp0_entry_hi_write(hi.value);
if ((badvaddr / PAGE_SIZE) % 2 == 0) {
if ((badvaddr/PAGE_SIZE) % 2 == 0) {
cp0_entry_lo0_write(lo.value);
cp0_entry_lo1_write(0);
}
151,9 → 153,11
tlb_refill_fail(istate);
}
 
/** Process TLB Invalid Exception.
/** Process TLB Invalid Exception
*
* @param istate Interrupted register context.
* Process TLB Invalid Exception.
*
* @param istate Interrupted register context.
*/
void tlb_invalid(istate_t *istate)
{
199,7 → 203,7
page_table_unlock(AS, true);
return;
default:
panic("Unexpected pfrc (%d).", pfrc);
panic("unexpected pfrc (%d)\n", pfrc);
}
}
 
213,13 → 217,12
*/
pte->a = 1;
 
tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable,
pte->pfn);
tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable, pte->pfn);
 
/*
* The entry is to be updated in TLB.
*/
if ((badvaddr / PAGE_SIZE) % 2 == 0)
if ((badvaddr/PAGE_SIZE) % 2 == 0)
cp0_entry_lo0_write(lo.value);
else
cp0_entry_lo1_write(lo.value);
234,9 → 237,11
tlb_invalid_fail(istate);
}
 
/** Process TLB Modified Exception.
/** Process TLB Modified Exception
*
* @param istate Interrupted register context.
* Process TLB Modified Exception.
*
* @param istate Interrupted register context.
*/
void tlb_modified(istate_t *istate)
{
282,11 → 287,17
page_table_unlock(AS, true);
return;
default:
panic("Unexpected pfrc (%d).", pfrc);
panic("unexpected pfrc (%d)\n", pfrc);
}
}
 
/*
* Fail if the page is not writable.
*/
if (!pte->w)
goto fail;
 
/*
* Read the faulting TLB entry.
*/
tlbr();
297,13 → 308,12
pte->a = 1;
pte->d = 1;
 
tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->w, pte->cacheable,
pte->pfn);
tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->w, pte->cacheable, pte->pfn);
 
/*
* The entry is to be updated in TLB.
*/
if ((badvaddr / PAGE_SIZE) % 2 == 0)
if ((badvaddr/PAGE_SIZE) % 2 == 0)
cp0_entry_lo0_write(lo.value);
else
cp0_entry_lo1_write(lo.value);
320,57 → 330,56
 
void tlb_refill_fail(istate_t *istate)
{
char *symbol, *sym2;
char *symbol = "";
char *sym2 = "";
 
symbol = symtab_fmt_name_lookup(istate->epc);
sym2 = symtab_fmt_name_lookup(istate->ra);
fault_if_from_uspace(istate, "TLB Refill Exception on %p.",
cp0_badvaddr_read());
panic("%x: TLB Refill Exception at %x (%s<-%s).", cp0_badvaddr_read(),
istate->epc, symbol, sym2);
char *s = get_symtab_entry(istate->epc);
if (s)
symbol = s;
s = get_symtab_entry(istate->ra);
if (s)
sym2 = s;
 
fault_if_from_uspace(istate, "TLB Refill Exception on %p", cp0_badvaddr_read());
panic("%x: TLB Refill Exception at %x(%s<-%s)\n", cp0_badvaddr_read(), istate->epc, symbol, sym2);
}
 
 
void tlb_invalid_fail(istate_t *istate)
{
char *symbol;
char *symbol = "";
 
symbol = symtab_fmt_name_lookup(istate->epc);
 
fault_if_from_uspace(istate, "TLB Invalid Exception on %p.",
cp0_badvaddr_read());
panic("%x: TLB Invalid Exception at %x (%s).", cp0_badvaddr_read(),
istate->epc, symbol);
char *s = get_symtab_entry(istate->epc);
if (s)
symbol = s;
fault_if_from_uspace(istate, "TLB Invalid Exception on %p", cp0_badvaddr_read());
panic("%x: TLB Invalid Exception at %x(%s)\n", cp0_badvaddr_read(), istate->epc, symbol);
}
 
void tlb_modified_fail(istate_t *istate)
{
char *symbol;
char *symbol = "";
 
symbol = symtab_fmt_name_lookup(istate->epc);
 
fault_if_from_uspace(istate, "TLB Modified Exception on %p.",
cp0_badvaddr_read());
panic("%x: TLB Modified Exception at %x (%s).", cp0_badvaddr_read(),
istate->epc, symbol);
char *s = get_symtab_entry(istate->epc);
if (s)
symbol = s;
fault_if_from_uspace(istate, "TLB Modified Exception on %p", cp0_badvaddr_read());
panic("%x: TLB Modified Exception at %x(%s)\n", cp0_badvaddr_read(), istate->epc, symbol);
}
 
/** Try to find PTE for faulting address.
/** Try to find PTE for faulting address
*
* Try to find PTE for faulting address.
* The AS->lock must be held on entry to this function.
*
* @param badvaddr Faulting virtual address.
* @param access Access mode that caused the fault.
* @param istate Pointer to interrupted state.
* @param pfrc Pointer to variable where as_page_fault() return code
* will be stored.
* @param badvaddr Faulting virtual address.
* @param access Access mode that caused the fault.
* @param istate Pointer to interrupted state.
* @param pfrc Pointer to variable where as_page_fault() return code will be stored.
*
* @return PTE on success, NULL otherwise.
* @return PTE on success, NULL otherwise.
*/
pte_t *
find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate,
int *pfrc)
pte_t *find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate, int *pfrc)
{
entry_hi_t hi;
pte_t *pte;
389,7 → 398,7
* Check if the mapping exists in page tables.
*/
pte = page_mapping_find(AS, badvaddr);
if (pte && pte->p && (pte->w || access != PF_ACCESS_WRITE)) {
if (pte && pte->p) {
/*
* Mapping found in page tables.
* Immediately succeed.
412,7 → 421,6
page_table_lock(AS, true);
pte = page_mapping_find(AS, badvaddr);
ASSERT(pte && pte->p);
ASSERT(pte->w || access != PF_ACCESS_WRITE);
return pte;
break;
case AS_PF_DEFER:
422,19 → 430,18
break;
case AS_PF_FAULT:
page_table_lock(AS, true);
printf("Page fault.\n");
*pfrc = AS_PF_FAULT;
return NULL;
break;
default:
panic("Unexpected rc (%d).", rc);
panic("unexpected rc (%d)\n", rc);
}
}
}
 
void
tlb_prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable,
uintptr_t pfn)
void tlb_prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, uintptr_t pfn)
{
lo->value = 0;
lo->g = g;
473,10 → 480,10
lo1.value = cp0_entry_lo1_read();
printf("%-2u %-4u %#6x %#4x %1u %1u %1u %1u %#6x\n",
i, hi.asid, hi.vpn2, mask.mask,
lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn);
i, hi.asid, hi.vpn2, mask.mask,
lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn);
printf(" %1u %1u %1u %1u %#6x\n",
lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn);
lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn);
}
cp0_entry_hi_write(hi_save.value);
553,12 → 560,11
cp0_entry_hi_write(hi_save.value);
}
 
/** Invalidate TLB entries for specified page range belonging to specified
* address space.
/** Invalidate TLB entries for specified page range belonging to specified address space.
*
* @param asid Address space identifier.
* @param page First page whose TLB entry is to be invalidated.
* @param cnt Number of entries to invalidate.
* @param asid Address space identifier.
* @param page First page whose TLB entry is to be invalidated.
* @param cnt Number of entries to invalidate.
*/
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
{
582,10 → 588,7
index.value = cp0_index_read();
 
if (!index.p) {
/*
* Entry was found, index register contains valid
* index.
*/
/* Entry was found, index register contains valid index. */
tlbr();
 
lo0.value = cp0_entry_lo0_read();
/branches/network/kernel/arch/mips32/src/mm/page.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32mm
/** @addtogroup mips32mm
* @{
*/
/** @file
35,7 → 35,6
#include <arch/mm/page.h>
#include <genarch/mm/page_pt.h>
#include <mm/page.h>
#include <mm/frame.h>
 
void page_arch_init(void)
{
/branches/network/kernel/arch/mips32/src/drivers/msim.c
0,0 → 1,171
/*
* Copyright (c) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32
* @{
*/
/** @file
*/
 
#include <interrupt.h>
#include <ipc/irq.h>
#include <console/chardev.h>
#include <arch/drivers/msim.h>
#include <arch/cp0.h>
#include <console/console.h>
#include <sysinfo/sysinfo.h>
#include <ddi/ddi.h>
 
static parea_t msim_parea;
static chardev_t console;
static irq_t msim_irq;
 
static void msim_write(chardev_t *dev, const char ch);
static void msim_enable(chardev_t *dev);
static void msim_disable(chardev_t *dev);
static char msim_do_read(chardev_t *dev);
 
static chardev_operations_t msim_ops = {
.resume = msim_enable,
.suspend = msim_disable,
.write = msim_write,
.read = msim_do_read,
};
 
/** Putchar that works with MSIM & gxemul */
void msim_write(chardev_t *dev, const char ch)
{
*((char *) MSIM_VIDEORAM) = ch;
}
 
/* Called from getc(). */
void msim_enable(chardev_t *dev)
{
cp0_unmask_int(MSIM_KBD_IRQ);
}
 
/* Called from getc(). */
void msim_disable(chardev_t *dev)
{
cp0_mask_int(MSIM_KBD_IRQ);
}
 
#include <print.h>
/** Read character using polling, assume interrupts disabled */
static char msim_do_read(chardev_t *dev)
{
char ch;
 
while (1) {
ch = *((volatile char *) MSIM_KBD_ADDRESS);
if (ch) {
if (ch == '\r')
return '\n';
if (ch == 0x7f)
return '\b';
return ch;
}
}
}
 
/** Process keyboard interrupt. */
static void msim_irq_handler(irq_t *irq, void *arg, ...)
{
if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
ipc_irq_send_notif(irq);
else {
char ch = 0;
ch = *((char *) MSIM_KBD_ADDRESS);
if (ch =='\r')
ch = '\n';
if (ch == 0x7f)
ch = '\b';
chardev_push_character(&console, ch);
}
}
 
static irq_ownership_t msim_claim(void)
{
return IRQ_ACCEPT;
}
 
void msim_kbd_grab(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&msim_irq.lock);
msim_irq.notif_cfg.notify = false;
spinlock_unlock(&msim_irq.lock);
interrupts_restore(ipl);
}
 
void msim_kbd_release(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&msim_irq.lock);
if (msim_irq.notif_cfg.answerbox)
msim_irq.notif_cfg.notify = true;
spinlock_unlock(&msim_irq.lock);
interrupts_restore(ipl);
}
 
 
/* Return console object representing msim console */
void msim_console(devno_t devno)
{
chardev_initialize("msim_console", &console, &msim_ops);
stdin = &console;
stdout = &console;
irq_initialize(&msim_irq);
msim_irq.devno = devno;
msim_irq.inr = MSIM_KBD_IRQ;
msim_irq.claim = msim_claim;
msim_irq.handler = msim_irq_handler;
irq_register(&msim_irq);
cp0_unmask_int(MSIM_KBD_IRQ);
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.devno", NULL, devno);
sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ);
sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS);
msim_parea.pbase = KA2PA(MSIM_VIDEORAM);
msim_parea.vbase = MSIM_VIDEORAM;
msim_parea.frames = 1;
msim_parea.cacheable = false;
ddi_parea_register(&msim_parea);
sysinfo_set_item_val("fb", NULL, true);
sysinfo_set_item_val("fb.kind", NULL, 3);
sysinfo_set_item_val("fb.address.physical", NULL, KA2PA(MSIM_VIDEORAM));
}
 
/** @}
*/
/branches/network/kernel/arch/mips32/src/drivers/serial.c
0,0 → 1,159
/*
* Copyright (c) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32
* @{
*/
/** @file
*/
 
#include <interrupt.h>
#include <arch/cp0.h>
#include <ipc/irq.h>
#include <arch/drivers/serial.h>
#include <console/chardev.h>
#include <console/console.h>
 
#define SERIAL_IRQ 2
 
static irq_t serial_irq;
static chardev_t console;
static serial_t sconf[SERIAL_MAX];
static bool kb_enabled;
 
static void serial_write(chardev_t *d, const char ch)
{
serial_t *sd = (serial_t *)d->data;
 
if (ch == '\n')
serial_write(d, '\r');
/* Wait until transmit buffer empty */
while (! (SERIAL_READ_LSR(sd->port) & (1<<TRANSMIT_EMPTY_BIT)))
;
SERIAL_WRITE(sd->port, ch);
}
 
static void serial_enable(chardev_t *d)
{
kb_enabled = true;
}
 
static void serial_disable(chardev_t *d)
{
kb_enabled = false;
}
 
int serial_init(void)
{
int i = 0;
if (SERIAL_READ_LSR(SERIAL_COM1) == 0x60) {
sconf[i].port = SERIAL_COM1;
sconf[i].irq = SERIAL_COM1_IRQ;
/* Enable interrupt on available data */
i++;
}
return i;
}
 
/** Read character from serial port, wait until available */
static char serial_do_read(chardev_t *dev)
{
serial_t *sd = (serial_t *)dev->data;
char ch;
 
while (!(SERIAL_READ_LSR(sd->port) & 1))
;
ch = SERIAL_READ(sd->port);
 
if (ch =='\r')
ch = '\n';
return ch;
}
 
static void serial_handler(void)
{
serial_t *sd = (serial_t *) console.data;
char ch;
 
if (!(SERIAL_READ_LSR(sd->port) & 1))
return;
ch = SERIAL_READ(sd->port);
 
if (ch =='\r')
ch = '\n';
chardev_push_character(&console, ch);
}
 
/** Process keyboard interrupt. Does not work in simics? */
static void serial_irq_handler(irq_t *irq, void *arg, ...)
{
if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
ipc_irq_send_notif(irq);
else
serial_handler();
}
 
static irq_ownership_t serial_claim(void)
{
return IRQ_ACCEPT;
}
 
static chardev_operations_t serial_ops = {
.resume = serial_enable,
.suspend = serial_disable,
.write = serial_write,
.read = serial_do_read
};
 
void serial_console(devno_t devno)
{
serial_t *sd = &sconf[0];
 
 
chardev_initialize("serial_console", &console, &serial_ops);
console.data = sd;
kb_enabled = true;
irq_initialize(&serial_irq);
serial_irq.devno = devno;
serial_irq.inr = SERIAL_IRQ;
serial_irq.claim = serial_claim;
serial_irq.handler = serial_irq_handler;
irq_register(&serial_irq);
 
/* I don't know why, but the serial interrupts simply
* don't work on simics
*/
virtual_timer_fnc = &serial_handler;
stdin = &console;
stdout = &console;
}
 
/** @}
*/
/branches/network/kernel/arch/mips32/src/console.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32
/** @addtogroup mips32
* @{
*/
/** @file
33,16 → 33,24
*/
 
#include <console/console.h>
#include <genarch/fb/fb.h>
#include <arch/console.h>
#include <arch/drivers/serial.h>
#include <arch/drivers/msim.h>
 
void console_init(devno_t devno)
{
if (serial_init())
serial_console(devno);
else
msim_console(devno);
}
 
/** Acquire console back for kernel
*
*/
void arch_grab_console(void)
{
#ifdef CONFIG_FB
fb_redraw();
#endif
msim_kbd_grab();
}
 
/** Return console to userspace
50,6 → 58,7
*/
void arch_release_console(void)
{
msim_kbd_release();
}
 
/** @}
/branches/network/kernel/arch/mips32/src/mips32.c
33,6 → 33,7
*/
 
#include <arch.h>
#include <arch/boot.h>
#include <arch/cp0.h>
#include <arch/exception.h>
#include <mm/as.h>
52,52 → 53,39
#include <arch/debugger.h>
#include <genarch/fb/fb.h>
#include <genarch/fb/visuals.h>
#include <genarch/drivers/dsrln/dsrlnin.h>
#include <genarch/drivers/dsrln/dsrlnout.h>
#include <genarch/srln/srln.h>
#include <macros.h>
#include <config.h>
#include <string.h>
#include <arch/drivers/msim.h>
#include <ddi/device.h>
 
#include <arch/asm/regname.h>
 
/* Size of the code jumping to the exception handler code
* - J+NOP
/* Size of the code jumping to the exception handler code
* - J+NOP
*/
#define EXCEPTION_JUMP_SIZE 8
#define EXCEPTION_JUMP_SIZE 8
 
#define TLB_EXC ((char *) 0x80000000)
#define NORM_EXC ((char *) 0x80000180)
#define CACHE_EXC ((char *) 0x80000100)
#define TLB_EXC ((char *) 0x80000000)
#define NORM_EXC ((char *) 0x80000180)
#define CACHE_EXC ((char *) 0x80000100)
 
 
/* Why the linker moves the variable 64K away in assembler
* when not in .text section?
* when not in .text section ????????
*/
 
uintptr_t supervisor_sp __attribute__ ((section (".text")));
/* Stack pointer saved when entering user mode */
uintptr_t supervisor_sp __attribute__ ((section (".text")));
/* TODO: How do we do it on SMP system???? */
bootinfo_t bootinfo __attribute__ ((section (".text")));
 
count_t cpu_count = 0;
 
/** Performs mips32-specific initialization before main_bsp() is called. */
void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
void arch_pre_main(void)
{
/* Setup usermode */
init.cnt = bootinfo->cnt;
init.cnt = bootinfo.cnt;
count_t i;
for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
init.tasks[i].addr = bootinfo->tasks[i].addr;
init.tasks[i].size = bootinfo->tasks[i].size;
strncpy(init.tasks[i].name, bootinfo->tasks[i].name,
CONFIG_TASK_NAME_BUFLEN);
}
uint32_t i;
for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
if ((bootinfo->cpumap & (1 << i)) != 0)
cpu_count++;
for (i = 0; i < bootinfo.cnt; i++) {
init.tasks[i].addr = bootinfo.tasks[i].addr;
init.tasks[i].size = bootinfo.tasks[i].size;
}
}
 
123,12 → 111,12
*/
cp0_status_write(cp0_status_read() &
~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
/*
* Mask all interrupts
 
/*
* Mask all interrupts
*/
cp0_mask_all_int();
debugger_init();
}
 
135,23 → 123,12
void arch_post_mm_init(void)
{
interrupt_init();
console_init(device_assign_devno());
#ifdef CONFIG_FB
/* GXemul framebuffer */
fb_properties_t gxemul_prop = {
.addr = 0x12000000,
.offset = 0,
.x = 640,
.y = 480,
.scan = 1920,
.visual = VISUAL_BGR_8_8_8,
};
fb_init(&gxemul_prop);
#else
#ifdef CONFIG_MIPS_PRN
dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS);
#endif /* CONFIG_MIPS_PRN */
#endif /* CONFIG_FB */
fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8);
#endif
sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1);
}
 
void arch_post_cpu_init(void)
164,31 → 141,8
 
void arch_post_smp_init(void)
{
#ifdef CONFIG_MIPS_KBD
/*
* Initialize the msim/GXemul keyboard port. Then initialize the serial line
* module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts.
*/
indev_t *kbrdin = dsrlnin_init((dsrlnin_t *) MSIM_KBD_ADDRESS, MSIM_KBD_IRQ);
if (kbrdin) {
srln_init(kbrdin);
cp0_unmask_int(MSIM_KBD_IRQ);
}
/*
* This is the necessary evil until the userspace driver is entirely
* self-sufficient.
*/
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ);
sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS);
#endif
}
 
void calibrate_delay_loop(void)
{
}
 
void userspace(uspace_arg_t *kernel_uarg)
{
/* EXL = 1, UM = 1, IE = 1 */
199,7 → 153,8
(uintptr_t) kernel_uarg->uspace_uarg,
(uintptr_t) kernel_uarg->uspace_entry);
while (1);
while (1)
;
}
 
/** Perform mips32 specific tasks needed before the new task is run. */
231,22 → 186,10
void arch_reboot(void)
{
___halt();
while (1);
while (1)
;
}
 
/** Construct function pointer
*
* @param fptr function pointer structure
* @param addr function address
* @param caller calling function address
*
* @return address of the function pointer
*
*/
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
return addr;
}
 
/** @}
*/
/branches/network/kernel/arch/mips32/src/interrupt.c
41,9 → 41,8
#include <ipc/sysipc.h>
#include <ddi/device.h>
 
#define IRQ_COUNT 8
#define TIMER_IRQ 7
#define DORDER_IRQ 5
#define IRQ_COUNT 8
#define TIMER_IRQ 7
 
function virtual_timer_fnc = NULL;
static irq_t timer_irq;
101,12 → 100,12
cp0_compare_write(nextcount);
}
 
static irq_ownership_t timer_claim(irq_t *irq)
static irq_ownership_t timer_claim(void)
{
return IRQ_ACCEPT;
}
 
static void timer_irq_handler(irq_t *irq)
static void timer_irq_handler(irq_t *irq, void *arg, ...)
{
unsigned long drift;
/branches/network/kernel/arch/mips32/src/start.S
31,7 → 31,7
#include <arch/asm/boot.h>
#include <arch/context_offset.h>
#include <arch/stack.h>
 
.text
 
.set noat
75,6 → 75,18
mfhi $at
sw $at, EOFFSET_HI(\r)
#ifdef CONFIG_DEBUG_ALLREGS
sw $s0, EOFFSET_S0(\r)
sw $s1, EOFFSET_S1(\r)
sw $s2, EOFFSET_S2(\r)
sw $s3, EOFFSET_S3(\r)
sw $s4, EOFFSET_S4(\r)
sw $s5, EOFFSET_S5(\r)
sw $s6, EOFFSET_S6(\r)
sw $s7, EOFFSET_S7(\r)
sw $s8, EOFFSET_S8(\r)
#endif
sw $gp, EOFFSET_GP(\r)
sw $ra, EOFFSET_RA(\r)
sw $k1, EOFFSET_K1(\r)
120,6 → 132,17
lw $t8, EOFFSET_T8(\r)
lw $t9, EOFFSET_T9(\r)
#ifdef CONFIG_DEBUG_ALLREGS
lw $s0, EOFFSET_S0(\r)
lw $s1, EOFFSET_S1(\r)
lw $s2, EOFFSET_S2(\r)
lw $s3, EOFFSET_S3(\r)
lw $s4, EOFFSET_S4(\r)
lw $s5, EOFFSET_S5(\r)
lw $s6, EOFFSET_S6(\r)
lw $s7, EOFFSET_S7(\r)
lw $s8, EOFFSET_S8(\r)
#endif
lw $gp, EOFFSET_GP(\r)
lw $ra, EOFFSET_RA(\r)
lw $k1, EOFFSET_K1(\r)
152,9 → 175,9
ori $k0, $k0, %lo(supervisor_sp)
# Move $k0 (superveisor_sp)
lw $k0, 0($k0)
1:
1:
.endm
 
.org 0x0
kernel_image_start:
/* Load temporary stack */
161,12 → 184,31
lui $sp, %hi(end_stack)
ori $sp, $sp, %lo(end_stack)
/* Not sure about this, but might
be needed for PIC code */
/* $a1 contains physical address of bootinfo_t */
/* $a2 contains size of bootinfo_t */
beq $a2, $0, bootinfo_end
/* Not sure about this, but might be needed for PIC code???? */
lui $gp, 0x8000
/* $a1 contains physical address of bootinfo_t */
lui $a3, %hi(bootinfo)
ori $a3, $a3, %lo(bootinfo)
bootinfo_loop:
lw $v0, 0($a1)
sw $v0, 0($a3)
addi $a1, $a1, 4
addi $a3, $a3, 4
addi $a2, $a2, -4
bgtz $a2, bootinfo_loop
nop
bootinfo_end:
jal arch_pre_main
nop
186,8 → 228,8
 
exception_entry:
j exception_handler
nop
 
nop
exception_handler:
KERNEL_STACK_TO_K0
sub $k0, REGISTER_SPACE
196,17 → 238,17
mfc0 $k0, $cause
sra $k0, $k0, 0x2 # cp0_exc_cause() part 1
andi $k0, $k0, 0x1f # cp0_exc_cause() part 2
sub $k0, 8 # 8 = SYSCALL
sra $k0, $k0, 0x2 # cp0_exc_cause() part 1
andi $k0, $k0, 0x1f # cp0_exc_cause() part 2
sub $k0, 8 # 8 = SYSCALL
beqz $k0, syscall_shortcut
add $k0, 8 # Revert $k0 back to correct exc number
add $k0, 8 # Revert $k0 back to correct exc number
REGISTERS_STORE_AND_EXC_RESET $sp
move $a1, $sp
jal exc_dispatch # exc_dispatch(excno, register_space)
jal exc_dispatch # exc_dispatch(excno, register_space)
move $a0, $k0
 
REGISTERS_LOAD $sp
/branches/network/kernel/arch/mips32/src/debugger.c
37,18 → 37,16
#include <memstr.h>
#include <console/kconsole.h>
#include <console/cmd.h>
#include <symtab.h>
#include <print.h>
#include <panic.h>
#include <arch.h>
#include <arch/cp0.h>
#include <func.h>
#include <symtab.h>
 
bpinfo_t breakpoints[BKPOINTS_MAX];
SPINLOCK_INITIALIZE(bkpoint_lock);
 
#ifdef CONFIG_KCONSOLE
 
static int cmd_print_breakpoints(cmd_arg_t *argv);
static cmd_info_t bkpts_info = {
.name = "bkpts",
125,12 → 123,10
{0, 0} /* EndOfTable */
};
 
 
/** Test, if the given instruction is a jump or branch instruction
*
* @param instr Instruction code
* @return true - it is jump instruction, false otherwise
*
*/
static bool is_jump(unative_t instr)
{
162,7 → 158,7
for (i = 0; i < BKPOINTS_MAX; i++) {
if (breakpoints[i].address == (uintptr_t)argv->intval) {
printf("Duplicate breakpoint %d.\n", i);
spinlock_unlock(&bkpoint_lock);
spinlock_unlock(&bkpoints_lock);
return 0;
} else if (breakpoints[i].address == (uintptr_t)argv->intval +
sizeof(unative_t) || breakpoints[i].address ==
169,10 → 165,10
(uintptr_t)argv->intval - sizeof(unative_t)) {
printf("Adjacent breakpoints not supported, conflict "
"with %d.\n", i);
spinlock_unlock(&bkpoint_lock);
spinlock_unlock(&bkpoints_lock);
return 0;
}
}
 
for (i = 0; i < BKPOINTS_MAX; i++)
259,9 → 255,8
for (i = 0; i < BKPOINTS_MAX; i++)
if (breakpoints[i].address) {
symbol = symtab_fmt_name_lookup(
breakpoints[i].address);
 
symbol = get_symtab_entry(breakpoints[i].address);
printf("%-2u %-5d %#10zx %-6s %-7s %-8s %s\n", i,
breakpoints[i].counter, breakpoints[i].address,
((breakpoints[i].flags & BKPOINT_INPROG) ? "true" :
272,8 → 267,6
return 1;
}
 
#endif
 
/** Initialize debugger */
void debugger_init()
{
281,24 → 274,22
 
for (i = 0; i < BKPOINTS_MAX; i++)
breakpoints[i].address = NULL;
 
#ifdef CONFIG_KCONSOLE
cmd_initialize(&bkpts_info);
if (!cmd_register(&bkpts_info))
printf("Cannot register command %s\n", bkpts_info.name);
panic("could not register command %s\n", bkpts_info.name);
 
cmd_initialize(&delbkpt_info);
if (!cmd_register(&delbkpt_info))
printf("Cannot register command %s\n", delbkpt_info.name);
panic("could not register command %s\n", delbkpt_info.name);
 
cmd_initialize(&addbkpt_info);
if (!cmd_register(&addbkpt_info))
printf("Cannot register command %s\n", addbkpt_info.name);
panic("could not register command %s\n", addbkpt_info.name);
 
cmd_initialize(&addbkpte_info);
if (!cmd_register(&addbkpte_info))
printf("Cannot register command %s\n", addbkpte_info.name);
#endif
panic("could not register command %s\n", addbkpte_info.name);
}
 
/** Handle breakpoint
317,7 → 308,7
 
/* test branch delay slot */
if (cp0_cause_read() & 0x80000000)
panic("Breakpoint in branch delay slot not supported.");
panic("Breakpoint in branch delay slot not supported.\n");
 
spinlock_lock(&bkpoint_lock);
for (i = 0; i < BKPOINTS_MAX; i++) {
349,10 → 340,9
if (cur->flags & BKPOINT_INPROG)
printf("Warning: breakpoint recursion\n");
if (!(cur->flags & BKPOINT_FUNCCALL)) {
if (!(cur->flags & BKPOINT_FUNCCALL))
printf("***Breakpoint %d: %p in %s.\n", i, fireaddr,
symtab_fmt_name_lookup(istate->epc));
}
get_symtab_entry(istate->epc));
 
/* Return first instruction back */
((uint32_t *)cur->address)[0] = cur->instruction;
365,9 → 355,8
}
cur->flags |= BKPOINT_INPROG;
} else {
printf("***Breakpoint %d: %p in %s.\n", i, fireaddr,
symtab_fmt_name_lookup(fireaddr));
 
printf("***Breakpoint %p in %s.\n", fireaddr,
get_symtab_entry(fireaddr));
/* Move on to next instruction */
istate->epc += 4;
}
378,20 → 367,19
if (cur->bkfunc)
cur->bkfunc(cur, istate);
} else {
#ifdef CONFIG_KCONSOLE
printf("***Type 'exit' to exit kconsole.\n");
/* This disables all other processors - we are not SMP,
* actually this gets us to cpu_halt, if scheduler() is run
* - we generally do not want scheduler to be run from debug,
* so this is a good idea
*/
atomic_set(&haltstate, 1);
atomic_set(&haltstate,1);
spinlock_unlock(&bkpoint_lock);
kconsole("debug", "Debug console ready.\n", false);
 
kconsole("debug");
 
spinlock_lock(&bkpoint_lock);
atomic_set(&haltstate, 0);
#endif
atomic_set(&haltstate,0);
}
if (cur && cur->address == fireaddr && (cur->flags & BKPOINT_INPROG)) {
/* Remove one-shot breakpoint */
/branches/network/kernel/arch/mips32/src/exception.c
41,12 → 41,13
#include <arch.h>
#include <debug.h>
#include <proc/thread.h>
#include <symtab.h>
#include <print.h>
#include <interrupt.h>
#include <func.h>
#include <console/kconsole.h>
#include <ddi/irq.h>
#include <arch/debugger.h>
#include <symtab.h>
 
static char * exctable[] = {
"Interrupt",
73,21 → 74,25
 
static void print_regdump(istate_t *istate)
{
char *pcsymbol, *rasymbol;
char *pcsymbol = "";
char *rasymbol = "";
 
pcsymbol = symtab_fmt_name_lookup(istate->epc);
rasymbol = symtab_fmt_name_lookup(istate->ra);
 
printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol,
istate->ra, rasymbol, istate->sp);
char *s = get_symtab_entry(istate->epc);
if (s)
pcsymbol = s;
s = get_symtab_entry(istate->ra);
if (s)
rasymbol = s;
printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, istate->ra, rasymbol, istate->sp);
}
 
static void unhandled_exception(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "Unhandled exception %s.", exctable[n]);
fault_if_from_uspace(istate, "unhandled exception %s", exctable[n]);
print_regdump(istate);
panic("Unhandled exception %s.", exctable[n]);
panic("unhandled exception %s\n", exctable[n]);
}
 
static void reserved_instr_exception(int n, istate_t *istate)
128,8 → 133,8
if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
scheduler_fpu_lazy_request();
else {
fault_if_from_uspace(istate, "Unhandled Coprocessor Unusable Exception.");
panic("Unhandled Coprocessor Unusable Exception.");
fault_if_from_uspace(istate, "unhandled Coprocessor Unusable Exception");
panic("unhandled Coprocessor Unusable Exception\n");
}
}
#endif
140,7 → 145,7
int i;
/* decode interrupt number and process the interrupt */
cause = (cp0_cause_read() >> 8) & 0xff;
cause = (cp0_cause_read() >> 8) &0xff;
for (i = 0; i < 8; i++) {
if (cause & (1 << i)) {
149,7 → 154,7
/*
* The IRQ handler was found.
*/
irq->handler(irq);
irq->handler(irq, irq->arg);
spinlock_unlock(&irq->lock);
} else {
/*
156,8 → 161,7
* Spurious interrupt.
*/
#ifdef CONFIG_DEBUG
printf("cpu%u: spurious interrupt (inum=%d)\n",
CPU->id, i);
printf("cpu%u: spurious interrupt (inum=%d)\n", CPU->id, i);
#endif
}
}
167,7 → 171,7
/** Handle syscall userspace call */
static void syscall_exception(int n, istate_t *istate)
{
panic("Syscall is handled through shortcut.");
panic("Syscall is handled through shortcut");
}
 
void exception_init(void)
/branches/network/kernel/arch/mips32/src/cpu/cpu.c
48,7 → 48,7
{ "MIPS", "R2000" }, /* 0x01 */
{ "MIPS", "R3000" }, /* 0x02 */
{ "MIPS", "R6000" }, /* 0x03 */
{ "MIPS", "R4000/R4400" }, /* 0x04 */
{ "MIPS", " R4000/R4400" }, /* 0x04 */
{ "LSI Logic", "R3000" }, /* 0x05 */
{ "MIPS", "R6000A" }, /* 0x06 */
{ "IDT", "3051/3052" }, /* 0x07 */
123,9 → 123,9
data = &imp_data[m->arch.imp_num];
}
 
printf("cpu%u: %s %s (rev=%d.%d, imp=%d)\n",
printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n",
m->id, data->vendor, data->model, m->arch.rev_num >> 4,
m->arch.rev_num & 0x0f, m->arch.imp_num);
m->arch.rev_num & 0xf, m->arch.imp_num);
}
 
/** @}
/branches/network/kernel/arch/mips32/src/smp/dorder.c
File deleted
/branches/network/kernel/arch/mips32/src/smp/smp.c
File deleted
/branches/network/kernel/arch/mips32/src/smp/order.c
0,0 → 1,45
/*
* Copyright (c) 2007 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32
* @{
*/
/** @file
*/
 
#include <arch/smp/order.h>
 
#define MSIM_ORDER_ADDRESS 0xB0000004
 
void ipi_broadcast_arch(int ipi)
{
*((volatile unsigned int *) MSIM_ORDER_ADDRESS) = 0x7FFFFFFF;
}
 
/** @}
*/
/branches/network/kernel/arch/mips32/src/cache.c
38,7 → 38,7
 
void cache_error(istate_t *istate)
{
panic("cache_error exception (epc=%p).", istate->epc);
panic("cache_error exception (epc=%p)\n", istate->epc);
}
 
/** @}
/branches/network/kernel/arch/mips32/src/fpu_context.c
40,7 → 40,7
 
void fpu_disable(void)
{
#ifdef CONFIG_FPU
#ifdef ARCH_HAS_FPU
cp0_status_write(cp0_status_read() & ~cp0_status_fpu_bit);
#endif
}
47,7 → 47,7
 
void fpu_enable(void)
{
#ifdef CONFIG_FPU
#ifdef ARCH_HAS_FPU
cp0_status_write(cp0_status_read() | cp0_status_fpu_bit);
#endif
}
/branches/network/kernel/arch/mips32/src/dummy.S
0,0 → 1,41
#
# Copyright (c) 2003-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.text
.set noat
 
.global calibrate_delay_loop
.global asm_delay_loop
.global dummy
calibrate_delay_loop:
asm_delay_loop:
 
dummy:
j $31
nop
/branches/network/kernel/arch/mips32/include/drivers/serial.h
0,0 → 1,76
/*
* Copyright (c) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32
* @{
*/
/** @file
*/
 
#ifndef KERN_mips32_SERIAL_H_
#define KERN_mips32_SERIAL_H_
 
#include <console/chardev.h>
 
#define SERIAL_ADDRESS 0x98000000
 
#define SERIAL_MAX 4
#define SERIAL_COM1 0x3f8
#define SERIAL_COM1_IRQ 4
#define SERIAL_COM2 0x2f8
#define SERIAL_COM2_IRQ 3
 
#define P_WRITEB(where, what) (*((volatile char *) (SERIAL_ADDRESS + where)) = what)
#define P_READB(where) (*((volatile char *) (SERIAL_ADDRESS + where)))
 
#define SERIAL_READ(x) P_READB(x)
#define SERIAL_WRITE(x, c) P_WRITEB(x, c)
 
/* Interrupt enable register */
#define SERIAL_READ_IER(x) (P_READB((x) + 1))
#define SERIAL_WRITE_IER(x,c) (P_WRITEB((x) + 1, c))
 
/* Interrupt identification register */
#define SERIAL_READ_IIR(x) (P_READB((x) + 2))
 
/* Line status register */
#define SERIAL_READ_LSR(x) (P_READB((x) + 5))
#define TRANSMIT_EMPTY_BIT 5
 
typedef struct {
int port;
int irq;
}serial_t;
 
extern void serial_console(devno_t devno);
extern int serial_init(void);
 
#endif
 
/** @}
*/
/branches/network/kernel/arch/mips32/include/drivers/msim.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32
/** @addtogroup mips32
* @{
*/
/** @file
36,10 → 36,16
#define KERN_mips32_MSIM_H_
 
/** Address of devices. */
#define MSIM_VIDEORAM 0x90000000
#define MSIM_KBD_ADDRESS 0x90000000
#define MSIM_KBD_IRQ 2
#define MSIM_VIDEORAM 0x90000000
#define MSIM_KBD_ADDRESS 0x90000000
#define MSIM_KBD_IRQ 2
 
#include <console/chardev.h>
 
void msim_console(devno_t devno);
void msim_kbd_release(void);
void msim_kbd_grab(void);
 
#endif
 
/** @}
/branches/network/kernel/arch/mips32/include/mm/tlb.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32mm
/** @addtogroup mips32mm
* @{
*/
/** @file
40,38 → 40,42
#include <arch/mm/asid.h>
#include <arch/exception.h>
 
#define TLB_ENTRY_COUNT 48
#ifdef TLBCNT
# define TLB_ENTRY_COUNT TLBCNT
#else
# define TLB_ENTRY_COUNT 48
#endif
 
#define TLB_WIRED 1
#define TLB_KSTACK_WIRED_INDEX 0
#define TLB_WIRED 1
#define TLB_KSTACK_WIRED_INDEX 0
 
#define TLB_PAGE_MASK_4K (0x000 << 13)
#define TLB_PAGE_MASK_16K (0x003 << 13)
#define TLB_PAGE_MASK_64K (0x00f << 13)
#define TLB_PAGE_MASK_256K (0x03f << 13)
#define TLB_PAGE_MASK_1M (0x0ff << 13)
#define TLB_PAGE_MASK_4M (0x3ff << 13)
#define TLB_PAGE_MASK_16M (0xfff << 13)
#define TLB_PAGE_MASK_4K (0x000 << 13)
#define TLB_PAGE_MASK_16K (0x003 << 13)
#define TLB_PAGE_MASK_64K (0x00f << 13)
#define TLB_PAGE_MASK_256K (0x03f << 13)
#define TLB_PAGE_MASK_1M (0x0ff << 13)
#define TLB_PAGE_MASK_4M (0x3ff << 13)
#define TLB_PAGE_MASK_16M (0xfff << 13)
 
#define PAGE_UNCACHED 2
#define PAGE_CACHEABLE_EXC_WRITE 5
#define PAGE_UNCACHED 2
#define PAGE_CACHEABLE_EXC_WRITE 5
 
typedef union {
struct {
#ifdef BIG_ENDIAN
unsigned : 2; /* zero */
unsigned pfn : 24; /* frame number */
unsigned c : 3; /* cache coherency attribute */
unsigned d : 1; /* dirty/write-protect bit */
unsigned v : 1; /* valid bit */
unsigned g : 1; /* global bit */
unsigned : 2; /* zero */
unsigned pfn : 24; /* frame number */
unsigned c : 3; /* cache coherency attribute */
unsigned d : 1; /* dirty/write-protect bit */
unsigned v : 1; /* valid bit */
unsigned g : 1; /* global bit */
#else
unsigned g : 1; /* global bit */
unsigned v : 1; /* valid bit */
unsigned d : 1; /* dirty/write-protect bit */
unsigned c : 3; /* cache coherency attribute */
unsigned pfn : 24; /* frame number */
unsigned : 2; /* zero */
unsigned g : 1; /* global bit */
unsigned v : 1; /* valid bit */
unsigned d : 1; /* dirty/write-protect bit */
unsigned c : 3; /* cache coherency attribute */
unsigned pfn : 24; /* frame number */
unsigned : 2; /* zero */
#endif
} __attribute__ ((packed));
uint32_t value;
159,7 → 163,7
asm volatile ("tlbwr\n\t");
}
 
#define tlb_invalidate(asid) tlb_invalidate_asid(asid)
#define tlb_invalidate(asid) tlb_invalidate_asid(asid)
 
extern void tlb_invalid(istate_t *istate);
extern void tlb_refill(istate_t *istate);
/branches/network/kernel/arch/mips32/include/mm/frame.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32mm
/** @addtogroup mips32mm
* @{
*/
/** @file
35,14 → 35,12
#ifndef KERN_mips32_FRAME_H_
#define KERN_mips32_FRAME_H_
 
#define FRAME_WIDTH 14 /* 16K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
#define FRAME_WIDTH 14 /* 16K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
#ifdef KERNEL
#ifndef __ASM__
 
#include <typedefs.h>
 
extern void frame_arch_init(void);
extern void physmem_print(void);
 
/branches/network/kernel/arch/mips32/include/mm/asid.h
37,7 → 37,7
 
#include <arch/types.h>
 
#define ASID_MAX_ARCH 255 /* 2^8 - 1 */
#define ASID_MAX_ARCH 255 /* 2^8 - 1 */
 
typedef uint8_t asid_t;
 
/branches/network/kernel/arch/mips32/include/atomic.h
35,14 → 35,14
#ifndef KERN_mips32_ATOMIC_H_
#define KERN_mips32_ATOMIC_H_
 
#define atomic_inc(x) ((void) atomic_add(x, 1))
#define atomic_dec(x) ((void) atomic_add(x, -1))
#define atomic_inc(x) ((void) atomic_add(x, 1))
#define atomic_dec(x) ((void) atomic_add(x, -1))
 
#define atomic_postinc(x) (atomic_add(x, 1) - 1)
#define atomic_postdec(x) (atomic_add(x, -1) + 1)
#define atomic_postinc(x) (atomic_add(x, 1) - 1)
#define atomic_postdec(x) (atomic_add(x, -1) + 1)
 
#define atomic_preinc(x) atomic_add(x, 1)
#define atomic_predec(x) atomic_add(x, -1)
#define atomic_preinc(x) atomic_add(x, 1)
#define atomic_predec(x) atomic_add(x, -1)
 
/* Atomic addition of immediate value.
*
54,37 → 54,19
static inline long atomic_add(atomic_t *val, int i)
{
long tmp, v;
 
asm volatile (
"1:\n"
" ll %0, %1\n"
" addu %0, %0, %3\n" /* same as addi, but never traps on overflow */
" move %2, %0\n"
" addu %0, %0, %3\n" /* same as addi, but never traps on overflow */
" move %2, %0\n"
" sc %0, %1\n"
" beq %0, %4, 1b\n" /* if the atomic operation failed, try again */
" beq %0, %4, 1b\n" /* if the atomic operation failed, try again */
" nop\n"
: "=&r" (tmp), "+m" (val->count), "=&r" (v)
: "r" (i), "i" (0)
);
return v;
}
);
 
static inline uint32_t test_and_set(atomic_t *val) {
uint32_t tmp, v;
asm volatile (
"1:\n"
" ll %2, %1\n"
" bnez %2, 2f\n"
" li %0, %3\n"
" sc %0, %1\n"
" beqz %0, 1b\n"
"2:\n"
: "=&r" (tmp), "+m" (val->count), "=&r" (v)
: "i" (1)
);
return v;
}
 
/branches/network/kernel/arch/mips32/include/types.h
57,9 → 57,6
typedef uint32_t unative_t;
typedef int32_t native_t;
 
typedef struct {
} fncptr_t;
 
#define PRIp "x" /**< Format for uintptr_t. */
#define PRIs "u" /**< Format for size_t. */
#define PRIc "u" /**< Format for count_t. */
/branches/network/kernel/arch/mips32/include/context_offset.h
76,17 → 76,26
#define EOFFSET_T5 0x30
#define EOFFSET_T6 0x34
#define EOFFSET_T7 0x38
#define EOFFSET_T8 0x3c
#define EOFFSET_T9 0x40
#define EOFFSET_GP 0x44
#define EOFFSET_SP 0x48
#define EOFFSET_RA 0x4c
#define EOFFSET_LO 0x50
#define EOFFSET_HI 0x54
#define EOFFSET_STATUS 0x58
#define EOFFSET_EPC 0x5c
#define EOFFSET_K1 0x60
#define REGISTER_SPACE 100
#define EOFFSET_S0 0x3c
#define EOFFSET_S1 0x40
#define EOFFSET_S2 0x44
#define EOFFSET_S3 0x48
#define EOFFSET_S4 0x4c
#define EOFFSET_S5 0x50
#define EOFFSET_S6 0x54
#define EOFFSET_S7 0x58
#define EOFFSET_T8 0x5c
#define EOFFSET_T9 0x60
#define EOFFSET_GP 0x64
#define EOFFSET_SP 0x68
#define EOFFSET_S8 0x6c
#define EOFFSET_RA 0x70
#define EOFFSET_LO 0x74
#define EOFFSET_HI 0x78
#define EOFFSET_STATUS 0x7c
#define EOFFSET_EPC 0x80
#define EOFFSET_K1 0x84
#define REGISTER_SPACE 136
 
#ifdef __ASM__
 
105,10 → 114,10
sw $s8,OFFSET_S8(\ctx)
sw $gp,OFFSET_GP(\ctx)
 
#ifndef KERNEL
#ifndef KERNEL
sw $k1,OFFSET_TLS(\ctx)
 
#ifdef CONFIG_FPU
# ifdef CONFIG_MIPS_FPU
mfc1 $t0,$20
sw $t0, OFFSET_F20(\ctx)
 
141,7 → 150,7
mfc1 $t0,$30
sw $t0, OFFSET_F30(\ctx)
#endif /* CONFIG_FPU */
# endif /* CONFIG_MIPS_FPU */
#endif /* KERNEL */
 
sw $ra,OFFSET_PC(\ctx)
163,7 → 172,7
#ifndef KERNEL
lw $k1,OFFSET_TLS(\ctx)
 
#ifdef CONFIG_FPU
# ifdef CONFIG_MIPS_FPU
lw $t0, OFFSET_F20(\ctx)
mtc1 $t0,$20
 
196,9 → 205,9
 
lw $t0, OFFSET_F30(\ctx)
mtc1 $t0,$30
#endif /* CONFIG_FPU */
# endif /* CONFIG_MIPS_FPU */
#endif /* KERNEL */
 
lw $ra,OFFSET_PC(\ctx)
lw $sp,OFFSET_SP(\ctx)
.endm
/branches/network/kernel/arch/mips32/include/smp/dorder.h
File deleted
/branches/network/kernel/arch/mips32/include/smp/order.h
0,0 → 1,34
/*
* Copyright (c) 2007 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef KERN_mips32_ORDER_H_
#define KERN_mips32_ORDER_H_
 
extern void ipi_broadcast_arch(int ipi);
 
#endif
/branches/network/kernel/arch/mips32/include/interrupt.h
38,11 → 38,9
#include <typedefs.h>
#include <arch/exception.h>
 
#define IVT_ITEMS 32
#define IVT_FIRST 0
#define IVT_ITEMS 32
#define IVT_FIRST 0
 
#define VECTOR_TLB_SHOOTDOWN_IPI EXC_Int
 
extern function virtual_timer_fnc;
extern uint32_t count_hi;
 
/branches/network/kernel/arch/mips32/include/exception.h
73,10 → 73,19
uint32_t t5;
uint32_t t6;
uint32_t t7;
uint32_t s0;
uint32_t s1;
uint32_t s2;
uint32_t s3;
uint32_t s4;
uint32_t s5;
uint32_t s6;
uint32_t s7;
uint32_t t8;
uint32_t t9;
uint32_t gp;
uint32_t sp;
uint32_t s8;
uint32_t ra;
uint32_t lo;
/branches/network/kernel/arch/mips32/include/asm.h
36,7 → 36,6
#define KERN_mips32_ASM_H_
 
#include <arch/types.h>
#include <typedefs.h>
#include <config.h>
 
 
56,11 → 55,7
{
uintptr_t v;
asm volatile (
"and %0, $29, %1\n"
: "=r" (v)
: "r" (~(STACK_SIZE-1))
);
asm volatile ("and %0, $29, %1\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
return v;
}
68,44 → 63,13
extern void cpu_halt(void);
extern void asm_delay_loop(uint32_t t);
extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg,
uintptr_t entry);
uintptr_t entry);
 
extern ipl_t interrupts_disable(void);
extern ipl_t interrupts_enable(void);
extern void interrupts_restore(ipl_t ipl);
extern ipl_t interrupts_read(void);
extern void asm_delay_loop(uint32_t t);
 
static inline void pio_write_8(ioport8_t *port, uint8_t v)
{
*port = v;
}
 
static inline void pio_write_16(ioport16_t *port, uint16_t v)
{
*port = v;
}
 
static inline void pio_write_32(ioport32_t *port, uint32_t v)
{
*port = v;
}
 
static inline uint8_t pio_read_8(ioport8_t *port)
{
return *port;
}
 
static inline uint16_t pio_read_16(ioport16_t *port)
{
return *port;
}
 
static inline uint32_t pio_read_32(ioport32_t *port)
{
return *port;
}
 
#endif
 
/** @}
/branches/network/kernel/arch/mips32/include/cpu.h
42,7 → 42,7
uint32_t imp_num;
uint32_t rev_num;
} cpu_arch_t;
 
#endif
 
/** @}
/branches/network/kernel/arch/mips32/include/asm/boot.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32
/** @addtogroup mips32
* @{
*/
/** @file
/branches/network/kernel/arch/mips32/include/console.h
35,6 → 35,8
#ifndef KERN_mips32_CONSOLE_H_
#define KERN_mips32_CONSOLE_H_
 
extern void console_init(devno_t devno);
 
#endif
 
/** @}
/branches/network/kernel/arch/mips32/include/boot.h
0,0 → 1,48
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef KERN_mips32_BOOT_H_
#define KERN_mips32_BOOT_H_
 
#define TASKMAP_MAX_RECORDS 32
 
#include <arch/types.h>
 
typedef struct {
uintptr_t addr;
uint32_t size;
} utask_t;
 
typedef struct {
uint32_t cnt;
utask_t tasks[TASKMAP_MAX_RECORDS];
} bootinfo_t;
 
extern bootinfo_t bootinfo;
 
#endif
/branches/network/kernel/arch/mips32/include/arch.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32
/** @addtogroup mips32
* @{
*/
/** @file
35,29 → 35,6
#ifndef KERN_mips32_ARCH_H_
#define KERN_mips32_ARCH_H_
 
#define TASKMAP_MAX_RECORDS 32
#define CPUMAP_MAX_RECORDS 32
 
#define BOOTINFO_TASK_NAME_BUFLEN 32
 
#include <typedefs.h>
 
extern count_t cpu_count;
 
typedef struct {
uintptr_t addr;
uint32_t size;
char name[BOOTINFO_TASK_NAME_BUFLEN];
} utask_t;
 
typedef struct {
uint32_t cpumap;
uint32_t cnt;
utask_t tasks[TASKMAP_MAX_RECORDS];
} bootinfo_t;
 
extern void arch_pre_main(void *entry, bootinfo_t *bootinfo);
 
#endif
 
/** @}
/branches/network/kernel/arch/mips32/_link.ld.in
1,17 → 1,15
/*
* MIPS32 linker script
*
* MIPS32 linker script
*
* kernel text
* kernel data
*
*
*/
 
#undef mips
#define mips mips
 
#define KERNEL_LOAD_ADDRESS 0x80100000
OUTPUT_ARCH(mips)
 
OUTPUT_ARCH(mips)
ENTRY(kernel_image_start)
 
SECTIONS {
23,9 → 21,9
}
.data : {
kdata_start = .;
*(.data); /* initialized data */
*(.data); /* initialized data */
hardcoded_ktext_size = .;
LONG(ktext_end - ktext_start);
LONG(ktext_end - ktext_start);
hardcoded_kdata_size = .;
LONG(kdata_end - kdata_start);
hardcoded_load_address = .;
35,21 → 33,21
*(.reginfo);
*(.sbss);
*(.scommon);
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
*(.bss); /* uninitialized static variables */
*(COMMON); /* global variables */
symbol_table = .;
*(symtab.*);
*(symtab.*);
}
_gp = . + 0x8000;
.lit8 : { *(.lit8) }
.lit4 : { *(.lit4) }
 
kdata_end = .;
 
/DISCARD/ : {
*(.mdebug*);
*(.pdr);
*(.comment);
*(.note);
*(.mdebug*);
*(.pdr);
*(.comment);
*(.note);
}
}
/branches/network/kernel/kernel.config
0,0 → 1,169
#
# Copyright (c) 2006 Ondrej Palkovsky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
## General configuration directives
 
# Architecture
@ "amd64" AMD64/Intel EM64T
@ "arm32" ARM 32-bit
@ "ia32" Intel IA-32
@ "ia32xen" Intel IA-32 on Xen hypervisor
@ "ia64" Intel IA-64
@ "mips32" MIPS 32-bit
@ "ppc32" PowerPC 32-bit
@ "ppc64" PowerPC 64-bit
@ "sparc64" Sun UltraSPARC 64-bit
! ARCH (choice)
 
# Compiler
@ "gcc_cross" GCC Cross-compiler
@ "gcc_native" GCC Native
@ "icc_native" ICC Native
@ "suncc_native" Sun Studio C Compiler
! [ARCH=amd64|ARCH=ia32|ARCH=ia32xen] COMPILER (choice)
# Compiler
@ "gcc_cross" GCC Cross-compiler
@ "gcc_native" GCC Native
@ "icc_native" ICC Native
! [ARCH=ia64] COMPILER (choice)
# Compiler
@ "gcc_cross" GCC Cross-compiler
@ "gcc_native" GCC Native
@ "suncc_native" Sun Studio C Compiler
! [ARCH=sparc64] COMPILER (choice)
# Compiler
@ "gcc_cross" GCC Cross-compiler
@ "gcc_native" GCC Native
! [ARCH=arm32|ARCH=mips32|ARCH=ppc32|ARCH=ppc64] COMPILER (choice)
 
# CPU type
@ "pentium4" Pentium 4
@ "pentium3" Pentium 3
@ "core" Core Solo/Duo
@ "athlon-xp" Athlon XP
@ "athlon-mp" Athlon MP
! [ARCH=ia32|ARCH=ia32xen] MACHINE (choice)
 
# CPU type
@ "opteron" Opteron
! [ARCH=amd64] MACHINE (choice)
 
# Machine type
@ "msim" MSIM Simulator
@ "simics" Virtutech Simics simulator
@ "lgxemul" GXEmul Little Endian
@ "bgxemul" GXEmul Big Endian
! [ARCH=mips32] MACHINE (choice)
 
# Framebuffer support
! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)|(ARCH=arm32)] CONFIG_FB (y/n)
 
# Framebuffer width
@ "640"
@ "800"
@ "1024"
@ "1152"
@ "1280"
@ "1400"
@ "1440"
@ "1600"
@ "2048"
! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice)
 
# Framebuffer height
@ "480"
@ "600"
@ "768"
@ "852"
@ "900"
@ "960"
@ "1024"
@ "1050"
@ "1200"
@ "1536"
! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_HEIGHT (choice)
 
# Framebuffer depth
@ "8"
@ "16"
@ "24"
! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice)
 
# Support for SMP
! [ARCH=ia32|ARCH=amd64|ARCH=ia32xen|ARCH=sparc64] CONFIG_SMP (y/n)
 
# Improved support for hyperthreading
! [(ARCH=ia32|ARCH=amd64|ARCH=ia32xen)&CONFIG_SMP=y] CONFIG_HT (y/n)
 
# Simics BIOS AP boot fix
! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n)
 
# Lazy FPU context switching
! [(ARCH=mips32&MACHINE!=msim&MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=sparc64|ARCH=ia32xen] CONFIG_FPU_LAZY (y/n)
 
# Use VHPT
! [ARCH=ia64] CONFIG_VHPT (n/y)
 
# Use TSB
! [ARCH=sparc64] CONFIG_TSB (y/n)
 
# Support for Z8530 serial port
! [ARCH=sparc64] CONFIG_Z8530 (y/n)
 
# Support for NS16550 serial port
! [ARCH=sparc64] CONFIG_NS16550 (y/n)
 
# Virtually indexed D-cache support
! [ARCH=sparc64] CONFIG_VIRT_IDX_DCACHE (y/n)
 
 
## Debugging configuration directives
 
# General debuging and assert checking
! CONFIG_DEBUG (y/n)
 
# Extensive debugging output
! [CONFIG_DEBUG=y] CONFIG_EDEBUG (n/y)
 
# Deadlock detection support for spinlocks
! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n)
 
# Watchpoint on rewriting AS with zero
! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_AS_WATCHPOINT (y/n)
 
# Save all interrupt registers
! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_ALLREGS (y/n)
 
 
## Run-time configuration directives
 
# Compile kernel tests
! CONFIG_TEST (y/n)
/branches/network/kernel/genarch/include/drivers/z8530/z8530.h
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/include/drivers/ega/ega.h
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/include/drivers/ns16550/ns16550.h
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/include/drivers/dsrln/dsrlnin.h
File deleted
/branches/network/kernel/genarch/include/drivers/dsrln/dsrlnout.h
File deleted
/branches/network/kernel/genarch/include/drivers/legacy/ia32/io.h
File deleted
/branches/network/kernel/genarch/include/drivers/i8042/i8042.h
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/include/kbrd/kbrd.h
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/include/kbrd/scanc.h
File deleted
/branches/network/kernel/genarch/include/kbrd/scanc_pc.h
File deleted
/branches/network/kernel/genarch/include/kbrd/scanc_sun.h
File deleted
/branches/network/kernel/genarch/include/kbrd
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/include/multiboot/multiboot.h
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/include/srln/srln.h
File deleted
/branches/network/kernel/genarch/include/ofw/ofw_tree.h
30,7 → 30,6
#define KERN_OFW_TREE_H_
 
#include <arch/types.h>
#include <ddi/irq.h>
#include <typedefs.h>
 
#define OFW_TREE_PROPERTY_MAX_NAMELEN 32
44,11 → 43,11
ofw_tree_node_t *peer;
ofw_tree_node_t *child;
 
uint32_t node_handle; /**< Old OpenFirmware node handle. */
uint32_t node_handle; /**< Old OpenFirmware node handle. */
 
char *da_name; /**< Disambigued name. */
char *da_name; /**< Disambigued name. */
 
unsigned properties; /**< Number of properties. */
unsigned properties; /**< Number of properties. */
ofw_tree_property_t *property;
/**
106,7 → 105,7
uint32_t child_space;
uint32_t child_base;
uint32_t parent_space;
uint64_t parent_base; /* group phys.mid and phys.lo together */
uint64_t parent_base; /* group phys.mid and phys.lo together */
uint32_t size;
} __attribute__ ((packed));
typedef struct ofw_ebus_range ofw_ebus_range_t;
128,8 → 127,8
typedef struct ofw_ebus_intr_mask ofw_ebus_intr_mask_t;
 
struct ofw_pci_reg {
uint32_t space; /* needs to be masked to obtain pure space id */
uint64_t addr; /* group phys.mid and phys.lo together */
uint32_t space; /* needs to be masked to obtain pure space id */
uint64_t addr; /* group phys.mid and phys.lo together */
uint64_t size;
} __attribute__ ((packed));
typedef struct ofw_pci_reg ofw_pci_reg_t;
136,7 → 135,7
 
struct ofw_pci_range {
uint32_t space;
uint64_t child_base; /* group phys.mid and phys.lo together */
uint64_t child_base; /* group phys.mid and phys.lo together */
uint64_t parent_base;
uint64_t size;
} __attribute__ ((packed));
161,43 → 160,27
} __attribute__ ((packed));
typedef struct ofw_upa_reg ofw_upa_reg_t;
 
extern void ofw_tree_init(ofw_tree_node_t *);
extern void ofw_tree_init(ofw_tree_node_t *root);
extern void ofw_tree_print(void);
extern const char *ofw_tree_node_name(const ofw_tree_node_t *);
extern ofw_tree_node_t *ofw_tree_lookup(const char *);
extern ofw_tree_property_t *ofw_tree_getprop(const ofw_tree_node_t *,
const char *);
extern ofw_tree_node_t *ofw_tree_find_child(ofw_tree_node_t *, const char *);
extern ofw_tree_node_t *ofw_tree_find_child_by_device_type(ofw_tree_node_t *,
const char *);
extern ofw_tree_node_t *ofw_tree_find_peer_by_device_type(ofw_tree_node_t *,
const char *);
extern ofw_tree_node_t *ofw_tree_find_peer_by_name(ofw_tree_node_t *node,
const char *name);
extern ofw_tree_node_t *ofw_tree_find_node_by_handle(ofw_tree_node_t *,
uint32_t);
extern const char *ofw_tree_node_name(const ofw_tree_node_t *node);
extern ofw_tree_node_t *ofw_tree_lookup(const char *path);
extern ofw_tree_property_t *ofw_tree_getprop(const ofw_tree_node_t *node, const char *name);
extern ofw_tree_node_t *ofw_tree_find_child(ofw_tree_node_t *node, const char *name);
extern ofw_tree_node_t *ofw_tree_find_child_by_device_type(ofw_tree_node_t *node, const char *device_type);
extern ofw_tree_node_t *ofw_tree_find_peer_by_device_type(ofw_tree_node_t *node, const char *device_type);
extern ofw_tree_node_t *ofw_tree_find_node_by_handle(ofw_tree_node_t *root, uint32_t handle);
 
extern bool ofw_fhc_apply_ranges(ofw_tree_node_t *, ofw_fhc_reg_t *,
uintptr_t *);
extern bool ofw_central_apply_ranges(ofw_tree_node_t *, ofw_central_reg_t *,
uintptr_t *);
extern bool ofw_ebus_apply_ranges(ofw_tree_node_t *, ofw_ebus_reg_t *,
uintptr_t *);
extern bool ofw_pci_apply_ranges(ofw_tree_node_t *, ofw_pci_reg_t *,
uintptr_t *);
extern bool ofw_sbus_apply_ranges(ofw_tree_node_t *, ofw_sbus_reg_t *,
uintptr_t *);
extern bool ofw_upa_apply_ranges(ofw_tree_node_t *, ofw_upa_reg_t *,
uintptr_t *);
extern bool ofw_fhc_apply_ranges(ofw_tree_node_t *node, ofw_fhc_reg_t *reg, uintptr_t *pa);
extern bool ofw_central_apply_ranges(ofw_tree_node_t *node, ofw_central_reg_t *reg, uintptr_t *pa);
extern bool ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa);
extern bool ofw_pci_apply_ranges(ofw_tree_node_t *node, ofw_pci_reg_t *reg, uintptr_t *pa);
extern bool ofw_sbus_apply_ranges(ofw_tree_node_t *node, ofw_sbus_reg_t *reg, uintptr_t *pa);
extern bool ofw_upa_apply_ranges(ofw_tree_node_t *node, ofw_upa_reg_t *reg, uintptr_t *pa);
 
extern bool ofw_pci_reg_absolutize(ofw_tree_node_t *, ofw_pci_reg_t *,
ofw_pci_reg_t *);
extern bool ofw_pci_reg_absolutize(ofw_tree_node_t *node, ofw_pci_reg_t *reg, ofw_pci_reg_t *out);
 
extern bool ofw_fhc_map_interrupt(ofw_tree_node_t *, ofw_fhc_reg_t *,
uint32_t, int *, cir_t *, void **);
extern bool ofw_ebus_map_interrupt(ofw_tree_node_t *, ofw_ebus_reg_t *,
uint32_t, int *, cir_t *, void **);
extern bool ofw_pci_map_interrupt(ofw_tree_node_t *, ofw_pci_reg_t *,
int, int *, cir_t *, void **);
extern bool ofw_fhc_map_interrupt(ofw_tree_node_t *node, ofw_fhc_reg_t *reg, uint32_t interrupt, int *inr);
extern bool ofw_ebus_map_interrupt(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uint32_t interrupt, int *inr);
extern bool ofw_pci_map_interrupt(ofw_tree_node_t *node, ofw_pci_reg_t *reg, int ino, int *inr);
 
#endif
/branches/network/kernel/genarch/include/fb/logo-196x66.h
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/include/fb/fb.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
/** @addtogroup genarch
* @{
*/
/** @file
38,37 → 38,9
#include <arch/types.h>
#include <synch/spinlock.h>
 
/**
* Properties of the framebuffer device.
*/
typedef struct fb_properties {
/** Physical address of the framebuffer device. */
uintptr_t addr;
 
/**
* Address where the first (top left) pixel is mapped,
* relative to "addr".
*/
unsigned int offset;
 
/** Screen width in pixels. */
unsigned int x;
 
/** Screen height in pixels. */
unsigned int y;
 
/** Bytes per one scanline. */
unsigned int scan;
 
/** Color model. */
unsigned int visual;
} fb_properties_t;
 
SPINLOCK_EXTERN(fb_lock);
void fb_init(uintptr_t addr, unsigned int x, unsigned int y, unsigned int scan, unsigned int visual);
 
void fb_redraw(void);
void fb_init(fb_properties_t *props);
 
#endif
 
/** @}
/branches/network/kernel/genarch/include/fb/font-8x16.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
/** @addtogroup genarch
* @{
*/
/** @file
35,14 → 35,11
#ifndef KERN_FONT_8X16_H_
#define KERN_FONT_8X16_H_
 
#define FONT_GLYPHS 256
#define FONT_WIDTH 8
#define FONT_SCANLINES 16
#define FONT_GLIPHS 256
#define FONT_SCANLINES 16
 
#include <arch/types.h>
extern unsigned char fb_font[FONT_GLIPHS * FONT_SCANLINES];
 
extern uint8_t fb_font[FONT_GLYPHS * FONT_SCANLINES];
 
#endif
 
/** @}
/branches/network/kernel/genarch/include/fb/visuals.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
/** @addtogroup genarch
* @{
*/
/** @file
35,16 → 35,15
#ifndef KERN_VISUALS_H_
#define KERN_VISUALS_H_
 
#define VISUAL_INDIRECT_8 0
#define VISUAL_INDIRECT_8 0
 
#define VISUAL_RGB_5_5_5 1
#define VISUAL_RGB_5_6_5 2
#define VISUAL_RGB_8_8_8 3
#define VISUAL_RGB_8_8_8_0 4
#define VISUAL_RGB_0_8_8_8 5
#define VISUAL_RGB_5_5_5 1
#define VISUAL_RGB_5_6_5 2
#define VISUAL_RGB_8_8_8 3
#define VISUAL_RGB_8_8_8_0 4
#define VISUAL_RGB_0_8_8_8 5
 
#define VISUAL_BGR_0_8_8_8 6
#define VISUAL_BGR_8_8_8 7
#define VISUAL_BGR_0_8_8_8 6
 
#endif
 
/branches/network/kernel/genarch/include/kbd/z8530.h
0,0 → 1,57
/*
* Copyright (c) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
* @brief Headers for Zilog 8530 serial port / keyboard driver.
*/
 
#ifndef KERN_Z8530_H_
#define KERN_Z8530_H_
 
#include <console/chardev.h>
#include <ipc/irq.h>
 
extern bool z8530_belongs_to_kernel;
 
extern void z8530_init(devno_t devno, inr_t inr, uintptr_t vaddr);
extern void z8530_poll(void);
extern void z8530_grab(void);
extern void z8530_release(void);
extern void z8530_interrupt(void);
extern char z8530_key_read(chardev_t *d);
extern irq_ownership_t z8530_claim(void);
extern void z8530_irq_handler(irq_t *irq, void *arg, ...);
 
#endif
 
/** @}
*/
/branches/network/kernel/genarch/include/kbd/ns16550.h
0,0 → 1,54
/*
* Copyright (c) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
* @brief Headers for NS 16550 serial port / keyboard driver.
*/
 
#ifndef KERN_NS16550_H_
#define KERN_NS16550_H_
 
#include <console/chardev.h>
#include <ipc/irq.h>
 
extern void ns16550_init(devno_t devno, inr_t inr, uintptr_t vaddr);
extern void ns16550_poll(void);
extern void ns16550_grab(void);
extern void ns16550_release(void);
extern char ns16550_key_read(chardev_t *d);
extern irq_ownership_t ns16550_claim(void);
extern void ns16550_irq_handler(irq_t *irq, void *arg, ...);
 
#endif
 
/** @}
*/
/branches/network/kernel/genarch/include/kbd/i8042.h
0,0 → 1,49
/*
* Copyright (c) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/** @file
*/
 
#ifndef KERN_I8042_H_
#define KERN_I8042_H_
 
#include <console/chardev.h>
 
extern void i8042_init(devno_t kbd_devno, inr_t kbd_inr, devno_t mouse_devno, inr_t mouse_inr);
extern void i8042_poll(void);
extern void i8042_grab(void);
extern void i8042_release(void);
extern char i8042_key_read(chardev_t *d);
 
#endif
 
/** @}
*/
/branches/network/kernel/genarch/include/kbd/key.h
0,0 → 1,55
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
*/
 
#ifndef KERN_KEY_H_
#define KERN_KEY_H_
 
#include <arch/types.h>
#include <console/chardev.h>
 
#define KEY_RELEASE 0x80
 
extern chardev_t kbrd;
 
extern void key_released(uint8_t sc);
extern void key_pressed(uint8_t sc);
extern uint8_t active_read_buff_read(void);
extern void active_read_buff_write(uint8_t ch);
extern void active_read_key_pressed(uint8_t sc);
 
#endif
 
/** @}
*/
/branches/network/kernel/genarch/include/kbd/scanc_pc.h
0,0 → 1,57
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
* @brief Scan codes for pc keyboards.
*/
 
#ifndef KERN_SCANC_PC_H_
#define KERN_SCANC_PC_H_
 
#define SC_ESC 0x01
#define SC_BACKSPACE 0x0e
#define SC_LSHIFT 0x2a
#define SC_RSHIFT 0x36
#define SC_CAPSLOCK 0x3a
#define SC_SPEC_ESCAPE 0xe0
#define SC_LEFTARR 0x4b
#define SC_RIGHTARR 0x4d
#define SC_UPARR 0x48
#define SC_DOWNARR 0x50
#define SC_DELETE 0x53
#define SC_HOME 0x47
#define SC_END 0x4f
 
#endif
 
/** @}
*/
/branches/network/kernel/genarch/include/kbd/scanc_sun.h
0,0 → 1,57
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
* @brief Scan codes for sun keyboards.
*/
 
#ifndef KERN_SCANC_SUN_H_
#define KERN_SCANC_SUN_H_
 
#define SC_ESC 0x1d
#define SC_BACKSPACE 0x2b
#define SC_LSHIFT 0x63
#define SC_RSHIFT 0x6e
#define SC_CAPSLOCK 0x77
#define SC_SPEC_ESCAPE 0xe0 /* ??? */
#define SC_LEFTARR 0x18
#define SC_RIGHTARR 0x1c
#define SC_UPARR 0x14
#define SC_DOWNARR 0x1b
#define SC_DELETE 0x42
#define SC_HOME 0x34
#define SC_END 0x4a
 
#endif
 
/** @}
*/
/branches/network/kernel/genarch/include/kbd/scanc.h
0,0 → 1,47
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
*/
 
#ifndef KERN_SCANC_H_
#define KERN_SCANC_H_
 
#define SPECIAL '?'
 
extern char sc_primary_map[];
extern char sc_secondary_map[];
 
#endif
 
/** @}
*/
/branches/network/kernel/genarch/src/drivers/z8530/z8530.c
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/src/drivers/ega/ega.c
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/src/drivers/ns16550/ns16550.c
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/src/drivers/dsrln/dsrlnin.c
File deleted
/branches/network/kernel/genarch/src/drivers/dsrln/dsrlnout.c
File deleted
/branches/network/kernel/genarch/src/drivers/i8042/i8042.c
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/src/kbrd/scanc_sun.c
File deleted
/branches/network/kernel/genarch/src/kbrd/kbrd.c
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/src/kbrd/scanc_pc.c
File deleted
/branches/network/kernel/genarch/src/kbrd
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/src/multiboot/multiboot.c
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/src/srln/srln.c
File deleted
/branches/network/kernel/genarch/src/mm/asid.c
32,7 → 32,7
 
/**
* @file
* @brief ASID management.
* @brief ASID management.
*
* Modern processor architectures optimize TLB utilization
* by using ASIDs (a.k.a. memory contexts on sparc64 and
/branches/network/kernel/genarch/src/acpi/acpi.c
49,12 → 49,8
struct acpi_rsdt *acpi_rsdt = NULL;
struct acpi_xsdt *acpi_xsdt = NULL;
 
struct acpi_signature_map signature_map[] = {
{
(uint8_t *) "APIC",
(void *) &acpi_madt,
"Multiple APIC Description Table"
}
struct acpi_signature_map signature_map[] = {
{ (uint8_t *)"APIC", (void *) &acpi_madt, "Multiple APIC Description Table" }
};
 
static int rsdp_check(uint8_t *rsdp) {
109,7 → 105,7
if (!acpi_sdt_check((uint8_t *) h))
goto next;
*signature_map[j].sdt_ptr = h;
LOG("%p: ACPI %s\n", *signature_map[j].sdt_ptr, signature_map[j].description);
printf("%p: ACPI %s\n", *signature_map[j].sdt_ptr, signature_map[j].description);
}
}
next:
130,7 → 126,7
if (!acpi_sdt_check((uint8_t *) h))
goto next;
*signature_map[j].sdt_ptr = h;
LOG("%p: ACPI %s\n", *signature_map[j].sdt_ptr, signature_map[j].description);
printf("%p: ACPI %s\n", *signature_map[j].sdt_ptr, signature_map[j].description);
}
}
next:
164,7 → 160,7
return;
 
rsdp_found:
LOG("%p: ACPI Root System Description Pointer\n", acpi_rsdp);
printf("%p: ACPI Root System Description Pointer\n", acpi_rsdp);
 
acpi_rsdt = (struct acpi_rsdt *) (unative_t) acpi_rsdp->rsdt_address;
if (acpi_rsdp->revision) acpi_xsdt = (struct acpi_xsdt *) ((uintptr_t) acpi_rsdp->xsdt_address);
/branches/network/kernel/genarch/src/ofw/ebus.c
38,14 → 38,13
#include <genarch/ofw/ofw_tree.h>
#include <arch/memstr.h>
#include <arch/trap/interrupt.h>
#include <string.h>
#include <func.h>
#include <panic.h>
#include <debug.h>
#include <macros.h>
 
/** Apply EBUS ranges to EBUS register. */
bool
ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa)
bool ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa)
{
ofw_tree_property_t *prop;
ofw_ebus_range_t *range;
63,13 → 62,11
for (i = 0; i < ranges; i++) {
if (reg->space != range[i].child_space)
continue;
if (overlaps(reg->addr, reg->size, range[i].child_base,
range[i].size)) {
if (overlaps(reg->addr, reg->size, range[i].child_base, range[i].size)) {
ofw_pci_reg_t pci_reg;
pci_reg.space = range[i].parent_space;
pci_reg.addr = range[i].parent_base +
(reg->addr - range[i].child_base);
pci_reg.addr = range[i].parent_base + (reg->addr - range[i].child_base);
pci_reg.size = reg->size;
return ofw_pci_apply_ranges(node->parent, &pci_reg, pa);
79,9 → 76,7
return false;
}
 
bool
ofw_ebus_map_interrupt(ofw_tree_node_t *node, ofw_ebus_reg_t *reg,
uint32_t interrupt, int *inr, cir_t *cir, void **cir_arg)
bool ofw_ebus_map_interrupt(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uint32_t interrupt, int *inr)
{
ofw_tree_property_t *prop;
ofw_tree_node_t *controller;
109,8 → 104,8
unsigned int i;
for (i = 0; i < count; i++) {
if ((intr_map[i].space == space) &&
(intr_map[i].addr == addr) && (intr_map[i].intr == intr))
if ((intr_map[i].space == space) && (intr_map[i].addr == addr)
&& (intr_map[i].intr == intr))
goto found;
}
return false;
118,12 → 113,10
found:
/*
* We found the device that functions as an interrupt controller
* for the interrupt. We also found partial mapping from interrupt to
* INO.
* for the interrupt. We also found partial mapping from interrupt to INO.
*/
 
controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"),
intr_map[i].controller_handle);
controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"), intr_map[i].controller_handle);
if (!controller)
return false;
137,8 → 130,7
/*
* Let the PCI do the next step in mapping the interrupt.
*/
if (!ofw_pci_map_interrupt(controller, NULL, intr_map[i].controller_ino,
inr, cir, cir_arg))
if (!ofw_pci_map_interrupt(controller, NULL, intr_map[i].controller_ino, inr))
return false;
 
return true;
/branches/network/kernel/genarch/src/ofw/fhc.c
38,7 → 38,7
#include <genarch/ofw/ofw_tree.h>
#include <arch/drivers/fhc.h>
#include <arch/memstr.h>
#include <string.h>
#include <func.h>
#include <panic.h>
#include <macros.h>
 
67,7 → 67,7
return true;
}
if (strcmp(ofw_tree_node_name(node->parent), "central") != 0)
panic("Unexpected parent node: %s.", ofw_tree_node_name(node->parent));
panic("Unexpected parent node: %s.\n", ofw_tree_node_name(node->parent));
ofw_central_reg_t central_reg;
84,7 → 84,7
bool ofw_central_apply_ranges(ofw_tree_node_t *node, ofw_central_reg_t *reg, uintptr_t *pa)
{
if (node->parent->parent)
panic("Unexpected parent node: %s.", ofw_tree_node_name(node->parent));
panic("Unexpected parent node: %s.\n", ofw_tree_node_name(node->parent));
ofw_tree_property_t *prop;
ofw_central_range_t *range;
109,9 → 109,7
return false;
}
 
bool
ofw_fhc_map_interrupt(ofw_tree_node_t *node, ofw_fhc_reg_t *reg,
uint32_t interrupt, int *inr, cir_t *cir, void **cir_arg)
bool ofw_fhc_map_interrupt(ofw_tree_node_t *node, ofw_fhc_reg_t *reg, uint32_t interrupt, int *inr)
{
fhc_t *fhc = NULL;
if (!node->device) {
128,8 → 126,6
fhc_enable_interrupt(fhc, interrupt);
*inr = interrupt;
*cir = fhc_clear_interrupt;
*cir_arg = fhc;
return true;
}
 
/branches/network/kernel/genarch/src/ofw/ofw_tree.c
38,7 → 38,7
#include <genarch/ofw/ofw_tree.h>
#include <arch/memstr.h>
#include <mm/slab.h>
#include <string.h>
#include <func.h>
#include <print.h>
#include <panic.h>
 
54,14 → 54,12
 
/** Get OpenFirmware node property.
*
* @param node Node in which to lookup the property.
* @param name Name of the property.
* @param node Node in which to lookup the property.
* @param name Name of the property.
*
* @return Pointer to the property structure or NULL if no such
* property.
* @return Pointer to the property structure or NULL if no such property.
*/
ofw_tree_property_t *
ofw_tree_getprop(const ofw_tree_node_t *node, const char *name)
ofw_tree_property_t *ofw_tree_getprop(const ofw_tree_node_t *node, const char *name)
{
unsigned int i;
75,9 → 73,9
 
/** Return value of the 'name' property.
*
* @param node Node of interest.
* @param node Node of interest.
*
* @return Value of the 'name' property belonging to the node.
* @return Value of the 'name' property belonging to the node.
*/
const char *ofw_tree_node_name(const ofw_tree_node_t *node)
{
85,10 → 83,10
prop = ofw_tree_getprop(node, "name");
if (!prop)
panic("Node without name property.");
panic("Node without name property.\n");
if (prop->size < 2)
panic("Invalid name property.");
panic("Invalid name property.\n");
return prop->value;
}
95,11 → 93,10
 
/** Lookup child of given name.
*
* @param node Node whose child is being looked up.
* @param name Name of the child being looked up.
* @param node Node whose child is being looked up.
* @param name Name of the child being looked up.
*
* @return NULL if there is no such child or pointer to the
* matching child node.
* @return NULL if there is no such child or pointer to the matching child node.
*/
ofw_tree_node_t *ofw_tree_find_child(ofw_tree_node_t *node, const char *name)
{
130,14 → 127,12
 
/** Lookup first child of given device type.
*
* @param node Node whose child is being looked up.
* @param name Device type of the child being looked up.
* @param node Node whose child is being looked up.
* @param name Device type of the child being looked up.
*
* @return NULL if there is no such child or pointer to the
* matching child node.
* @return NULL if there is no such child or pointer to the matching child node.
*/
ofw_tree_node_t *
ofw_tree_find_child_by_device_type(ofw_tree_node_t *node, const char *name)
ofw_tree_node_t *ofw_tree_find_child_by_device_type(ofw_tree_node_t *node, const char *name)
{
ofw_tree_node_t *cur;
ofw_tree_property_t *prop;
158,14 → 153,12
* Child nodes are looked up recursively contrary to peer nodes that
* are looked up iteratively to avoid stack overflow.
*
* @param root Root of the searched subtree.
* @param handle OpenFirmware handle.
* @param root Root of the searched subtree.
* @param handle OpenFirmware handle.
*
* @return NULL if there is no such node or pointer to the matching
* node.
* @return NULL if there is no such node or pointer to the matching node.
*/
ofw_tree_node_t *
ofw_tree_find_node_by_handle(ofw_tree_node_t *root, uint32_t handle)
ofw_tree_node_t *ofw_tree_find_node_by_handle(ofw_tree_node_t *root, uint32_t handle)
{
ofw_tree_node_t *cur;
 
187,14 → 180,12
 
/** Lookup first peer of given device type.
*
* @param node Node whose peer is being looked up.
* @param name Device type of the child being looked up.
* @param node Node whose peer is being looked up.
* @param name Device type of the child being looked up.
*
* @return NULL if there is no such child or pointer to the
* matching child node.
* @return NULL if there is no such child or pointer to the matching child node.
*/
ofw_tree_node_t *
ofw_tree_find_peer_by_device_type(ofw_tree_node_t *node, const char *name)
ofw_tree_node_t *ofw_tree_find_peer_by_device_type(ofw_tree_node_t *node, const char *name)
{
ofw_tree_node_t *cur;
ofw_tree_property_t *prop;
211,41 → 202,15
}
 
 
/** Lookup first peer of given name.
*
* @param node Node whose peer is being looked up.
* @param name Name of the child being looked up.
*
* @return NULL if there is no such peer or pointer to the matching
* peer node.
*/
ofw_tree_node_t *
ofw_tree_find_peer_by_name(ofw_tree_node_t *node, const char *name)
{
ofw_tree_node_t *cur;
ofw_tree_property_t *prop;
for (cur = node->peer; cur; cur = cur->peer) {
prop = ofw_tree_getprop(cur, "name");
if (!prop || !prop->value)
continue;
if (strcmp(prop->value, name) == 0)
return cur;
}
return NULL;
}
 
/** Lookup OpenFirmware node by its path.
*
* @param path Path to the node.
* @param path Path to the node.
*
* @return NULL if there is no such node or pointer to the leaf
* node.
* @return NULL if there is no such node or pointer to the leaf node.
*/
ofw_tree_node_t *ofw_tree_lookup(const char *path)
{
char buf[NAME_BUF_LEN + 1];
char buf[NAME_BUF_LEN+1];
ofw_tree_node_t *node = ofw_root;
index_t i, j;
271,8 → 236,8
* Child nodes are processed recursively and peer nodes are processed
* iteratively in order to avoid stack overflow.
*
* @param node Root of the subtree.
* @param path Current path, NULL for the very root of the entire tree.
* @param node Root of the subtree.
* @param path Current path, NULL for the very root of the entire tree.
*/
static void ofw_tree_node_print(const ofw_tree_node_t *node, const char *path)
{
/branches/network/kernel/genarch/src/ofw/pci.c
39,7 → 39,7
#include <arch/drivers/pci.h>
#include <arch/trap/interrupt.h>
#include <arch/memstr.h>
#include <string.h>
#include <func.h>
#include <panic.h>
#include <macros.h>
 
49,8 → 49,7
 
#define PCI_IGN 0x1f
 
bool
ofw_pci_apply_ranges(ofw_tree_node_t *node, ofw_pci_reg_t *reg, uintptr_t *pa)
bool ofw_pci_apply_ranges(ofw_tree_node_t *node, ofw_pci_reg_t *reg, uintptr_t *pa)
{
ofw_tree_property_t *prop;
ofw_pci_range_t *range;
69,13 → 68,10
unsigned int i;
for (i = 0; i < ranges; i++) {
if ((reg->space & PCI_SPACE_MASK) !=
(range[i].space & PCI_SPACE_MASK))
if ((reg->space & PCI_SPACE_MASK) != (range[i].space & PCI_SPACE_MASK))
continue;
if (overlaps(reg->addr, reg->size, range[i].child_base,
range[i].size)) {
*pa = range[i].parent_base +
(reg->addr - range[i].child_base);
if (overlaps(reg->addr, reg->size, range[i].child_base, range[i].size)) {
*pa = range[i].parent_base + (reg->addr - range[i].child_base);
return true;
}
}
83,9 → 79,7
return false;
}
 
bool
ofw_pci_reg_absolutize(ofw_tree_node_t *node, ofw_pci_reg_t *reg,
ofw_pci_reg_t *out)
bool ofw_pci_reg_absolutize(ofw_tree_node_t *node, ofw_pci_reg_t *reg, ofw_pci_reg_t *out)
{
if (reg->space & PCI_ABS_MASK) {
/* already absolute */
101,7 → 95,7
prop = ofw_tree_getprop(node, "assigned-addresses");
if (!prop)
panic("Cannot find 'assigned-addresses' property.");
panic("Can't find \"assigned-addresses\" property.\n");
assigned_addresses = prop->size / sizeof(ofw_pci_reg_t);
assigned_address = prop->value;
109,8 → 103,7
unsigned int i;
for (i = 0; i < assigned_addresses; i++) {
if ((assigned_address[i].space & PCI_REG_MASK) ==
(reg->space & PCI_REG_MASK)) {
if ((assigned_address[i].space & PCI_REG_MASK) == (reg->space & PCI_REG_MASK)) {
out->space = assigned_address[i].space;
out->addr = reg->addr + assigned_address[i].addr;
out->size = reg->size;
126,9 → 119,7
* So far, we only know how to map interrupts of non-PCI devices connected
* to a PCI bridge.
*/
bool
ofw_pci_map_interrupt(ofw_tree_node_t *node, ofw_pci_reg_t *reg, int ino,
int *inr, cir_t *cir, void **cir_arg)
bool ofw_pci_map_interrupt(ofw_tree_node_t *node, ofw_pci_reg_t *reg, int ino, int *inr)
{
pci_t *pci = node->device;
if (!pci) {
141,8 → 132,6
pci_enable_interrupt(pci, ino);
 
*inr = (PCI_IGN << IGN_SHIFT) | ino;
*cir = pci_clear_interrupt;
*cir_arg = pci;
 
return true;
}
/branches/network/kernel/genarch/src/kbd/key.c
0,0 → 1,252
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
* @brief Key processing.
*/
 
#include <genarch/kbd/key.h>
#include <genarch/kbd/scanc.h>
#ifdef CONFIG_I8042
#include <genarch/kbd/scanc_pc.h>
#endif
#if (defined(CONFIG_Z8530) || defined(CONFIG_NS16550))
#include <genarch/kbd/scanc_sun.h>
#endif
#include <synch/spinlock.h>
#include <console/chardev.h>
#include <macros.h>
 
#define PRESSED_SHIFT (1<<0)
#define PRESSED_CAPSLOCK (1<<1)
#define LOCKED_CAPSLOCK (1<<0)
 
#define ACTIVE_READ_BUFF_SIZE 16 /* Must be power of 2 */
 
chardev_t kbrd;
 
static uint8_t active_read_buff[ACTIVE_READ_BUFF_SIZE];
 
SPINLOCK_INITIALIZE(keylock); /**< keylock protects keyflags and lockflags. */
static volatile int keyflags; /**< Tracking of multiple keypresses. */
static volatile int lockflags; /**< Tracking of multiple keys lockings. */
 
/** Process release of key.
*
* @param sc Scancode of the key being released.
*/
void key_released(uint8_t sc)
{
spinlock_lock(&keylock);
switch (sc) {
case SC_LSHIFT:
case SC_RSHIFT:
keyflags &= ~PRESSED_SHIFT;
break;
case SC_CAPSLOCK:
keyflags &= ~PRESSED_CAPSLOCK;
if (lockflags & LOCKED_CAPSLOCK)
lockflags &= ~LOCKED_CAPSLOCK;
else
lockflags |= LOCKED_CAPSLOCK;
break;
default:
break;
}
spinlock_unlock(&keylock);
}
 
/** Process keypress.
*
* @param sc Scancode of the key being pressed.
*/
void key_pressed(uint8_t sc)
{
char *map = sc_primary_map;
char ascii = sc_primary_map[sc];
bool shift, capslock;
bool letter = false;
 
spinlock_lock(&keylock);
switch (sc) {
case SC_LSHIFT:
case SC_RSHIFT:
keyflags |= PRESSED_SHIFT;
break;
case SC_CAPSLOCK:
keyflags |= PRESSED_CAPSLOCK;
break;
case SC_SPEC_ESCAPE:
break;
case SC_LEFTARR:
chardev_push_character(&kbrd, 0x1b);
chardev_push_character(&kbrd, 0x5b);
chardev_push_character(&kbrd, 0x44);
break;
case SC_RIGHTARR:
chardev_push_character(&kbrd, 0x1b);
chardev_push_character(&kbrd, 0x5b);
chardev_push_character(&kbrd, 0x43);
break;
case SC_UPARR:
chardev_push_character(&kbrd, 0x1b);
chardev_push_character(&kbrd, 0x5b);
chardev_push_character(&kbrd, 0x41);
break;
case SC_DOWNARR:
chardev_push_character(&kbrd, 0x1b);
chardev_push_character(&kbrd, 0x5b);
chardev_push_character(&kbrd, 0x42);
break;
case SC_HOME:
chardev_push_character(&kbrd, 0x1b);
chardev_push_character(&kbrd, 0x4f);
chardev_push_character(&kbrd, 0x48);
break;
case SC_END:
chardev_push_character(&kbrd, 0x1b);
chardev_push_character(&kbrd, 0x4f);
chardev_push_character(&kbrd, 0x46);
break;
case SC_DELETE:
chardev_push_character(&kbrd, 0x1b);
chardev_push_character(&kbrd, 0x5b);
chardev_push_character(&kbrd, 0x33);
chardev_push_character(&kbrd, 0x7e);
break;
default:
letter = islower(ascii);
capslock = (keyflags & PRESSED_CAPSLOCK) ||
(lockflags & LOCKED_CAPSLOCK);
shift = keyflags & PRESSED_SHIFT;
if (letter && capslock)
shift = !shift;
if (shift)
map = sc_secondary_map;
chardev_push_character(&kbrd, map[sc]);
break;
}
spinlock_unlock(&keylock);
}
 
uint8_t active_read_buff_read(void)
{
static int i=0;
i &= (ACTIVE_READ_BUFF_SIZE-1);
if(!active_read_buff[i]) {
return 0;
}
return active_read_buff[i++];
}
 
void active_read_buff_write(uint8_t ch)
{
static int i=0;
active_read_buff[i] = ch;
i++;
i &= (ACTIVE_READ_BUFF_SIZE-1);
active_read_buff[i]=0;
}
 
 
void active_read_key_pressed(uint8_t sc)
{
char *map = sc_primary_map;
char ascii = sc_primary_map[sc];
bool shift, capslock;
bool letter = false;
 
/*spinlock_lock(&keylock);*/
switch (sc) {
case SC_LSHIFT:
case SC_RSHIFT:
keyflags |= PRESSED_SHIFT;
break;
case SC_CAPSLOCK:
keyflags |= PRESSED_CAPSLOCK;
break;
case SC_SPEC_ESCAPE:
break;
case SC_LEFTARR:
active_read_buff_write(0x1b);
active_read_buff_write(0x5b);
active_read_buff_write(0x44);
break;
case SC_RIGHTARR:
active_read_buff_write(0x1b);
active_read_buff_write(0x5b);
active_read_buff_write(0x43);
break;
case SC_UPARR:
active_read_buff_write(0x1b);
active_read_buff_write(0x5b);
active_read_buff_write(0x41);
break;
case SC_DOWNARR:
active_read_buff_write(0x1b);
active_read_buff_write(0x5b);
active_read_buff_write(0x42);
break;
case SC_HOME:
active_read_buff_write(0x1b);
active_read_buff_write(0x4f);
active_read_buff_write(0x48);
break;
case SC_END:
active_read_buff_write(0x1b);
active_read_buff_write(0x4f);
active_read_buff_write(0x46);
break;
case SC_DELETE:
active_read_buff_write(0x1b);
active_read_buff_write(0x5b);
active_read_buff_write(0x33);
active_read_buff_write(0x7e);
break;
default:
letter = islower(ascii);
capslock = (keyflags & PRESSED_CAPSLOCK) ||
(lockflags & LOCKED_CAPSLOCK);
shift = keyflags & PRESSED_SHIFT;
if (letter && capslock)
shift = !shift;
if (shift)
map = sc_secondary_map;
active_read_buff_write(map[sc]);
break;
}
/*spinlock_unlock(&keylock);*/
 
}
 
/** @}
*/
/branches/network/kernel/genarch/src/kbd/i8042.c
0,0 → 1,240
/*
* Copyright (c) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
* @brief i8042 processor driver.
*
* It takes care of low-level keyboard functions.
*/
 
#include <genarch/kbd/i8042.h>
#include <genarch/kbd/key.h>
#include <genarch/kbd/scanc.h>
#include <genarch/kbd/scanc_pc.h>
#include <arch/drivers/i8042.h>
#include <cpu.h>
#include <arch/asm.h>
#include <arch.h>
#include <console/chardev.h>
#include <console/console.h>
#include <interrupt.h>
#include <sysinfo/sysinfo.h>
#include <ipc/irq.h>
 
/* Keyboard commands. */
#define KBD_ENABLE 0xf4
#define KBD_DISABLE 0xf5
#define KBD_ACK 0xfa
 
/*
* 60 Write 8042 Command Byte: next data byte written to port 60h is
* placed in 8042 command register. Format:
*
* |7|6|5|4|3|2|1|0|8042 Command Byte
* | | | | | | | `---- 1=enable output register full interrupt
* | | | | | | `----- should be 0
* | | | | | `------ 1=set status register system, 0=clear
* | | | | `------- 1=override keyboard inhibit, 0=allow inhibit
* | | | `-------- disable keyboard I/O by driving clock line low
* | | `--------- disable auxiliary device, drives clock line low
* | `---------- IBM scancode translation 0=AT, 1=PC/XT
* `----------- reserved, should be 0
*/
 
#define i8042_SET_COMMAND 0x60
#define i8042_COMMAND 0x69
 
#define i8042_BUFFER_FULL_MASK 0x01
#define i8042_WAIT_MASK 0x02
#define i8042_MOUSE_DATA 0x20
 
static void i8042_suspend(chardev_t *);
static void i8042_resume(chardev_t *);
 
static chardev_operations_t ops = {
.suspend = i8042_suspend,
.resume = i8042_resume,
.read = i8042_key_read
};
 
/** Structure for i8042's IRQ. */
static irq_t i8042_kbd_irq;
static irq_t i8042_mouse_irq;
 
void i8042_grab(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&i8042_kbd_irq.lock);
i8042_kbd_irq.notif_cfg.notify = false;
spinlock_unlock(&i8042_kbd_irq.lock);
spinlock_lock(&i8042_mouse_irq.lock);
i8042_mouse_irq.notif_cfg.notify = false;
spinlock_unlock(&i8042_mouse_irq.lock);
interrupts_restore(ipl);
}
 
void i8042_release(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&i8042_kbd_irq.lock);
if (i8042_kbd_irq.notif_cfg.answerbox)
i8042_kbd_irq.notif_cfg.notify = true;
spinlock_unlock(&i8042_kbd_irq.lock);
spinlock_lock(&i8042_mouse_irq.lock);
if (i8042_mouse_irq.notif_cfg.answerbox)
i8042_mouse_irq.notif_cfg.notify = true;
spinlock_unlock(&i8042_mouse_irq.lock);
interrupts_restore(ipl);
}
 
static irq_ownership_t i8042_claim(void)
{
return IRQ_ACCEPT;
}
 
static void i8042_irq_handler(irq_t *irq, void *arg, ...)
{
if (irq->notif_cfg.notify && irq->notif_cfg.answerbox)
ipc_irq_send_notif(irq);
else {
uint8_t data;
uint8_t status;
while (((status = i8042_status_read()) & i8042_BUFFER_FULL_MASK)) {
data = i8042_data_read();
if ((status & i8042_MOUSE_DATA))
continue;
 
if (data & KEY_RELEASE)
key_released(data ^ KEY_RELEASE);
else
key_pressed(data);
}
}
}
 
/** Initialize i8042. */
void i8042_init(devno_t kbd_devno, inr_t kbd_inr, devno_t mouse_devno, inr_t mouse_inr)
{
chardev_initialize("i8042_kbd", &kbrd, &ops);
stdin = &kbrd;
irq_initialize(&i8042_kbd_irq);
i8042_kbd_irq.devno = kbd_devno;
i8042_kbd_irq.inr = kbd_inr;
i8042_kbd_irq.claim = i8042_claim;
i8042_kbd_irq.handler = i8042_irq_handler;
irq_register(&i8042_kbd_irq);
irq_initialize(&i8042_mouse_irq);
i8042_mouse_irq.devno = mouse_devno;
i8042_mouse_irq.inr = mouse_inr;
i8042_mouse_irq.claim = i8042_claim;
i8042_mouse_irq.handler = i8042_irq_handler;
irq_register(&i8042_mouse_irq);
#ifndef ia64
trap_virtual_enable_irqs(1 << kbd_inr);
trap_virtual_enable_irqs(1 << mouse_inr);
#endif
/*
* Clear input buffer.
* Number of iterations is limited to prevent infinite looping.
*/
int i;
for (i = 0; (i8042_status_read() & i8042_BUFFER_FULL_MASK) && i < 100; i++) {
i8042_data_read();
}
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.devno", NULL, kbd_devno);
sysinfo_set_item_val("kbd.inr", NULL, kbd_inr);
sysinfo_set_item_val("mouse", NULL, true);
sysinfo_set_item_val("mouse.devno", NULL, mouse_devno);
sysinfo_set_item_val("mouse.inr", NULL, mouse_inr);
i8042_grab();
}
 
/* Called from getc(). */
void i8042_resume(chardev_t *d)
{
}
 
/* Called from getc(). */
void i8042_suspend(chardev_t *d)
{
}
 
char i8042_key_read(chardev_t *d)
{
char ch;
 
while(!(ch = active_read_buff_read())) {
uint8_t x;
while (!(i8042_status_read() & i8042_BUFFER_FULL_MASK))
;
x = i8042_data_read();
if (x & KEY_RELEASE)
key_released(x ^ KEY_RELEASE);
else
active_read_key_pressed(x);
}
return ch;
}
 
/** Poll for key press and release events.
*
* This function can be used to implement keyboard polling.
*/
void i8042_poll(void)
{
uint8_t x;
 
while (((x = i8042_status_read() & i8042_BUFFER_FULL_MASK))) {
x = i8042_data_read();
if (x & KEY_RELEASE)
key_released(x ^ KEY_RELEASE);
else
key_pressed(x);
}
}
 
/** @}
*/
/branches/network/kernel/genarch/src/kbd/ns16550.c
0,0 → 1,224
/*
* Copyright (c) 2001-2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
* @brief NS 16550 serial port / keyboard driver.
*/
 
#include <genarch/kbd/ns16550.h>
#include <genarch/kbd/key.h>
#include <genarch/kbd/scanc.h>
#include <genarch/kbd/scanc_sun.h>
#include <arch/drivers/kbd.h>
#include <arch/drivers/ns16550.h>
#include <ddi/irq.h>
#include <ipc/irq.h>
#include <cpu.h>
#include <arch/asm.h>
#include <arch.h>
#include <console/chardev.h>
#include <console/console.h>
#include <interrupt.h>
#include <arch/interrupt.h>
#include <sysinfo/sysinfo.h>
#include <synch/spinlock.h>
 
#define LSR_DATA_READY 0x01
 
/** Structure representing the ns16550. */
static ns16550_t ns16550;
 
/** Structure for ns16550's IRQ. */
static irq_t ns16550_irq;
 
/*
* These codes read from ns16550 data register are silently ignored.
*/
#define IGNORE_CODE 0x7f /* all keys up */
 
static void ns16550_suspend(chardev_t *);
static void ns16550_resume(chardev_t *);
 
static chardev_operations_t ops = {
.suspend = ns16550_suspend,
.resume = ns16550_resume,
.read = ns16550_key_read
};
 
void ns16550_interrupt(void);
 
/** Initialize keyboard and service interrupts using kernel routine */
void ns16550_grab(void)
{
ipl_t ipl = interrupts_disable();
 
ns16550_ier_write(&ns16550, IER_ERBFI); /* enable receiver interrupt */
while (ns16550_lsr_read(&ns16550) & LSR_DATA_READY)
(void) ns16550_rbr_read(&ns16550);
 
spinlock_lock(&ns16550_irq.lock);
ns16550_irq.notif_cfg.notify = false;
spinlock_unlock(&ns16550_irq.lock);
interrupts_restore(ipl);
}
 
/** Resume the former interrupt vector */
void ns16550_release(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&ns16550_irq.lock);
if (ns16550_irq.notif_cfg.answerbox)
ns16550_irq.notif_cfg.notify = true;
spinlock_unlock(&ns16550_irq.lock);
interrupts_restore(ipl);
}
 
/** Initialize ns16550.
*
* @param devno Device number.
* @param inr Interrupt number.
* @param vaddr Virtual address of device's registers.
*/
void ns16550_init(devno_t devno, inr_t inr, uintptr_t vaddr)
{
chardev_initialize("ns16550_kbd", &kbrd, &ops);
stdin = &kbrd;
ns16550.devno = devno;
ns16550.reg = (uint8_t *) vaddr;
irq_initialize(&ns16550_irq);
ns16550_irq.devno = devno;
ns16550_irq.inr = inr;
ns16550_irq.claim = ns16550_claim;
ns16550_irq.handler = ns16550_irq_handler;
irq_register(&ns16550_irq);
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
sysinfo_set_item_val("kbd.devno", NULL, devno);
sysinfo_set_item_val("kbd.inr", NULL, inr);
sysinfo_set_item_val("kbd.address.virtual", NULL, vaddr);
ns16550_grab();
}
 
/** Process ns16550 interrupt. */
void ns16550_interrupt(void)
{
/* TODO
*
* ns16550 works in the polled mode so far.
*/
}
 
/* Called from getc(). */
void ns16550_resume(chardev_t *d)
{
}
 
/* Called from getc(). */
void ns16550_suspend(chardev_t *d)
{
}
 
char ns16550_key_read(chardev_t *d)
{
char ch;
 
while(!(ch = active_read_buff_read())) {
uint8_t x;
while (!(ns16550_lsr_read(&ns16550) & LSR_DATA_READY))
;
x = ns16550_rbr_read(&ns16550);
if (x != IGNORE_CODE) {
if (x & KEY_RELEASE)
key_released(x ^ KEY_RELEASE);
else
active_read_key_pressed(x);
}
}
return ch;
}
 
/** Poll for key press and release events.
*
* This function can be used to implement keyboard polling.
*/
void ns16550_poll(void)
{
ipl_t ipl;
 
ipl = interrupts_disable();
spinlock_lock(&ns16550_irq.lock);
 
if (ns16550_lsr_read(&ns16550) & LSR_DATA_READY) {
if (ns16550_irq.notif_cfg.notify && ns16550_irq.notif_cfg.answerbox) {
/*
* Send IPC notification.
*/
ipc_irq_send_notif(&ns16550_irq);
spinlock_unlock(&ns16550_irq.lock);
interrupts_restore(ipl);
return;
}
}
 
spinlock_unlock(&ns16550_irq.lock);
interrupts_restore(ipl);
 
while (ns16550_lsr_read(&ns16550) & LSR_DATA_READY) {
uint8_t x;
x = ns16550_rbr_read(&ns16550);
if (x != IGNORE_CODE) {
if (x & KEY_RELEASE)
key_released(x ^ KEY_RELEASE);
else
key_pressed(x);
}
}
}
 
irq_ownership_t ns16550_claim(void)
{
return (ns16550_lsr_read(&ns16550) & LSR_DATA_READY);
}
 
void ns16550_irq_handler(irq_t *irq, void *arg, ...)
{
panic("Not yet implemented, ns16550 works in polled mode.\n");
}
 
/** @}
*/
/branches/network/kernel/genarch/src/kbd/z8530.c
0,0 → 1,215
/*
* Copyright (c) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
* @brief Zilog 8530 serial port / keyboard driver.
*/
 
#include <genarch/kbd/z8530.h>
#include <genarch/kbd/key.h>
#include <genarch/kbd/scanc.h>
#include <genarch/kbd/scanc_sun.h>
#include <arch/drivers/z8530.h>
#include <ddi/irq.h>
#include <ipc/irq.h>
#include <arch/interrupt.h>
#include <arch/drivers/kbd.h>
#include <arch/drivers/fhc.h>
#include <cpu.h>
#include <arch/asm.h>
#include <arch.h>
#include <console/chardev.h>
#include <console/console.h>
#include <interrupt.h>
#include <sysinfo/sysinfo.h>
#include <print.h>
 
/*
* These codes read from z8530 data register are silently ignored.
*/
#define IGNORE_CODE 0x7f /* all keys up */
 
static z8530_t z8530; /**< z8530 device structure. */
static irq_t z8530_irq; /**< z8530's IRQ. */
 
static void z8530_suspend(chardev_t *);
static void z8530_resume(chardev_t *);
 
static chardev_operations_t ops = {
.suspend = z8530_suspend,
.resume = z8530_resume,
.read = z8530_key_read
};
 
/** Initialize keyboard and service interrupts using kernel routine. */
void z8530_grab(void)
{
ipl_t ipl = interrupts_disable();
 
(void) z8530_read_a(&z8530, RR8);
 
/*
* Clear any pending TX interrupts or we never manage
* to set FHC UART interrupt state to idle.
*/
z8530_write_a(&z8530, WR0, WR0_TX_IP_RST);
 
z8530_write_a(&z8530, WR1, WR1_IARCSC); /* interrupt on all characters */
 
/* 8 bits per character and enable receiver */
z8530_write_a(&z8530, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE);
z8530_write_a(&z8530, WR9, WR9_MIE); /* Master Interrupt Enable. */
spinlock_lock(&z8530_irq.lock);
z8530_irq.notif_cfg.notify = false;
spinlock_unlock(&z8530_irq.lock);
interrupts_restore(ipl);
}
 
/** Resume the former IPC notification behavior. */
void z8530_release(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&z8530_irq.lock);
if (z8530_irq.notif_cfg.answerbox)
z8530_irq.notif_cfg.notify = true;
spinlock_unlock(&z8530_irq.lock);
interrupts_restore(ipl);
}
 
/** Initialize z8530. */
void z8530_init(devno_t devno, inr_t inr, uintptr_t vaddr)
{
chardev_initialize("z8530_kbd", &kbrd, &ops);
stdin = &kbrd;
 
z8530.devno = devno;
z8530.reg = (uint8_t *) vaddr;
 
irq_initialize(&z8530_irq);
z8530_irq.devno = devno;
z8530_irq.inr = inr;
z8530_irq.claim = z8530_claim;
z8530_irq.handler = z8530_irq_handler;
irq_register(&z8530_irq);
 
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.type", NULL, KBD_Z8530);
sysinfo_set_item_val("kbd.devno", NULL, devno);
sysinfo_set_item_val("kbd.inr", NULL, inr);
sysinfo_set_item_val("kbd.address.virtual", NULL, vaddr);
 
z8530_grab();
}
 
/** Process z8530 interrupt.
*
* @param n Interrupt vector.
* @param istate Interrupted state.
*/
void z8530_interrupt(void)
{
z8530_poll();
}
 
/* Called from getc(). */
void z8530_resume(chardev_t *d)
{
}
 
/* Called from getc(). */
void z8530_suspend(chardev_t *d)
{
}
 
char z8530_key_read(chardev_t *d)
{
char ch;
 
while(!(ch = active_read_buff_read())) {
uint8_t x;
while (!(z8530_read_a(&z8530, RR0) & RR0_RCA))
;
x = z8530_read_a(&z8530, RR8);
if (x != IGNORE_CODE) {
if (x & KEY_RELEASE)
key_released(x ^ KEY_RELEASE);
else
active_read_key_pressed(x);
}
}
return ch;
}
 
/** Poll for key press and release events.
*
* This function can be used to implement keyboard polling.
*/
void z8530_poll(void)
{
uint8_t x;
 
while (z8530_read_a(&z8530, RR0) & RR0_RCA) {
x = z8530_read_a(&z8530, RR8);
if (x != IGNORE_CODE) {
if (x & KEY_RELEASE)
key_released(x ^ KEY_RELEASE);
else
key_pressed(x);
}
}
}
 
irq_ownership_t z8530_claim(void)
{
return (z8530_read_a(&z8530, RR0) & RR0_RCA);
}
 
void z8530_irq_handler(irq_t *irq, void *arg, ...)
{
/*
* So far, we know we got this interrupt through the FHC.
* Since we don't have enough documentation about the FHC
* and because the interrupt looks like level sensitive,
* we cannot handle it by scheduling one of the level
* interrupt traps. Process the interrupt directly.
*/
if (irq->notif_cfg.notify && irq->notif_cfg.answerbox)
ipc_irq_send_notif(irq);
else
z8530_interrupt();
fhc_clear_interrupt(central_fhc, irq->inr);
}
 
/** @}
*/
/branches/network/kernel/genarch/src/kbd/scanc_pc.c
0,0 → 1,200
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
* @brief Scan codes for pc keyboards.
*/
 
#include <genarch/kbd/scanc.h>
 
/** Primary meaning of scancodes. */
char sc_primary_map[] = {
SPECIAL, /* 0x00 */
SPECIAL, /* 0x01 - Esc */
'1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=',
'\b', /* 0x0e - Backspace */
'\t', 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']', '\n',
SPECIAL, /* 0x1d - LCtrl */
'a', 's', 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', '\'',
'`',
SPECIAL, /* 0x2a - LShift */
'\\',
'z', 'x', 'c', 'v', 'b', 'n', 'm', ',', '.', '/',
SPECIAL, /* 0x36 - RShift */
'*',
SPECIAL, /* 0x38 - LAlt */
' ',
SPECIAL, /* 0x3a - CapsLock */
SPECIAL, /* 0x3b - F1 */
SPECIAL, /* 0x3c - F2 */
SPECIAL, /* 0x3d - F3 */
SPECIAL, /* 0x3e - F4 */
SPECIAL, /* 0x3f - F5 */
SPECIAL, /* 0x40 - F6 */
SPECIAL, /* 0x41 - F7 */
SPECIAL, /* 0x42 - F8 */
SPECIAL, /* 0x43 - F9 */
SPECIAL, /* 0x44 - F10 */
SPECIAL, /* 0x45 - NumLock */
SPECIAL, /* 0x46 - ScrollLock */
'7', '8', '9', '-',
'4', '5', '6', '+',
'1', '2', '3',
'0', '.',
SPECIAL, /* 0x54 - Alt-SysRq */
SPECIAL, /* 0x55 - F11/F12/PF1/FN */
SPECIAL, /* 0x56 - unlabelled key next to LAlt */
SPECIAL, /* 0x57 - F11 */
SPECIAL, /* 0x58 - F12 */
SPECIAL, /* 0x59 */
SPECIAL, /* 0x5a */
SPECIAL, /* 0x5b */
SPECIAL, /* 0x5c */
SPECIAL, /* 0x5d */
SPECIAL, /* 0x5e */
SPECIAL, /* 0x5f */
SPECIAL, /* 0x60 */
SPECIAL, /* 0x61 */
SPECIAL, /* 0x62 */
SPECIAL, /* 0x63 */
SPECIAL, /* 0x64 */
SPECIAL, /* 0x65 */
SPECIAL, /* 0x66 */
SPECIAL, /* 0x67 */
SPECIAL, /* 0x68 */
SPECIAL, /* 0x69 */
SPECIAL, /* 0x6a */
SPECIAL, /* 0x6b */
SPECIAL, /* 0x6c */
SPECIAL, /* 0x6d */
SPECIAL, /* 0x6e */
SPECIAL, /* 0x6f */
SPECIAL, /* 0x70 */
SPECIAL, /* 0x71 */
SPECIAL, /* 0x72 */
SPECIAL, /* 0x73 */
SPECIAL, /* 0x74 */
SPECIAL, /* 0x75 */
SPECIAL, /* 0x76 */
SPECIAL, /* 0x77 */
SPECIAL, /* 0x78 */
SPECIAL, /* 0x79 */
SPECIAL, /* 0x7a */
SPECIAL, /* 0x7b */
SPECIAL, /* 0x7c */
SPECIAL, /* 0x7d */
SPECIAL, /* 0x7e */
SPECIAL, /* 0x7f */
};
 
/** Secondary meaning of scancodes. */
char sc_secondary_map[] = {
SPECIAL, /* 0x00 */
SPECIAL, /* 0x01 - Esc */
'!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+',
SPECIAL, /* 0x0e - Backspace */
'\t', 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}', '\n',
SPECIAL, /* 0x1d - LCtrl */
'A', 'S', 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"',
'~',
SPECIAL, /* 0x2a - LShift */
'|',
'Z', 'X', 'C', 'V', 'B', 'N', 'M', '<', '>', '?',
SPECIAL, /* 0x36 - RShift */
'*',
SPECIAL, /* 0x38 - LAlt */
' ',
SPECIAL, /* 0x3a - CapsLock */
SPECIAL, /* 0x3b - F1 */
SPECIAL, /* 0x3c - F2 */
SPECIAL, /* 0x3d - F3 */
SPECIAL, /* 0x3e - F4 */
SPECIAL, /* 0x3f - F5 */
SPECIAL, /* 0x40 - F6 */
SPECIAL, /* 0x41 - F7 */
SPECIAL, /* 0x42 - F8 */
SPECIAL, /* 0x43 - F9 */
SPECIAL, /* 0x44 - F10 */
SPECIAL, /* 0x45 - NumLock */
SPECIAL, /* 0x46 - ScrollLock */
'7', '8', '9', '-',
'4', '5', '6', '+',
'1', '2', '3',
'0', '.',
SPECIAL, /* 0x54 - Alt-SysRq */
SPECIAL, /* 0x55 - F11/F12/PF1/FN */
SPECIAL, /* 0x56 - unlabelled key next to LAlt */
SPECIAL, /* 0x57 - F11 */
SPECIAL, /* 0x58 - F12 */
SPECIAL, /* 0x59 */
SPECIAL, /* 0x5a */
SPECIAL, /* 0x5b */
SPECIAL, /* 0x5c */
SPECIAL, /* 0x5d */
SPECIAL, /* 0x5e */
SPECIAL, /* 0x5f */
SPECIAL, /* 0x60 */
SPECIAL, /* 0x61 */
SPECIAL, /* 0x62 */
SPECIAL, /* 0x63 */
SPECIAL, /* 0x64 */
SPECIAL, /* 0x65 */
SPECIAL, /* 0x66 */
SPECIAL, /* 0x67 */
SPECIAL, /* 0x68 */
SPECIAL, /* 0x69 */
SPECIAL, /* 0x6a */
SPECIAL, /* 0x6b */
SPECIAL, /* 0x6c */
SPECIAL, /* 0x6d */
SPECIAL, /* 0x6e */
SPECIAL, /* 0x6f */
SPECIAL, /* 0x70 */
SPECIAL, /* 0x71 */
SPECIAL, /* 0x72 */
SPECIAL, /* 0x73 */
SPECIAL, /* 0x74 */
SPECIAL, /* 0x75 */
SPECIAL, /* 0x76 */
SPECIAL, /* 0x77 */
SPECIAL, /* 0x78 */
SPECIAL, /* 0x79 */
SPECIAL, /* 0x7a */
SPECIAL, /* 0x7b */
SPECIAL, /* 0x7c */
SPECIAL, /* 0x7d */
SPECIAL, /* 0x7e */
SPECIAL, /* 0x7f */
};
 
/** @}
*/
/branches/network/kernel/genarch/src/kbd/scanc_sun.c
0,0 → 1,304
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
* @{
*/
/**
* @file
* @brief Scan codes for Sun keyboards.
*/
 
#include <genarch/kbd/scanc.h>
 
/** Primary meaning of scancodes. */
char sc_primary_map[] = {
[0x00] = SPECIAL,
[0x01] = SPECIAL,
[0x02] = SPECIAL,
[0x03] = SPECIAL,
[0x04] = SPECIAL,
[0x05] = SPECIAL, /* F1 */
[0x06] = SPECIAL, /* F2 */
[0x07] = SPECIAL, /* F10 */
[0x08] = SPECIAL, /* F3 */
[0x09] = SPECIAL, /* F11 */
[0x0a] = SPECIAL, /* F4 */
[0x0b] = SPECIAL, /* F12 */
[0x0c] = SPECIAL, /* F5 */
[0x0d] = SPECIAL, /* RAlt */
[0x0e] = SPECIAL, /* F6 */
[0x0f] = SPECIAL,
[0x10] = SPECIAL, /* F7 */
[0x11] = SPECIAL, /* F8 */
[0x12] = SPECIAL, /* F9 */
[0x13] = SPECIAL, /* LAlt */
[0x14] = SPECIAL, /* Up Arrow */
[0x15] = SPECIAL, /* Pause */
[0x16] = SPECIAL,
[0x17] = SPECIAL, /* Scroll Lock */
[0x18] = SPECIAL, /* Left Arrow */
[0x19] = SPECIAL,
[0x1a] = SPECIAL,
[0x1b] = SPECIAL, /* Down Arrow */
[0x1c] = SPECIAL, /* Right Arrow */
[0x1d] = SPECIAL, /* Esc */
[0x1e] = '1',
[0x1f] = '2',
[0x20] = '3',
[0x21] = '4',
[0x22] = '5',
[0x23] = '6',
[0x24] = '7',
[0x25] = '8',
[0x26] = '9',
[0x27] = '0',
[0x28] = '-',
[0x29] = '=',
[0x2a] = '`',
[0x2b] = '\b', /* Backspace */
[0x2c] = SPECIAL, /* Insert */
[0x2d] = SPECIAL,
[0x2e] = '/', /* numeric keypad */
[0x2f] = '*', /* numeric keypad */
[0x30] = SPECIAL,
[0x31] = SPECIAL,
[0x32] = '.', /* numeric keypad */
[0x33] = SPECIAL,
[0x34] = SPECIAL, /* Home */
[0x35] = '\t', /* Tab */
[0x36] = 'q',
[0x37] = 'w',
[0x38] = 'e',
[0x39] = 'r',
[0x3a] = 't',
[0x3b] = 'y',
[0x3c] = 'u',
[0x3d] = 'i',
[0x3e] = 'o',
[0x3f] = 'p',
[0x40] = '[',
[0x41] = ']',
[0x42] = SPECIAL, /* Del */
[0x43] = SPECIAL,
[0x44] = '7', /* numeric keypad */
[0x45] = '8', /* numeric keypad */
[0x46] = '9', /* numeric keypad */
[0x47] = '-', /* numeric keypad */
[0x48] = SPECIAL,
[0x49] = SPECIAL,
[0x4a] = SPECIAL, /* End */
[0x4b] = SPECIAL,
[0x4c] = SPECIAL, /* Control */
[0x4d] = 'a',
[0x4e] = 's',
[0x4f] = 'd',
[0x50] = 'f',
[0x51] = 'g',
[0x52] = 'h',
[0x53] = 'j',
[0x54] = 'k',
[0x55] = 'l',
[0x56] = ';',
[0x57] = '\'',
[0x58] = '\\',
[0x59] = '\n', /* Enter */
[0x5a] = '\n', /* Enter on numeric keypad */
[0x5b] = '4', /* numeric keypad */
[0x5c] = '5', /* numeric keypad */
[0x5d] = '6', /* numeric keypad */
[0x5e] = '0', /* numeric keypad */
[0x5f] = SPECIAL,
[0x60] = SPECIAL, /* Page Up */
[0x61] = SPECIAL,
[0x62] = SPECIAL, /* Num Lock */
[0x63] = SPECIAL, /* LShift */
[0x64] = 'z',
[0x65] = 'x',
[0x66] = 'c',
[0x67] = 'v',
[0x68] = 'b',
[0x69] = 'n',
[0x6a] = 'm',
[0x6b] = ',',
[0x6c] = '.',
[0x6d] = '/',
[0x6e] = SPECIAL, /* RShift */
[0x6f] = SPECIAL,
[0x70] = '1', /* numeric keypad */
[0x71] = '2', /* numeric keypad */
[0x72] = '3', /* numeric keypad */
[0x73] = SPECIAL,
[0x74] = SPECIAL,
[0x75] = SPECIAL,
[0x76] = SPECIAL,
[0x77] = SPECIAL, /* Caps Lock */
[0x78] = SPECIAL,
[0x79] = ' ',
[0x7a] = SPECIAL,
[0x7b] = SPECIAL, /* Page Down */
[0x7c] = SPECIAL,
[0x7d] = '+', /* numeric key pad */
[0x7e] = SPECIAL,
[0x7f] = SPECIAL
};
 
/** Secondary meaning of scancodes. */
char sc_secondary_map[] = {
[0x00] = SPECIAL,
[0x01] = SPECIAL,
[0x02] = SPECIAL,
[0x03] = SPECIAL,
[0x04] = SPECIAL,
[0x05] = SPECIAL, /* F1 */
[0x06] = SPECIAL, /* F2 */
[0x07] = SPECIAL, /* F10 */
[0x08] = SPECIAL, /* F3 */
[0x09] = SPECIAL, /* F11 */
[0x0a] = SPECIAL, /* F4 */
[0x0b] = SPECIAL, /* F12 */
[0x0c] = SPECIAL, /* F5 */
[0x0d] = SPECIAL, /* RAlt */
[0x0e] = SPECIAL, /* F6 */
[0x0f] = SPECIAL,
[0x10] = SPECIAL, /* F7 */
[0x11] = SPECIAL, /* F8 */
[0x12] = SPECIAL, /* F9 */
[0x13] = SPECIAL, /* LAlt */
[0x14] = SPECIAL, /* Up Arrow */
[0x15] = SPECIAL, /* Pause */
[0x16] = SPECIAL,
[0x17] = SPECIAL, /* Scroll Lock */
[0x18] = SPECIAL, /* Left Arrow */
[0x19] = SPECIAL,
[0x1a] = SPECIAL,
[0x1b] = SPECIAL, /* Down Arrow */
[0x1c] = SPECIAL, /* Right Arrow */
[0x1d] = SPECIAL, /* Esc */
[0x1e] = '!',
[0x1f] = '@',
[0x20] = '#',
[0x21] = '$',
[0x22] = '%',
[0x23] = '^',
[0x24] = '&',
[0x25] = '*',
[0x26] = '(',
[0x27] = ')',
[0x28] = '_',
[0x29] = '+',
[0x2a] = '~',
[0x2b] = SPECIAL, /* Backspace */
[0x2c] = SPECIAL, /* Insert */
[0x2d] = SPECIAL,
[0x2e] = '/', /* numeric keypad */
[0x2f] = '*', /* numeric keypad */
[0x30] = SPECIAL,
[0x31] = SPECIAL,
[0x32] = '.', /* numeric keypad */
[0x33] = SPECIAL,
[0x34] = SPECIAL, /* Home */
[0x35] = SPECIAL, /* Tab */
[0x36] = 'Q',
[0x37] = 'W',
[0x38] = 'E',
[0x39] = 'R',
[0x3a] = 'T',
[0x3b] = 'Y',
[0x3c] = 'U',
[0x3d] = 'I',
[0x3e] = 'O',
[0x3f] = 'P',
[0x40] = '{',
[0x41] = '}',
[0x42] = SPECIAL, /* Del */
[0x43] = SPECIAL,
[0x44] = '7', /* numeric keypad */
[0x45] = '8', /* numeric keypad */
[0x46] = '9', /* numeric keypad */
[0x47] = '-', /* numeric keypad */
[0x48] = SPECIAL,
[0x49] = SPECIAL,
[0x4a] = SPECIAL, /* End */
[0x4b] = SPECIAL,
[0x4c] = SPECIAL, /* Control */
[0x4d] = 'A',
[0x4e] = 'S',
[0x4f] = 'D',
[0x50] = 'F',
[0x51] = 'G',
[0x52] = 'H',
[0x53] = 'J',
[0x54] = 'K',
[0x55] = 'L',
[0x56] = ':',
[0x57] = '"',
[0x58] = '|',
[0x59] = SPECIAL, /* Enter */
[0x5a] = SPECIAL, /* Enter on numeric keypad */
[0x5b] = '4', /* numeric keypad */
[0x5c] = '5', /* numeric keypad */
[0x5d] = '6', /* numeric keypad */
[0x5e] = '0', /* numeric keypad */
[0x5f] = SPECIAL,
[0x60] = SPECIAL, /* Page Up */
[0x61] = SPECIAL,
[0x62] = SPECIAL, /* Num Lock */
[0x63] = SPECIAL, /* LShift */
[0x64] = 'Z',
[0x65] = 'X',
[0x66] = 'C',
[0x67] = 'V',
[0x68] = 'B',
[0x69] = 'N',
[0x6a] = 'M',
[0x6b] = '<',
[0x6c] = '>',
[0x6d] = '?',
[0x6e] = SPECIAL, /* RShift */
[0x6f] = SPECIAL,
[0x70] = '1', /* numeric keypad */
[0x71] = '2', /* numeric keypad */
[0x72] = '3', /* numeric keypad */
[0x73] = SPECIAL,
[0x74] = SPECIAL,
[0x75] = SPECIAL,
[0x76] = SPECIAL,
[0x77] = SPECIAL, /* Caps Lock */
[0x78] = SPECIAL,
[0x79] = ' ',
[0x7a] = SPECIAL,
[0x7b] = SPECIAL, /* Page Down */
[0x7c] = SPECIAL,
[0x7d] = '+', /* numeric key pad */
[0x7e] = SPECIAL,
[0x7f] = SPECIAL
};
 
/** @}
*/
/branches/network/kernel/genarch/src/fb/logo-196x66.c
File deleted
Property changes:
Deleted: svn:mergeinfo
/branches/network/kernel/genarch/src/fb/fb.c
1,5 → 1,4
/*
* Copyright (c) 2008 Martin Decky
* Copyright (c) 2006 Ondrej Palkovsky
* All rights reserved.
*
27,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
/** @addtogroup genarch
* @{
*/
/** @file
34,7 → 33,6
*/
 
#include <genarch/fb/font-8x16.h>
#include <genarch/fb/logo-196x66.h>
#include <genarch/fb/visuals.h>
#include <genarch/fb/fb.h>
#include <console/chardev.h>
41,7 → 39,6
#include <console/console.h>
#include <sysinfo/sysinfo.h>
#include <mm/slab.h>
#include <align.h>
#include <panic.h>
#include <memstr.h>
#include <config.h>
50,116 → 47,137
#include <ddi/ddi.h>
#include <arch/types.h>
 
SPINLOCK_INITIALIZE(fb_lock);
#include "helenos.xbm"
 
static uint8_t *fb_addr;
static uint8_t *backbuf;
static uint8_t *glyphs;
static uint8_t *bgscan;
static parea_t fb_parea; /**< Physical memory area for fb. */
 
static unsigned int xres;
static unsigned int yres;
SPINLOCK_INITIALIZE(fb_lock);
 
static unsigned int ylogo;
static unsigned int ytrim;
static unsigned int rowtrim;
static uint8_t *fbaddress = NULL;
 
static unsigned int scanline;
static unsigned int glyphscanline;
static uint8_t *blankline = NULL;
static uint8_t *dbbuffer = NULL; /* Buffer for fast scrolling console */
static index_t dboffset;
 
static unsigned int pixelbytes;
static unsigned int glyphbytes;
static unsigned int bgscanbytes;
static unsigned int xres = 0;
static unsigned int yres = 0;
static unsigned int scanline = 0;
static unsigned int pixelbytes = 0;
#ifdef FB_INVERT_COLORS
static bool invert_colors = true;
#else
static bool invert_colors = false;
#endif
 
static unsigned int cols;
static unsigned int rows;
static unsigned int position = 0;
static unsigned int columns = 0;
static unsigned int rows = 0;
 
#define BG_COLOR 0x000080
#define FG_COLOR 0xffff00
#define COL_WIDTH 8
#define ROW_BYTES (scanline * FONT_SCANLINES)
 
#define CURSOR 219
#define BGCOLOR 0x000080
#define FGCOLOR 0xffff00
#define LOGOCOLOR 0x2020b0
 
#define RED(x, bits) ((x >> (8 + 8 + 8 - bits)) & ((1 << bits) - 1))
#define GREEN(x, bits) ((x >> (8 + 8 - bits)) & ((1 << bits) - 1))
#define BLUE(x, bits) ((x >> (8 - bits)) & ((1 << bits) - 1))
#define RED(x, bits) ((x >> (8 + 8 + 8 - bits)) & ((1 << bits) - 1))
#define GREEN(x, bits) ((x >> (8 + 8 - bits)) & ((1 << bits) - 1))
#define BLUE(x, bits) ((x >> (8 - bits)) & ((1 << bits) - 1))
 
#define COL2X(col) ((col) * FONT_WIDTH)
#define ROW2Y(row) ((row) * FONT_SCANLINES)
#define POINTPOS(x, y) ((y) * scanline + (x) * pixelbytes)
 
#define X2COL(x) ((x) / FONT_WIDTH)
#define Y2ROW(y) ((y) / FONT_SCANLINES)
/***************************************************************/
/* Pixel specific fuctions */
 
#define FB_POS(x, y) ((y) * scanline + (x) * pixelbytes)
#define BB_POS(col, row) ((row) * cols + (col))
#define GLYPH_POS(glyph, y) ((glyph) * glyphbytes + (y) * glyphscanline)
static void (*rgb2scr)(void *, int);
static int (*scr2rgb)(void *);
 
static inline int COLOR(int color)
{
return invert_colors ? ~color : color;
}
 
static void (*rgb_conv)(void *, uint32_t);
/* Conversion routines between different color representations */
static void rgb_byte0888(void *dst, int rgb)
{
*((int *) dst) = rgb;
}
 
static int byte0888_rgb(void *src)
{
return (*((int *) src)) & 0xffffff;
}
 
/** ARGB 8:8:8:8 conversion
*
*/
static void rgb_0888(void *dst, uint32_t rgb)
static void bgr_byte0888(void *dst, int rgb)
{
*((uint32_t *) dst) = rgb & 0xffffff;
*((uint32_t *) dst) = BLUE(rgb, 8) << 16 | GREEN(rgb, 8) << 8 |
RED(rgb, 8);
}
 
static int byte0888_bgr(void *src)
{
int color = *(uint32_t *)(src);
return ((color & 0xff) << 16) | (((color >> 8) & 0xff) << 8) |
((color >> 16) & 0xff);
}
 
/** ABGR 8:8:8:8 conversion
*
*/
static void bgr_0888(void *dst, uint32_t rgb)
static void rgb_byte888(void *dst, int rgb)
{
*((uint32_t *) dst)
= (BLUE(rgb, 8) << 16) | (GREEN(rgb, 8) << 8) | RED(rgb, 8);
uint8_t *scr = (uint8_t *) dst;
#if defined(FB_INVERT_ENDIAN)
scr[0] = RED(rgb, 8);
scr[1] = GREEN(rgb, 8);
scr[2] = BLUE(rgb, 8);
#else
scr[2] = RED(rgb, 8);
scr[1] = GREEN(rgb, 8);
scr[0] = BLUE(rgb, 8);
#endif
}
 
static int byte888_rgb(void *src)
{
uint8_t *scr = (uint8_t *) src;
#if defined(FB_INVERT_ENDIAN)
return scr[0] << 16 | scr[1] << 8 | scr[2];
#else
return scr[2] << 16 | scr[1] << 8 | scr[0];
#endif
}
 
/** RGB 8:8:8 conversion
*
*/
static void rgb_888(void *dst, uint32_t rgb)
/** 16-bit depth (5:5:5) */
static void rgb_byte555(void *dst, int rgb)
{
((uint8_t *) dst)[0] = BLUE(rgb, 8);
((uint8_t *) dst)[1] = GREEN(rgb, 8);
((uint8_t *) dst)[2] = RED(rgb, 8);
/* 5-bit, 5-bits, 5-bits */
*((uint16_t *) dst) = RED(rgb, 5) << 10 | GREEN(rgb, 5) << 5 |
BLUE(rgb, 5);
}
 
 
/** BGR 8:8:8 conversion
*
*/
static void bgr_888(void *dst, uint32_t rgb)
/** 16-bit depth (5:5:5) */
static int byte555_rgb(void *src)
{
((uint8_t *) dst)[0] = RED(rgb, 8);
((uint8_t *) dst)[1] = GREEN(rgb, 8);
((uint8_t *) dst)[2] = BLUE(rgb, 8);
int color = *(uint16_t *)(src);
return (((color >> 10) & 0x1f) << (16 + 3)) |
(((color >> 5) & 0x1f) << (8 + 3)) | ((color & 0x1f) << 3);
}
 
 
/** RGB 5:5:5 conversion
*
*/
static void rgb_555(void *dst, uint32_t rgb)
/** 16-bit depth (5:6:5) */
static void rgb_byte565(void *dst, int rgb)
{
*((uint16_t *) dst)
= (RED(rgb, 5) << 10) | (GREEN(rgb, 5) << 5) | BLUE(rgb, 5);
/* 5-bit, 6-bits, 5-bits */
*((uint16_t *) dst) = RED(rgb, 5) << 11 | GREEN(rgb, 6) << 5 |
BLUE(rgb, 5);
}
 
 
/** RGB 5:6:5 conversion
*
*/
static void rgb_565(void *dst, uint32_t rgb)
/** 16-bit depth (5:6:5) */
static int byte565_rgb(void *src)
{
*((uint16_t *) dst)
= (RED(rgb, 5) << 11) | (GREEN(rgb, 6) << 5) | BLUE(rgb, 5);
int color = *(uint16_t *)(src);
return (((color >> 11) & 0x1f) << (16 + 3)) |
(((color >> 5) & 0x3f) << (8 + 2)) | ((color & 0x1f) << 3);
}
 
 
/** RGB 3:2:3
/** Put pixel - 8-bit depth (color palette/3:2:3)
*
* Even though we try 3:2:3 color scheme here, an 8-bit framebuffer
* will most likely use a color palette. The color appearance
166,265 → 184,258
* will be pretty random and depend on the default installed
* palette. This could be fixed by supporting custom palette
* and setting it to simulate the 8-bit truecolor.
*
* Currently we set the palette on the ia32, amd64 and sparc64 port.
*
* Note that the byte is being inverted by this function. The reason is
* that we would like to use a color palette where the white color code
* is 0 and the black color code is 255, as some machines (Sun Blade 1500)
* use these codes for black and white and prevent to set codes
* 0 and 255 to other colors.
*
*/
static void rgb_323(void *dst, uint32_t rgb)
static void rgb_byte8(void *dst, int rgb)
{
*((uint8_t *) dst)
= ~((RED(rgb, 3) << 5) | (GREEN(rgb, 2) << 3) | BLUE(rgb, 3));
*((uint8_t *) dst) = RED(rgb, 3) << 5 | GREEN(rgb, 2) << 3 |
BLUE(rgb, 3);
}
 
 
/** Hide logo and refresh screen
/** Return pixel color - 8-bit depth (color palette/3:2:3)
*
* See the comment for rgb_byte().
*/
static void logo_hide(bool silent)
static int byte8_rgb(void *src)
{
ylogo = 0;
ytrim = yres;
rowtrim = rows;
if (!silent)
fb_redraw();
int color = *(uint8_t *)src;
return (((color >> 5) & 0x7) << (16 + 5)) |
(((color >> 3) & 0x3) << (8 + 6)) | ((color & 0x7) << 5);
}
 
static void putpixel(unsigned int x, unsigned int y, int color)
{
(*rgb2scr)(&fbaddress[POINTPOS(x, y)], COLOR(color));
 
/** Draw character at given position
*
*/
static void glyph_draw(uint8_t glyph, unsigned int col, unsigned int row, bool silent)
if (dbbuffer) {
int dline = (y + dboffset) % yres;
(*rgb2scr)(&dbbuffer[POINTPOS(x, dline)], COLOR(color));
}
}
 
/** Get pixel from viewport */
static int getpixel(unsigned int x, unsigned int y)
{
unsigned int x = COL2X(col);
unsigned int y = ROW2Y(row);
unsigned int yd;
if (y >= ytrim)
logo_hide(silent);
backbuf[BB_POS(col, row)] = glyph;
if (!silent) {
for (yd = 0; yd < FONT_SCANLINES; yd++)
memcpy(&fb_addr[FB_POS(x, y + yd + ylogo)],
&glyphs[GLYPH_POS(glyph, yd)], glyphscanline);
if (dbbuffer) {
int dline = (y + dboffset) % yres;
return COLOR((*scr2rgb)(&dbbuffer[POINTPOS(x, dline)]));
}
return COLOR((*scr2rgb)(&fbaddress[POINTPOS(x, y)]));
}
 
 
/** Scroll screen down by one row
*
*
*/
static void screen_scroll(bool silent)
/** Fill screen with background color */
static void clear_screen(void)
{
if (ylogo > 0) {
logo_hide(silent);
return;
unsigned int y;
 
for (y = 0; y < yres; y++) {
memcpy(&fbaddress[scanline * y], blankline, xres * pixelbytes);
if (dbbuffer)
memcpy(&dbbuffer[scanline * y], blankline,
xres * pixelbytes);
}
if (!silent) {
unsigned int row;
}
 
 
/** Scroll screen one row up */
static void scroll_screen(void)
{
if (dbbuffer) {
count_t first;
for (row = 0; row < rows; row++) {
unsigned int y = ROW2Y(row);
unsigned int yd;
for (yd = 0; yd < FONT_SCANLINES; yd++) {
unsigned int x;
unsigned int col;
for (col = 0, x = 0; col < cols; col++,
x += FONT_WIDTH) {
uint8_t glyph;
if (row < rows - 1) {
if (backbuf[BB_POS(col, row)] ==
backbuf[BB_POS(col, row + 1)])
continue;
glyph = backbuf[BB_POS(col, row + 1)];
} else
glyph = 0;
memcpy(&fb_addr[FB_POS(x, y + yd)],
&glyphs[GLYPH_POS(glyph, yd)],
glyphscanline);
}
}
/* Clear the last row */
memcpy(&dbbuffer[dboffset * scanline], blankline, ROW_BYTES);
dboffset = (dboffset + FONT_SCANLINES) % yres;
first = yres - dboffset;
/* Move all rows one row up */
if (xres * pixelbytes == scanline) {
memcpy(fbaddress, &dbbuffer[dboffset * scanline],
first * scanline);
memcpy(&fbaddress[first * scanline], dbbuffer,
dboffset * scanline);
} else {
/*
* When the scanline is bigger than number of bytes
* in the X-resolution, chances are that the
* frame buffer memory past the X-resolution is special
* in some way. For example, the SUNW,ffb framebuffer
* wraps this area around the beginning of the same
* line. To avoid troubles, copy only memory as
* specified by the resolution.
*/
unsigned int i;
 
for (i = 0; i < first; i++)
memcpy(&fbaddress[i * scanline],
&dbbuffer[(dboffset + i) * scanline],
xres * pixelbytes);
for (i = 0; i < dboffset; i++)
memcpy(&fbaddress[(first + i) * scanline],
&dbbuffer[i * scanline], xres * pixelbytes);
}
} else {
uint8_t *lastline = &fbaddress[(rows - 1) * ROW_BYTES];
if (xres * pixelbytes == scanline) {
/* Move all rows one row up */
memcpy((void *) fbaddress,
(void *) &fbaddress[ROW_BYTES],
scanline * yres - ROW_BYTES);
/* Clear the last row */
memcpy((void *) lastline, (void *) blankline,
ROW_BYTES);
} else {
/*
* See the comment in the dbbuffer case.
*/
unsigned int i;
 
/* Move all rows one row up */
for (i = 0; i < yres - FONT_SCANLINES; i++)
memcpy(&fbaddress[i * scanline],
&fbaddress[(i + FONT_SCANLINES) * scanline],
xres * pixelbytes);
/* Clear the last row */
for (i = 0; i < FONT_SCANLINES; i++)
memcpy(&lastline[i * scanline],
&blankline[i * scanline],
xres * pixelbytes);
}
}
memmove(backbuf, backbuf + cols, cols * (rows - 1));
memsetb(&backbuf[BB_POS(0, rows - 1)], cols, 0);
}
 
 
static void cursor_put(bool silent)
static void invert_pixel(unsigned int x, unsigned int y)
{
glyph_draw(CURSOR, position % cols, position / cols, silent);
putpixel(x, y, ~getpixel(x, y));
}
 
 
static void cursor_remove(bool silent)
/** Draw one line of glyph at a given position */
static void draw_glyph_line(unsigned int glline, unsigned int x, unsigned int y)
{
glyph_draw(0, position % cols, position / cols, silent);
unsigned int i;
 
for (i = 0; i < 8; i++)
if (glline & (1 << (7 - i))) {
putpixel(x + i, y, FGCOLOR);
} else
putpixel(x + i, y, BGCOLOR);
}
 
/***************************************************************/
/* Character-console functions */
 
/** Draw character at given position */
static void draw_glyph(uint8_t glyph, unsigned int col, unsigned int row)
{
unsigned int y;
 
for (y = 0; y < FONT_SCANLINES; y++)
draw_glyph_line(fb_font[glyph * FONT_SCANLINES + y],
col * COL_WIDTH, row * FONT_SCANLINES + y);
}
 
/** Invert character at given position */
static void invert_char(unsigned int col, unsigned int row)
{
unsigned int x;
unsigned int y;
 
for (x = 0; x < COL_WIDTH; x++)
for (y = 0; y < FONT_SCANLINES; y++)
invert_pixel(col * COL_WIDTH + x,
row * FONT_SCANLINES + y);
}
 
/** Draw character at default position */
static void draw_char(char chr)
{
draw_glyph(chr, position % columns, position / columns);
}
 
static void draw_logo(unsigned int startx, unsigned int starty)
{
unsigned int x;
unsigned int y;
unsigned int byte;
unsigned int rowbytes;
 
rowbytes = (helenos_width - 1) / 8 + 1;
 
for (y = 0; y < helenos_height; y++)
for (x = 0; x < helenos_width; x++) {
byte = helenos_bits[rowbytes * y + x / 8];
byte >>= x % 8;
if (byte & 1)
putpixel(startx + x, starty + y,
COLOR(LOGOCOLOR));
}
}
 
/***************************************************************/
/* Stdout specific functions */
 
static void invert_cursor(void)
{
invert_char(position % columns, position / columns);
}
 
/** Print character to screen
*
* Emulate basic terminal commands.
*
* Emulate basic terminal commands
*/
static void fb_putchar(outdev_t *dev, char ch, bool silent)
static void fb_putchar(chardev_t *dev, char ch)
{
spinlock_lock(&fb_lock);
switch (ch) {
case '\n':
cursor_remove(silent);
position += cols;
position -= position % cols;
invert_cursor();
position += columns;
position -= position % columns;
break;
case '\r':
cursor_remove(silent);
position -= position % cols;
invert_cursor();
position -= position % columns;
break;
case '\b':
cursor_remove(silent);
if (position % cols)
invert_cursor();
if (position % columns)
position--;
break;
case '\t':
cursor_remove(silent);
invert_cursor();
do {
glyph_draw((uint8_t) ' ', position % cols,
position / cols, silent);
draw_char(' ');
position++;
} while ((position % 8) && (position < cols * rows));
} while ((position % 8) && position < columns * rows);
break;
default:
glyph_draw((uint8_t) ch, position % cols,
position / cols, silent);
draw_char(ch);
position++;
}
if (position >= cols * rows) {
position -= cols;
screen_scroll(silent);
if (position >= columns * rows) {
position -= columns;
scroll_screen();
}
cursor_put(silent);
invert_cursor();
spinlock_unlock(&fb_lock);
}
 
static outdev_t fb_console;
static outdev_operations_t fb_ops = {
.write = fb_putchar
static chardev_t framebuffer;
static chardev_operations_t fb_ops = {
.write = fb_putchar,
};
 
 
/** Render glyphs
/** Initialize framebuffer as a chardev output device
*
* Convert glyphs from device independent font
* description to current visual representation.
*
*/
static void glyphs_render(void)
{
/* Prerender glyphs */
unsigned int glyph;
for (glyph = 0; glyph < FONT_GLYPHS; glyph++) {
unsigned int y;
for (y = 0; y < FONT_SCANLINES; y++) {
unsigned int x;
for (x = 0; x < FONT_WIDTH; x++) {
void *dst = &glyphs[GLYPH_POS(glyph, y) +
x * pixelbytes];
uint32_t rgb = (fb_font[ROW2Y(glyph) + y] &
(1 << (7 - x))) ? FG_COLOR : BG_COLOR;
rgb_conv(dst, rgb);
}
}
}
/* Prerender background scanline */
unsigned int x;
for (x = 0; x < xres; x++)
rgb_conv(&bgscan[x * pixelbytes], BG_COLOR);
}
 
 
/** Refresh the screen
*
*/
void fb_redraw(void)
{
if (ylogo > 0) {
unsigned int y;
for (y = 0; y < LOGO_HEIGHT; y++) {
unsigned int x;
for (x = 0; x < xres; x++)
rgb_conv(&fb_addr[FB_POS(x, y)],
(x < LOGO_WIDTH) ?
fb_logo[y * LOGO_WIDTH + x] :
LOGO_COLOR);
}
}
unsigned int row;
for (row = 0; row < rowtrim; row++) {
unsigned int y = ylogo + ROW2Y(row);
unsigned int yd;
for (yd = 0; yd < FONT_SCANLINES; yd++) {
unsigned int x;
unsigned int col;
for (col = 0, x = 0; col < cols;
col++, x += FONT_WIDTH) {
void *d = &fb_addr[FB_POS(x, y + yd)];
void *s = &glyphs[GLYPH_POS(backbuf[BB_POS(col,
row)], yd)];
memcpy(d, s, glyphscanline);
}
}
}
if (COL2X(cols) < xres) {
unsigned int y;
unsigned int size = (xres - COL2X(cols)) * pixelbytes;
for (y = ylogo; y < yres; y++)
memcpy(&fb_addr[FB_POS(COL2X(cols), y)], bgscan, size);
}
if (ROW2Y(rowtrim) + ylogo < yres) {
unsigned int y;
for (y = ROW2Y(rowtrim) + ylogo; y < yres; y++)
memcpy(&fb_addr[FB_POS(0, y)], bgscan, bgscanbytes);
}
}
 
 
/** Initialize framebuffer as a output character device
*
* @param addr Physical address of the framebuffer
* @param x Screen width in pixels
* @param y Screen height in pixels
432,102 → 443,101
* @param visual Color model
*
*/
void fb_init(fb_properties_t *props)
void fb_init(uintptr_t addr, unsigned int x, unsigned int y, unsigned int scan,
unsigned int visual)
{
switch (props->visual) {
switch (visual) {
case VISUAL_INDIRECT_8:
rgb_conv = rgb_323;
rgb2scr = rgb_byte8;
scr2rgb = byte8_rgb;
pixelbytes = 1;
break;
case VISUAL_RGB_5_5_5:
rgb_conv = rgb_555;
rgb2scr = rgb_byte555;
scr2rgb = byte555_rgb;
pixelbytes = 2;
break;
case VISUAL_RGB_5_6_5:
rgb_conv = rgb_565;
rgb2scr = rgb_byte565;
scr2rgb = byte565_rgb;
pixelbytes = 2;
break;
case VISUAL_RGB_8_8_8:
rgb_conv = rgb_888;
rgb2scr = rgb_byte888;
scr2rgb = byte888_rgb;
pixelbytes = 3;
break;
case VISUAL_BGR_8_8_8:
rgb_conv = bgr_888;
pixelbytes = 3;
break;
case VISUAL_RGB_8_8_8_0:
rgb_conv = rgb_888;
rgb2scr = rgb_byte888;
scr2rgb = byte888_rgb;
pixelbytes = 4;
break;
case VISUAL_RGB_0_8_8_8:
rgb_conv = rgb_0888;
rgb2scr = rgb_byte0888;
scr2rgb = byte0888_rgb;
pixelbytes = 4;
break;
case VISUAL_BGR_0_8_8_8:
rgb_conv = bgr_0888;
rgb2scr = bgr_byte0888;
scr2rgb = byte0888_bgr;
pixelbytes = 4;
break;
default:
panic("Unsupported visual.");
panic("Unsupported visual.\n");
}
xres = props->x;
yres = props->y;
scanline = props->scan;
unsigned int fbsize = scan * y;
cols = X2COL(xres);
rows = Y2ROW(yres);
/* Map the framebuffer */
fbaddress = (uint8_t *) hw_map((uintptr_t) addr, fbsize);
if (yres > ylogo) {
ylogo = LOGO_HEIGHT;
rowtrim = rows - Y2ROW(ylogo);
if (ylogo % FONT_SCANLINES > 0)
rowtrim--;
ytrim = ROW2Y(rowtrim);
} else {
ylogo = 0;
ytrim = yres;
rowtrim = rows;
}
xres = x;
yres = y;
scanline = scan;
glyphscanline = FONT_WIDTH * pixelbytes;
glyphbytes = ROW2Y(glyphscanline);
bgscanbytes = xres * pixelbytes;
unsigned int fbsize = scanline * yres;
unsigned int bbsize = cols * rows;
unsigned int glyphsize = FONT_GLYPHS * glyphbytes;
backbuf = (uint8_t *) malloc(bbsize, 0);
if (!backbuf)
panic("Unable to allocate backbuffer.");
glyphs = (uint8_t *) malloc(glyphsize, 0);
if (!glyphs)
panic("Unable to allocate glyphs.");
bgscan = malloc(bgscanbytes, 0);
if (!bgscan)
panic("Unable to allocate background pixel.");
memsetb(backbuf, bbsize, 0);
glyphs_render();
fb_addr = (uint8_t *) hw_map((uintptr_t) props->addr, fbsize);
rows = y / FONT_SCANLINES;
columns = x / COL_WIDTH;
 
fb_parea.pbase = (uintptr_t) addr;
fb_parea.vbase = (uintptr_t) fbaddress;
fb_parea.frames = SIZE2FRAMES(fbsize);
fb_parea.cacheable = false;
ddi_parea_register(&fb_parea);
 
sysinfo_set_item_val("fb", NULL, true);
sysinfo_set_item_val("fb.kind", NULL, 1);
sysinfo_set_item_val("fb.width", NULL, xres);
sysinfo_set_item_val("fb.height", NULL, yres);
sysinfo_set_item_val("fb.scanline", NULL, scanline);
sysinfo_set_item_val("fb.visual", NULL, props->visual);
sysinfo_set_item_val("fb.address.physical", NULL, props->addr);
sysinfo_set_item_val("fb.scanline", NULL, scan);
sysinfo_set_item_val("fb.visual", NULL, visual);
sysinfo_set_item_val("fb.address.physical", NULL, addr);
sysinfo_set_item_val("fb.invert-colors", NULL, invert_colors);
 
/* Allocate double buffer */
unsigned int order = fnzb(SIZE2FRAMES(fbsize) - 1) + 1;
dbbuffer = (uint8_t *) frame_alloc(order, FRAME_ATOMIC | FRAME_KA);
if (!dbbuffer)
printf("Failed to allocate scroll buffer.\n");
dboffset = 0;
 
/* Initialized blank line */
blankline = (uint8_t *) malloc(ROW_BYTES, FRAME_ATOMIC);
if (!blankline)
panic("Failed to allocate blank line for framebuffer.");
for (y = 0; y < FONT_SCANLINES; y++)
for (x = 0; x < xres; x++)
(*rgb2scr)(&blankline[POINTPOS(x, y)], COLOR(BGCOLOR));
fb_redraw();
outdev_initialize("fb", &fb_console, &fb_ops);
stdout = &fb_console;
clear_screen();
 
/* Update size of screen to match text area */
yres = rows * FONT_SCANLINES;
 
draw_logo(xres - helenos_width, 0);
invert_cursor();
 
chardev_initialize("fb", &framebuffer, &fb_ops);
stdout = &framebuffer;
}
 
/** @}
/branches/network/kernel/genarch/src/fb/font-8x16.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch
/** @addtogroup genarch
* @{
*/
/** @file
34,7 → 34,7
 
#include <genarch/fb/font-8x16.h>
 
uint8_t fb_font[FONT_GLYPHS * FONT_SCANLINES] = {
unsigned char fb_font[FONT_GLIPHS * FONT_SCANLINES] = {
 
/* 0 0x00 '^@' */
0x00, /* 00000000 */
/branches/network/kernel/genarch/src/fb/helenos.xbm
0,0 → 1,163
#define helenos_width 127
#define helenos_height 120
static unsigned char helenos_bits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x1f, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x0f, 0x78, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xf0, 0x01, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x00, 0x80, 0x81,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
0x0f, 0x00, 0x00, 0x83, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0xf0, 0x01, 0x00, 0x00, 0x03, 0x01, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x06,
0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x07,
0x00, 0x00, 0x00, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x02, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x0c,
0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x03, 0x00,
0x00, 0x00, 0x00, 0x18, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x0c, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x80, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18,
0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x03, 0x00, 0x00,
0x00, 0x00, 0x00, 0x30, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x18, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x80, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60,
0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x01, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x60, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x20, 0x00, 0x00, 0x00,
0x00, 0x00, 0xc0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0xc0, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x00,
0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x80, 0xc1, 0x00, 0x00, 0x00,
0x00, 0xc0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x00, 0x00, 0x80,
0xc1, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xfe, 0x01, 0x00, 0x00, 0x83, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x00, 0x83, 0x01, 0x00, 0x00,
0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x00,
0x03, 0x01, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xff, 0x07, 0x00, 0x00, 0x06, 0x03, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xff, 0x07, 0x00, 0x00, 0x06, 0x03, 0x00, 0x00,
0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x07, 0x00, 0x00,
0x0c, 0x02, 0x00, 0x00, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xff, 0x0f, 0x00, 0x00, 0x0c, 0x06, 0x00, 0x00, 0x08, 0x03, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xfe, 0x0f, 0x00, 0x00, 0x18, 0x04, 0x00, 0x00,
0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f, 0x00, 0x00,
0x18, 0x0c, 0x00, 0x00, 0x08, 0x03, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00,
0xfc, 0x1f, 0x00, 0x00, 0x18, 0x0c, 0x00, 0x00, 0x08, 0x03, 0x00, 0x00,
0x80, 0x1f, 0x00, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x30, 0x18, 0x00, 0x00,
0x18, 0x02, 0x00, 0x00, 0xc0, 0x3f, 0x00, 0x00, 0xfc, 0x3f, 0x00, 0x00,
0x30, 0x18, 0x00, 0x00, 0x18, 0x06, 0x00, 0x00, 0xe0, 0x7f, 0x00, 0x00,
0xf8, 0x3f, 0x00, 0x00, 0x60, 0x10, 0x00, 0x00, 0x18, 0x06, 0x00, 0x00,
0xe0, 0x7f, 0x00, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x60, 0x30, 0x00, 0x00,
0x38, 0x0c, 0x00, 0x00, 0xf0, 0x7f, 0x00, 0x00, 0xf0, 0x7f, 0x00, 0x00,
0xe0, 0x20, 0x00, 0x00, 0x30, 0x0c, 0x00, 0x00, 0xe0, 0xff, 0x00, 0x00,
0xf0, 0x7f, 0x00, 0x00, 0xc0, 0x78, 0x00, 0x00, 0x70, 0x08, 0x00, 0x00,
0xe0, 0xff, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0xc0, 0x7c, 0x00, 0x00,
0x70, 0x18, 0x00, 0x00, 0xe0, 0xff, 0x01, 0x00, 0xf0, 0xff, 0x00, 0x00,
0x80, 0xfd, 0x00, 0x00, 0x60, 0x3f, 0x00, 0x00, 0xc0, 0xff, 0x01, 0x00,
0xfc, 0xff, 0x01, 0x00, 0x80, 0xf9, 0x00, 0x00, 0xe0, 0x3f, 0x00, 0x00,
0xc0, 0xff, 0x01, 0x80, 0xff, 0xff, 0x01, 0x00, 0x80, 0xfb, 0x00, 0x00,
0xc0, 0x7f, 0x00, 0x00, 0xc0, 0xff, 0x03, 0xe0, 0xff, 0xff, 0x03, 0x00,
0x00, 0xf3, 0x01, 0x00, 0xc0, 0x7f, 0x00, 0x00, 0x80, 0xff, 0x03, 0xfc,
0xff, 0xff, 0x03, 0x00, 0x00, 0xf3, 0x01, 0x00, 0xc0, 0x7f, 0x00, 0x00,
0x80, 0xff, 0x07, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0xf6, 0x03, 0x00,
0x80, 0xff, 0x00, 0x00, 0x00, 0xff, 0xe7, 0xff, 0xff, 0xff, 0x07, 0x00,
0x00, 0xe6, 0x03, 0x00, 0x80, 0xff, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff,
0xff, 0xff, 0x07, 0x00, 0x00, 0xec, 0x07, 0x00, 0x00, 0xff, 0x01, 0x00,
0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0xcc, 0x07, 0x00,
0x00, 0xff, 0x01, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x7f, 0xfe, 0x0f, 0x00,
0x00, 0xdc, 0x07, 0x00, 0x00, 0xff, 0x01, 0x00, 0x00, 0xfe, 0xff, 0xff,
0x1f, 0xfe, 0x0f, 0x00, 0x00, 0xd8, 0x0f, 0x00, 0x00, 0xfe, 0x03, 0x00,
0x00, 0xfc, 0xff, 0xff, 0x03, 0xfe, 0x1f, 0x00, 0x00, 0x98, 0x0f, 0x00,
0x00, 0xfe, 0x03, 0x00, 0x00, 0xfc, 0xff, 0xff, 0x00, 0xfc, 0x1f, 0x00,
0x00, 0xb0, 0x1f, 0x00, 0x00, 0xfc, 0x07, 0x00, 0x00, 0xf8, 0xff, 0x1f,
0x00, 0xfc, 0x3f, 0x00, 0x00, 0x30, 0x1f, 0x00, 0x00, 0xfc, 0x07, 0x00,
0x00, 0xf8, 0xff, 0x07, 0x00, 0xfc, 0x3f, 0x00, 0x00, 0x70, 0x1f, 0x00,
0x00, 0xfc, 0x07, 0x00, 0x00, 0xf8, 0xff, 0x00, 0x00, 0xf8, 0x7f, 0x00,
0x00, 0x60, 0x3e, 0x00, 0x00, 0xf8, 0x0f, 0x00, 0x00, 0xf0, 0x7f, 0x00,
0x00, 0xf8, 0x7f, 0x00, 0x00, 0xe0, 0x3e, 0x00, 0x00, 0xf8, 0x0f, 0x00,
0x00, 0xf0, 0x7f, 0x00, 0x00, 0xf0, 0x7f, 0x00, 0x00, 0xf8, 0x7e, 0x00,
0x00, 0xf0, 0x1f, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0xf0, 0xff, 0x00,
0x00, 0xfc, 0x7c, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0x00, 0xe0, 0xff, 0x00,
0x00, 0xf0, 0xff, 0x00, 0x00, 0xfe, 0xfd, 0x00, 0x00, 0xf0, 0x1f, 0x00,
0x00, 0xe0, 0xff, 0x01, 0x00, 0xe0, 0xff, 0x00, 0x80, 0xff, 0xf9, 0x00,
0x00, 0xe0, 0x3f, 0x00, 0x00, 0xc0, 0xff, 0x01, 0x00, 0xe0, 0xff, 0x00,
0xc0, 0xff, 0xfb, 0x00, 0x00, 0xe0, 0x3f, 0x00, 0x00, 0xc0, 0xff, 0x03,
0x00, 0xc0, 0x7f, 0x00, 0xe0, 0xff, 0xfb, 0x01, 0x00, 0xc0, 0x7f, 0x00,
0x00, 0x80, 0xff, 0x03, 0x00, 0xc0, 0x7f, 0x00, 0xf8, 0xff, 0xf7, 0x01,
0x00, 0xc0, 0x7f, 0x00, 0x00, 0x80, 0xff, 0x03, 0x00, 0x80, 0x3f, 0x00,
0xfc, 0xff, 0xf7, 0x03, 0x00, 0xc0, 0x7f, 0x00, 0x00, 0x80, 0xff, 0x07,
0x00, 0x00, 0x00, 0x00, 0xfe, 0xef, 0xe7, 0x03, 0x00, 0x80, 0xff, 0x00,
0x00, 0x00, 0xff, 0x07, 0x00, 0x00, 0x00, 0x80, 0xff, 0xdf, 0xef, 0x07,
0x00, 0x80, 0xff, 0x00, 0x00, 0x00, 0xff, 0x0f, 0x00, 0x00, 0x00, 0xc0,
0xff, 0xdf, 0xef, 0x07, 0x00, 0x00, 0xff, 0x01, 0x00, 0x00, 0xff, 0x0f,
0x00, 0x00, 0x00, 0xe0, 0xff, 0xcf, 0xcf, 0x07, 0x00, 0x00, 0xff, 0x01,
0x00, 0x00, 0xfe, 0x1f, 0x00, 0x00, 0x00, 0xf0, 0x7f, 0xc3, 0xcf, 0x0f,
0x00, 0x00, 0xff, 0x01, 0x00, 0x00, 0xfe, 0x1f, 0x00, 0x00, 0x00, 0xfc,
0xff, 0xe0, 0xcf, 0x0f, 0x00, 0x00, 0xfe, 0x03, 0x00, 0x00, 0xfc, 0x1f,
0x00, 0x00, 0x00, 0xfe, 0xff, 0xf9, 0xc7, 0x0f, 0x00, 0x00, 0xfe, 0x03,
0x00, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xe7, 0x0f,
0x00, 0x00, 0xfc, 0x07, 0x00, 0x00, 0xf8, 0x0f, 0x00, 0x00, 0xc0, 0xff,
0xff, 0xff, 0xe7, 0x0f, 0x00, 0x00, 0xfc, 0x07, 0x00, 0x00, 0xf8, 0x07,
0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0xe3, 0x0f, 0x00, 0x00, 0xfc, 0x0f,
0x00, 0x00, 0xf0, 0x03, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xf1, 0x0f,
0x00, 0x00, 0xf8, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff,
0xff, 0xff, 0xf8, 0x0f, 0x00, 0x00, 0xf8, 0x0f, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0xfe, 0xff, 0xff, 0x3f, 0xfc, 0x0f, 0x00, 0x00, 0xf0, 0x1f,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x07, 0xfe, 0x0f,
0x00, 0x00, 0xf0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff,
0xff, 0x81, 0xff, 0x07, 0x00, 0x00, 0xf0, 0x3f, 0x00, 0x00, 0x00, 0x00,
0x00, 0xe0, 0xff, 0xff, 0x3f, 0xe0, 0xff, 0x07, 0x00, 0x00, 0xe0, 0x3f,
0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0x07, 0xfc, 0xff, 0x07,
0x00, 0x00, 0xe0, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff,
0x80, 0xff, 0xff, 0x03, 0x00, 0x00, 0xc0, 0x7f, 0x00, 0x00, 0x00, 0x00,
0x00, 0xfe, 0xff, 0x1f, 0xf0, 0xff, 0xff, 0x01, 0x00, 0x00, 0xc0, 0x7f,
0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x07, 0xfe, 0xff, 0xff, 0x00,
0x00, 0x00, 0xc0, 0x3f, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xc0,
0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x80, 0xbf, 0x00, 0x00, 0x00, 0x00,
0xe0, 0xff, 0x1f, 0xf0, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x80, 0xdf,
0x00, 0x3c, 0x00, 0x00, 0xf0, 0xff, 0x03, 0xfe, 0xff, 0xff, 0x0f, 0x00,
0x00, 0x00, 0x00, 0xcf, 0x00, 0x7e, 0x00, 0x00, 0xfc, 0x7f, 0xc0, 0xff,
0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x01, 0x7e, 0x00, 0x00,
0xfe, 0x0f, 0xf8, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x97,
0x01, 0x3e, 0x00, 0x00, 0xff, 0x03, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00,
0x00, 0x00, 0x00, 0x9e, 0x03, 0x00, 0x00, 0xc0, 0x7f, 0xc0, 0xff, 0xff,
0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x03, 0x00, 0x00, 0xe0,
0x0f, 0xf8, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c,
0x03, 0x00, 0x00, 0xf8, 0x01, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x7c, 0x06, 0x00, 0x00, 0x3f, 0xe0, 0xff, 0xff, 0xff,
0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0x0e, 0x00, 0xe0, 0x0f,
0xfc, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,
0x3c, 0x00, 0xfc, 0x01, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0xf8, 0x78, 0x80, 0x3f, 0xe0, 0xff, 0xff, 0xff, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xe1, 0xff, 0x07, 0xfc,
0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
0x81, 0xff, 0x80, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0xf0, 0x03, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x07, 0x00, 0xfe, 0xff,
0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,
0x0f, 0x00, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0xc0, 0x3f, 0xc0, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff,
0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x1f,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x0f, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xf0, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
/branches/network/kernel/genarch/Makefile.inc
33,85 → 33,68
genarch/src/acpi/acpi.c \
genarch/src/acpi/madt.c
endif
 
ifeq ($(CONFIG_PAGE_PT),y)
GENARCH_SOURCES += \
genarch/src/mm/page_pt.c \
genarch/src/mm/as_pt.c
endif
 
ifeq ($(CONFIG_PAGE_HT),y)
GENARCH_SOURCES += \
genarch/src/mm/page_ht.c \
genarch/src/mm/as_ht.c
endif
 
ifeq ($(CONFIG_ASID),y)
GENARCH_SOURCES += \
genarch/src/mm/asid.c
endif
 
ifeq ($(CONFIG_ASID_FIFO),y)
GENARCH_SOURCES += \
genarch/src/mm/asid_fifo.c
endif
 
ifeq ($(CONFIG_SOFTINT),y)
GENARCH_SOURCES += \
genarch/src/softint/division.c
endif
 
## Framebuffer
ifeq ($(CONFIG_FB),y)
GENARCH_SOURCES += \
genarch/src/fb/font-8x16.c \
genarch/src/fb/logo-196x66.c \
genarch/src/fb/fb.c
DEFS += -DCONFIG_FB
endif
 
ifeq ($(CONFIG_DSRLNIN),y)
GENARCH_SOURCES += \
genarch/src/drivers/dsrln/dsrlnin.c
endif
 
ifeq ($(CONFIG_DSRLNOUT),y)
GENARCH_SOURCES += \
genarch/src/drivers/dsrln/dsrlnout.c
endif
 
## i8042 controller
ifeq ($(CONFIG_I8042),y)
GENARCH_SOURCES += \
genarch/src/drivers/i8042/i8042.c
genarch/src/kbd/i8042.c \
genarch/src/kbd/key.c \
genarch/src/kbd/scanc_pc.c
endif
 
ifeq ($(CONFIG_NS16550),y)
## Sun keyboard
ifeq ($(CONFIG_SUN_KBD),y)
GENARCH_SOURCES += \
genarch/src/drivers/ns16550/ns16550.c
genarch/src/kbd/key.c \
genarch/src/kbd/scanc_sun.c
endif
 
## z8530 controller
ifeq ($(CONFIG_Z8530),y)
GENARCH_SOURCES += \
genarch/src/drivers/z8530/z8530.c
genarch/src/kbd/z8530.c
endif
 
ifeq ($(CONFIG_PC_KBD),y)
## ns16550 controller
ifeq ($(CONFIG_NS16550),y)
GENARCH_SOURCES += \
genarch/src/kbrd/kbrd.c \
genarch/src/kbrd/scanc_pc.c
genarch/src/kbd/ns16550.c
endif
 
ifeq ($(CONFIG_SUN_KBD),y)
GENARCH_SOURCES += \
genarch/src/kbrd/kbrd.c \
genarch/src/kbrd/scanc_sun.c
endif
 
ifeq ($(CONFIG_SRLN),y)
## OpenFirmware Device Tree
ifeq ($(CONFIG_OFW_TREE), y)
GENARCH_SOURCES += \
genarch/src/srln/srln.c
endif
 
ifeq ($(CONFIG_OFW_TREE),y)
GENARCH_SOURCES += \
genarch/src/ofw/ofw_tree.c \
genarch/src/ofw/ebus.c \
genarch/src/ofw/fhc.c \
119,13 → 102,3
genarch/src/ofw/sbus.c \
genarch/src/ofw/upa.c
endif
 
ifeq ($(CONFIG_MULTIBOOT), y)
GENARCH_SOURCES += \
genarch/src/multiboot/multiboot.c
endif
 
ifeq ($(CONFIG_EGA), y)
GENARCH_SOURCES += \
genarch/src/drivers/ega/ega.c
endif
/branches/network/kernel/Makefile
30,27 → 30,23
## Include configuration
#
 
include ../version
-include ../Makefile.config
-include ../config.defs
-include ../version
-include Makefile.config
 
INCLUDES = generic/include
OPTIMIZATION = 3
 
ifndef CROSS_PREFIX
CROSS_PREFIX = /usr/local
endif
 
## Common compiler flags
#
 
DEFS = -DKERNEL -DRELEASE=$(RELEASE) "-DNAME=$(NAME)"
DEFS = -D$(ARCH) -DARCH=\"$(ARCH)\" -DRELEASE=\"$(RELEASE)\" "-DNAME=\"$(NAME)\"" \
-DKERNEL
 
GCC_CFLAGS = -I$(INCLUDES) -O$(OPTIMIZATION) -imacros ../config.h \
GCC_CFLAGS = -I$(INCLUDES) -O$(OPTIMIZATION) \
-fno-builtin -Wall -Wextra -Wno-unused-parameter -Wmissing-prototypes -Werror \
-nostdlib -nostdinc -pipe
-nostdlib -nostdinc
 
ICC_CFLAGS = -I$(INCLUDES) -O$(OPTIMIZATION) -imacros ../config.h \
ICC_CFLAGS = -I$(INCLUDES) -O$(OPTIMIZATION) \
-fno-builtin -Wall -Wmissing-prototypes -Werror \
-nostdlib -nostdinc \
-wd170
62,7 → 58,15
LFLAGS = -M
AFLAGS =
 
-include arch/$(KARCH)/Makefile.inc
ifdef REVISION
DEFS += "-DREVISION=\"$(REVISION)\""
endif
 
ifdef TIMESTAMP
DEFS += "-DTIMESTAMP=\"$(TIMESTAMP)\""
endif
 
-include arch/$(ARCH)/Makefile.inc
-include genarch/Makefile.inc
 
## The at-sign
80,6 → 84,72
#
SYMTAB_SECTION=".section symtab.data, \"a\", $(ATSIGN)progbits;"
 
## Setup kernel configuration
#
ifeq ($(CONFIG_DEBUG),y)
DEFS += -DCONFIG_DEBUG
endif
 
ifeq ($(CONFIG_EDEBUG),y)
DEFS += -DCONFIG_EDEBUG
endif
 
ifeq ($(CONFIG_DEBUG_SPINLOCK),y)
DEFS += -DCONFIG_DEBUG_SPINLOCK
endif
 
ifeq ($(CONFIG_DEBUG_AS_WATCHPOINT),y)
DEFS += -DCONFIG_DEBUG_AS_WATCHPOINT
endif
 
ifeq ($(CONFIG_FPU_LAZY),y)
DEFS += -DCONFIG_FPU_LAZY
endif
 
ifeq ($(CONFIG_DEBUG_ALLREGS),y)
DEFS += -DCONFIG_DEBUG_ALLREGS
endif
 
ifeq ($(CONFIG_VHPT),y)
DEFS += -DCONFIG_VHPT
endif
 
ifeq ($(CONFIG_TSB),y)
DEFS += -DCONFIG_TSB
endif
 
ifeq ($(CONFIG_Z8530),y)
DEFS += -DCONFIG_Z8530
endif
 
ifeq ($(CONFIG_NS16550),y)
DEFS += -DCONFIG_NS16550
endif
 
ifeq ($(CONFIG_VIRT_IDX_DCACHE),y)
DEFS += -DCONFIG_VIRT_IDX_DCACHE
endif
 
ifeq ($(CONFIG_FB),y)
ifeq ($(ARCH),ia32)
DEFS += -DCONFIG_VESA_WIDTH=$(CONFIG_VESA_WIDTH)
DEFS += -DCONFIG_VESA_HEIGHT=$(CONFIG_VESA_HEIGHT)
DEFS += -DCONFIG_VESA_BPP=$(CONFIG_VESA_BPP)
endif
ifeq ($(ARCH),amd64)
DEFS += -DCONFIG_VESA_WIDTH=$(CONFIG_VESA_WIDTH)
DEFS += -DCONFIG_VESA_HEIGHT=$(CONFIG_VESA_HEIGHT)
DEFS += -DCONFIG_VESA_BPP=$(CONFIG_VESA_BPP)
endif
ifeq ($(ARCH),ia32xen)
DEFS += -DCONFIG_VESA_WIDTH=$(CONFIG_VESA_WIDTH)
DEFS += -DCONFIG_VESA_HEIGHT=$(CONFIG_VESA_HEIGHT)
DEFS += -DCONFIG_VESA_BPP=$(CONFIG_VESA_BPP)
endif
endif
 
## Simple detection for the type of the host system
#
HOST = $(shell uname)
104,7 → 174,6
OBJDUMP = $(BINUTILS_PREFIX)objdump
LIBDIR = /usr/lib
CFLAGS = $(GCC_CFLAGS)
DEPEND_DEFS = $(DEFS) $(CONFIG_DEFS)
endif
 
ifeq ($(COMPILER),icc_native)
116,7 → 185,6
OBJDUMP = objdump
LIBDIR = /usr/lib
CFLAGS = $(ICC_CFLAGS)
DEPEND_DEFS = $(DEFS) $(CONFIG_DEFS)
endif
 
ifeq ($(COMPILER),suncc_native)
128,8 → 196,6
OBJDUMP = $(BINUTILS_PREFIX)objdump
LIBDIR = /usr/lib
CFLAGS = $(SUNCC_CFLAGS)
DEFS += $(CONFIG_DEFS)
DEPEND_DEFS = $(DEFS)
endif
 
ifeq ($(COMPILER),gcc_cross)
141,7 → 207,6
OBJDUMP = $(TOOLCHAIN_DIR)/bin/$(TARGET)-objdump
LIBDIR = $(TOOLCHAIN_DIR)/lib
CFLAGS = $(GCC_CFLAGS)
DEPEND_DEFS = $(DEFS) $(CONFIG_DEFS)
endif
 
## Generic kernel sources
155,11 → 220,12
generic/src/adt/list.c \
generic/src/console/chardev.c \
generic/src/console/console.c \
generic/src/console/kconsole.c \
generic/src/console/cmd.c \
generic/src/cpu/cpu.c \
generic/src/ddi/ddi.c \
generic/src/ddi/irq.c \
generic/src/ddi/device.c \
generic/src/debug/symtab.c \
generic/src/interrupt/interrupt.c \
generic/src/main/main.c \
generic/src/main/kinit.c \
186,7 → 252,6
generic/src/lib/func.c \
generic/src/lib/memstr.c \
generic/src/lib/sort.c \
generic/src/lib/string.c \
generic/src/lib/elf.c \
generic/src/lib/rd.c \
generic/src/printf/printf_core.c \
196,6 → 261,7
generic/src/printf/vprintf.c \
generic/src/printf/vsprintf.c \
generic/src/printf/vsnprintf.c \
generic/src/debug/symtab.c \
generic/src/time/clock.c \
generic/src/time/timeout.c \
generic/src/time/delay.c \
217,30 → 283,11
generic/src/security/cap.c \
generic/src/sysinfo/sysinfo.c
 
## Kernel console support
#
 
ifeq ($(CONFIG_KCONSOLE),y)
GENERIC_SOURCES += \
generic/src/console/kconsole.c \
generic/src/console/cmd.c
endif
 
## Udebug interface sources
#
 
ifeq ($(CONFIG_UDEBUG),y)
GENERIC_SOURCES += \
generic/src/ipc/kbox.c \
generic/src/udebug/udebug.c \
generic/src/udebug/udebug_ops.c \
generic/src/udebug/udebug_ipc.c
endif
 
## Test sources
#
 
ifeq ($(CONFIG_TEST),y)
DEFS += -DCONFIG_TEST
CFLAGS += -Itest/
GENERIC_SOURCES += \
test/test.c \
247,12 → 294,17
test/atomic/atomic1.c \
test/btree/btree1.c \
test/avltree/avltree1.c \
test/debug/mips1.c \
test/fault/fault1.c \
test/fpu/fpu1.c \
test/fpu/sse1.c \
test/fpu/mips2.c \
test/mm/falloc1.c \
test/mm/falloc2.c \
test/mm/mapping1.c \
test/mm/slab1.c \
test/mm/slab2.c \
test/mm/purge1.c \
test/synch/rwlock1.c \
test/synch/rwlock2.c \
test/synch/rwlock3.c \
263,58 → 315,6
test/print/print1.c \
test/thread/thread1.c \
test/sysinfo/sysinfo1.c
ifeq ($(KARCH),mips32)
GENERIC_SOURCES += test/debug/mips1.c
else
GENERIC_SOURCES += test/debug/mips1_skip.c
endif
ifeq ($(KARCH),ia64)
GENERIC_SOURCES += test/mm/purge1.c
else
GENERIC_SOURCES += test/mm/purge1_skip.c
endif
ifeq ($(CONFIG_FPU),y)
ifeq ($(KARCH),ia32)
TEST_FPU1 = y
TEST_SSE1 = y
GENERIC_SOURCES += test/fpu/fpu1_x86.c
endif
ifeq ($(KARCH),amd64)
TEST_FPU1 = y
TEST_SSE1 = y
GENERIC_SOURCES += test/fpu/fpu1_x86.c
endif
ifeq ($(KARCH),ia64)
TEST_FPU1 = y
GENERIC_SOURCES += test/fpu/fpu1_ia64.c
endif
ifeq ($(KARCH),mips32)
TEST_MIPS2 = y
endif
endif
ifneq ($(TEST_FPU1),y)
GENERIC_SOURCES += test/fpu/fpu1_skip.c
endif
ifeq ($(TEST_SSE1),y)
GENERIC_SOURCES += test/fpu/sse1.c
else
GENERIC_SOURCES += test/fpu/sse1_skip.c
endif
ifeq ($(TEST_MIPS2),y)
GENERIC_SOURCES += test/fpu/mips2.c
else
GENERIC_SOURCES += test/fpu/mips2_skip.c
endif
endif
 
GENERIC_OBJECTS := $(addsuffix .o,$(basename $(GENERIC_SOURCES)))
321,24 → 321,25
ARCH_OBJECTS := $(addsuffix .o,$(basename $(ARCH_SOURCES)))
GENARCH_OBJECTS := $(addsuffix .o,$(basename $(GENARCH_SOURCES)))
 
ifeq ($(CONFIG_SYMTAB),y)
SYMTAB_OBJECTS := generic/src/debug/real_map.o
else
SYMTAB_OBJECTS :=
endif
.PHONY: all build config distclean clean archlinks depend disasm
 
.PHONY: all build clean archlinks depend disasm
 
all: ../Makefile.config ../config.h ../config.defs
-rm Makefile.depend
all:
../tools/config.py kernel.config default $(ARCH) $(COMPILER) $(CONFIG_DEBUG) $(MACHINE)
$(MAKE) -C . build
 
build: kernel.bin disasm
 
config:
-rm Makefile.depend
../tools/config.py kernel.config
 
-include Makefile.depend
 
distclean: clean
-rm Makefile.config
 
clean:
-rm -f kernel.bin kernel.raw kernel.map kernel.map.pre kernel.objdump kernel.disasm generic/src/debug/real_map.bin Makefile.depend* generic/include/arch generic/include/genarch arch/$(KARCH)/_link.ld
-rm -f kernel.bin kernel.raw kernel.map kernel.map.pre kernel.objdump kernel.disasm generic/src/debug/real_map.bin Makefile.depend* generic/include/arch generic/include/genarch arch/$(ARCH)/_link.ld
find generic/src/ arch/*/src/ genarch/src/ test/ -name '*.o' -follow -exec rm \{\} \;
for arch in arch/* ; do \
[ -e $$arch/_link.ld ] && rm $$arch/_link.ld 2>/dev/null ; \
345,24 → 346,24
done ; exit 0
 
archlinks:
ln -sfn ../../arch/$(KARCH)/include/ generic/include/arch
ln -sfn ../../arch/$(ARCH)/include/ generic/include/arch
ln -sfn ../../genarch/include/ generic/include/genarch
 
depend: archlinks
-makedepend -f - -- $(DEPEND_DEFS) $(CFLAGS) -- $(ARCH_SOURCES) $(GENARCH_SOURCES) $(GENERIC_SOURCES) > Makefile.depend 2> /dev/null
-makedepend $(DEFS) $(CFLAGS) -f - $(ARCH_SOURCES) $(GENARCH_SOURCES) $(GENERIC_SOURCES) > Makefile.depend 2> /dev/null
 
arch/$(KARCH)/_link.ld: arch/$(KARCH)/_link.ld.in
arch/$(ARCH)/_link.ld: arch/$(ARCH)/_link.ld.in
$(GCC) $(DEFS) $(GCC_CFLAGS) -D__ASM__ -D__LINKER__ -E -x c $< | grep -v "^\#" > $@
 
generic/src/debug/real_map.bin: depend arch/$(KARCH)/_link.ld $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS)
generic/src/debug/real_map.bin: depend arch/$(ARCH)/_link.ld $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS)
echo $(SYMTAB_SECTION) | $(AS) $(AFLAGS) -o generic/src/debug/empty_map.o
$(LD) -T arch/$(KARCH)/_link.ld $(LFLAGS) $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) $(EXTRA_OBJECTS) generic/src/debug/empty_map.o -o $@ -Map kernel.map.pre
$(LD) -T arch/$(ARCH)/_link.ld $(LFLAGS) $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) $(EXTRA_OBJECTS) generic/src/debug/empty_map.o -o $@ -Map kernel.map.pre
$(OBJDUMP) -t $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) > kernel.objdump
tools/genmap.py kernel.map.pre kernel.objdump generic/src/debug/real_map.bin
# Do it once again, this time to get correct even the symbols
# on architectures, that have bss after symtab
echo $(SYMTAB_SECTION)" .incbin \"$@\"" | $(AS) $(AFLAGS) -o generic/src/debug/sizeok_map.o
$(LD) -T arch/$(KARCH)/_link.ld $(LFLAGS) $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) $(EXTRA_OBJECTS) generic/src/debug/sizeok_map.o -o $@ -Map kernel.map.pre
$(LD) -T arch/$(ARCH)/_link.ld $(LFLAGS) $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) $(EXTRA_OBJECTS) generic/src/debug/sizeok_map.o -o $@ -Map kernel.map.pre
$(OBJDUMP) -t $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) > kernel.objdump
tools/genmap.py kernel.map.pre kernel.objdump generic/src/debug/real_map.bin
 
369,8 → 370,8
generic/src/debug/real_map.o: generic/src/debug/real_map.bin
echo $(SYMTAB_SECTION)" .incbin \"$<\"" | $(AS) $(AFLAGS) -o $@
 
kernel.raw: depend arch/$(KARCH)/_link.ld $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) $(SYMTAB_OBJECTS)
$(LD) -T arch/$(KARCH)/_link.ld $(LFLAGS) $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) $(EXTRA_OBJECTS) $(SYMTAB_OBJECTS) -o $@ -Map kernel.map
kernel.raw: depend arch/$(ARCH)/_link.ld $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) generic/src/debug/real_map.o
$(LD) -T arch/$(ARCH)/_link.ld $(LFLAGS) $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) $(EXTRA_OBJECTS) generic/src/debug/real_map.o -o $@ -Map kernel.map
 
kernel.bin: kernel.raw
$(OBJCOPY) -O $(BFD) kernel.raw kernel.bin
/branches/network/kernel/test/mm/purge1_skip.c
File deleted
/branches/network/kernel/test/mm/purge1.c
26,6 → 26,8
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifdef ia64
 
#include <print.h>
#include <test.h>
#include <mm/page.h>
45,10 → 47,10
tlb_entry_t entryd;
int i;
entryd.word[0] = 0;
entryd.word[1] = 0;
entryd.p = true; /* present */
entryd.ma = MA_WRITEBACK;
entryd.a = true; /* already accessed */
75,9 → 77,11
dtc_mapping_insert(0 + i * (1 << PAGE_WIDTH), 9, entryd);
}
tlb_invalidate_pages(8, 0x0c000, 14);
tlb_invalidate_pages(8,0x0c000,14);
/* tlb_invalidate_all(); */
/*tlb_invalidate_all();*/
return NULL;
}
 
#endif
/branches/network/kernel/test/mm/purge1.def
1,3 → 1,4
#ifdef ia64
{
"purge1",
"Itanium TLB purge test",
4,3 → 5,4
&test_purge1,
true
},
#endif
/branches/network/kernel/test/avltree/avltree1.def
1,6 → 1,6
{
"avltree1",
"Test AVL tree operations",
"Test Avl tree operations",
&test_avltree1,
true
},
/branches/network/kernel/test/synch/rwlock4.c
60,7 → 60,7
 
spinlock_lock(&rw_lock);
rc = seed % max;
seed = (((seed << 2) ^ (seed >> 2)) * 487) + rc;
seed = (((seed<<2) ^ (seed>>2)) * 487) + rc;
spinlock_unlock(&rw_lock);
return rc;
}
/branches/network/kernel/test/synch/semaphore2.c
53,7 → 53,7
 
spinlock_lock(&sem_lock);
rc = seed % max;
seed = (((seed << 2) ^ (seed >> 2)) * 487) + rc;
seed = (((seed<<2) ^ (seed>>2)) * 487) + rc;
spinlock_unlock(&sem_lock);
return rc;
}
/branches/network/kernel/test/fpu/mips2_skip.c
File deleted
/branches/network/kernel/test/fpu/fpu1_ia64.c
File deleted
/branches/network/kernel/test/fpu/fpu1_skip.c
File deleted
/branches/network/kernel/test/fpu/sse1_skip.c
File deleted
/branches/network/kernel/test/fpu/fpu1_x86.c
File deleted
/branches/network/kernel/test/fpu/mips2.c
26,6 → 26,8
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifdef mips32
 
#include <print.h>
#include <debug.h>
 
36,9 → 38,9
 
#include <arch.h>
 
#define THREADS 50
#define DELAY 10000L
#define ATTEMPTS 5
#define THREADS 50
#define DELAY 10000L
#define ATTEMPTS 5
 
static atomic_t threads_ok;
static atomic_t threads_fault;
54,7 → 56,7
thread_detach(THREAD);
waitq_sleep(&can_start);
 
for (i = 0; i < ATTEMPTS; i++) {
asm volatile (
"mtc1 %0,$1"
87,13 → 89,13
thread_detach(THREAD);
waitq_sleep(&can_start);
 
for (i = 0; i < ATTEMPTS; i++) {
asm volatile (
"mtc1 %0,$1"
: "=r" (arg)
);
 
scheduler();
asm volatile (
"mfc1 %0,$1"
122,7 → 124,7
if (!quiet)
printf("Creating %u threads... ", 2 * THREADS);
 
for (i = 0; i < THREADS; i++) {
thread_t *t;
160,3 → 162,5
return "Test failed";
}
 
#endif
/branches/network/kernel/test/fpu/fpu1.c
0,0 → 1,230
/*
* Copyright (c) 2005 Jakub Vana
* Copyright (c) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#if (defined(ia32) || defined(amd64) || defined(ia64) || defined(ia32xen))
 
#include <print.h>
#include <debug.h>
 
#include <test.h>
#include <atomic.h>
#include <proc/thread.h>
 
#include <arch.h>
#include <arch/arch.h>
 
 
#define THREADS 150
#define ATTEMPTS 100
 
#define E_10e8 271828182
#define PI_10e8 314159265
 
 
#ifdef KERN_ia32_ARCH_H_
static inline double sqrt(double x)
{
double v;
asm (
"fsqrt\n"
: "=t" (v)
: "0" (x)
);
return v;
}
#endif
 
#ifdef KERN_amd64_ARCH_H_
static inline double sqrt(double x)
{
double v;
asm (
"fsqrt\n"
: "=t" (v)
: "0" (x)
);
return v;
}
#endif
 
#ifdef KERN_ia64_ARCH_H_
 
#undef PI_10e8
#define PI_10e8 3141592
 
static inline long double sqrt(long double a)
{
long double x = 1;
long double lx = 0;
 
if (a < 0.00000000000000001)
return 0;
while(x != lx) {
lx = x;
x = (x + (a / x)) / 2;
}
return x;
}
#endif
 
 
static atomic_t threads_ok;
static atomic_t threads_fault;
static waitq_t can_start;
static bool sh_quiet;
 
static void e(void *data)
{
int i;
double e, d, le, f;
 
thread_detach(THREAD);
 
waitq_sleep(&can_start);
 
for (i = 0; i<ATTEMPTS; i++) {
le = -1;
e = 0;
f = 1;
 
for (d = 1; e != le; d *= f, f += 1) {
le = e;
e = e + 1 / d;
}
 
if ((int) (100000000 * e) != E_10e8) {
if (!sh_quiet)
printf("tid%" PRIu64 ": e*10e8=%zd should be %" PRIun "\n", THREAD->tid, (unative_t) (100000000 * e), (unative_t) E_10e8);
atomic_inc(&threads_fault);
break;
}
}
atomic_inc(&threads_ok);
}
 
static void pi(void *data)
{
int i;
double lpi, pi;
double n, ab, ad;
thread_detach(THREAD);
 
waitq_sleep(&can_start);
 
for (i = 0; i < ATTEMPTS; i++) {
lpi = -1;
pi = 0;
 
for (n = 2, ab = sqrt(2); lpi != pi; n *= 2, ab = ad) {
double sc, cd;
 
sc = sqrt(1 - (ab * ab / 4));
cd = 1 - sc;
ad = sqrt(ab * ab / 4 + cd * cd);
lpi = pi;
pi = 2 * n * ad;
}
 
#ifdef KERN_ia64_ARCH_H_
if ((int) (1000000 * pi) != PI_10e8) {
if (!sh_quiet)
printf("tid%" PRIu64 ": pi*10e8=%zd should be %" PRIun "\n", THREAD->tid, (unative_t) (1000000 * pi), (unative_t) (PI_10e8 / 100));
atomic_inc(&threads_fault);
break;
}
#else
if ((int) (100000000 * pi) != PI_10e8) {
if (!sh_quiet)
printf("tid%" PRIu64 ": pi*10e8=%zd should be %" PRIun "\n", THREAD->tid, (unative_t) (100000000 * pi), (unative_t) PI_10e8);
atomic_inc(&threads_fault);
break;
}
#endif
}
atomic_inc(&threads_ok);
}
 
char * test_fpu1(bool quiet)
{
unsigned int i, total = 0;
sh_quiet = quiet;
 
waitq_initialize(&can_start);
atomic_set(&threads_ok, 0);
atomic_set(&threads_fault, 0);
if (!quiet)
printf("Creating %u threads... ", 2 * THREADS);
 
for (i = 0; i < THREADS; i++) {
thread_t *t;
if (!(t = thread_create(e, NULL, TASK, 0, "e", false))) {
if (!quiet)
printf("could not create thread %u\n", 2 * i);
break;
}
thread_ready(t);
total++;
if (!(t = thread_create(pi, NULL, TASK, 0, "pi", false))) {
if (!quiet)
printf("could not create thread %u\n", 2 * i + 1);
break;
}
thread_ready(t);
total++;
}
if (!quiet)
printf("ok\n");
thread_sleep(1);
waitq_wakeup(&can_start, WAKEUP_ALL);
while (atomic_get(&threads_ok) != (long) total) {
if (!quiet)
printf("Threads left: %d\n", total - atomic_get(&threads_ok));
thread_sleep(1);
}
if (atomic_get(&threads_fault) == 0)
return NULL;
return "Test failed";
}
 
#endif
/branches/network/kernel/test/fpu/sse1.c
26,6 → 26,8
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#if (defined(ia32) || defined(amd64) || defined(ia32xen))
 
#include <print.h>
#include <debug.h>
 
36,9 → 38,9
 
#include <arch.h>
 
#define THREADS 25
#define DELAY 10000L
#define ATTEMPTS 5
#define THREADS 25
#define DELAY 10000L
#define ATTEMPTS 5
 
static atomic_t threads_ok;
static atomic_t threads_fault;
58,14 → 60,14
 
for (i = 0; i < ATTEMPTS; i++) {
asm volatile (
"movlpd %[arg], %%xmm2\n"
: [arg] "=m" (arg)
"movlpd %0, %%xmm2\n"
: "=m" (arg)
);
 
delay(DELAY);
asm volatile (
"movlpd %%xmm2, %[after_arg]\n"
: [after_arg] "=m" (after_arg)
"movlpd %%xmm2, %0\n"
: "=m" (after_arg)
);
if (arg != after_arg) {
90,14 → 92,14
 
for (i = 0; i < ATTEMPTS; i++) {
asm volatile (
"movlpd %[arg], %%xmm2\n"
: [arg] "=m" (arg)
"movlpd %0, %%xmm2\n"
: "=m" (arg)
);
 
scheduler();
asm volatile (
"movlpd %%xmm2, %[after_arg]\n"
: [after_arg] "=m" (after_arg)
"movlpd %%xmm2, %0\n"
: "=m" (after_arg)
);
if (arg != after_arg) {
160,3 → 162,5
return "Test failed";
}
 
#endif
/branches/network/kernel/test/fpu/mips2.def
1,3 → 1,4
#ifdef mips32
{
"mips2",
"MIPS FPU test",
4,3 → 5,4
&test_mips2,
true
},
#endif
/branches/network/kernel/test/fpu/fpu1.def
1,3 → 1,4
#if (defined(ia32) || defined(amd64) || defined(ia64) || defined(ia32xen))
{
"fpu1",
"Intel FPU test",
4,3 → 5,4
&test_fpu1,
true
},
#endif
/branches/network/kernel/test/fpu/sse1.def
1,3 → 1,4
#if (defined(ia32) || defined(amd64) || defined(ia32xen))
{
"sse1",
"Intel SEE test",
4,3 → 5,4
&test_sse1,
true
},
#endif
/branches/network/kernel/test/debug/mips1_skip.c
File deleted
/branches/network/kernel/test/debug/mips1.c
25,6 → 25,8
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifdef mips32
 
#include <print.h>
#include <debug.h>
36,10 → 38,10
 
#include <arch.h>
 
char *test_mips1(bool quiet)
char * test_mips1(bool quiet)
{
if (!quiet)
printf("If kconsole is compiled in, you should enter debug mode now.\n");
printf("You should enter kconsole debug mode now.\n");
asm volatile (
"break\n"
47,3 → 49,5
return "Back from debug mode";
}
 
#endif
/branches/network/kernel/test/debug/mips1.def
1,3 → 1,4
#ifdef mips32
{
"mips1",
"MIPS debug test",
4,3 → 5,4
&test_mips1,
false
},
#endif
/branches/network/contrib/util/DownloadAndPatchSILO.sh
File deleted
Property changes:
Deleted: svn:executable
-*
\ No newline at end of property
/branches/network/contrib/toolchain/toolchain.ppc32.sh
19,8 → 19,8
CROSS_PREFIX="/usr/local"
fi
 
BINUTILS_VERSION="2.19"
GCC_VERSION="4.3.2"
BINUTILS_VERSION="2.18"
GCC_VERSION="4.3.1"
 
BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
GCC_CORE="gcc-core-${GCC_VERSION}.tar.bz2"
/branches/network/contrib/toolchain/toolchain.amd64.sh
19,8 → 19,8
CROSS_PREFIX="/usr/local"
fi
 
BINUTILS_VERSION="2.19.1"
GCC_VERSION="4.3.3"
BINUTILS_VERSION="2.18"
GCC_VERSION="4.3.1"
 
BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
GCC_CORE="gcc-core-${GCC_VERSION}.tar.bz2"
/branches/network/contrib/toolchain/toolchain.ppc64.sh
19,8 → 19,8
CROSS_PREFIX="/usr/local"
fi
 
BINUTILS_VERSION="2.19"
GCC_VERSION="4.3.2"
BINUTILS_VERSION="2.18"
GCC_VERSION="4.3.1"
 
BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
GCC_CORE="gcc-core-${GCC_VERSION}.tar.bz2"
/branches/network/contrib/toolchain/toolchain.ia32.sh
19,8 → 19,8
CROSS_PREFIX="/usr/local"
fi
 
BINUTILS_VERSION="2.19.1"
GCC_VERSION="4.3.3"
BINUTILS_VERSION="2.18"
GCC_VERSION="4.3.1"
 
BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
GCC_CORE="gcc-core-${GCC_VERSION}.tar.bz2"
/branches/network/contrib/toolchain/toolchain.mipsel32.sh
19,8 → 19,8
CROSS_PREFIX="/usr/local"
fi
 
BINUTILS_VERSION="2.19.1"
GCC_VERSION="4.3.3"
BINUTILS_VERSION="2.18"
GCC_VERSION="4.3.1"
 
BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
GCC_CORE="gcc-core-${GCC_VERSION}.tar.bz2"
/branches/network/contrib/toolchain/toolchain.ia64.sh
19,8 → 19,8
CROSS_PREFIX="/usr/local"
fi
 
BINUTILS_VERSION="2.19"
GCC_VERSION="4.3.2"
BINUTILS_VERSION="2.18"
GCC_VERSION="4.3.1"
 
BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
GCC_CORE="gcc-core-${GCC_VERSION}.tar.bz2"
/branches/network/contrib/toolchain/toolchain.arm32.sh
19,8 → 19,8
CROSS_PREFIX="/usr/local"
fi
 
BINUTILS_VERSION="2.19"
GCC_VERSION="4.3.2"
BINUTILS_VERSION="2.18"
GCC_VERSION="4.3.1"
 
BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
GCC_CORE="gcc-core-${GCC_VERSION}.tar.bz2"
/branches/network/contrib/toolchain/toolchain.mipseb32.sh
19,8 → 19,8
CROSS_PREFIX="/usr/local"
fi
 
BINUTILS_VERSION="2.19.1"
GCC_VERSION="4.3.3"
BINUTILS_VERSION="2.18"
GCC_VERSION="4.3.1"
 
BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
GCC_CORE="gcc-core-${GCC_VERSION}.tar.bz2"
32,7 → 32,7
 
PLATFORM="mips"
WORKDIR=`pwd`
TARGET="${PLATFORM}-linux-gnu"
TARGET="${PLATFORM}-sgi-irix5"
PREFIX="${CROSS_PREFIX}/${PLATFORM}"
BINUTILSDIR="${WORKDIR}/binutils-${BINUTILS_VERSION}"
GCCDIR="${WORKDIR}/gcc-${GCC_VERSION}"
/branches/network/contrib/toolchain/toolchain.sparc64.sh
19,8 → 19,8
CROSS_PREFIX="/usr/local"
fi
 
BINUTILS_VERSION="2.19.1"
GCC_VERSION="4.3.3"
BINUTILS_VERSION="2.18"
GCC_VERSION="4.3.1"
 
BINUTILS="binutils-${BINUTILS_VERSION}.tar.gz"
GCC_CORE="gcc-core-${GCC_VERSION}.tar.bz2"
/branches/network/contrib/conf/arm32-gx.sh
File deleted
Property changes:
Deleted: svn:executable
-*
\ No newline at end of property
/branches/network/contrib/conf/mips32-gx.sh
File deleted
Property changes:
Deleted: svn:executable
-*
\ No newline at end of property
Deleted: svn:mergeinfo
/branches/network/contrib/conf/msim.conf
3,7 → 3,6
#
 
add dcpu cpu0
add dcpu cpu1
 
add rwm mainmem 0x00000000
mainmem generic 16M
11,7 → 10,7
 
add rom bootmem 0x1fc00000
bootmem generic 4096k
bootmem load "image.boot"
bootmem load "image.boot"
 
add dprinter printer 0x10000000
add dkeyboard keyboard 0x10000000 2
/branches/network/contrib/conf/gxemul.sh
0,0 → 1,3
#!/bin/sh
 
gxemul $@ -E testmips -C R4000 -X image.boot
Property changes:
Added: svn:executable
+*
\ No newline at end of property
/branches/network/tools/xtui.py
File deleted
/branches/network/tools/mkfat.py
34,275 → 34,7
import os
import random
import xstruct
import array
 
exclude_names = set(['.svn'])
 
def align_up(size, alignment):
"Return size aligned up to alignment"
if (size % alignment == 0):
return size
return (((size / alignment) + 1) * alignment)
 
def subtree_size(root, cluster_size, dirent_size):
"Recursive directory walk and calculate size"
size = 0
files = 2
for name in os.listdir(root):
canon = os.path.join(root, name)
if (os.path.isfile(canon) and (not name in exclude_names)):
size += align_up(os.path.getsize(canon), cluster_size)
files += 1
if (os.path.isdir(canon) and (not name in exclude_names)):
size += subtree_size(canon, cluster_size, dirent_size)
files += 1
return size + align_up(files * dirent_size, cluster_size)
 
def root_entries(root):
"Return number of root directory entries"
return len(os.listdir(root))
 
def write_file(path, outf, cluster_size, data_start, fat, reserved_clusters):
"Store the contents of a file"
size = os.path.getsize(path)
prev = -1
first = 0
inf = file(path, "r")
rd = 0;
while (rd < size):
empty_cluster = fat.index(0)
fat[empty_cluster] = 0xffff
if (prev != -1):
fat[prev] = empty_cluster
else:
first = empty_cluster
prev = empty_cluster
data = inf.read(cluster_size);
outf.seek(data_start + (empty_cluster - reserved_clusters) * cluster_size)
outf.write(data)
rd += len(data)
inf.close()
return first, size
 
def write_directory(directory, outf, cluster_size, data_start, fat, reserved_clusters, dirent_size, empty_cluster):
"Store the contents of a directory"
length = len(directory)
size = length * dirent_size
prev = -1
first = 0
i = 0
rd = 0;
while (rd < size):
if (prev != -1):
empty_cluster = fat.index(0)
fat[empty_cluster] = 0xffff
fat[prev] = empty_cluster
else:
first = empty_cluster
prev = empty_cluster
data = ''
data_len = 0
while ((i < length) and (data_len < cluster_size)):
if (i == 0):
directory[i].cluster = empty_cluster
data += directory[i].pack()
data_len += dirent_size
i += 1
outf.seek(data_start + (empty_cluster - reserved_clusters) * cluster_size)
outf.write(data)
rd += len(data)
return first, size
 
DIR_ENTRY = """little:
char name[8] /* file name */
char ext[3] /* file extension */
uint8_t attr /* file attributes */
padding[1] /* reserved for NT */
uint8_t ctime_fine /* create time (fine resolution) */
uint16_t ctime /* create time */
uint16_t cdate /* create date */
uint16_t adate /* access date */
padding[2] /* EA-index */
uint16_t mtime /* modification time */
uint16_t mdate /* modification date */
uint16_t cluster /* first cluster */
uint32_t size /* file size */
"""
 
DOT_DIR_ENTRY = """little:
uint8_t signature /* 0x2e signature */
char name[7] /* empty */
char ext[3] /* empty */
uint8_t attr /* file attributes */
padding[1] /* reserved for NT */
uint8_t ctime_fine /* create time (fine resolution) */
uint16_t ctime /* create time */
uint16_t cdate /* create date */
uint16_t adate /* access date */
padding[2] /* EA-index */
uint16_t mtime /* modification time */
uint16_t mdate /* modification date */
uint16_t cluster /* first cluster */
uint32_t size /* file size */
"""
 
DOTDOT_DIR_ENTRY = """little:
uint8_t signature[2] /* 0x2e signature */
char name[6] /* empty */
char ext[3] /* empty */
uint8_t attr /* file attributes */
padding[1] /* reserved for NT */
uint8_t ctime_fine /* create time (fine resolution) */
uint16_t ctime /* create time */
uint16_t cdate /* create date */
uint16_t adate /* access date */
padding[2] /* EA-index */
uint16_t mtime /* modification time */
uint16_t mdate /* modification date */
uint16_t cluster /* first cluster */
uint32_t size /* file size */
"""
 
def mangle_fname(name):
# FIXME: filter illegal characters
parts = name.split('.')
if (len(parts) > 0):
fname = parts[0]
else:
fname = ''
return (fname + ' ').upper()[0:8]
 
def mangle_ext(name):
# FIXME: filter illegal characters
parts = name.split('.')
if (len(parts) > 1):
ext = parts[1]
else:
ext = ''
return (ext + ' ').upper()[0:3]
 
def create_dirent(name, directory, cluster, size):
dir_entry = xstruct.create(DIR_ENTRY)
dir_entry.name = mangle_fname(name)
dir_entry.ext = mangle_ext(name)
if (directory):
dir_entry.attr = 0x30
else:
dir_entry.attr = 0x20
dir_entry.ctime_fine = 0 # FIXME
dir_entry.ctime = 0 # FIXME
dir_entry.cdate = 0 # FIXME
dir_entry.adate = 0 # FIXME
dir_entry.mtime = 0 # FIXME
dir_entry.mdate = 0 # FIXME
dir_entry.cluster = cluster
if (directory):
dir_entry.size = 0
else:
dir_entry.size = size
return dir_entry
 
def create_dot_dirent(empty_cluster):
dir_entry = xstruct.create(DOT_DIR_ENTRY)
dir_entry.signature = 0x2e
dir_entry.name = ' '
dir_entry.ext = ' '
dir_entry.attr = 0x10
dir_entry.ctime_fine = 0 # FIXME
dir_entry.ctime = 0 # FIXME
dir_entry.cdate = 0 # FIXME
dir_entry.adate = 0 # FIXME
dir_entry.mtime = 0 # FIXME
dir_entry.mdate = 0 # FIXME
dir_entry.cluster = empty_cluster
dir_entry.size = 0
return dir_entry
 
def create_dotdot_dirent(parent_cluster):
dir_entry = xstruct.create(DOTDOT_DIR_ENTRY)
dir_entry.signature = [0x2e, 0x2e]
dir_entry.name = ' '
dir_entry.ext = ' '
dir_entry.attr = 0x10
dir_entry.ctime_fine = 0 # FIXME
dir_entry.ctime = 0 # FIXME
dir_entry.cdate = 0 # FIXME
dir_entry.adate = 0 # FIXME
dir_entry.mtime = 0 # FIXME
dir_entry.mdate = 0 # FIXME
dir_entry.cluster = parent_cluster
dir_entry.size = 0
return dir_entry
 
def recursion(head, root, outf, cluster_size, root_start, data_start, fat, reserved_clusters, dirent_size, parent_cluster):
"Recursive directory walk"
directory = []
if (not head):
# Directory cluster preallocation
empty_cluster = fat.index(0)
fat[empty_cluster] = 0xffff
directory.append(create_dot_dirent(empty_cluster))
directory.append(create_dotdot_dirent(parent_cluster))
else:
empty_cluster = 0
for name in os.listdir(root):
canon = os.path.join(root, name)
if (os.path.isfile(canon) and (not name in exclude_names)):
rv = write_file(canon, outf, cluster_size, data_start, fat, reserved_clusters)
directory.append(create_dirent(name, False, rv[0], rv[1]))
if (os.path.isdir(canon) and (not name in exclude_names)):
rv = recursion(False, canon, outf, cluster_size, root_start, data_start, fat, reserved_clusters, dirent_size, empty_cluster)
directory.append(create_dirent(name, True, rv[0], rv[1]))
if (head):
outf.seek(root_start)
for dir_entry in directory:
outf.write(dir_entry.pack())
else:
return write_directory(directory, outf, cluster_size, data_start, fat, reserved_clusters, dirent_size, empty_cluster)
 
BOOT_SECTOR = """little:
uint8_t jmp[3] /* jump instruction */
char oem[8] /* OEM string */
330,14 → 62,6
uint8_t boot_signature[2] /* boot signature */
"""
 
EMPTY_SECTOR = """little:
padding[512] /* empty sector data */
"""
 
FAT_ENTRY = """little:
uint16_t next /* FAT16 entry */
"""
 
def usage(prname):
"Print usage syntax"
print prname + " <PATH> <IMAGE>"
352,59 → 76,27
print "<PATH> must be a directory"
return
fat16_clusters = 4096
sector_size = 512
cluster_size = 4096
dirent_size = 32
fatent_size = 2
fat_count = 2
reserved_clusters = 2
# Make sure the filesystem is large enought for FAT16
size = subtree_size(path, cluster_size, dirent_size) + reserved_clusters * cluster_size
while (size / cluster_size < fat16_clusters):
if (cluster_size > sector_size):
cluster_size /= 2
size = subtree_size(path, cluster_size, dirent_size) + reserved_clusters * cluster_size
else:
size = fat16_clusters * cluster_size + reserved_clusters * cluster_size
root_size = align_up(root_entries(path) * dirent_size, cluster_size)
fat_size = align_up(align_up(size, cluster_size) / cluster_size * fatent_size, sector_size)
sectors = (cluster_size + fat_count * fat_size + root_size + size) / sector_size
root_start = cluster_size + fat_count * fat_size
data_start = root_start + root_size
outf = file(sys.argv[2], "w")
boot_sector = xstruct.create(BOOT_SECTOR)
boot_sector.jmp = [0xEB, 0x3C, 0x90]
boot_sector.oem = "MSDOS5.0"
boot_sector.sector = sector_size
boot_sector.cluster = cluster_size / sector_size
boot_sector.reserved = cluster_size / sector_size
boot_sector.fats = fat_count
boot_sector.rootdir = root_size / dirent_size
if (sectors <= 65535):
boot_sector.sectors = sectors
else:
boot_sector.sectors = 0
boot_sector.sector = 512
boot_sector.cluster = 8 # 4096 bytes per cluster
boot_sector.reserved = 1
boot_sector.fats = 2
boot_sector.rootdir = 224 # FIXME: root directory should be sector aligned
boot_sector.sectors = 0 # FIXME
boot_sector.descriptor = 0xF8
boot_sector.fat_sectors = fat_size / sector_size
boot_sector.track_sectors = 63
boot_sector.heads = 6
boot_sector.fat_sectors = 0 # FIXME
boot_sector.track_sectors = 0 # FIXME
boot_sector.heads = 0 # FIXME
boot_sector.hidden = 0
if (sectors > 65535):
boot_sector.sectors_big = sectors
else:
boot_sector.sectors_big = 0
boot_sector.sectors_big = 0 # FIXME
boot_sector.drive = 0x80
boot_sector.drive = 0
boot_sector.extboot_signature = 0x29
boot_sector.serial = random.randint(0, 0x7fffffff)
boot_sector.serial = random.randint(0, 0xFFFFFFFF)
boot_sector.label = "HELENOS"
boot_sector.fstype = "FAT16 "
boot_sector.boot_signature = [0x55, 0xAA]
411,39 → 103,6
outf.write(boot_sector.pack())
empty_sector = xstruct.create(EMPTY_SECTOR)
# Reserved sectors
for i in range(1, cluster_size / sector_size):
outf.write(empty_sector.pack())
# FAT tables
for i in range(0, fat_count):
for j in range(0, fat_size / sector_size):
outf.write(empty_sector.pack())
# Root directory
for i in range(0, root_size / sector_size):
outf.write(empty_sector.pack())
# Data
for i in range(0, size / sector_size):
outf.write(empty_sector.pack())
fat = array.array('L', [0] * (fat_size / fatent_size))
fat[0] = 0xfff8
fat[1] = 0xffff
recursion(True, path, outf, cluster_size, root_start, data_start, fat, reserved_clusters, dirent_size, 0)
# Store FAT
fat_entry = xstruct.create(FAT_ENTRY)
for i in range(0, fat_count):
outf.seek(cluster_size + i * fat_size)
for j in range(0, fat_size / fatent_size):
fat_entry.next = fat[j]
outf.write(fat_entry.pack())
outf.close()
if __name__ == '__main__':
/branches/network/tools/mktmpfs.py
34,8 → 34,6
import os
import xstruct
 
exclude_names = set(['.svn'])
 
HEADER = """little:
char tag[5] /* 'TMPFS' */
"""
72,7 → 70,7
for name in os.listdir(root):
canon = os.path.join(root, name)
if (os.path.isfile(canon) and (not name in exclude_names)):
if (os.path.isfile(canon)):
size = os.path.getsize(canon)
dentry = xstruct.create(DENTRY_FILE % len(name))
91,7 → 89,7
rd += len(data)
inf.close()
if (os.path.isdir(canon) and (not name in exclude_names)):
if (os.path.isdir(canon)):
dentry = xstruct.create(DENTRY_DIRECTORY % len(name))
dentry.kind = TMPFS_DIRECTORY
dentry.fname_len = len(name)
/branches/network/tools/mkfat.sh
0,0 → 1,73
#!/bin/bash
#
# Copyright (c) 2008 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
MFORMAT=`which mformat`
MCOPY=`which mcopy`
 
if [ `which mformat` == "" ]; then
echo "Please install mtools."
exit 1
fi
 
if [ `which mcopy` == "" ]; then
echo "Please install mtools."
exit 1
fi
 
if [ $# -ne 2 ]; then
echo "Usage: $0 <PATH> <IMAGE>"
exit 1
fi
 
if [ ! -d $1 ]; then
echo "Usage: $0 <PATH> <IMAGE>"
exit 1
fi
 
BPS=512
SPC=4
FAT16_MIN_SEC=$((4085 * $SPC))
HEADS=2
TRACKS=16
BYTES=`du -sb $1 | cut -f 1`
SECTORS=$(($BYTES / $BPS))
SPTPH=$((($SECTORS + $FAT16_MIN_SEC) / ($HEADS * $TRACKS)))
 
# Format the image as FAT16
$MFORMAT -h $HEADS -t $TRACKS -s $SPTPH -M $BPS -c $SPC -v "FAT16HORD" -B /dev/zero -C -i $2 ::
 
if [ $? -ne 0 ]; then
echo "$MFORMAT failed: $?"
exit $?
fi
 
# Copy the subtree to the image
$MCOPY -vspQmi $2 $1/* ::
 
exit $?
Property changes:
Added: svn:executable
+*
\ No newline at end of property
/branches/network/tools/config.py
1,7 → 1,6
#!/usr/bin/env python
#
# Copyright (c) 2006 Ondrej Palkovsky
# Copyright (c) 2009 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
28,432 → 27,512
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
"""
HelenOS configuration system
HelenOS configuration script
"""
import sys
import os
import re
import commands
import xtui
 
INPUT = sys.argv[1]
MAKEFILE = 'Makefile.config'
MACROS = 'config.h'
DEFS = 'config.defs'
PRECONF = 'defaults'
OUTPUT = 'Makefile.config'
TMPOUTPUT = 'Makefile.config.tmp'
 
def read_defaults(fname, defaults):
"Read saved values from last configuration run"
inf = file(fname, 'r')
for line in inf:
res = re.match(r'^(?:#!# )?([^#]\w*)\s*=\s*(.*?)\s*$', line)
if (res):
defaults[res.group(1)] = res.group(2)
inf.close()
class DefaultDialog:
"Wrapper dialog that tries to return default values"
def __init__(self, dlg):
self.dlg = dlg
 
def check_condition(text, defaults, ask_names):
"Check that the condition specified on input line is True (only CNF and DNF is supported)"
ctype = 'cnf'
if ((')|' in text) or ('|(' in text)):
ctype = 'dnf'
if (ctype == 'cnf'):
conds = text.split('&')
else:
conds = text.split('|')
for cond in conds:
if (cond.startswith('(')) and (cond.endswith(')')):
cond = cond[1:-1]
inside = check_inside(cond, defaults, ctype)
if (ctype == 'cnf') and (not inside):
return False
if (ctype == 'dnf') and (inside):
return True
if (ctype == 'cnf'):
return True
return False
def set_title(self,text):
self.dlg.set_title(text)
def yesno(self, text, default=None):
if default is not None:
return default
return self.dlg.yesno(text, default)
def noyes(self, text, default=None):
if default is not None:
return default
return self.dlg.noyes(text, default)
def choice(self, text, choices, defopt=None):
if defopt is not None:
return choices[defopt][0]
return self.dlg.choice(text, choices, defopt)
 
def check_inside(text, defaults, ctype):
"Check for condition"
if (ctype == 'cnf'):
conds = text.split('|')
else:
conds = text.split('&')
for cond in conds:
res = re.match(r'^(.*?)(!?=)(.*)$', cond)
if (not res):
raise RuntimeError("Invalid condition: %s" % cond)
condname = res.group(1)
oper = res.group(2)
condval = res.group(3)
if (not defaults.has_key(condname)):
varval = ''
else:
varval = defaults[condname]
if (varval == '*'):
varval = 'y'
if (ctype == 'cnf'):
if (oper == '=') and (condval == varval):
return True
if (oper == '!=') and (condval != varval):
return True
else:
if (oper == '=') and (condval != varval):
return False
if (oper == '!=') and (condval == varval):
return False
if (ctype == 'cnf'):
return False
return True
class NoDialog:
def __init__(self):
self.printed = None
self.title = 'HelenOS Configuration'
 
def parse_config(fname, ask_names):
"Parse configuration file"
inf = file(fname, 'r')
name = ''
choices = []
for line in inf:
if (line.startswith('!')):
# Ask a question
res = re.search(r'!\s*(?:\[(.*?)\])?\s*([^\s]+)\s*\((.*)\)\s*$', line)
if (not res):
raise RuntimeError("Weird line: %s" % line)
cond = res.group(1)
varname = res.group(2)
vartype = res.group(3)
ask_names.append((varname, vartype, name, choices, cond))
name = ''
choices = []
continue
if (line.startswith('@')):
# Add new line into the 'choices' array
res = re.match(r'@\s*(?:\[(.*?)\])?\s*"(.*?)"\s*(.*)$', line)
if not res:
raise RuntimeError("Bad line: %s" % line)
choices.append((res.group(2), res.group(3)))
continue
if (line.startswith('%')):
# Name of the option
name = line[1:].strip()
continue
if ((line.startswith('#')) or (line == '\n')):
# Comment or empty line
continue
raise RuntimeError("Unknown syntax: %s" % line)
inf.close()
def print_title(self):
if not self.printed:
sys.stdout.write("\n*** %s ***\n" % self.title)
self.printed = True
 
def yes_no(default):
"Return '*' if yes, ' ' if no"
if (default == 'y'):
return '*'
return ' '
def set_title(self, text):
self.title = text
self.printed = False
def noyes(self, text, default=None):
if not default:
default = 'n'
return self.yesno(text, default)
def yesno(self, text, default=None):
self.print_title()
if default != 'n':
default = 'y'
while 1:
sys.stdout.write("%s (y/n)[%s]: " % (text,default))
inp = sys.stdin.readline()
if not inp:
raise EOFError
inp = inp.strip().lower()
if not inp:
return default
if inp == 'y':
return 'y'
elif inp == 'n':
return 'n'
 
def subchoice(screen, name, choices, default):
"Return choice of choices"
maxkey = 0
for key, val in choices:
length = len(key)
if (length > maxkey):
maxkey = length
options = []
position = None
cnt = 0
for key, val in choices:
if ((default) and (key == default)):
position = cnt
options.append(" %-*s %s " % (maxkey, key, val))
cnt += 1
(button, value) = xtui.choice_window(screen, name, 'Choose value', options, position)
if (button == 'cancel'):
return None
return choices[value][0]
def _print_choice(self, text, choices, defopt):
sys.stdout.write('%s:\n' % text)
for i,(text,descr) in enumerate(choices):
if descr is '':
sys.stdout.write('\t%2d. %s\n' % (i, text))
else:
sys.stdout.write('\t%2d. %s\n' % (i, descr))
if defopt is not None:
sys.stdout.write('Enter choice number[%d]: ' % defopt)
else:
sys.stdout.write('Enter choice number: ')
 
def check_choices(defaults, ask_names):
"Check whether all accessible variables have a default"
for varname, vartype, name, choices, cond in ask_names:
if ((cond) and (not check_condition(cond, defaults, ask_names))):
continue
if (not defaults.has_key(varname)):
return False
return True
def menu(self, text, choices, button, defopt=None):
self.title = 'Main menu'
menu = []
for key, descr in choices:
txt = key + (45-len(key))*' ' + ': ' + descr
menu.append((key, txt))
return self.choice(text, [button] + menu)
def choice(self, text, choices, defopt=None):
self.print_title()
while 1:
self._print_choice(text, choices, defopt)
inp = sys.stdin.readline()
if not inp:
raise EOFError
if not inp.strip():
if defopt is not None:
return choices[defopt][0]
continue
try:
number = int(inp.strip())
except ValueError:
continue
if number < 0 or number >= len(choices):
continue
return choices[number][0]
 
def create_output(mkname, mcname, dfname, defaults, ask_names):
"Create output configuration"
revision = commands.getoutput('svnversion . 2> /dev/null')
timestamp = commands.getoutput('date "+%Y-%m-%d %H:%M:%S"')
outmk = file(mkname, 'w')
outmc = file(mcname, 'w')
outdf = file(dfname, 'w')
outmk.write('#########################################\n')
outmk.write('## AUTO-GENERATED FILE, DO NOT EDIT!!! ##\n')
outmk.write('#########################################\n\n')
outmc.write('/***************************************\n')
outmc.write(' * AUTO-GENERATED FILE, DO NOT EDIT!!! *\n')
outmc.write(' ***************************************/\n\n')
outdf.write('#########################################\n')
outdf.write('## AUTO-GENERATED FILE, DO NOT EDIT!!! ##\n')
outdf.write('#########################################\n\n')
outdf.write('CONFIG_DEFS =')
for varname, vartype, name, choices, cond in ask_names:
if ((cond) and (not check_condition(cond, defaults, ask_names))):
continue
if (not defaults.has_key(varname)):
default = ''
else:
default = defaults[varname]
if (default == '*'):
default = 'y'
outmk.write('# %s\n%s = %s\n\n' % (name, varname, default))
if ((vartype == "y") or (vartype == "n") or (vartype == "y/n") or (vartype == "n/y")):
if (default == "y"):
outmc.write('/* %s */\n#define %s\n\n' % (name, varname))
outdf.write(' -D%s' % varname)
else:
outmc.write('/* %s */\n#define %s %s\n#define %s_%s\n\n' % (name, varname, default, varname, default))
outdf.write(' -D%s=%s -D%s_%s' % (varname, default, varname, default))
outmk.write('REVISION = %s\n' % revision)
outmk.write('TIMESTAMP = %s\n' % timestamp)
outmc.write('#define REVISION %s\n' % revision)
outmc.write('#define TIMESTAMP %s\n' % timestamp)
outdf.write(' "-DREVISION=%s" "-DTIMESTAMP=%s"\n' % (revision, timestamp))
outmk.close()
outmc.close()
outdf.close()
 
def sorted_dir(root):
list = os.listdir(root)
list.sort()
return list
def eof_checker(fnc):
def wrapper(self, *args, **kw):
try:
return fnc(self, *args, **kw)
except EOFError:
return getattr(self.bckdialog,fnc.func_name)(*args, **kw)
return wrapper
 
def read_preconfigured(root, fname, screen, defaults):
options = []
opt2path = {}
cnt = 0
# Look for profiles
for name in sorted_dir(root):
path = os.path.join(root, name)
canon = os.path.join(path, fname)
if ((os.path.isdir(path)) and (os.path.exists(canon)) and (os.path.isfile(canon))):
subprofile = False
# Look for subprofiles
for subname in sorted_dir(path):
subpath = os.path.join(path, subname)
subcanon = os.path.join(subpath, fname)
if ((os.path.isdir(subpath)) and (os.path.exists(subcanon)) and (os.path.isfile(subcanon))):
subprofile = True
options.append("%s (%s)" % (name, subname))
opt2path[cnt] = (canon, subcanon)
cnt += 1
if (not subprofile):
options.append(name)
opt2path[cnt] = (canon, None)
cnt += 1
(button, value) = xtui.choice_window(screen, 'Load preconfigured defaults', 'Choose configuration profile', options, None)
if (button == 'cancel'):
return None
read_defaults(opt2path[value][0], defaults)
if (opt2path[value][1] != None):
read_defaults(opt2path[value][1], defaults)
class Dialog(NoDialog):
def __init__(self):
NoDialog.__init__(self)
self.dlgcmd = os.environ.get('DIALOG','dialog')
self.title = ''
self.backtitle = 'HelenOS Configuration'
if os.system('%s --print-maxsize >/dev/null 2>&1' % self.dlgcmd) != 0:
raise NotImplementedError
self.bckdialog = NoDialog()
 
def set_title(self,text):
self.title = text
self.bckdialog.set_title(text)
def calldlg(self,*args,**kw):
"Wrapper for calling 'dialog' program"
indesc, outdesc = os.pipe()
pid = os.fork()
if not pid:
os.close(2)
os.dup(outdesc)
os.close(indesc)
dlgargs = [self.dlgcmd,'--title',self.title,
'--backtitle', self.backtitle]
for key,val in kw.items():
dlgargs.append('--'+key)
dlgargs.append(val)
dlgargs += args
os.execlp(self.dlgcmd,*dlgargs)
 
os.close(outdesc)
try:
errout = os.fdopen(indesc,'r')
data = errout.read()
errout.close()
pid,status = os.wait()
except:
os.system('reset') # Reset terminal
raise
if not os.WIFEXITED(status):
os.system('reset') # Reset terminal
raise EOFError
status = os.WEXITSTATUS(status)
if status == 255:
raise EOFError
return status,data
def yesno(self, text, default=None):
if text[-1] not in ('?',':'):
text = text + ':'
width = '50'
height = '5'
if len(text) < 48:
text = ' '*int(((48-len(text))/2)) + text
else:
width = '0'
height = '0'
if default == 'n':
res,data = self.calldlg('--defaultno','--yesno',text,height,width)
else:
res,data = self.calldlg('--yesno',text,height,width)
 
if res == 0:
return 'y'
return 'n'
yesno = eof_checker(yesno)
 
def menu(self, text, choices, button, defopt=None):
self.title = 'Main menu'
text = text + ':'
width = '70'
height = str(8 + len(choices))
args = []
for key,val in choices:
args.append(key)
args.append(val)
 
kw = {}
if defopt:
kw['default-item'] = choices[defopt][0]
res,data = self.calldlg('--ok-label','Change',
'--extra-label',button[1],
'--extra-button',
'--menu',text,height,width,
str(len(choices)),*args,**kw)
if res == 3:
return button[0]
if res == 1: # Cancel
sys.exit(1)
elif res:
print data
raise EOFError
return data
menu = eof_checker(menu)
def choice(self, text, choices, defopt=None):
text = text + ':'
width = '50'
height = str(8 + len(choices))
args = []
for key,val in choices:
args.append(key)
args.append(val)
 
kw = {}
if defopt:
kw['default-item'] = choices[defopt][0]
res,data = self.calldlg('--nocancel','--menu',text,height,width,
str(len(choices)),*args, **kw)
if res:
print data
raise EOFError
return data
choice = eof_checker(choice)
def read_defaults(fname,defaults):
"Read saved values from last configuration run"
f = file(fname,'r')
for line in f:
res = re.match(r'^(?:#!# )?([^#]\w*)\s*=\s*(.*?)\s*$', line)
if res:
defaults[res.group(1)] = res.group(2)
f.close()
 
def check_condition(text, defaults, asked_names):
seen_vars = [ x[0] for x in asked_names ]
ctype = 'cnf'
if ')|' in text or '|(' in text:
ctype = 'dnf'
if ctype == 'cnf':
conds = text.split('&')
else:
conds = text.split('|')
 
for cond in conds:
if cond.startswith('(') and cond.endswith(')'):
cond = cond[1:-1]
inside = check_inside(cond, defaults, ctype, seen_vars)
if ctype == 'cnf' and not inside:
return False
if ctype == 'dnf' and inside:
return True
 
if ctype == 'cnf':
return True
return False
 
def check_inside(text, defaults, ctype, seen_vars):
"""
Check that the condition specified on input line is True
 
only CNF is supported
"""
if ctype == 'cnf':
conds = text.split('|')
else:
conds = text.split('&')
for cond in conds:
res = re.match(r'^(.*?)(!?=)(.*)$', cond)
if not res:
raise RuntimeError("Invalid condition: %s" % cond)
condname = res.group(1)
oper = res.group(2)
condval = res.group(3)
if condname not in seen_vars:
varval = ''
## raise RuntimeError("Variable %s not defined before being asked." %\
## condname)
elif not defaults.has_key(condname):
raise RuntimeError("Condition var %s does not exist: %s" % \
(condname,text))
else:
varval = defaults[condname]
if ctype == 'cnf':
if oper == '=' and condval == varval:
return True
if oper == '!=' and condval != varval:
return True
else:
if oper== '=' and condval != varval:
return False
if oper== '!=' and condval == varval:
return False
if ctype=='cnf':
return False
return True
 
def parse_config(input, output, dlg, defaults={}, askonly=None):
"Parse configuration file and create Makefile.config on the fly"
def ask_the_question(dialog):
"Ask question based on the type of variables to ask"
# This is quite a hack, this thingy is written just to
# have access to local variables..
if vartype == 'y/n':
return dialog.yesno(comment, default)
elif vartype == 'n/y':
return dialog.noyes(comment, default)
elif vartype == 'choice':
defopt = None
if default is not None:
for i,(key,val) in enumerate(choices):
if key == default:
defopt = i
break
return dialog.choice(comment, choices, defopt)
else:
raise RuntimeError("Bad method: %s" % vartype)
 
f = file(input, 'r')
outf = file(output, 'w')
 
outf.write('#########################################\n')
outf.write('## AUTO-GENERATED FILE, DO NOT EDIT!!! ##\n')
outf.write('#########################################\n\n')
 
asked_names = []
 
comment = ''
default = None
choices = []
for line in f:
if line.startswith('%'):
res = re.match(r'^%\s*(?:\[(.*?)\])?\s*(.*)$', line)
if not res:
raise RuntimeError('Invalid command: %s' % line)
if res.group(1):
if not check_condition(res.group(1), defaults,
asked_names):
continue
args = res.group(2).strip().split(' ')
cmd = args[0].lower()
args = args[1:]
if cmd == 'saveas':
outf.write('%s = %s\n' % (args[1],defaults[args[0]]))
elif cmd == 'shellcmd':
varname = args[0]
args = args[1:]
for i,arg in enumerate(args):
if arg.startswith('$'):
args[i] = defaults[arg[1:]]
data,status = commands.getstatusoutput(' '.join(args))
if status:
raise RuntimeError('Error running: %s' % ' '.join(args))
outf.write('%s = %s\n' % (varname,data.strip()))
continue
if line.startswith('!'):
# Ask a question
res = re.search(r'!\s*(?:\[(.*?)\])?\s*([^\s]+)\s*\((.*)\)\s*$', line)
if not res:
raise RuntimeError("Weird line: %s" % line)
varname = res.group(2)
vartype = res.group(3)
 
default = defaults.get(varname,None)
if res.group(1):
if not check_condition(res.group(1), defaults,
asked_names):
if default is not None:
outf.write('#!# %s = %s\n' % (varname, default))
# Clear cumulated values
comment = ''
default = None
choices = []
continue
asked_names.append((varname,comment))
 
if default is None or not askonly or askonly == varname:
default = ask_the_question(dlg)
else:
default = ask_the_question(DefaultDialog(dlg))
 
outf.write('%s = %s\n' % (varname, default))
# Remeber the selected value
defaults[varname] = default
# Clear cumulated values
comment = ''
default = None
choices = []
continue
if line.startswith('@'):
# Add new line into the 'choice array'
res = re.match(r'@\s*(?:\[(.*?)\])?\s*"(.*?)"\s*(.*)$', line)
if not res:
raise RuntimeError("Bad line: %s" % line)
if res.group(1):
if not check_condition(res.group(1),defaults,
asked_names):
continue
choices.append((res.group(2), res.group(3)))
continue
 
# All other things print to output file
outf.write(line)
if re.match(r'^#[^#]', line):
# Last comment before question will be displayed to the user
comment = line[1:].strip()
elif line.startswith('## '):
# Set title of the dialog window
dlg.set_title(line[2:].strip())
 
outf.write('\n')
outf.write('REVISION = %s\n' % commands.getoutput('svnversion . 2> /dev/null'))
outf.write('TIMESTAMP = %s\n' % commands.getoutput('date "+%Y-%m-%d %H:%M:%S"'))
outf.close()
f.close()
return asked_names
 
def main():
defaults = {}
ask_names = []
defaults = {}
try:
dlg = Dialog()
except NotImplementedError:
dlg = NoDialog()
 
if len(sys.argv) >= 3 and sys.argv[2]=='default':
defmode = True
else:
defmode = False
 
# Default run will update the configuration file
# with newest options
if os.path.exists(OUTPUT):
read_defaults(OUTPUT, defaults)
 
# Get ARCH from command line if specified
if len(sys.argv) >= 4:
defaults['ARCH'] = sys.argv[3]
defaults['PLATFORM'] = sys.argv[3]
# Parse configuration file
parse_config(INPUT, ask_names)
# Get COMPILER from command line if specified
if len(sys.argv) >= 5:
defaults['COMPILER'] = sys.argv[4]
# Read defaults from previous run
if os.path.exists(MAKEFILE):
read_defaults(MAKEFILE, defaults)
# Get CONFIG_DEBUG from command line if specified
if len(sys.argv) >= 6:
defaults['CONFIG_DEBUG'] = sys.argv[5]
# Default mode: only check defaults and regenerate configuration
if ((len(sys.argv) >= 3) and (sys.argv[2] == 'default')):
if (check_choices(defaults, ask_names)):
create_output(MAKEFILE, MACROS, DEFS, defaults, ask_names)
return 0
# Check mode: only check defaults
if ((len(sys.argv) >= 3) and (sys.argv[2] == 'check')):
if (check_choices(defaults, ask_names)):
return 0
return 1
screen = xtui.screen_init()
try:
selname = None
position = None
while True:
# Cancel out all defaults which have to be deduced
for varname, vartype, name, choices, cond in ask_names:
if ((vartype == 'y') and (defaults.has_key(varname)) and (defaults[varname] == '*')):
defaults[varname] = None
options = []
opt2row = {}
cnt = 1
options.append(" --- Load preconfigured defaults ... ")
for varname, vartype, name, choices, cond in ask_names:
if ((cond) and (not check_condition(cond, defaults, ask_names))):
continue
if (varname == selname):
position = cnt
if (not defaults.has_key(varname)):
default = None
else:
default = defaults[varname]
if (vartype == 'choice'):
# Check if the default is an acceptable value
if ((default) and (not default in [choice[0] for choice in choices])):
default = None
defaults.pop(varname)
# If there is just one option, use it
if (len(choices) == 1):
defaults[varname] = choices[0][0]
continue
if (default == None):
options.append("? %s --> " % name)
else:
options.append(" %s [%s] --> " % (name, default))
elif (vartype == 'y'):
defaults[varname] = '*'
continue
elif (vartype == 'n'):
defaults[varname] = 'n'
continue
elif (vartype == 'y/n'):
if (default == None):
default = 'y'
defaults[varname] = default
options.append(" <%s> %s " % (yes_no(default), name))
elif (vartype == 'n/y'):
if (default == None):
default = 'n'
defaults[varname] = default
options.append(" <%s> %s " % (yes_no(default), name))
else:
raise RuntimeError("Unknown variable type: %s" % vartype)
opt2row[cnt] = (varname, vartype, name, choices)
cnt += 1
if (position >= options):
position = None
(button, value) = xtui.choice_window(screen, 'HelenOS configuration', 'Choose configuration option', options, position)
if (button == 'cancel'):
return 'Configuration canceled'
if (button == 'done'):
if (check_choices(defaults, ask_names)):
break
else:
xtui.error_dialog(screen, 'Error', 'Some options have still undefined values. These options are marked with the "?" sign.')
continue
if (value == 0):
read_preconfigured(PRECONF, MAKEFILE, screen, defaults)
position = 1
continue
position = None
if (not opt2row.has_key(value)):
raise RuntimeError("Error selecting value: %s" % value)
(selname, seltype, name, choices) = opt2row[value]
if (not defaults.has_key(selname)):
default = None
else:
default = defaults[selname]
if (seltype == 'choice'):
defaults[selname] = subchoice(screen, name, choices, default)
elif ((seltype == 'y/n') or (seltype == 'n/y')):
if (defaults[selname] == 'y'):
defaults[selname] = 'n'
else:
defaults[selname] = 'y'
finally:
xtui.screen_done(screen)
create_output(MAKEFILE, MACROS, DEFS, defaults, ask_names)
return 0
# Get MACHINE/IMAGE from command line if specified
if len(sys.argv) >= 7:
defaults['MACHINE'] = sys.argv[6]
defaults['IMAGE'] = sys.argv[6]
 
# Dry run only with defaults
varnames = parse_config(INPUT, TMPOUTPUT, DefaultDialog(dlg), defaults)
# If not in default mode, present selection of all possibilities
if not defmode:
defopt = 0
while 1:
# varnames contains variable names that were in the
# last question set
choices = [ (x[1],defaults[x[0]]) for x in varnames ]
res = dlg.menu('Configuration',choices,('save','Save'),defopt)
if res == 'save':
parse_config(INPUT, TMPOUTPUT, DefaultDialog(dlg), defaults)
break
# transfer description back to varname
for i,(vname,descr) in enumerate(varnames):
if res == descr:
defopt = i
break
# Ask the user a simple question, produce output
# as if the user answered all the other questions
# with default answer
varnames = parse_config(INPUT, TMPOUTPUT, dlg, defaults,
askonly=varnames[i][0])
if os.path.exists(OUTPUT):
os.unlink(OUTPUT)
os.rename(TMPOUTPUT, OUTPUT)
if not defmode and dlg.yesno('Rebuild everything?') == 'y':
os.execlp('make','make','clean','build')
 
if __name__ == '__main__':
sys.exit(main())
main()
/branches/network/version
1,42 → 1,8
#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
## This file defines the release information of HelenOS.
#
# The release string RELEASE consists of three or four components
# (version, patch level, sublevel and optionally an extra level).
#
# The NAME string is the code name of the given release.
#
 
VERSION = 0
PATCHLEVEL = 4
PATCHLEVEL = 3
SUBLEVEL = 0
#EXTRAVERSION = 0
NAME = Tartare
 
ifdef EXTRAVERSION
RELEASE = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL).$(EXTRAVERSION)
43,5 → 9,3
else
RELEASE = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)
endif
 
NAME = Sinister Valentine