Subversion Repositories HelenOS

Compare Revisions

Ignore whitespace Rev 4343 → Rev 4344

/branches/dynload/kernel/genarch/include/kbd/z8530.h
37,19 → 37,90
#ifndef KERN_Z8530_H_
#define KERN_Z8530_H_
 
#include <console/chardev.h>
#include <ipc/irq.h>
#include <ddi/irq.h>
#include <arch/types.h>
 
extern bool z8530_belongs_to_kernel;
#define WR0 0
#define WR1 1
#define WR2 2
#define WR3 3
#define WR4 4
#define WR5 5
#define WR6 6
#define WR7 7
#define WR8 8
#define WR9 9
#define WR10 10
#define WR11 11
#define WR12 12
#define WR13 13
#define WR14 14
#define WR15 15
 
extern void z8530_init(devno_t, uintptr_t, inr_t, cir_t, void *);
extern void z8530_poll(void);
extern void z8530_grab(void);
extern void z8530_release(void);
extern void z8530_interrupt(void);
extern char z8530_key_read(chardev_t *);
extern irq_ownership_t z8530_claim(void *);
#define RR0 0
#define RR1 1
#define RR2 2
#define RR3 3
#define RR8 8
#define RR10 10
#define RR12 12
#define RR13 13
#define RR14 14
#define RR15 15
 
/** Reset pending TX interrupt. */
#define WR0_TX_IP_RST (0x5 << 3)
#define WR0_ERR_RST (0x6 << 3)
 
/** Receive Interrupts Disabled. */
#define WR1_RID (0x0 << 3)
/** Receive Interrupt on First Character or Special Condition. */
#define WR1_RIFCSC (0x1 << 3)
/** Interrupt on All Receive Characters or Special Conditions. */
#define WR1_IARCSC (0x2 << 3)
/** Receive Interrupt on Special Condition. */
#define WR1_RISC (0x3 << 3)
/** Parity Is Special Condition. */
#define WR1_PISC (0x1 << 2)
 
/** Rx Enable. */
#define WR3_RX_ENABLE (0x1 << 0)
/** 8-bits per character. */
#define WR3_RX8BITSCH (0x3 << 6)
 
/** Master Interrupt Enable. */
#define WR9_MIE (0x1 << 3)
 
/** Receive Character Available. */
#define RR0_RCA (0x1 << 0)
 
/** z8530's registers. */
struct z8530 {
union {
ioport8_t ctl_b;
ioport8_t status_b;
} __attribute__ ((packed));
uint8_t pad1;
ioport8_t data_b;
uint8_t pad2;
union {
ioport8_t ctl_a;
ioport8_t status_a;
} __attribute__ ((packed));
uint8_t pad3;
ioport8_t data_a;
} __attribute__ ((packed));
typedef struct z8530 z8530_t;
 
/** Structure representing the z8530 device. */
typedef struct {
devno_t devno;
irq_t irq;
z8530_t *z8530;
} z8530_instance_t;
 
extern bool z8530_init(z8530_t *, devno_t, inr_t, cir_t, void *);
extern irq_ownership_t z8530_claim(irq_t *);
extern void z8530_irq_handler(irq_t *);
 
#endif
/branches/dynload/kernel/genarch/include/kbd/ns16550.h
37,30 → 37,10
#ifndef KERN_NS16550_H_
#define KERN_NS16550_H_
 
#include <console/chardev.h>
#include <ddi/irq.h>
#include <ipc/irq.h>
 
extern void ns16550_init(devno_t, uintptr_t, inr_t, cir_t, void *);
extern void ns16550_poll(void);
extern void ns16550_grab(void);
extern void ns16550_release(void);
extern char ns16550_key_read(chardev_t *);
extern irq_ownership_t ns16550_claim(void *);
extern void ns16550_irq_handler(irq_t *);
 
#include <arch/types.h>
#include <arch/drivers/kbd.h>
 
/* NS16550 registers */
#define RBR_REG 0 /** Receiver Buffer Register. */
#define IER_REG 1 /** Interrupt Enable Register. */
#define IIR_REG 2 /** Interrupt Ident Register (read). */
#define FCR_REG 2 /** FIFO control register (write). */
#define LCR_REG 3 /** Line Control register. */
#define MCR_REG 4 /** Modem Control Register. */
#define LSR_REG 5 /** Line Status Register. */
 
#define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */
 
#define LCR_DLAB 0x80 /** Divisor Latch Access bit. */
67,67 → 47,31
 
#define MCR_OUT2 0x08 /** OUT2. */
 
/** NS16550 registers. */
struct ns16550 {
ioport8_t rbr; /**< Receiver Buffer Register. */
ioport8_t ier; /**< Interrupt Enable Register. */
union {
ioport8_t iir; /**< Interrupt Ident Register (read). */
ioport8_t fcr; /**< FIFO control register (write). */
} __attribute__ ((packed));
ioport8_t lcr; /**< Line Control register. */
ioport8_t mcr; /**< Modem Control Register. */
ioport8_t lsr; /**< Line Status Register. */
} __attribute__ ((packed));
typedef struct ns16550 ns16550_t;
 
/** Structure representing the ns16550 device. */
typedef struct {
typedef struct ns16550_instance {
devno_t devno;
/** Memory mapped registers of the ns16550. */
volatile ioport_t io_port;
} ns16550_t;
ns16550_t *ns16550;
irq_t irq;
} ns16550_instance_t;
 
static inline uint8_t ns16550_rbr_read(ns16550_t *dev)
{
return pio_read_8(dev->io_port + RBR_REG);
}
static inline void ns16550_rbr_write(ns16550_t *dev, uint8_t v)
{
pio_write_8(dev->io_port + RBR_REG, v);
}
extern bool ns16550_init(ns16550_t *, devno_t, inr_t, cir_t, void *);
extern irq_ownership_t ns16550_claim(irq_t *);
extern void ns16550_irq_handler(irq_t *);
 
static inline uint8_t ns16550_ier_read(ns16550_t *dev)
{
return pio_read_8(dev->io_port + IER_REG);
}
 
static inline void ns16550_ier_write(ns16550_t *dev, uint8_t v)
{
pio_write_8(dev->io_port + IER_REG, v);
}
 
static inline uint8_t ns16550_iir_read(ns16550_t *dev)
{
return pio_read_8(dev->io_port + IIR_REG);
}
 
static inline void ns16550_fcr_write(ns16550_t *dev, uint8_t v)
{
pio_write_8(dev->io_port + FCR_REG, v);
}
 
static inline uint8_t ns16550_lcr_read(ns16550_t *dev)
{
return pio_read_8(dev->io_port + LCR_REG);
}
 
static inline void ns16550_lcr_write(ns16550_t *dev, uint8_t v)
{
pio_write_8(dev->io_port + LCR_REG, v);
}
 
static inline uint8_t ns16550_lsr_read(ns16550_t *dev)
{
return pio_read_8(dev->io_port + LSR_REG);
}
 
static inline uint8_t ns16550_mcr_read(ns16550_t *dev)
{
return pio_read_8(dev->io_port + MCR_REG);
}
 
static inline void ns16550_mcr_write(ns16550_t *dev, uint8_t v)
{
pio_write_8(dev->io_port + MCR_REG, v);
}
 
#endif
 
/** @}
/branches/dynload/kernel/genarch/include/kbd/i8042.h
35,15 → 35,25
#ifndef KERN_I8042_H_
#define KERN_I8042_H_
 
#include <ddi/irq.h>
#include <arch/types.h>
#include <console/chardev.h>
#include <typedefs.h>
 
extern void i8042_init(devno_t kbd_devno, inr_t kbd_inr, devno_t mouse_devno, inr_t mouse_inr);
extern void i8042_poll(void);
extern void i8042_grab(void);
extern void i8042_release(void);
extern char i8042_key_read(chardev_t *d);
struct i8042 {
ioport8_t data;
uint8_t pad[3];
ioport8_t status;
} __attribute__ ((packed));
typedef struct i8042 i8042_t;
 
typedef struct i8042_instance {
devno_t devno;
irq_t irq;
i8042_t *i8042;
} i8042_instance_t;
 
extern bool i8042_init(i8042_t *, devno_t, inr_t);
 
#endif
 
/** @}
/branches/dynload/kernel/genarch/include/drivers/legacy/ia32/io.h
0,0 → 1,51
/*
* Copyright (c) 2009 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
* @{
*/
/** @file
* @brief This file contains definitions used by architectures with the
* ia32 legacy I/O space (i.e. ia32, amd64 and ia64).
*/
 
#ifndef KERN_LEGACY_IA32_IO_H
#define KERN_LEGACY_IA32_IO_H
 
#include <arch/types.h>
 
#define I8042_BASE ((ioport8_t *) 0x60)
#define EGA_BASE ((ioport8_t *) 0x3d4)
#define NS16550_BASE ((ioport8_t *) 0x3f8)
 
#define EGA_VIDEORAM 0xb8000
 
#endif
 
/** @}
*/
/branches/dynload/kernel/genarch/include/drivers/ega/ega.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch_drivers
/** @addtogroup genarch_drivers
* @{
*/
/** @file
37,16 → 37,17
 
#include <arch/types.h>
 
#define ROW 80
#define ROWS 25
#define SCREEN (ROW * ROWS)
#define EGA_COLS 80
#define EGA_ROWS 25
#define EGA_SCREEN (EGA_COLS * EGA_ROWS)
#define EGA_VRAM_SIZE (2 * EGA_SCREEN)
 
/* EGA device registers. */
#define EGA_INDEX_REG 0
#define EGA_DATA_REG 1
#define EGA_INDEX_REG 0
#define EGA_DATA_REG 1
 
extern void ega_redraw(void);
extern void ega_init(ioport_t, uintptr_t);
extern void ega_init(ioport8_t *, uintptr_t);
 
#endif
 
/branches/dynload/kernel/genarch/src/kbd/ns16550.c
1,5 → 1,5
/*
* Copyright (c) 2001-2006 Jakub Jermar
* Copyright (c) 2009 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
40,7 → 40,6
#include <genarch/kbd/scanc_sun.h>
#include <arch/drivers/kbd.h>
#include <ddi/irq.h>
#include <ipc/irq.h>
#include <cpu.h>
#include <arch/asm.h>
#include <arch.h>
48,17 → 47,11
#include <console/console.h>
#include <interrupt.h>
#include <arch/interrupt.h>
#include <sysinfo/sysinfo.h>
#include <synch/spinlock.h>
#include <mm/slab.h>
 
#define LSR_DATA_READY 0x01
 
/** Structure representing the ns16550. */
static ns16550_t ns16550;
 
/** Structure for ns16550's IRQ. */
static irq_t ns16550_irq;
 
/*
* These codes read from ns16550 data register are silently ignored.
*/
70,95 → 63,53
static chardev_operations_t ops = {
.suspend = ns16550_suspend,
.resume = ns16550_resume,
.read = ns16550_key_read
};
 
void ns16550_interrupt(void);
 
/** Initialize keyboard and service interrupts using kernel routine */
void ns16550_grab(void)
{
ipl_t ipl = interrupts_disable();
 
ns16550_ier_write(&ns16550, IER_ERBFI); /* enable receiver interrupt */
while (ns16550_lsr_read(&ns16550) & LSR_DATA_READY)
(void) ns16550_rbr_read(&ns16550);
 
spinlock_lock(&ns16550_irq.lock);
ns16550_irq.notif_cfg.notify = false;
spinlock_unlock(&ns16550_irq.lock);
interrupts_restore(ipl);
}
 
/** Resume the former interrupt vector */
void ns16550_release(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&ns16550_irq.lock);
if (ns16550_irq.notif_cfg.answerbox)
ns16550_irq.notif_cfg.notify = true;
spinlock_unlock(&ns16550_irq.lock);
interrupts_restore(ipl);
}
 
/** Initialize ns16550.
*
* @param dev Addrress of the beginning of the device in I/O space.
* @param devno Device number.
* @param port Virtual/IO address of device's registers.
* @param inr Interrupt number.
* @param cir Clear interrupt function.
* @param cir_arg First argument to cir.
*
* @return True on success, false on failure.
*/
void
ns16550_init(devno_t devno, ioport_t port, inr_t inr, cir_t cir, void *cir_arg)
bool
ns16550_init(ns16550_t *dev, devno_t devno, inr_t inr, cir_t cir, void *cir_arg)
{
ns16550_instance_t *instance;
 
chardev_initialize("ns16550_kbd", &kbrd, &ops);
stdin = &kbrd;
ns16550.devno = devno;
ns16550.io_port = port;
instance = malloc(sizeof(ns16550_instance_t), FRAME_ATOMIC);
if (!instance)
return false;
 
instance->devno = devno;
instance->ns16550 = dev;
irq_initialize(&ns16550_irq);
ns16550_irq.devno = devno;
ns16550_irq.inr = inr;
ns16550_irq.claim = ns16550_claim;
ns16550_irq.handler = ns16550_irq_handler;
ns16550_irq.cir = cir;
ns16550_irq.cir_arg = cir_arg;
irq_register(&ns16550_irq);
irq_initialize(&instance->irq);
instance->irq.devno = devno;
instance->irq.inr = inr;
instance->irq.claim = ns16550_claim;
instance->irq.handler = ns16550_irq_handler;
instance->irq.instance = instance;
instance->irq.cir = cir;
instance->irq.cir_arg = cir_arg;
irq_register(&instance->irq);
 
while ((pio_read_8(&dev->lsr) & LSR_DATA_READY))
(void) pio_read_8(&dev->rbr);
while ((ns16550_lsr_read(&ns16550) & LSR_DATA_READY))
ns16550_rbr_read(&ns16550);
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
sysinfo_set_item_val("kbd.devno", NULL, devno);
sysinfo_set_item_val("kbd.inr", NULL, inr);
sysinfo_set_item_val("kbd.address.virtual", NULL, port);
sysinfo_set_item_val("kbd.port", NULL, port);
/* Enable interrupts */
ns16550_ier_write(&ns16550, IER_ERBFI);
ns16550_mcr_write(&ns16550, MCR_OUT2);
pio_write_8(&dev->ier, IER_ERBFI);
pio_write_8(&dev->mcr, MCR_OUT2);
uint8_t c;
// This switches rbr & ier to mode when accept baudrate constant
c = ns16550_lcr_read(&ns16550);
ns16550_lcr_write(&ns16550, 0x80 | c);
ns16550_rbr_write(&ns16550, 0x0c);
ns16550_ier_write(&ns16550, 0x00);
ns16550_lcr_write(&ns16550, c);
ns16550_grab();
return true;
}
 
/** Process ns16550 interrupt. */
void ns16550_interrupt(void)
{
ns16550_poll();
}
 
/* Called from getc(). */
void ns16550_resume(chardev_t *d)
{
169,37 → 120,26
{
}
 
 
char ns16550_key_read(chardev_t *d)
irq_ownership_t ns16550_claim(irq_t *irq)
{
char ch;
ns16550_instance_t *ns16550_instance = irq->instance;
ns16550_t *dev = ns16550_instance->ns16550;
 
while(!(ch = active_read_buff_read())) {
uint8_t x;
while (!(ns16550_lsr_read(&ns16550) & LSR_DATA_READY));
x = ns16550_rbr_read(&ns16550);
if (x != IGNORE_CODE) {
if (x & KEY_RELEASE)
key_released(x ^ KEY_RELEASE);
else
active_read_key_pressed(x);
}
}
return ch;
if (pio_read_8(&dev->lsr) & LSR_DATA_READY)
return IRQ_ACCEPT;
else
return IRQ_DECLINE;
}
 
/** Poll for key press and release events.
*
* This function can be used to implement keyboard polling.
*/
void ns16550_poll(void)
void ns16550_irq_handler(irq_t *irq)
{
while (ns16550_lsr_read(&ns16550) & LSR_DATA_READY) {
ns16550_instance_t *ns16550_instance = irq->instance;
ns16550_t *dev = ns16550_instance->ns16550;
 
if (pio_read_8(&dev->lsr) & LSR_DATA_READY) {
uint8_t x;
x = ns16550_rbr_read(&ns16550);
x = pio_read_8(&dev->rbr);
if (x != IGNORE_CODE) {
if (x & KEY_RELEASE)
208,20 → 148,8
key_pressed(x);
}
}
}
 
irq_ownership_t ns16550_claim(void *instance)
{
return (ns16550_lsr_read(&ns16550) & LSR_DATA_READY);
}
 
void ns16550_irq_handler(irq_t *irq)
{
if (irq->notif_cfg.notify && irq->notif_cfg.answerbox)
ipc_irq_send_notif(irq);
else
ns16550_interrupt();
}
 
/** @}
*/
/branches/dynload/kernel/genarch/src/kbd/i8042.c
1,5 → 1,5
/*
* Copyright (c) 2001-2004 Jakub Jermar
* Copyright (c) 2009 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
41,7 → 41,7
#include <genarch/kbd/key.h>
#include <genarch/kbd/scanc.h>
#include <genarch/kbd/scanc_pc.h>
#include <arch/drivers/i8042.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <cpu.h>
#include <arch/asm.h>
#include <arch.h>
48,8 → 48,6
#include <console/chardev.h>
#include <console/console.h>
#include <interrupt.h>
#include <sysinfo/sysinfo.h>
#include <ipc/irq.h>
 
/* Keyboard commands. */
#define KBD_ENABLE 0xf4
75,8 → 73,8
#define i8042_COMMAND 0x69
 
#define i8042_BUFFER_FULL_MASK 0x01
#define i8042_WAIT_MASK 0x02
#define i8042_MOUSE_DATA 0x20
#define i8042_WAIT_MASK 0x02
#define i8042_MOUSE_DATA 0x20
 
static void i8042_suspend(chardev_t *);
static void i8042_resume(chardev_t *);
84,115 → 82,72
static chardev_operations_t ops = {
.suspend = i8042_suspend,
.resume = i8042_resume,
.read = i8042_key_read
};
 
/** Structure for i8042's IRQ. */
static irq_t i8042_kbd_irq;
static irq_t i8042_mouse_irq;
 
void i8042_grab(void)
static irq_ownership_t i8042_claim(irq_t *irq)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&i8042_kbd_irq.lock);
i8042_kbd_irq.notif_cfg.notify = false;
spinlock_unlock(&i8042_kbd_irq.lock);
spinlock_lock(&i8042_mouse_irq.lock);
i8042_mouse_irq.notif_cfg.notify = false;
spinlock_unlock(&i8042_mouse_irq.lock);
interrupts_restore(ipl);
i8042_instance_t *i8042_instance = irq->instance;
i8042_t *dev = i8042_instance->i8042;
if (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK)
return IRQ_ACCEPT;
else
return IRQ_DECLINE;
}
 
void i8042_release(void)
static void i8042_irq_handler(irq_t *irq)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&i8042_kbd_irq.lock);
if (i8042_kbd_irq.notif_cfg.answerbox)
i8042_kbd_irq.notif_cfg.notify = true;
spinlock_unlock(&i8042_kbd_irq.lock);
spinlock_lock(&i8042_mouse_irq.lock);
if (i8042_mouse_irq.notif_cfg.answerbox)
i8042_mouse_irq.notif_cfg.notify = true;
spinlock_unlock(&i8042_mouse_irq.lock);
interrupts_restore(ipl);
}
i8042_instance_t *instance = irq->instance;
i8042_t *dev = instance->i8042;
 
static irq_ownership_t i8042_claim(void *instance)
{
return IRQ_ACCEPT;
}
 
static void i8042_irq_handler(irq_t *irq)
{
if (irq->notif_cfg.notify && irq->notif_cfg.answerbox)
ipc_irq_send_notif(irq);
else {
uint8_t data;
uint8_t status;
uint8_t data;
uint8_t status;
while (((status = i8042_status_read()) & i8042_BUFFER_FULL_MASK)) {
data = i8042_data_read();
if (((status = pio_read_8(&dev->status)) & i8042_BUFFER_FULL_MASK)) {
data = pio_read_8(&dev->data);
if ((status & i8042_MOUSE_DATA))
continue;
if ((status & i8042_MOUSE_DATA))
return;
 
if (data & KEY_RELEASE)
key_released(data ^ KEY_RELEASE);
else
key_pressed(data);
}
if (data & KEY_RELEASE)
key_released(data ^ KEY_RELEASE);
else
key_pressed(data);
}
}
 
/** Initialize i8042. */
void i8042_init(devno_t kbd_devno, inr_t kbd_inr, devno_t mouse_devno, inr_t mouse_inr)
bool
i8042_init(i8042_t *dev, devno_t devno, inr_t inr)
{
i8042_instance_t *instance;
 
chardev_initialize("i8042_kbd", &kbrd, &ops);
stdin = &kbrd;
irq_initialize(&i8042_kbd_irq);
i8042_kbd_irq.devno = kbd_devno;
i8042_kbd_irq.inr = kbd_inr;
i8042_kbd_irq.claim = i8042_claim;
i8042_kbd_irq.handler = i8042_irq_handler;
irq_register(&i8042_kbd_irq);
instance = malloc(sizeof(i8042_instance_t), FRAME_ATOMIC);
if (!instance)
return false;
irq_initialize(&i8042_mouse_irq);
i8042_mouse_irq.devno = mouse_devno;
i8042_mouse_irq.inr = mouse_inr;
i8042_mouse_irq.claim = i8042_claim;
i8042_mouse_irq.handler = i8042_irq_handler;
irq_register(&i8042_mouse_irq);
instance->devno = devno;
instance->i8042 = dev;
trap_virtual_enable_irqs(1 << kbd_inr);
trap_virtual_enable_irqs(1 << mouse_inr);
irq_initialize(&instance->irq);
instance->irq.devno = devno;
instance->irq.inr = inr;
instance->irq.claim = i8042_claim;
instance->irq.handler = i8042_irq_handler;
instance->irq.instance = instance;
irq_register(&instance->irq);
trap_virtual_enable_irqs(1 << inr);
/*
* Clear input buffer.
* Number of iterations is limited to prevent infinite looping.
*/
int i;
for (i = 0; (i8042_status_read() & i8042_BUFFER_FULL_MASK) && i < 100; i++) {
i8042_data_read();
}
while (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK)
(void) pio_read_8(&dev->data);
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.devno", NULL, kbd_devno);
sysinfo_set_item_val("kbd.inr", NULL, kbd_inr);
#ifdef KBD_LEGACY
sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
#endif
sysinfo_set_item_val("mouse", NULL, true);
sysinfo_set_item_val("mouse.devno", NULL, mouse_devno);
sysinfo_set_item_val("mouse.inr", NULL, mouse_inr);
i8042_grab();
return true;
}
 
/* Called from getc(). */
205,40 → 160,5
{
}
 
char i8042_key_read(chardev_t *d)
{
char ch;
while (!(ch = active_read_buff_read())) {
uint8_t x;
while (!(i8042_status_read() & i8042_BUFFER_FULL_MASK));
x = i8042_data_read();
if (x & KEY_RELEASE)
key_released(x ^ KEY_RELEASE);
else
active_read_key_pressed(x);
}
return ch;
}
 
/** Poll for key press and release events.
*
* This function can be used to implement keyboard polling.
*/
void i8042_poll(void)
{
uint8_t x;
while (((x = i8042_status_read() & i8042_BUFFER_FULL_MASK))) {
x = i8042_data_read();
if (x & KEY_RELEASE)
key_released(x ^ KEY_RELEASE);
else
key_pressed(x);
}
}
 
/** @}
*/
/branches/dynload/kernel/genarch/src/kbd/z8530.c
1,5 → 1,5
/*
* Copyright (c) 2001-2004 Jakub Jermar
* Copyright (c) 2009 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
31,7 → 31,7
*/
/**
* @file
* @brief Zilog 8530 serial port / keyboard driver.
* @brief Zilog 8530 serial port driver.
*/
 
#include <genarch/kbd/z8530.h>
38,28 → 38,38
#include <genarch/kbd/key.h>
#include <genarch/kbd/scanc.h>
#include <genarch/kbd/scanc_sun.h>
#include <arch/drivers/z8530.h>
#include <arch/drivers/kbd.h>
#include <console/console.h>
#include <console/chardev.h>
#include <ddi/irq.h>
#include <ipc/irq.h>
#include <arch/interrupt.h>
#include <arch/drivers/kbd.h>
#include <cpu.h>
#include <arch/asm.h>
#include <arch.h>
#include <console/chardev.h>
#include <console/console.h>
#include <interrupt.h>
#include <sysinfo/sysinfo.h>
#include <print.h>
#include <mm/slab.h>
 
static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val)
{
/*
* Registers 8-15 will automatically issue the Point High
* command as their bit 3 is 1.
*/
pio_write_8(ctl, reg); /* select register */
pio_write_8(ctl, val); /* write value */
}
 
static inline uint8_t z8530_read(ioport8_t *ctl, uint8_t reg)
{
/*
* Registers 8-15 will automatically issue the Point High
* command as their bit 3 is 1.
*/
pio_write_8(ctl, reg); /* select register */
return pio_read_8(ctl);
}
 
/*
* These codes read from z8530 data register are silently ignored.
*/
#define IGNORE_CODE 0x7f /* all keys up */
 
static z8530_t z8530; /**< z8530 device structure. */
static irq_t z8530_irq; /**< z8530's IRQ. */
 
static void z8530_suspend(chardev_t *);
static void z8530_resume(chardev_t *);
 
66,86 → 76,54
static chardev_operations_t ops = {
.suspend = z8530_suspend,
.resume = z8530_resume,
.read = z8530_key_read
};
 
/** Initialize keyboard and service interrupts using kernel routine. */
void z8530_grab(void)
/** Initialize z8530. */
bool
z8530_init(z8530_t *dev, devno_t devno, inr_t inr, cir_t cir, void *cir_arg)
{
ipl_t ipl = interrupts_disable();
z8530_instance_t *instance;
 
(void) z8530_read_a(&z8530, RR8);
chardev_initialize("z8530_kbd", &kbrd, &ops);
stdin = &kbrd;
 
instance = malloc(sizeof(z8530_instance_t), FRAME_ATOMIC);
if (!instance)
return false;
 
instance->devno = devno;
instance->z8530 = dev;
 
irq_initialize(&instance->irq);
instance->irq.devno = devno;
instance->irq.inr = inr;
instance->irq.claim = z8530_claim;
instance->irq.handler = z8530_irq_handler;
instance->irq.instance = instance;
instance->irq.cir = cir;
instance->irq.cir_arg = cir_arg;
irq_register(&instance->irq);
 
(void) z8530_read(&dev->ctl_a, RR8);
 
/*
* Clear any pending TX interrupts or we never manage
* to set FHC UART interrupt state to idle.
*/
z8530_write_a(&z8530, WR0, WR0_TX_IP_RST);
z8530_write(&dev->ctl_a, WR0, WR0_TX_IP_RST);
 
/* interrupt on all characters */
z8530_write_a(&z8530, WR1, WR1_IARCSC);
z8530_write(&dev->ctl_a, WR1, WR1_IARCSC);
 
/* 8 bits per character and enable receiver */
z8530_write_a(&z8530, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE);
z8530_write(&dev->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE);
/* Master Interrupt Enable. */
z8530_write_a(&z8530, WR9, WR9_MIE);
spinlock_lock(&z8530_irq.lock);
z8530_irq.notif_cfg.notify = false;
spinlock_unlock(&z8530_irq.lock);
interrupts_restore(ipl);
}
z8530_write(&dev->ctl_a, WR9, WR9_MIE);
 
/** Resume the former IPC notification behavior. */
void z8530_release(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&z8530_irq.lock);
if (z8530_irq.notif_cfg.answerbox)
z8530_irq.notif_cfg.notify = true;
spinlock_unlock(&z8530_irq.lock);
interrupts_restore(ipl);
return true;
}
 
/** Initialize z8530. */
void
z8530_init(devno_t devno, uintptr_t vaddr, inr_t inr, cir_t cir, void *cir_arg)
{
chardev_initialize("z8530_kbd", &kbrd, &ops);
stdin = &kbrd;
 
z8530.devno = devno;
z8530.reg = (uint8_t *) vaddr;
 
irq_initialize(&z8530_irq);
z8530_irq.devno = devno;
z8530_irq.inr = inr;
z8530_irq.claim = z8530_claim;
z8530_irq.handler = z8530_irq_handler;
z8530_irq.cir = cir;
z8530_irq.cir_arg = cir_arg;
irq_register(&z8530_irq);
 
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.type", NULL, KBD_Z8530);
sysinfo_set_item_val("kbd.devno", NULL, devno);
sysinfo_set_item_val("kbd.inr", NULL, inr);
sysinfo_set_item_val("kbd.address.virtual", NULL, vaddr);
 
z8530_grab();
}
 
/** Process z8530 interrupt.
*
* @param n Interrupt vector.
* @param istate Interrupted state.
*/
void z8530_interrupt(void)
{
z8530_poll();
}
 
/* Called from getc(). */
void z8530_resume(chardev_t *d)
{
156,35 → 134,22
{
}
 
char z8530_key_read(chardev_t *d)
irq_ownership_t z8530_claim(irq_t *irq)
{
char ch;
z8530_instance_t *instance = irq->instance;
z8530_t *dev = instance->z8530;
 
while(!(ch = active_read_buff_read())) {
uint8_t x;
while (!(z8530_read_a(&z8530, RR0) & RR0_RCA))
;
x = z8530_read_a(&z8530, RR8);
if (x != IGNORE_CODE) {
if (x & KEY_RELEASE)
key_released(x ^ KEY_RELEASE);
else
active_read_key_pressed(x);
}
}
return ch;
return (z8530_read(&dev->ctl_a, RR0) & RR0_RCA);
}
 
/** Poll for key press and release events.
*
* This function can be used to implement keyboard polling.
*/
void z8530_poll(void)
void z8530_irq_handler(irq_t *irq)
{
z8530_instance_t *instance = irq->instance;
z8530_t *dev = instance->z8530;
uint8_t x;
 
while (z8530_read_a(&z8530, RR0) & RR0_RCA) {
x = z8530_read_a(&z8530, RR8);
if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) {
x = z8530_read(&dev->ctl_a, RR8);
if (x != IGNORE_CODE) {
if (x & KEY_RELEASE)
key_released(x ^ KEY_RELEASE);
194,18 → 159,5
}
}
 
irq_ownership_t z8530_claim(void *instance)
{
return (z8530_read_a(&z8530, RR0) & RR0_RCA);
}
 
void z8530_irq_handler(irq_t *irq)
{
if (irq->notif_cfg.notify && irq->notif_cfg.answerbox)
ipc_irq_send_notif(irq);
else
z8530_interrupt();
}
 
/** @}
*/
/branches/dynload/kernel/genarch/src/drivers/ega/ega.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup genarch_drivers
/** @addtogroup genarch_drivers
* @{
*/
/**
58,7 → 58,7
static uint32_t ega_cursor;
static uint8_t *videoram;
static uint8_t *backbuf;
static ioport_t ega_base;
static ioport8_t *ega_base;
 
chardev_t ega_console;
 
67,26 → 67,50
*/
static void ega_check_cursor(void)
{
if (ega_cursor < SCREEN)
if (ega_cursor < EGA_SCREEN)
return;
 
memmove((void *) videoram, (void *) (videoram + ROW * 2),
(SCREEN - ROW) * 2);
memmove((void *) backbuf, (void *) (backbuf + ROW * 2),
(SCREEN - ROW) * 2);
memsetw(videoram + (SCREEN - ROW) * 2, ROW, 0x0720);
memsetw(backbuf + (SCREEN - ROW) * 2, ROW, 0x0720);
ega_cursor = ega_cursor - ROW;
memmove((void *) videoram, (void *) (videoram + EGA_COLS * 2),
(EGA_SCREEN - EGA_COLS) * 2);
memmove((void *) backbuf, (void *) (backbuf + EGA_COLS * 2),
(EGA_SCREEN - EGA_COLS) * 2);
memsetw(videoram + (EGA_SCREEN - EGA_COLS) * 2, EGA_COLS, 0x0720);
memsetw(backbuf + (EGA_SCREEN - EGA_COLS) * 2, EGA_COLS, 0x0720);
ega_cursor = ega_cursor - EGA_COLS;
}
 
static void ega_show_cursor(void)
{
pio_write_8(ega_base + EGA_INDEX_REG, 0x0a);
uint8_t stat = pio_read_8(ega_base + EGA_DATA_REG);
pio_write_8(ega_base + EGA_INDEX_REG, 0x0a);
pio_write_8(ega_base + EGA_DATA_REG, stat & (~(1 << 5)));
}
 
static void ega_move_cursor(void)
{
pio_write_8(ega_base + EGA_INDEX_REG, 0xe);
pio_write_8(ega_base + EGA_INDEX_REG, 0x0e);
pio_write_8(ega_base + EGA_DATA_REG, (uint8_t) ((ega_cursor >> 8) & 0xff));
pio_write_8(ega_base + EGA_INDEX_REG, 0xf);
pio_write_8(ega_base + EGA_DATA_REG, (uint8_t) (ega_cursor & 0xff));
pio_write_8(ega_base + EGA_INDEX_REG, 0x0f);
pio_write_8(ega_base + EGA_DATA_REG, (uint8_t) (ega_cursor & 0xff));
}
 
static void ega_sync_cursor(void)
{
pio_write_8(ega_base + EGA_INDEX_REG, 0x0e);
uint8_t hi = pio_read_8(ega_base + EGA_DATA_REG);
pio_write_8(ega_base + EGA_INDEX_REG, 0x0f);
uint8_t lo = pio_read_8(ega_base + EGA_DATA_REG);
ega_cursor = (hi << 8) | lo;
if ((ega_cursor % EGA_COLS) != 0)
ega_cursor = (ega_cursor + EGA_COLS) - ega_cursor % EGA_COLS;
ega_check_cursor();
ega_move_cursor();
ega_show_cursor();
}
 
static void ega_display_char(char ch, bool silent)
{
backbuf[ega_cursor * 2] = ch;
104,13 → 128,13
switch (ch) {
case '\n':
ega_cursor = (ega_cursor + ROW) - ega_cursor % ROW;
ega_cursor = (ega_cursor + EGA_COLS) - ega_cursor % EGA_COLS;
break;
case '\t':
ega_cursor = (ega_cursor + 8) - ega_cursor % 8;
break;
case '\b':
if (ega_cursor % ROW)
if (ega_cursor % EGA_COLS)
ega_cursor--;
break;
default:
131,21 → 155,20
.write = ega_putchar
};
 
void ega_init(ioport_t base, uintptr_t videoram_phys)
void ega_init(ioport8_t *base, uintptr_t videoram_phys)
{
/* Initialize the software structure. */
/* Initialize the software structure. */
ega_base = base;
backbuf = (uint8_t *) malloc(SCREEN * 2, 0);
backbuf = (uint8_t *) malloc(EGA_VRAM_SIZE, 0);
if (!backbuf)
panic("Unable to allocate backbuffer.");
videoram = (uint8_t *) hw_map(videoram_phys, SCREEN * 2);
videoram = (uint8_t *) hw_map(videoram_phys, EGA_VRAM_SIZE);
/* Clear the screen and set the cursor position. */
memsetw(videoram, SCREEN, 0x0720);
memsetw(backbuf, SCREEN, 0x0720);
ega_move_cursor();
/* Synchronize the back buffer and cursor position. */
memcpy(backbuf, videoram, EGA_VRAM_SIZE);
ega_sync_cursor();
chardev_initialize("ega_out", &ega_console, &ega_ops);
stdout = &ega_console;
152,8 → 175,8
sysinfo_set_item_val("fb", NULL, true);
sysinfo_set_item_val("fb.kind", NULL, 2);
sysinfo_set_item_val("fb.width", NULL, ROW);
sysinfo_set_item_val("fb.height", NULL, ROWS);
sysinfo_set_item_val("fb.width", NULL, EGA_COLS);
sysinfo_set_item_val("fb.height", NULL, EGA_ROWS);
sysinfo_set_item_val("fb.blinking", NULL, true);
sysinfo_set_item_val("fb.address.physical", NULL, videoram_phys);
}
160,8 → 183,9
 
void ega_redraw(void)
{
memcpy(videoram, backbuf, SCREEN * 2);
memcpy(videoram, backbuf, EGA_VRAM_SIZE);
ega_move_cursor();
ega_show_cursor();
}
 
/** @}