37,30 → 37,10 |
#ifndef KERN_NS16550_H_ |
#define KERN_NS16550_H_ |
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#include <console/chardev.h> |
#include <ddi/irq.h> |
#include <ipc/irq.h> |
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extern void ns16550_init(devno_t, uintptr_t, inr_t, cir_t, void *); |
extern void ns16550_poll(void); |
extern void ns16550_grab(void); |
extern void ns16550_release(void); |
extern char ns16550_key_read(chardev_t *); |
extern irq_ownership_t ns16550_claim(void *); |
extern void ns16550_irq_handler(irq_t *); |
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#include <arch/types.h> |
#include <arch/drivers/kbd.h> |
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/* NS16550 registers */ |
#define RBR_REG 0 /** Receiver Buffer Register. */ |
#define IER_REG 1 /** Interrupt Enable Register. */ |
#define IIR_REG 2 /** Interrupt Ident Register (read). */ |
#define FCR_REG 2 /** FIFO control register (write). */ |
#define LCR_REG 3 /** Line Control register. */ |
#define MCR_REG 4 /** Modem Control Register. */ |
#define LSR_REG 5 /** Line Status Register. */ |
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#define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */ |
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#define LCR_DLAB 0x80 /** Divisor Latch Access bit. */ |
67,67 → 47,31 |
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#define MCR_OUT2 0x08 /** OUT2. */ |
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/** NS16550 registers. */ |
struct ns16550 { |
ioport8_t rbr; /**< Receiver Buffer Register. */ |
ioport8_t ier; /**< Interrupt Enable Register. */ |
union { |
ioport8_t iir; /**< Interrupt Ident Register (read). */ |
ioport8_t fcr; /**< FIFO control register (write). */ |
} __attribute__ ((packed)); |
ioport8_t lcr; /**< Line Control register. */ |
ioport8_t mcr; /**< Modem Control Register. */ |
ioport8_t lsr; /**< Line Status Register. */ |
} __attribute__ ((packed)); |
typedef struct ns16550 ns16550_t; |
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/** Structure representing the ns16550 device. */ |
typedef struct { |
typedef struct ns16550_instance { |
devno_t devno; |
/** Memory mapped registers of the ns16550. */ |
volatile ioport_t io_port; |
} ns16550_t; |
ns16550_t *ns16550; |
irq_t irq; |
} ns16550_instance_t; |
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static inline uint8_t ns16550_rbr_read(ns16550_t *dev) |
{ |
return pio_read_8(dev->io_port + RBR_REG); |
} |
static inline void ns16550_rbr_write(ns16550_t *dev, uint8_t v) |
{ |
pio_write_8(dev->io_port + RBR_REG, v); |
} |
extern bool ns16550_init(ns16550_t *, devno_t, inr_t, cir_t, void *); |
extern irq_ownership_t ns16550_claim(irq_t *); |
extern void ns16550_irq_handler(irq_t *); |
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static inline uint8_t ns16550_ier_read(ns16550_t *dev) |
{ |
return pio_read_8(dev->io_port + IER_REG); |
} |
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static inline void ns16550_ier_write(ns16550_t *dev, uint8_t v) |
{ |
pio_write_8(dev->io_port + IER_REG, v); |
} |
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static inline uint8_t ns16550_iir_read(ns16550_t *dev) |
{ |
return pio_read_8(dev->io_port + IIR_REG); |
} |
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static inline void ns16550_fcr_write(ns16550_t *dev, uint8_t v) |
{ |
pio_write_8(dev->io_port + FCR_REG, v); |
} |
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static inline uint8_t ns16550_lcr_read(ns16550_t *dev) |
{ |
return pio_read_8(dev->io_port + LCR_REG); |
} |
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static inline void ns16550_lcr_write(ns16550_t *dev, uint8_t v) |
{ |
pio_write_8(dev->io_port + LCR_REG, v); |
} |
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static inline uint8_t ns16550_lsr_read(ns16550_t *dev) |
{ |
return pio_read_8(dev->io_port + LSR_REG); |
} |
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static inline uint8_t ns16550_mcr_read(ns16550_t *dev) |
{ |
return pio_read_8(dev->io_port + MCR_REG); |
} |
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static inline void ns16550_mcr_write(ns16550_t *dev, uint8_t v) |
{ |
pio_write_8(dev->io_port + MCR_REG, v); |
} |
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#endif |
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/** @} |