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Ignore whitespace Rev 4343 → Rev 4344

/branches/dynload/kernel/arch/sparc64/include/types.h
57,7 → 57,9
typedef uint64_t unative_t;
typedef int64_t native_t;
 
typedef uintptr_t ioport_t;
typedef volatile uint8_t ioport8_t;
typedef volatile uint16_t ioport16_t;
typedef volatile uint32_t ioport32_t;
 
typedef struct {
} fncptr_t;
/branches/dynload/kernel/arch/sparc64/include/asm.h
44,49 → 44,49
#include <arch/stack.h>
#include <arch/barrier.h>
 
static inline void pio_write_8(ioport_t port, uint8_t v)
static inline void pio_write_8(ioport8_t *port, uint8_t v)
{
*((volatile uint8_t *)(port)) = v;
*port = v;
memory_barrier();
}
 
static inline void pio_write_16(ioport_t port, uint16_t v)
static inline void pio_write_16(ioport16_t *port, uint16_t v)
{
*((volatile uint16_t *)(port)) = v;
*port = v;
memory_barrier();
}
 
static inline void pio_write_32(ioport_t port, uint32_t v)
static inline void pio_write_32(ioport32_t *port, uint32_t v)
{
*((volatile uint32_t *)(port)) = v;
*port = v;
memory_barrier();
}
 
static inline uint8_t pio_read_8(ioport_t port)
static inline uint8_t pio_read_8(ioport8_t *port)
{
uint8_t rv;
 
rv = *((volatile uint8_t *)(port));
rv = *port;
memory_barrier();
 
return rv;
}
 
static inline uint16_t pio_read_16(ioport_t port)
static inline uint16_t pio_read_16(ioport16_t *port)
{
uint16_t rv;
 
rv = *((volatile uint16_t *)(port));
rv = *port;
memory_barrier();
 
return rv;
}
 
static inline uint32_t pio_read_32(ioport_t port)
static inline uint32_t pio_read_32(ioport32_t *port)
{
uint32_t rv;
 
rv = *((volatile uint32_t *)(port));
rv = *port;
memory_barrier();
 
return rv;
/branches/dynload/kernel/arch/sparc64/include/mm/frame.h
73,7 → 73,6
typedef union frame_address frame_address_t;
 
extern uintptr_t last_frame;
extern uintptr_t end_frame;
extern void frame_arch_init(void);
#define physmem_print()
 
/branches/dynload/kernel/arch/sparc64/include/drivers/z8530.h
File deleted
/branches/dynload/kernel/arch/sparc64/src/console.c
162,16 → 162,6
scr_redraw();
#endif
switch (kbd_type) {
#ifdef CONFIG_Z8530
case KBD_Z8530:
z8530_grab();
break;
#endif
#ifdef CONFIG_NS16550
case KBD_NS16550:
ns16550_grab();
break;
#endif
#ifdef CONFIG_SGCN
case KBD_SGCN:
sgcn_grab();
188,16 → 178,6
void arch_release_console(void)
{
switch (kbd_type) {
#ifdef CONFIG_Z8530
case KBD_Z8530:
z8530_release();
break;
#endif
#ifdef CONFIG_NS16550
case KBD_NS16550:
ns16550_release();
break;
#endif
#ifdef CONFIG_SGCN
case KBD_SGCN:
sgcn_release();
/branches/dynload/kernel/arch/sparc64/src/mm/frame.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup sparc64mm
/** @addtogroup sparc64mm
* @{
*/
/** @file
41,7 → 41,6
#include <macros.h>
 
uintptr_t last_frame = NULL;
uintptr_t end_frame = NULL;
 
/** Create memory zones according to information stored in bootinfo.
*
80,8 → 79,6
*/
frame_mark_unavailable(ADDR2PFN(KA2PA(PFN2ADDR(0))), 1);
}
end_frame = last_frame;
}
 
/** @}
/branches/dynload/kernel/arch/sparc64/src/mm/page.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup sparc64mm
/** @addtogroup sparc64mm
* @{
*/
/** @file
164,11 → 164,5
return virtaddr;
}
 
void hw_area(uintptr_t *physaddr, pfn_t *frames)
{
*physaddr = end_frame;
*frames = ADDR2PFN(0x7ffffffffff - end_frame);
}
 
/** @}
*/
/branches/dynload/kernel/arch/sparc64/src/drivers/fhc.c
45,6 → 45,7
#include <mm/slab.h>
#include <arch/types.h>
#include <genarch/ofw/ofw_tree.h>
#include <sysinfo/sysinfo.h>
 
fhc_t *central_fhc = NULL;
 
86,6 → 87,13
 
fhc->uart_imap = (uint32_t *) hw_map(paddr, reg->size);
/*
* Set sysinfo data needed by the uspace FHC driver.
*/
sysinfo_set_item_val("fhc.uart.size", NULL, reg->size);
sysinfo_set_item_val("fhc.uart.physical", NULL, paddr);
sysinfo_set_item_val("kbd.cir.fhc", NULL, 1);
 
return fhc;
}
 
/branches/dynload/kernel/arch/sparc64/src/drivers/kbd.c
47,6 → 47,7
#include <align.h>
#include <func.h>
#include <print.h>
#include <sysinfo/sysinfo.h>
 
kbd_type_t kbd_type = KBD_UNKNOWN;
 
65,6 → 66,13
const char *name;
cir_t cir;
void *cir_arg;
 
#ifdef CONFIG_NS16550
ns16550_t *ns16550;
#endif
#ifdef CONFIG_Z8530
z8530_t *z8530;
#endif
name = ofw_tree_node_name(node);
99,6 → 107,7
uintptr_t pa;
size_t size;
devno_t devno;
inr_t inr;
switch (kbd_type) {
131,7 → 140,6
return;
};
break;
default:
panic("Unexpected keyboard type.");
}
148,14 → 156,42
switch (kbd_type) {
#ifdef CONFIG_Z8530
case KBD_Z8530:
z8530_init(device_assign_devno(),
hw_map(aligned_addr, offset + size) + offset, inr, cir, cir_arg);
devno = device_assign_devno();
z8530 = (z8530_t *) hw_map(aligned_addr, offset + size) +
offset;
(void) z8530_init(z8530, devno, inr, cir, cir_arg);
/*
* This is the necessary evil until the userspace drivers are
* entirely self-sufficient.
*/
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.type", NULL, KBD_Z8530);
sysinfo_set_item_val("kbd.devno", NULL, devno);
sysinfo_set_item_val("kbd.inr", NULL, inr);
sysinfo_set_item_val("kbd.address.virtual", NULL,
(uintptr_t) z8530);
sysinfo_set_item_val("kbd.address.physical", NULL, pa);
break;
#endif
#ifdef CONFIG_NS16550
case KBD_NS16550:
ns16550_init(device_assign_devno(),
(ioport_t) (hw_map(aligned_addr, offset + size) + offset), inr, cir, cir_arg);
devno = device_assign_devno();
ns16550 = (ns16550_t *) hw_map(aligned_addr, offset + size) +
offset;
(void) ns16550_init(ns16550, devno, inr, cir, cir_arg);
/*
* This is the necessary evil until the userspace driver is
* entirely self-sufficient.
*/
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
sysinfo_set_item_val("kbd.devno", NULL, devno);
sysinfo_set_item_val("kbd.inr", NULL, inr);
sysinfo_set_item_val("kbd.address.virtual", NULL,
(uintptr_t) ns16550);
sysinfo_set_item_val("kbd.address.physical", NULL, pa);
break;
#endif
default:
/branches/dynload/kernel/arch/sparc64/src/drivers/sgcn.c
310,7 → 310,7
/**
* The driver works in polled mode, so no interrupt should be handled by it.
*/
static irq_ownership_t sgcn_claim(void *instance)
static irq_ownership_t sgcn_claim(irq_t *irq)
{
return IRQ_DECLINE;
}
381,13 → 381,7
volatile uint32_t *in_rdptr_ptr = &(SGCN_BUFFER_HEADER->in_rdptr);
if (*in_rdptr_ptr != *in_wrptr_ptr) {
if (sgcn_irq.notif_cfg.notify && sgcn_irq.notif_cfg.answerbox) {
ipc_irq_send_notif(&sgcn_irq);
spinlock_unlock(&sgcn_irq.lock);
interrupts_restore(ipl);
spinlock_unlock(&sgcn_input_lock);
return;
}
/* XXX: send notification to userspace */
}
spinlock_unlock(&sgcn_irq.lock);
/branches/dynload/kernel/arch/sparc64/src/drivers/pci.c
44,6 → 44,7
#include <print.h>
#include <func.h>
#include <arch/asm.h>
#include <sysinfo/sysinfo.h>
 
#define SABRE_INTERNAL_REG 0
#define PSYCHO_INTERNAL_REG 2
108,6 → 109,12
pci->op = &pci_sabre_ops;
pci->reg = (uint64_t *) hw_map(paddr, reg[SABRE_INTERNAL_REG].size);
 
/*
* Set sysinfo data needed by the uspace OBIO driver.
*/
sysinfo_set_item_val("obio.base.physical", NULL, paddr);
sysinfo_set_item_val("kbd.cir.obio", NULL, 1);
 
return pci;
}
 
149,6 → 156,12
pci->op = &pci_psycho_ops;
pci->reg = (uint64_t *) hw_map(paddr, reg[PSYCHO_INTERNAL_REG].size);
 
/*
* Set sysinfo data needed by the uspace OBIO driver.
*/
sysinfo_set_item_val("obio.base.physical", NULL, paddr);
sysinfo_set_item_val("kbd.cir.obio", NULL, 1);
 
return pci;
}
 
/branches/dynload/kernel/arch/ia64/include/types.h
65,7 → 65,9
typedef uint64_t unative_t;
typedef int64_t native_t;
 
typedef uintptr_t ioport_t;
typedef volatile uint8_t ioport8_t;
typedef volatile uint16_t ioport16_t;
typedef volatile uint32_t ioport32_t;
 
typedef struct {
unative_t fnc;
/branches/dynload/kernel/arch/ia64/include/asm.h
41,52 → 41,64
 
#define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL
 
static inline void pio_write_8(ioport_t port, uint8_t v)
static inline void pio_write_8(ioport8_t *port, uint8_t v)
{
uintptr_t prt = (uintptr_t) port;
 
*((uint8_t *)(IA64_IOSPACE_ADDRESS +
((port & 0xfff) | ((port >> 2) << 12)))) = v;
((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
 
asm volatile ("mf\n" ::: "memory");
}
 
static inline void pio_write_16(ioport_t port, uint16_t v)
static inline void pio_write_16(ioport16_t *port, uint16_t v)
{
uintptr_t prt = (uintptr_t) port;
 
*((uint16_t *)(IA64_IOSPACE_ADDRESS +
((port & 0xfff) | ((port >> 2) << 12)))) = v;
((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
 
asm volatile ("mf\n" ::: "memory");
}
 
static inline void pio_write_32(ioport_t port, uint32_t v)
static inline void pio_write_32(ioport32_t *port, uint32_t v)
{
uintptr_t prt = (uintptr_t) port;
 
*((uint32_t *)(IA64_IOSPACE_ADDRESS +
((port & 0xfff) | ((port >> 2) << 12)))) = v;
((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
 
asm volatile ("mf\n" ::: "memory");
}
 
static inline uint8_t pio_read_8(ioport_t port)
static inline uint8_t pio_read_8(ioport8_t *port)
{
uintptr_t prt = (uintptr_t) port;
 
asm volatile ("mf\n" ::: "memory");
 
return *((uint8_t *)(IA64_IOSPACE_ADDRESS +
((port & 0xfff) | ((port >> 2) << 12))));
((prt & 0xfff) | ((prt >> 2) << 12))));
}
 
static inline uint16_t pio_read_16(ioport_t port)
static inline uint16_t pio_read_16(ioport16_t *port)
{
uintptr_t prt = (uintptr_t) port;
 
asm volatile ("mf\n" ::: "memory");
 
return *((uint16_t *)(IA64_IOSPACE_ADDRESS +
((port & 0xffE) | ((port >> 2) << 12))));
((prt & 0xffE) | ((prt >> 2) << 12))));
}
 
static inline uint32_t pio_read_32(ioport_t port)
static inline uint32_t pio_read_32(ioport32_t *port)
{
uintptr_t prt = (uintptr_t) port;
 
asm volatile ("mf\n" ::: "memory");
 
return *((uint32_t *)(IA64_IOSPACE_ADDRESS +
((port & 0xfff) | ((port >> 2) << 12))));
((prt & 0xfff) | ((prt >> 2) << 12))));
}
 
/** Return base address of current stack
/branches/dynload/kernel/arch/ia64/include/mm/frame.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia64mm
/** @addtogroup ia64mm
* @{
*/
/** @file
35,8 → 35,8
#ifndef KERN_ia64_FRAME_H_
#define KERN_ia64_FRAME_H_
 
#define FRAME_WIDTH 14 /* 16K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
#define FRAME_WIDTH 14 /* 16K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
#ifdef KERNEL
#ifndef __ASM__
44,7 → 44,6
#include <arch/types.h>
 
extern uintptr_t last_frame;
extern uintptr_t end_frame;
 
extern void frame_arch_init(void);
#define physmem_print()
/branches/dynload/kernel/arch/ia64/include/mm/tlb.h
35,9 → 35,6
#ifndef KERN_ia64_TLB_H_
#define KERN_ia64_TLB_H_
 
#define tlb_arch_init()
#define tlb_print()
 
#include <arch/mm/page.h>
#include <arch/mm/asid.h>
#include <arch/interrupt.h>
/branches/dynload/kernel/arch/ia64/include/drivers/i8042.h
File deleted
/branches/dynload/kernel/arch/ia64/include/drivers/ega.h
File deleted
/branches/dynload/kernel/arch/ia64/src/smp/smp.c
51,7 → 51,6
#include <syscall/syscall.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <arch/drivers/ega.h>
#include <arch/bootinfo.h>
#include <genarch/kbd/i8042.h>
#include <genarch/kbd/ns16550.h>
/branches/dynload/kernel/arch/ia64/src/ia64.c
52,7 → 52,7
#include <ddi/irq.h>
#include <ddi/device.h>
#include <arch/bootinfo.h>
#include <arch/drivers/ega.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <genarch/drivers/ega/ega.h>
#include <genarch/kbd/i8042.h>
#include <genarch/kbd/ns16550.h>
65,7 → 65,6
 
/* NS16550 as a COM 1 */
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
#define NS16550_PORT 0x3f8
 
bootinfo_t *bootinfo;
 
161,14 → 160,22
#endif
 
#ifdef I460GX
devno_t kbd = device_assign_devno();
devno_t devno = device_assign_devno();
inr_t inr;
 
#ifdef CONFIG_NS16550
ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL);
inr = NS16550_IRQ;
(void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL);
sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
sysinfo_set_item_val("kbd.port", NULL, (uintptr_t)NS16550_BASE);
#else
devno_t mouse = device_assign_devno();
i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
inr = IRQ_KBD;
(void) i8042_init((i8042_t *)I8042_BASE, devno, inr);
sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
#endif
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.devno", NULL, devno);
sysinfo_set_item_val("kbd.inr", NULL, inr);
#endif
 
sysinfo_set_item_val("ia64_iospace", NULL, true);
222,13 → 229,7
{
#ifdef SKI
ski_kbd_grab();
#else
#ifdef CONFIG_NS16550
ns16550_grab();
#else
i8042_grab();
#endif
#endif
}
 
/** Return console to userspace
238,18 → 239,12
{
#ifdef SKI
ski_kbd_release();
#else
#ifdef CONFIG_NS16550
ns16550_release();
#else
i8042_release();
#endif
#endif
}
 
void arch_reboot(void)
{
pio_write_8(0x64, 0xfe);
pio_write_8((ioport8_t *)0x64, 0xfe);
while (1)
;
}
/branches/dynload/kernel/arch/ia64/src/ski/ski.c
145,7 → 145,7
if (ski_kbd_irq.notif_cfg.notify &&
ski_kbd_irq.notif_cfg.answerbox) {
chardev_push_character(&ski_uconsole, ch);
ipc_irq_send_notif(&ski_kbd_irq);
/* XXX: send notification to userspace */
} else {
chardev_push_character(&ski_console, ch);
}
159,7 → 159,7
if (ski_kbd_irq.notif_cfg.notify &&
ski_kbd_irq.notif_cfg.answerbox) {
chardev_push_character(&ski_uconsole, 0);
ipc_irq_send_notif(&ski_kbd_irq);
/* XXX: send notification to userspace */
}
last = 0;
}
186,7 → 186,7
*
* @return Always IRQ_DECLINE.
*/
static irq_ownership_t ski_kbd_claim(void *instance)
static irq_ownership_t ski_kbd_claim(irq_t *irq)
{
return IRQ_DECLINE;
}
/branches/dynload/kernel/arch/ia64/src/mm/tlb.c
749,5 → 749,13
}
}
 
void tlb_arch_init(void)
{
}
 
void tlb_print(void)
{
}
 
/** @}
*/
/branches/dynload/kernel/arch/ia64/src/mm/frame.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia64mm
/** @addtogroup ia64mm
* @{
*/
/** @file
51,7 → 51,6
#define MINCONF 1
 
uintptr_t last_frame = 0;
uintptr_t end_frame = 0;
 
void frame_arch_init(void)
{
/branches/dynload/kernel/arch/ia64/src/mm/page.c
27,7 → 27,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia64mm
/** @addtogroup ia64mm
* @{
*/
/** @file
63,9 → 63,9
void set_environment(void)
{
region_register rr;
pta_register pta;
pta_register pta;
int i;
#ifdef CONFIG_VHPT
#ifdef CONFIG_VHPT
uintptr_t vhpt_base;
#endif
 
270,15 → 270,9
 
uintptr_t hw_map(uintptr_t physaddr, size_t size __attribute__ ((unused)))
{
/* This is a dirty hack. */
return PA2KA(physaddr);
/* THIS is a dirty hack. */
return (uintptr_t)((uint64_t)(PA2KA(physaddr)) + VIO_OFFSET);
}
 
void hw_area(uintptr_t *physaddr, pfn_t *frames)
{
*physaddr = end_frame;
*frames = ADDR2PFN(0x7fffffffffffffffUL - end_frame);
}
 
/** @}
*/
/branches/dynload/kernel/arch/ia64/src/drivers/it.c
56,8 → 56,8
 
static irq_t it_irq;
 
static irq_ownership_t it_claim(void *);
static void it_interrupt(irq_t *irq);
static irq_ownership_t it_claim(irq_t *);
static void it_interrupt(irq_t *);
 
/** Initialize Interval Timer. */
void it_init(void)
104,7 → 104,7
*
* @return Always IRQ_ACCEPT.
*/
irq_ownership_t it_claim(void *instance)
irq_ownership_t it_claim(irq_t *irq)
{
return IRQ_ACCEPT;
}
/branches/dynload/kernel/arch/arm32/include/types.h
64,7 → 64,9
typedef uint32_t unative_t;
typedef int32_t native_t;
 
typedef uintptr_t ioport_t;
typedef volatile uint8_t ioport8_t;
typedef volatile uint16_t ioport16_t;
typedef volatile uint32_t ioport32_t;
 
typedef struct {
} fncptr_t;
/branches/dynload/kernel/arch/arm32/include/machine.h
104,8 → 104,6
 
#ifdef MACHINE_gxemul
#define machine_console_init(devno) gxemul_console_init(devno)
#define machine_grab_console gxemul_grab_console
#define machine_release_console gxemul_release_console
#define machine_hw_map_init gxemul_hw_map_init
#define machine_timer_irq_start gxemul_timer_irq_start
#define machine_cpu_halt gxemul_cpu_halt
/branches/dynload/kernel/arch/arm32/include/asm.h
46,16 → 46,36
{
}
 
static inline void pio_write_8(ioport_t port, uint8_t v)
static inline void pio_write_8(ioport8_t *port, uint8_t v)
{
/* XXX */
*port = v;
}
 
static inline uint8_t pio_read_8(ioport_t port)
static inline void pio_write_16(ioport16_t *port, uint16_t v)
{
return 0; /* XXX */
*port = v;
}
 
static inline void pio_write_32(ioport32_t *port, uint32_t v)
{
*port = v;
}
 
static inline uint8_t pio_read_8(ioport8_t *port)
{
return *port;
}
 
static inline uint16_t pio_read_16(ioport16_t *port)
{
return *port;
}
 
static inline uint32_t pio_read_32(ioport32_t *port)
{
return *port;
}
 
/** Return base address of current stack.
*
* Return the base address of the current stack.
/branches/dynload/kernel/arch/arm32/include/mm/frame.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32mm
/** @addtogroup arm32mm
* @{
*/
/** @file
36,8 → 36,8
#ifndef KERN_arm32_FRAME_H_
#define KERN_arm32_FRAME_H_
 
#define FRAME_WIDTH 12 /* 4KB frames */
#define FRAME_SIZE (1 << FRAME_WIDTH)
#define FRAME_WIDTH 12 /* 4KB frames */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
#ifdef KERNEL
#ifndef __ASM__
44,14 → 44,13
 
#include <arch/types.h>
 
#define BOOT_PAGE_TABLE_SIZE 0x4000
#define BOOT_PAGE_TABLE_ADDRESS 0x4000
#define BOOT_PAGE_TABLE_SIZE 0x4000
#define BOOT_PAGE_TABLE_ADDRESS 0x4000
 
#define BOOT_PAGE_TABLE_START_FRAME (BOOT_PAGE_TABLE_ADDRESS >> FRAME_WIDTH)
#define BOOT_PAGE_TABLE_SIZE_IN_FRAMES (BOOT_PAGE_TABLE_SIZE >> FRAME_WIDTH)
 
extern uintptr_t last_frame;
extern uintptr_t end_frame;
 
extern void frame_arch_init(void);
extern void boot_page_table_free(void);
/branches/dynload/kernel/arch/arm32/include/mm/tlb.h
36,9 → 36,6
#ifndef KERN_arm32_TLB_H_
#define KERN_arm32_TLB_H_
 
#define tlb_arch_init()
#define tlb_print()
 
#endif
 
/** @}
/branches/dynload/kernel/arch/arm32/src/console.c
50,13 → 50,11
#ifdef CONFIG_FB
fb_redraw();
#endif
machine_grab_console();
}
 
/** Return console to userspace. */
void arch_release_console(void)
{
machine_release_console();
}
 
/** @}
/branches/dynload/kernel/arch/arm32/src/mm/tlb.c
89,5 → 89,13
invalidate_page(page + i * PAGE_SIZE);
}
 
void tlb_arch_init(void)
{
}
 
void tlb_print(void)
{
}
 
/** @}
*/
/branches/dynload/kernel/arch/arm32/src/mm/frame.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup arm32mm
/** @addtogroup arm32mm
* @{
*/
/** @file
41,7 → 41,6
 
/** Address of the last frame in the memory. */
uintptr_t last_frame = 0;
uintptr_t end_frame = 0;
 
/** Creates memory zones. */
void frame_arch_init(void)
50,7 → 49,6
zone_create(0, ADDR2PFN(machine_get_memory_size()),
BOOT_PAGE_TABLE_START_FRAME + BOOT_PAGE_TABLE_SIZE_IN_FRAMES, 0);
last_frame = machine_get_memory_size();
end_frame = last_frame;
/* blacklist boot page table */
frame_mark_unavailable(BOOT_PAGE_TABLE_START_FRAME,
/branches/dynload/kernel/arch/arm32/src/mm/page.c
106,11 → 106,5
return virtaddr;
}
 
void hw_area(uintptr_t *physaddr, pfn_t *frames)
{
*physaddr = end_frame;
*frames = ADDR2PFN(0xffffffff - end_frame);
}
 
/** @}
*/
/branches/dynload/kernel/arch/arm32/src/drivers/gxemul.c
34,7 → 34,6
*/
 
#include <interrupt.h>
#include <ipc/irq.h>
#include <console/chardev.h>
#include <arch/drivers/gxemul.h>
#include <console/console.h>
187,50 → 186,23
*/
static void gxemul_irq_handler(irq_t *irq)
{
if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox)) {
ipc_irq_send_notif(irq);
} else {
char ch = 0;
char ch = 0;
ch = *((char *) gxemul_hw_map.kbd);
if (ch == '\r') {
ch = '\n';
}
if (ch == 0x7f) {
ch = '\b';
}
chardev_push_character(&console, ch);
ch = *((char *) gxemul_hw_map.kbd);
if (ch == '\r') {
ch = '\n';
}
if (ch == 0x7f) {
ch = '\b';
}
chardev_push_character(&console, ch);
}
 
static irq_ownership_t gxemul_claim(void *instance)
static irq_ownership_t gxemul_claim(irq_t *irq)
{
return IRQ_ACCEPT;
}
 
 
/** Acquire console back for kernel. */
void gxemul_grab_console(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&gxemul_console_irq.lock);
gxemul_console_irq.notif_cfg.notify = false;
spinlock_unlock(&gxemul_console_irq.lock);
interrupts_restore(ipl);
}
 
/** Return console to userspace. */
void gxemul_release_console(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&gxemul_console_irq.lock);
if (gxemul_console_irq.notif_cfg.answerbox) {
gxemul_console_irq.notif_cfg.notify = true;
}
spinlock_unlock(&gxemul_console_irq.lock);
interrupts_restore(ipl);
}
 
/** Initializes console object representing gxemul console.
*
* @param devno device number.
265,7 → 237,7
*((uint32_t*) gxemul_hw_map.rtc_freq) = frequency;
}
 
static irq_ownership_t gxemul_timer_claim(void *instance)
static irq_ownership_t gxemul_timer_claim(irq_t *irq)
{
return IRQ_ACCEPT;
}
/branches/dynload/kernel/arch/ppc32/include/types.h
57,7 → 57,9
typedef uint32_t unative_t;
typedef int32_t native_t;
 
typedef uintptr_t ioport_t;
typedef volatile uint8_t ioport8_t;
typedef volatile uint16_t ioport16_t;
typedef volatile uint32_t ioport32_t;
 
typedef struct {
} fncptr_t;
/branches/dynload/kernel/arch/ppc32/include/asm.h
149,16 → 149,36
 
extern void userspace_asm(uintptr_t uspace_uarg, uintptr_t stack, uintptr_t entry);
 
static inline void pio_write_8(ioport_t port, uint8_t v)
static inline void pio_write_8(ioport8_t *port, uint8_t v)
{
/* XXX */
*port = v;
}
 
static inline uint8_t pio_read_8(ioport_t port)
static inline void pio_write_16(ioport16_t *port, uint16_t v)
{
return 0; /* XXX */
*port = v;
}
 
static inline void pio_write_32(ioport32_t *port, uint32_t v)
{
*port = v;
}
 
static inline uint8_t pio_read_8(ioport8_t *port)
{
return *port;
}
 
static inline uint16_t pio_read_16(ioport16_t *port)
{
return *port;
}
 
static inline uint32_t pio_read_32(ioport32_t *port)
{
return *port;
}
 
#endif
 
/** @}
/branches/dynload/kernel/arch/ppc32/include/mm/frame.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc32mm
/** @addtogroup ppc32mm
* @{
*/
/** @file
35,8 → 35,8
#ifndef KERN_ppc32_FRAME_H_
#define KERN_ppc32_FRAME_H_
 
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
#ifdef KERNEL
#ifndef __ASM__
44,7 → 44,6
#include <arch/types.h>
 
extern uintptr_t last_frame;
extern uintptr_t end_frame;
 
extern void frame_arch_init(void);
extern void physmem_print(void);
/branches/dynload/kernel/arch/ppc32/include/drivers/cuda.h
40,8 → 40,6
 
extern void cuda_init(devno_t devno, uintptr_t base, size_t size);
extern int cuda_get_scancode(void);
extern void cuda_grab(void);
extern void cuda_release(void);
 
#endif
 
/branches/dynload/kernel/arch/ppc32/src/ppc32.c
156,7 → 156,6
void arch_grab_console(void)
{
fb_redraw();
cuda_grab();
}
 
/** Return console to userspace
164,7 → 163,6
*/
void arch_release_console(void)
{
cuda_release();
}
 
/** Construct function pointer
/branches/dynload/kernel/arch/ppc32/src/mm/frame.c
40,7 → 40,6
#include <print.h>
 
uintptr_t last_frame = 0;
uintptr_t end_frame = 0;
 
void physmem_print(void)
{
76,8 → 75,6
last_frame = ALIGN_UP(bootinfo.memmap.zones[i].start + bootinfo.memmap.zones[i].size, FRAME_SIZE);
}
end_frame = last_frame;
/* First is exception vector, second is 'implementation specific',
third and fourth is reserved, other contain real mode code */
frame_mark_unavailable(0, 8);
/branches/dynload/kernel/arch/ppc32/src/mm/page.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc32mm
/** @addtogroup ppc32mm
* @{
*/
/** @file
63,11 → 63,5
return virtaddr;
}
 
void hw_area(uintptr_t *physaddr, pfn_t *frames)
{
*physaddr = end_frame;
*frames = ADDR2PFN(0xffffffff - end_frame);
}
 
/** @}
*/
/branches/dynload/kernel/arch/ppc32/src/drivers/cuda.c
33,7 → 33,6
*/
 
#include <arch/drivers/cuda.h>
#include <ipc/irq.h>
#include <arch/asm.h>
#include <console/console.h>
#include <console/chardev.h>
251,52 → 250,20
 
static void cuda_irq_handler(irq_t *irq)
{
if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
ipc_irq_send_notif(irq);
else {
int scan_code = cuda_get_scancode();
int scan_code = cuda_get_scancode();
if (scan_code != -1) {
uint8_t scancode = (uint8_t) scan_code;
if ((scancode & 0x80) != 0x80)
chardev_push_character(&kbrd, lchars[scancode & 0x7f]);
}
if (scan_code != -1) {
uint8_t scancode = (uint8_t) scan_code;
if ((scancode & 0x80) != 0x80)
chardev_push_character(&kbrd, lchars[scancode & 0x7f]);
}
}
 
static irq_ownership_t cuda_claim(void *instance)
static irq_ownership_t cuda_claim(irq_t *irq)
{
return IRQ_ACCEPT;
}
 
 
/** Initialize keyboard and service interrupts using kernel routine */
void cuda_grab(void)
{
if (cuda) {
ipl_t ipl = interrupts_disable();
spinlock_lock(&cuda_irq.lock);
cuda_irq.notif_cfg.notify = false;
spinlock_unlock(&cuda_irq.lock);
interrupts_restore(ipl);
}
}
 
 
/** Resume the former interrupt vector */
void cuda_release(void)
{
if (cuda) {
ipl_t ipl = interrupts_disable();
spinlock_lock(&cuda_irq.lock);
if (cuda_irq.notif_cfg.answerbox)
cuda_irq.notif_cfg.notify = true;
spinlock_unlock(&cuda_irq.unlock);
interrupts_restore(ipl);
}
}
 
 
void cuda_init(devno_t devno, uintptr_t base, size_t size)
{
cuda = (uint8_t *) hw_map(base, size);
/branches/dynload/kernel/arch/amd64/include/types.h
57,7 → 57,9
typedef uint64_t unative_t;
typedef int64_t native_t;
 
typedef uintptr_t ioport_t;
typedef volatile uint8_t ioport8_t;
typedef volatile uint16_t ioport16_t;
typedef volatile uint32_t ioport32_t;
 
typedef struct {
} fncptr_t;
/branches/dynload/kernel/arch/amd64/include/asm.h
73,7 → 73,7
* @param port Port to read from
* @return Value read
*/
static inline uint8_t pio_read_8(uint16_t port)
static inline uint8_t pio_read_8(ioport8_t *port)
{
uint8_t val;
 
81,6 → 81,36
return val;
}
 
/** Word from port
*
* Get word from port
*
* @param port Port to read from
* @return Value read
*/
static inline uint16_t pio_read_16(ioport16_t *port)
{
uint16_t val;
asm volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port));
return val;
}
 
/** Double word from port
*
* Get double word from port
*
* @param port Port to read from
* @return Value read
*/
static inline uint32_t pio_read_32(ioport32_t *port)
{
uint32_t val;
asm volatile ("inl %w1, %0 \n" : "=a" (val) : "d" (port));
return val;
}
 
/** Byte to port
*
* Output byte to port
88,11 → 118,35
* @param port Port to write to
* @param val Value to write
*/
static inline void pio_write_8(uint16_t port, uint8_t val)
static inline void pio_write_8(ioport8_t *port, uint8_t val)
{
asm volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port));
}
 
/** Word to port
*
* Output word to port
*
* @param port Port to write to
* @param val Value to write
*/
static inline void pio_write_16(ioport16_t *port, uint16_t val)
{
asm volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port));
}
 
/** Double word to port
*
* Output double word to port
*
* @param port Port to write to
* @param val Value to write
*/
static inline void pio_write_32(ioport32_t *port, uint32_t val)
{
asm volatile ("outl %0, %w1\n" : : "a" (val), "d" (port));
}
 
/** Swap Hidden part of GS register with visible one */
static inline void swapgs(void)
{
/branches/dynload/kernel/arch/amd64/include/mm/frame.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup amd64mm
/** @addtogroup amd64mm
* @{
*/
/** @file
39,12 → 39,11
#include <arch/types.h>
#endif /* __ASM__ */
 
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
#ifndef __ASM__
extern uintptr_t last_frame;
extern uintptr_t end_frame;
extern void frame_arch_init(void);
extern void physmem_print(void);
#endif /* __ASM__ */
/branches/dynload/kernel/arch/amd64/include/mm/tlb.h
35,9 → 35,6
#ifndef KERN_amd64_TLB_H_
#define KERN_amd64_TLB_H_
 
#define tlb_arch_init()
#define tlb_print()
 
#endif
 
/** @}
/branches/dynload/kernel/arch/amd64/src/amd64.c
39,7 → 39,7
#include <config.h>
 
#include <proc/thread.h>
#include <arch/drivers/ega.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <genarch/drivers/ega/ega.h>
#include <arch/drivers/vesa.h>
#include <genarch/kbd/i8042.h>
63,6 → 63,7
#include <console/console.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <sysinfo/sysinfo.h>
 
 
/** Disable I/O on non-privileged levels
173,8 → 174,17
 
void arch_post_smp_init(void)
{
devno_t devno = device_assign_devno();
/* keyboard controller */
i8042_init(device_assign_devno(), IRQ_KBD, device_assign_devno(), IRQ_MOUSE);
(void) i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD);
 
/*
* This is the necessary evil until the userspace driver is entirely
* self-sufficient.
*/
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.devno", NULL, devno);
sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
}
 
void calibrate_delay_loop(void)
214,8 → 224,6
#else
ega_redraw();
#endif
i8042_grab();
}
 
/** Return console to userspace
223,7 → 231,6
*/
void arch_release_console(void)
{
i8042_release();
}
 
/** Construct function pointer
/branches/dynload/kernel/arch/amd64/src/boot/boot.S
223,7 → 223,7
movq %rdx, 16(%rdi)
addl $16, %esi
addq $16, %rdi
addq $48, %rdi
loop mods_loop
/branches/dynload/kernel/arch/amd64/src/mm/page.c
214,11 → 214,5
return virtaddr;
}
 
void hw_area(uintptr_t *physaddr, pfn_t *frames)
{
*physaddr = end_frame;
*frames = ADDR2PFN(0xfffffffffffff - end_frame);
}
 
/** @}
*/
/branches/dynload/kernel/arch/mips32/include/types.h
57,7 → 57,9
typedef uint32_t unative_t;
typedef int32_t native_t;
 
typedef uintptr_t ioport_t;
typedef volatile uint8_t ioport8_t;
typedef volatile uint16_t ioport16_t;
typedef volatile uint32_t ioport32_t;
 
typedef struct {
} fncptr_t;
/branches/dynload/kernel/arch/mips32/include/asm.h
75,16 → 75,36
extern ipl_t interrupts_read(void);
extern void asm_delay_loop(uint32_t t);
 
static inline void pio_write_8(ioport_t port, uint8_t v)
static inline void pio_write_8(ioport8_t *port, uint8_t v)
{
/* XXX */
*port = v;
}
 
static inline uint8_t pio_read_8(ioport_t port)
static inline void pio_write_16(ioport16_t *port, uint16_t v)
{
return 0; /* XXX */
*port = v;
}
 
static inline void pio_write_32(ioport32_t *port, uint32_t v)
{
*port = v;
}
 
static inline uint8_t pio_read_8(ioport8_t *port)
{
return *port;
}
 
static inline uint16_t pio_read_16(ioport16_t *port)
{
return *port;
}
 
static inline uint32_t pio_read_32(ioport32_t *port)
{
return *port;
}
 
#endif
 
/** @}
/branches/dynload/kernel/arch/mips32/include/mm/frame.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32mm
/** @addtogroup mips32mm
* @{
*/
/** @file
46,8 → 46,6
extern void frame_arch_init(void);
extern void physmem_print(void);
 
extern uintptr_t end_frame;
 
#endif /* __ASM__ */
#endif /* KERNEL */
 
/branches/dynload/kernel/arch/mips32/src/mm/frame.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup mips32mm
/** @addtogroup mips32mm
* @{
*/
/** @file
65,9 → 65,7
static count_t phys_regions_count = 0;
static phys_region_t phys_regions[MAX_REGIONS];
 
uintptr_t end_frame = 0;
 
 
/** Check whether frame is available
*
* Returns true if given frame is generally available for use.
220,7 → 218,7
ZERO_PAGE_VALUE = 0xdeadbeef;
if (ZERO_PAGE_VALUE != 0xdeadbeef)
avail = false;
#if defined(lgxemul) || defined(bgxemul)
#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
else {
ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;
if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)
238,10 → 236,8
}
}
end_frame = frame;
frame_add_region(start_frame, frame);
frame_add_region(start_frame, end_frame);
/* Blacklist interrupt vector frame */
frame_mark_unavailable(0, 1);
/branches/dynload/kernel/arch/mips32/src/mm/page.c
51,11 → 51,5
return physaddr + 0xa0000000;
}
 
void hw_area(uintptr_t *physaddr, pfn_t *frames)
{
*physaddr = end_frame;
*frames = ADDR2PFN(0xffffffff - end_frame);
}
 
/** @}
*/
/branches/dynload/kernel/arch/mips32/src/interrupt.c
101,7 → 101,7
cp0_compare_write(nextcount);
}
 
static irq_ownership_t timer_claim(void *instance)
static irq_ownership_t timer_claim(irq_t *irq)
{
return IRQ_ACCEPT;
}
/branches/dynload/kernel/arch/mips32/src/drivers/serial.c
34,7 → 34,6
 
#include <interrupt.h>
#include <arch/cp0.h>
#include <ipc/irq.h>
#include <arch/drivers/serial.h>
#include <console/chardev.h>
#include <console/console.h>
114,13 → 113,10
/** Process keyboard interrupt. Does not work in simics? */
static void serial_irq_handler(irq_t *irq)
{
if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
ipc_irq_send_notif(irq);
else
serial_handler();
serial_handler();
}
 
static irq_ownership_t serial_claim(void *instance)
static irq_ownership_t serial_claim(irq_t *irq)
{
return IRQ_ACCEPT;
}
/branches/dynload/kernel/arch/mips32/src/drivers/msim.c
33,7 → 33,6
*/
 
#include <interrupt.h>
#include <ipc/irq.h>
#include <console/chardev.h>
#include <arch/drivers/msim.h>
#include <arch/cp0.h>
95,21 → 94,17
/** Process keyboard interrupt. */
static void msim_irq_handler(irq_t *irq)
{
if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
ipc_irq_send_notif(irq);
else {
char ch = 0;
char ch = 0;
ch = *((char *) MSIM_KBD_ADDRESS);
if (ch =='\r')
ch = '\n';
if (ch == 0x7f)
ch = '\b';
chardev_push_character(&console, ch);
}
ch = *((char *) MSIM_KBD_ADDRESS);
if (ch =='\r')
ch = '\n';
if (ch == 0x7f)
ch = '\b';
chardev_push_character(&console, ch);
}
 
static irq_ownership_t msim_claim(void *instance)
static irq_ownership_t msim_claim(irq_t *irq)
{
return IRQ_ACCEPT;
}
/branches/dynload/kernel/arch/ia32/include/types.h
57,7 → 57,9
typedef uint32_t unative_t;
typedef int32_t native_t;
 
typedef uintptr_t ioport_t;
typedef volatile uint8_t ioport8_t;
typedef volatile uint16_t ioport16_t;
typedef volatile uint32_t ioport32_t;
 
typedef struct {
} fncptr_t;
/branches/dynload/kernel/arch/ia32/include/boot/memmap.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
/** @addtogroup ia32
* @{
*/
/** @file
35,24 → 35,29
#ifndef KERN_ia32_MEMMAP_H_
#define KERN_ia32_MEMMAP_H_
 
/* E820h memory range types - other values*/
/* Free memory */
#define MEMMAP_MEMORY_AVAILABLE 1
/* Not available for OS */
#define MEMMAP_MEMORY_RESERVED 2
/* OS may use it after reading ACPI table */
#define MEMMAP_MEMORY_ACPI 3
/* Unusable, required to be saved and restored across an NVS sleep */
#define MEMMAP_MEMORY_NVS 4
/* Corrupted memory */
#define MEMMAP_MEMORY_UNUSABLE 5
/* E820h memory range types */
 
/* size of one entry */
#define MEMMAP_E820_RECORD_SIZE 20
/* maximum entries */
#define MEMMAP_E820_MAX_RECORDS 32
/* Free memory */
#define MEMMAP_MEMORY_AVAILABLE 1
 
/* Not available for OS */
#define MEMMAP_MEMORY_RESERVED 2
 
/* OS may use it after reading ACPI table */
#define MEMMAP_MEMORY_ACPI 3
 
/* Unusable, required to be saved and restored across an NVS sleep */
#define MEMMAP_MEMORY_NVS 4
 
/* Corrupted memory */
#define MEMMAP_MEMORY_UNUSABLE 5
 
/* Size of one entry */
#define MEMMAP_E820_RECORD_SIZE 20
 
/* Maximum entries */
#define MEMMAP_E820_MAX_RECORDS 32
 
#ifndef __ASM__
 
#include <arch/types.h>
/branches/dynload/kernel/arch/ia32/include/boot/cboot.h
0,0 → 1,91
/*
* Copyright (c) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
* @{
*/
/** @file
*/
 
#ifndef KERN_ia32_CBOOT_H__
#define KERN_ia32_CBOOT_H_
 
#include <arch/types.h>
#include <arch/boot/memmap.h>
 
/** Multiboot mod structure */
typedef struct {
uintptr_t start;
uintptr_t end;
char *string;
uint32_t reserved;
} __attribute__ ((packed)) mb_mod_t;
 
/** Multiboot mmap structure */
typedef struct {
uint32_t size;
e820memmap_t mm_info;
} __attribute__ ((packed)) mb_mmap_t;
 
/** Multiboot information structure */
typedef struct {
uint32_t flags;
uintptr_t mem_lower;
uintptr_t mem_upper;
 
uint32_t boot_device;
char *cmdline;
 
uint32_t mods_count;
mb_mod_t *mods_addr;
 
uint32_t syms[4];
 
uint32_t mmap_length;
mb_mmap_t *mmap_addr;
 
/* ... */
} __attribute__ ((packed)) mb_info_t;
 
enum mb_info_flags {
MBINFO_FLAGS_MEM = 0x01,
MBINFO_FLAGS_BOOT = 0x02,
MBINFO_FLAGS_CMDLINE = 0x04,
MBINFO_FLAGS_MODS = 0x08,
MBINFO_FLAGS_SYMS1 = 0x10,
MBINFO_FLAGS_SYMS2 = 0x20,
MBINFO_FLAGS_MMAP = 0x40
/* ... */
};
 
extern void ia32_cboot(uint32_t signature, const mb_info_t *mi);
 
#endif
 
/** @}
*/
/branches/dynload/kernel/arch/ia32/include/asm.h
105,9 → 105,9
* @param port Port to write to
* @param val Value to write
*/
static inline void pio_write_8(uint16_t port, uint8_t val)
static inline void pio_write_8(ioport8_t *port, uint8_t val)
{
asm volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) );
asm volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port));
}
 
/** Word to port
117,9 → 117,9
* @param port Port to write to
* @param val Value to write
*/
static inline void pio_write_16(uint16_t port, uint16_t val)
static inline void pio_write_16(ioport16_t *port, uint16_t val)
{
asm volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) );
asm volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port));
}
 
/** Double word to port
129,9 → 129,9
* @param port Port to write to
* @param val Value to write
*/
static inline void pio_write_32(uint16_t port, uint32_t val)
static inline void pio_write_32(ioport32_t *port, uint32_t val)
{
asm volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) );
asm volatile ("outl %0, %w1\n" : : "a" (val), "d" (port));
}
 
/** Byte from port
141,11 → 141,11
* @param port Port to read from
* @return Value read
*/
static inline uint8_t pio_read_8(uint16_t port)
static inline uint8_t pio_read_8(ioport8_t *port)
{
uint8_t val;
asm volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) );
asm volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port));
return val;
}
 
156,11 → 156,11
* @param port Port to read from
* @return Value read
*/
static inline uint16_t pio_read_16(uint16_t port)
static inline uint16_t pio_read_16(ioport16_t *port)
{
uint16_t val;
asm volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) );
asm volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port));
return val;
}
 
171,11 → 171,11
* @param port Port to read from
* @return Value read
*/
static inline uint32_t pio_read_32(uint16_t port)
static inline uint32_t pio_read_32(ioport32_t *port)
{
uint32_t val;
asm volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) );
asm volatile ("inl %w1, %0 \n" : "=a" (val) : "d" (port));
return val;
}
 
/branches/dynload/kernel/arch/ia32/include/mm/frame.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32mm
/** @addtogroup ia32mm
* @{
*/
/** @file
35,8 → 35,8
#ifndef KERN_ia32_FRAME_H_
#define KERN_ia32_FRAME_H_
 
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
#define FRAME_WIDTH 12 /* 4K */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
#ifdef KERNEL
#ifndef __ASM__
44,7 → 44,6
#include <arch/types.h>
 
extern uintptr_t last_frame;
extern uintptr_t end_frame;
 
extern void frame_arch_init(void);
extern void physmem_print(void);
/branches/dynload/kernel/arch/ia32/include/mm/tlb.h
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32mm
/** @addtogroup ia32mm
* @{
*/
/** @file
35,9 → 35,6
#ifndef KERN_ia32_TLB_H_
#define KERN_ia32_TLB_H_
 
#define tlb_arch_init()
#define tlb_print()
 
#endif
 
/** @}
/branches/dynload/kernel/arch/ia32/include/drivers/i8042.h
File deleted
/branches/dynload/kernel/arch/ia32/include/drivers/ega.h
File deleted
/branches/dynload/kernel/arch/ia32/include/drivers/i8259.h
38,10 → 38,10
#include <arch/types.h>
#include <arch/interrupt.h>
 
#define PIC_PIC0PORT1 0x20
#define PIC_PIC0PORT2 0x21
#define PIC_PIC1PORT1 0xa0
#define PIC_PIC1PORT2 0xa1
#define PIC_PIC0PORT1 ((ioport8_t *) 0x20)
#define PIC_PIC0PORT2 ((ioport8_t *) 0x21)
#define PIC_PIC1PORT1 ((ioport8_t *) 0xa0)
#define PIC_PIC1PORT2 ((ioport8_t *) 0xa1)
 
#define PIC_NEEDICW4 (1<<0)
#define PIC_ICW1 (1<<4)
/branches/dynload/kernel/arch/ia32/Makefile.inc
45,11 → 45,11
## Accepted CPUs
#
 
ifeq ($(MACHINE),athlon-xp)
ifeq ($(MACHINE),athlon_xp)
CMN2 = -march=athlon-xp
SUNCC_CFLAGS += -xarch=ssea
endif
ifeq ($(MACHINE),athlon-mp)
ifeq ($(MACHINE),athlon_mp)
CMN2 = -march=athlon-mp
SUNCC_CFLAGS += xarch=ssea
endif
99,6 → 99,7
arch/$(KARCH)/src/drivers/i8259.c \
arch/$(KARCH)/src/drivers/vesa.c \
arch/$(KARCH)/src/boot/boot.S \
arch/$(KARCH)/src/boot/cboot.c \
arch/$(KARCH)/src/boot/memmap.c \
arch/$(KARCH)/src/fpu_context.c \
arch/$(KARCH)/src/debugger.c \
/branches/dynload/kernel/arch/ia32/src/ia32.c
38,7 → 38,7
 
#include <arch/pm.h>
 
#include <arch/drivers/ega.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <genarch/drivers/ega/ega.h>
#include <arch/drivers/vesa.h>
#include <genarch/kbd/i8042.h>
62,6 → 62,7
#include <syscall/syscall.h>
#include <console/console.h>
#include <ddi/device.h>
#include <sysinfo/sysinfo.h>
 
#ifdef CONFIG_SMP
#include <arch/smp/apic.h>
124,10 → 125,17
 
void arch_post_smp_init(void)
{
devno_t kbd = device_assign_devno();
devno_t mouse = device_assign_devno();
devno_t devno = device_assign_devno();
/* keyboard controller */
i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
(void) i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD);
 
/*
* This is the necessary evil until the userspace driver is entirely
* self-sufficient.
*/
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.devno", NULL, devno);
sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
}
 
void calibrate_delay_loop(void)
165,8 → 173,6
#else
ega_redraw();
#endif
i8042_grab();
}
 
/** Return console to userspace
174,7 → 180,6
*/
void arch_release_console(void)
{
i8042_release();
}
 
/** Construct function pointer
/branches/dynload/kernel/arch/ia32/src/smp/smp.c
122,8 → 122,8
* Save 0xa to address 0xf of the CMOS RAM.
* BIOS will not do the POST after the INIT signal.
*/
pio_write_8(0x70, 0xf);
pio_write_8(0x71, 0xa);
pio_write_8((ioport8_t *)0x70, 0xf);
pio_write_8((ioport8_t *)0x71, 0xa);
 
pic_disable_irqs(0xffff);
apic_init();
154,8 → 154,13
/*
* Prepare new GDT for CPU in question.
*/
/* XXX Flag FRAME_LOW_4_GiB was removed temporarily,
* it needs to be replaced by a generic fuctionality of
* the memory subsystem
*/
gdt_new = (struct descriptor *) malloc(GDT_ITEMS *
sizeof(struct descriptor), FRAME_ATOMIC | FRAME_LOW_4_GiB);
sizeof(struct descriptor), FRAME_ATOMIC);
if (!gdt_new)
panic("Cannot allocate memory for GDT.");
 
/branches/dynload/kernel/arch/ia32/src/smp/apic.c
132,7 → 132,7
#endif
}
 
static irq_ownership_t l_apic_timer_claim(void *instance)
static irq_ownership_t l_apic_timer_claim(irq_t *irq)
{
return IRQ_ACCEPT;
}
/branches/dynload/kernel/arch/ia32/src/boot/boot.S
101,117 → 101,16
shr $16, %ebx
mov %bx, KA2PA(vesa_bpp)
#endif
 
call map_kernel # map kernel and turn paging on
movl grub_eax, %eax
movl grub_ebx, %ebx
cmpl $MULTIBOOT_LOADER_MAGIC, %eax # compare GRUB signature
je valid_boot
xorl %ecx, %ecx # no memory map available
movl %ecx, e820counter
jmp invalid_boot
valid_boot:
movl (%ebx), %eax # ebx = physical address of struct multiboot_info
bt $3, %eax # mbi->flags[3] (mods_count, mods_addr valid)
jc mods_valid
xorl %ecx, %ecx
movl %ecx, init
jmp mods_end
mods_valid:
movl 20(%ebx), %ecx # mbi->mods_count
movl %ecx, init
cmpl $0, %ecx
je mods_end
movl 24(%ebx), %esi # mbi->mods_addr
movl $init, %edi
mods_loop:
movl 0(%esi), %edx # mods->mod_start
addl $0x80000000, %edx
movl %edx, 4(%edi)
movl 4(%esi), %edx
subl 0(%esi), %edx # mods->mod_end - mods->mod_start
movl %edx, 8(%edi)
addl $16, %esi
addl $8 , %edi
loop mods_loop
mods_end:
bt $6, %eax # mbi->flags[6] (mmap_length, mmap_addr valid)
jc mmap_valid
xorl %edx, %edx
jmp mmap_invalid
mmap_valid:
movl 44(%ebx), %ecx # mbi->mmap_length
movl 48(%ebx), %esi # mbi->mmap_addr
movl $e820table, %edi
xorl %edx, %edx
mmap_loop:
cmpl $0, %ecx
jle mmap_end
movl 4(%esi), %eax # mmap->base_addr_low
movl %eax, (%edi)
movl 8(%esi), %eax # mmap->base_addr_high
movl %eax, 4(%edi)
movl 12(%esi), %eax # mmap->length_low
movl %eax, 8(%edi)
movl 16(%esi), %eax # mmap->length_high
movl %eax, 12(%edi)
movl 20(%esi), %eax # mmap->type
movl %eax, 16(%edi)
movl (%esi), %eax # mmap->size
addl $0x4, %eax
addl %eax, %esi
subl %eax, %ecx
addl $MEMMAP_E820_RECORD_SIZE, %edi
incl %edx
jmp mmap_loop
mmap_end:
mmap_invalid:
movl %edx, e820counter
invalid_boot:
#ifdef CONFIG_SMP
# copy AP bootstrap routines below 1 MB
movl $BOOT_OFFSET, %esi
movl $AP_BOOT_OFFSET, %edi
movl $_hardcoded_unmapped_size, %ecx
rep movsb
#endif
 
call main_bsp # never returns
# ia32_cboot(grub_eax, grub_ebx)
pushl grub_ebx
pushl grub_eax
call ia32_cboot # Does not return.
 
# Not reached.
 
cli
hlt
 
/branches/dynload/kernel/arch/ia32/src/boot/cboot.c
0,0 → 1,123
/*
* Copyright (c) 2009 Jiri Svoboda
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ia32
* @{
*/
/** @file
*/
 
#include <main/main.h>
#include <arch/boot/boot.h>
#include <arch/boot/cboot.h>
#include <arch/boot/memmap.h>
#include <config.h>
#include <memstr.h>
#include <func.h>
 
/* This is a symbol so the type is only dummy. Obtain the value using &. */
extern int _hardcoded_unmapped_size;
 
/** C part of ia32 boot sequence.
* @param signature Should contain the multiboot signature.
* @param mi Pointer to the multiboot information structure.
*/
void ia32_cboot(uint32_t signature, const mb_info_t *mi)
{
uint32_t flags;
mb_mod_t *mods;
uint32_t i;
 
if (signature == MULTIBOOT_LOADER_MAGIC) {
flags = mi->flags;
} else {
/* No multiboot info available. */
flags = 0;
}
 
/* Copy module information. */
 
if ((flags & MBINFO_FLAGS_MODS) != 0) {
init.cnt = mi->mods_count;
mods = mi->mods_addr;
 
for (i = 0; i < init.cnt; i++) {
init.tasks[i].addr = mods[i].start + 0x80000000;
init.tasks[i].size = mods[i].end - mods[i].start;
 
/* Copy command line, if available. */
if (mods[i].string) {
strncpy(init.tasks[i].name, mods[i].string,
CONFIG_TASK_NAME_BUFLEN - 1);
init.tasks[i].name[CONFIG_TASK_NAME_BUFLEN - 1]
= '\0';
} else {
init.tasks[i].name[0] = '\0';
}
}
} else {
init.cnt = 0;
}
 
/* Copy memory map. */
 
int32_t mmap_length;
mb_mmap_t *mme;
uint32_t size;
 
if ((flags & MBINFO_FLAGS_MMAP) != 0) {
mmap_length = mi->mmap_length;
mme = mi->mmap_addr;
e820counter = 0;
 
i = 0;
while (mmap_length > 0) {
e820table[i++] = mme->mm_info;
 
/* Compute address of next structure. */
size = sizeof(mme->size) + mme->size;
mme = ((void *) mme) + size;
mmap_length -= size;
}
 
e820counter = i;
} else {
e820counter = 0;
}
 
#ifdef CONFIG_SMP
/* Copy AP bootstrap routines below 1 MB. */
memcpy((void *) AP_BOOT_OFFSET, (void *) BOOT_OFFSET,
(size_t) &_hardcoded_unmapped_size);
#endif
 
main_bsp();
}
 
/** @}
*/
/branches/dynload/kernel/arch/ia32/src/mm/tlb.c
67,5 → 67,13
invlpg(page + i * PAGE_SIZE);
}
 
void tlb_arch_init(void)
{
}
 
void tlb_print(void)
{
}
 
/** @}
*/
/branches/dynload/kernel/arch/ia32/src/mm/frame.c
50,34 → 50,62
size_t hardcoded_unmapped_kdata_size = 0;
 
uintptr_t last_frame = 0;
uintptr_t end_frame = 0;
 
static void init_e820_memory(pfn_t minconf)
{
unsigned int i;
pfn_t start, conf;
size_t size;
 
for (i = 0; i < e820counter; i++) {
uint64_t base = e820table[i].base_address;
uint64_t size = e820table[i].size;
#ifdef __32_BITS__
/* Ignore physical memory above 4 GB */
if ((base >> 32) != 0)
continue;
/* Clip regions above 4 GB */
if (((base + size) >> 32) != 0)
size = 0xffffffff - base;
#endif
pfn_t pfn;
count_t count;
if (e820table[i].type == MEMMAP_MEMORY_AVAILABLE) {
start = ADDR2PFN(ALIGN_UP(e820table[i].base_address, FRAME_SIZE));
size = SIZE2FRAMES(ALIGN_DOWN(e820table[i].size, FRAME_SIZE));
/* To be safe, make available zone possibly smaller */
pfn = ADDR2PFN(ALIGN_UP(base, FRAME_SIZE));
count = SIZE2FRAMES(ALIGN_DOWN(size, FRAME_SIZE));
if ((minconf < start) || (minconf >= start + size))
conf = start;
pfn_t conf;
if ((minconf < pfn) || (minconf >= pfn + count))
conf = pfn;
else
conf = minconf;
zone_create(start, size, conf, 0);
zone_create(pfn, count, conf, ZONE_AVAILABLE);
if (last_frame < ALIGN_UP(e820table[i].base_address +
e820table[i].size, FRAME_SIZE))
last_frame =
ALIGN_UP(e820table[i].base_address + e820table[i].size, FRAME_SIZE);
// XXX this has to be removed
if (last_frame < ALIGN_UP(base + size, FRAME_SIZE))
last_frame = ALIGN_UP(base + size, FRAME_SIZE);
}
if (e820table[i].type == MEMMAP_MEMORY_RESERVED) {
/* To be safe, make reserved zone possibly larger */
pfn = ADDR2PFN(ALIGN_DOWN(base, FRAME_SIZE));
count = SIZE2FRAMES(ALIGN_UP(size, FRAME_SIZE));
zone_create(pfn, count, 0, ZONE_RESERVED);
}
if (e820table[i].type == MEMMAP_MEMORY_ACPI) {
/* To be safe, make firmware zone possibly larger */
pfn = ADDR2PFN(ALIGN_DOWN(base, (uintptr_t) FRAME_SIZE));
count = SIZE2FRAMES(ALIGN_UP(size, (uintptr_t) FRAME_SIZE));
zone_create(pfn, count, 0, ZONE_FIRMWARE);
}
}
end_frame = last_frame;
}
 
static char *e820names[] = {
/branches/dynload/kernel/arch/ia32/src/mm/page.c
53,7 → 53,7
{
uintptr_t cur;
int flags;
 
if (config.cpu_active == 1) {
page_mapping_operations = &pt_mapping_operations;
66,12 → 66,12
flags |= PAGE_GLOBAL;
page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
}
 
exc_register(14, "page_fault", (iroutine) page_fault);
write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
} else
write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
 
paging_on();
}
 
93,12 → 93,6
return virtaddr;
}
 
void hw_area(uintptr_t *physaddr, pfn_t *frames)
{
*physaddr = end_frame;
*frames = ADDR2PFN(0xffffffff - end_frame);
}
 
void page_fault(int n __attribute__((unused)), istate_t *istate)
{
uintptr_t page;
/branches/dynload/kernel/arch/ia32/src/drivers/i8259.c
119,8 → 119,8
 
void pic_eoi(void)
{
pio_write_8(0x20, 0x20);
pio_write_8(0xa0, 0x20);
pio_write_8((ioport8_t *)0x20, 0x20);
pio_write_8((ioport8_t *)0xa0, 0x20);
}
 
void pic_spurious(int n __attribute__((unused)), istate_t *istate __attribute__((unused)))
/branches/dynload/kernel/arch/ia32/src/drivers/i8254.c
53,8 → 53,8
#include <ddi/irq.h>
#include <ddi/device.h>
 
#define CLK_PORT1 0x40
#define CLK_PORT4 0x43
#define CLK_PORT1 ((ioport8_t *)0x40)
#define CLK_PORT4 ((ioport8_t *)0x43)
 
#define CLK_CONST 1193180
#define MAGIC_NUMBER 1194
61,7 → 61,7
 
static irq_t i8254_irq;
 
static irq_ownership_t i8254_claim(void *instance)
static irq_ownership_t i8254_claim(irq_t *irq)
{
return IRQ_ACCEPT;
}