| 55,7 → 55,11 |
|---|
| { |
| uintptr_t v; |
| |
| asm volatile ("and %0, $29, %1\n" : "=r" (v) : "r" (~(STACK_SIZE-1))); |
| asm volatile ( |
| "and %0, $29, %1\n" |
| : "=r" (v) |
| : "r" (~(STACK_SIZE-1)) |
| ); |
| |
| return v; |
| } |
| 69,16 → 73,16 |
|---|
| extern ipl_t interrupts_enable(void); |
| extern void interrupts_restore(ipl_t ipl); |
| extern ipl_t interrupts_read(void); |
| extern void asm_delay_loop(uint32_t t); |
| |
| /** No I/O port address space on MIPS. */ |
| static inline void outb(ioport_t port, uint8_t v) |
| static inline void pio_write_8(ioport_t port, uint8_t v) |
| { |
| /* XXX */ |
| } |
| |
| /** No I/O port address space on MIPS. */ |
| static inline uint8_t inb(ioport_t port) |
| static inline uint8_t pio_read_8(ioport_t port) |
| { |
| return 0; |
| return 0; /* XXX */ |
| } |
| |
| #endif |