| /branches/dynload/kernel/arch/ia32/include/types.h |
|---|
| 57,30 → 57,28 |
| typedef uint32_t unative_t; |
| typedef int32_t native_t; |
| /**< Formats for uintptr_t, size_t, count_t and index_t */ |
| #define PRIp "x" |
| #define PRIs "u" |
| #define PRIc "u" |
| #define PRIi "u" |
| #define PRIp "x" /**< Format for uintptr_t. */ |
| #define PRIs "u" /**< Format for size_t. */ |
| #define PRIc "u" /**< Format for count_t. */ |
| #define PRIi "u" /**< Format for index_t. */ |
| /**< Formats for (u)int8_t, (u)int16_t, (u)int32_t, (u)int64_t and (u)native_t */ |
| #define PRId8 "d" |
| #define PRId16 "d" |
| #define PRId32 "d" |
| #define PRId64 "lld" |
| #define PRIdn "d" |
| #define PRId8 "d" /**< Format for int8_t. */ |
| #define PRId16 "d" /**< Format for int16_t. */ |
| #define PRId32 "d" /**< Format for int32_t. */ |
| #define PRId64 "lld" /**< Format for int64_t. */ |
| #define PRIdn "d" /**< Format for native_t. */ |
| #define PRIu8 "u" |
| #define PRIu16 "u" |
| #define PRIu32 "u" |
| #define PRIu64 "llu" |
| #define PRIun "u" |
| #define PRIu8 "u" /**< Format for uint8_t. */ |
| #define PRIu16 "u" /**< Format for uint16_t. */ |
| #define PRIu32 "u" /**< Format for uint32_t. */ |
| #define PRIu64 "llu" /**< Format for uint64_t. */ |
| #define PRIun "u" /**< Format for unative_t. */ |
| #define PRIx8 "x" |
| #define PRIx16 "x" |
| #define PRIx32 "x" |
| #define PRIx64 "llx" |
| #define PRIxn "x" |
| #define PRIx8 "x" /**< Format for hexadecimal (u)int8_t. */ |
| #define PRIx16 "x" /**< Format for hexadecimal (u)int16_t. */ |
| #define PRIx32 "x" /**< Format for hexadecimal (u)uint32_t. */ |
| #define PRIx64 "llx" /**< Format for hexadecimal (u)int64_t. */ |
| #define PRIxn "x" /**< Format for hexadecimal (u)native_t. */ |
| /** Page Table Entry. */ |
| typedef struct { |
| /branches/dynload/kernel/arch/ia32/include/memstr.h |
|---|
| 37,10 → 37,10 |
| #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) |
| extern void memsetw(uintptr_t dst, size_t cnt, uint16_t x); |
| extern void memsetb(uintptr_t dst, size_t cnt, uint8_t x); |
| extern void memsetw(void *dst, size_t cnt, uint16_t x); |
| extern void memsetb(void *dst, size_t cnt, uint8_t x); |
| extern int memcmp(uintptr_t src, uintptr_t dst, int cnt); |
| extern int memcmp(const void *a, const void *b, size_t cnt); |
| #endif |
| /branches/dynload/kernel/arch/ia32/include/barrier.h |
|---|
| 95,6 → 95,15 |
| # endif |
| #endif |
| /* |
| * On ia32, the hardware takes care about instruction and data cache coherence, |
| * even on SMP systems. We issue a write barrier to be sure that writes |
| * queueing in the store buffer drain to the memory (even though it would be |
| * sufficient for them to drain to the D-cache). |
| */ |
| #define smc_coherence(a) write_barrier() |
| #define smc_coherence_block(a, l) write_barrier() |
| #endif |
| /** @} |
| /branches/dynload/kernel/arch/ia32/src/pm.c |
|---|
| 112,7 → 112,7 |
| void tss_initialize(tss_t *t) |
| { |
| memsetb((uintptr_t) t, sizeof(struct tss), 0); |
| memsetb(t, sizeof(struct tss), 0); |
| } |
| /* |
| 240,7 → 240,7 |
| preemption_disable(); |
| ipl_t ipl = interrupts_disable(); |
| memsetb((uintptr_t) idt, sizeof(idt), 0); |
| memsetb(idt, sizeof(idt), 0); |
| ptr_16_32_t idtr; |
| idtr.limit = sizeof(idt); |
| /branches/dynload/kernel/arch/ia32/src/smp/smp.c |
|---|
| 160,8 → 160,7 |
| panic("couldn't allocate memory for GDT\n"); |
| memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor)); |
| memsetb((uintptr_t)(&gdt_new[TSS_DES]), |
| sizeof(struct descriptor), 0); |
| memsetb(&gdt_new[TSS_DES], sizeof(struct descriptor), 0); |
| protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor); |
| protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new); |
| gdtr.base = (uintptr_t) gdt_new; |
| /branches/dynload/kernel/arch/ia32/src/smp/ap.S |
|---|
| 45,7 → 45,7 |
| KTEXT=8 |
| KDATA=16 |
| # This piece of code is real-mode and is meant to be alligned at 4K boundary. |
| # This piece of code is real-mode and is meant to be aligned at 4K boundary. |
| # The requirement for such an alignment comes from MP Specification's STARTUP IPI |
| # requirements. |
| /branches/dynload/kernel/arch/ia32/src/drivers/ega.c |
|---|
| 115,7 → 115,7 |
| return; |
| memcpy((void *) videoram, (void *) (videoram + ROW * 2), (SCREEN - ROW) * 2); |
| memsetw((uintptr_t) (videoram + (SCREEN - ROW) * 2), ROW, 0x0720); |
| memsetw(videoram + (SCREEN - ROW) * 2, ROW, 0x0720); |
| ega_cursor = ega_cursor - ROW; |
| } |