/branches/dynload/kernel/arch/sparc64/src/drivers/kbd.c |
---|
46,7 → 46,6 |
#endif |
#include <console/console.h> |
#include <ddi/device.h> |
#include <ddi/irq.h> |
#include <arch/mm/page.h> |
#include <arch/types.h> |
74,7 → 73,7 |
const char *name; |
cir_t cir; |
void *cir_arg; |
#ifdef CONFIG_NS16550 |
ns16550_t *ns16550; |
#endif |
115,7 → 114,6 |
uintptr_t pa; |
size_t size; |
devno_t devno; |
inr_t inr; |
switch (kbd_type) { |
164,11 → 162,10 |
switch (kbd_type) { |
#ifdef CONFIG_Z8530 |
case KBD_Z8530: |
devno = device_assign_devno(); |
z8530 = (z8530_t *) hw_map(aligned_addr, offset + size) + |
offset; |
indev_t *kbrdin_z8530 = z8530_init(z8530, devno, inr, cir, cir_arg); |
indev_t *kbrdin_z8530 = z8530_init(z8530, inr, cir, cir_arg); |
if (kbrdin_z8530) |
kbrd_init(kbrdin_z8530); |
178,7 → 175,6 |
*/ |
sysinfo_set_item_val("kbd", NULL, true); |
sysinfo_set_item_val("kbd.type", NULL, KBD_Z8530); |
sysinfo_set_item_val("kbd.devno", NULL, devno); |
sysinfo_set_item_val("kbd.inr", NULL, inr); |
sysinfo_set_item_val("kbd.address.kernel", NULL, |
(uintptr_t) z8530); |
187,11 → 183,10 |
#endif |
#ifdef CONFIG_NS16550 |
case KBD_NS16550: |
devno = device_assign_devno(); |
ns16550 = (ns16550_t *) hw_map(aligned_addr, offset + size) + |
offset; |
indev_t *kbrdin_ns16550 = ns16550_init(ns16550, devno, inr, cir, cir_arg); |
indev_t *kbrdin_ns16550 = ns16550_init(ns16550, inr, cir, cir_arg); |
if (kbrdin_ns16550) |
kbrd_init(kbrdin_ns16550); |
201,7 → 196,6 |
*/ |
sysinfo_set_item_val("kbd", NULL, true); |
sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550); |
sysinfo_set_item_val("kbd.devno", NULL, devno); |
sysinfo_set_item_val("kbd.inr", NULL, inr); |
sysinfo_set_item_val("kbd.address.kernel", NULL, |
(uintptr_t) ns16550); |
/branches/dynload/kernel/arch/ia64/src/ia64.c |
---|
50,7 → 50,6 |
#include <proc/uarg.h> |
#include <syscall/syscall.h> |
#include <ddi/irq.h> |
#include <ddi/device.h> |
#include <arch/bootinfo.h> |
#include <genarch/drivers/legacy/ia32/io.h> |
#include <genarch/drivers/ega/ega.h> |
162,14 → 161,12 |
#endif |
#ifdef CONFIG_NS16550 |
devno_t devno_ns16550 = device_assign_devno(); |
indev_t *kbrdin_ns16550 |
= ns16550_init((ns16550_t *) NS16550_BASE, devno_ns16550, NS16550_IRQ, NULL, NULL); |
= ns16550_init((ns16550_t *) NS16550_BASE, NS16550_IRQ, NULL, NULL); |
if (kbrdin_ns16550) |
srln_init(kbrdin_ns16550); |
sysinfo_set_item_val("kbd", NULL, true); |
sysinfo_set_item_val("kbd.devno", NULL, devno_ns16550); |
sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ); |
sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550); |
sysinfo_set_item_val("kbd.address.physical", NULL, |
179,13 → 176,11 |
#endif |
#ifdef CONFIG_I8042 |
devno_t devno_i8042 = device_assign_devno(); |
indev_t *kbrdin_i8042 = i8042_init((i8042_t *) I8042_BASE, devno_i8042, IRQ_KBD); |
indev_t *kbrdin_i8042 = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD); |
if (kbrdin_i8042) |
kbrd_init(kbrdin_i8042); |
sysinfo_set_item_val("kbd", NULL, true); |
sysinfo_set_item_val("kbd.devno", NULL, devno_i8042); |
sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD); |
sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY); |
sysinfo_set_item_val("kbd.address.physical", NULL, |
/branches/dynload/kernel/arch/ia64/src/drivers/it.c |
---|
26,7 → 26,7 |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/** @addtogroup ia64 |
/** @addtogroup ia64 |
* @{ |
*/ |
/** @file |
/branches/dynload/kernel/arch/arm32/src/arm32.c |
---|
36,7 → 36,6 |
#include <arch.h> |
#include <config.h> |
#include <arch/console.h> |
#include <ddi/device.h> |
#include <genarch/fb/fb.h> |
#include <genarch/fb/visuals.h> |
#include <genarch/drivers/dsrln/dsrlnin.h> |
128,13 → 127,11 |
void arch_post_smp_init(void) |
{ |
#ifdef CONFIG_ARM_KBD |
devno_t devno = device_assign_devno(); |
/* |
* Initialize the msim/GXemul keyboard port. Then initialize the serial line |
* module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts. |
*/ |
indev_t *kbrdin = dsrlnin_init((dsrlnin_t *) gxemul_kbd, devno, GXEMUL_KBD_IRQ); |
indev_t *kbrdin = dsrlnin_init((dsrlnin_t *) gxemul_kbd, GXEMUL_KBD_IRQ); |
if (kbrdin) |
srln_init(kbrdin); |
143,7 → 140,6 |
* self-sufficient. |
*/ |
sysinfo_set_item_val("kbd", NULL, true); |
sysinfo_set_item_val("kbd.devno", NULL, devno); |
sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ); |
sysinfo_set_item_val("kbd.address.virtual", NULL, (unative_t) gxemul_kbd); |
#endif |
/branches/dynload/kernel/arch/ppc32/include/drivers/cuda.h |
---|
38,7 → 38,7 |
#include <arch/types.h> |
#include <typedefs.h> |
extern void cuda_init(devno_t devno, uintptr_t base, size_t size); |
extern void cuda_init(uintptr_t base, size_t size); |
extern int cuda_get_scancode(void); |
#endif |
/branches/dynload/kernel/arch/ppc32/src/ppc32.c |
---|
42,7 → 42,6 |
#include <userspace.h> |
#include <proc/uarg.h> |
#include <console/console.h> |
#include <ddi/device.h> |
#include <ddi/irq.h> |
#include <arch/drivers/pic.h> |
#include <macros.h> |
121,8 → 120,7 |
pic_init(bootinfo.macio.addr, PAGE_SIZE); |
/* Initialize I/O controller */ |
cuda_init(device_assign_devno(), |
bootinfo.macio.addr + 0x16000, 2 * PAGE_SIZE); |
cuda_init(bootinfo.macio.addr + 0x16000, 2 * PAGE_SIZE); |
} |
/* Merge all zones to 1 big zone */ |
/branches/dynload/kernel/arch/ppc32/src/drivers/cuda.c |
---|
40,6 → 40,7 |
#include <sysinfo/sysinfo.h> |
#include <interrupt.h> |
#include <stdarg.h> |
#include <ddi/device.h> |
#define CUDA_IRQ 10 |
#define SPECIAL '?' |
241,7 → 242,7 |
return IRQ_ACCEPT; |
} |
void cuda_init(devno_t devno, uintptr_t base, size_t size) |
void cuda_init(uintptr_t base, size_t size) |
{ |
cuda = (uint8_t *) hw_map(base, size); |
249,7 → 250,7 |
stdin = &kbrd; |
irq_initialize(&cuda_irq); |
cuda_irq.devno = devno; |
cuda_irq.devno = device_assign_devno(); |
cuda_irq.inr = CUDA_IRQ; |
cuda_irq.claim = cuda_claim; |
cuda_irq.handler = cuda_irq_handler; |
258,7 → 259,6 |
pic_enable_interrupt(CUDA_IRQ); |
sysinfo_set_item_val("kbd", NULL, true); |
sysinfo_set_item_val("kbd.devno", NULL, devno); |
sysinfo_set_item_val("kbd.inr", NULL, CUDA_IRQ); |
sysinfo_set_item_val("kbd.address.virtual", NULL, base); |
} |
/branches/dynload/kernel/arch/amd64/_link.ld.in |
---|
43,8 → 43,6 |
QUAD(unmapped_kdata_end - unmapped_kdata_start); |
*(COMMON); /* global variables */ |
*(.eh_frame); |
symbol_table = .; |
*(symtab.*); /* Symbol table, must be LAST symbol!*/ |
52,6 → 50,10 |
kdata_end = .; |
} |
/DISCARD/ : { |
*(*); |
} |
#ifdef CONFIG_SMP |
_hardcoded_unmapped_size = (unmapped_ktext_end - unmapped_ktext_start) + (unmapped_kdata_end - unmapped_kdata_start); |
/branches/dynload/kernel/arch/amd64/include/cpuid.h |
---|
35,14 → 35,15 |
#ifndef KERN_amd64_CPUID_H_ |
#define KERN_amd64_CPUID_H_ |
#define AMD_CPUID_EXTENDED 0x80000001 |
#define AMD_EXT_NOEXECUTE 20 |
#define AMD_EXT_LONG_MODE 29 |
#define AMD_CPUID_EXTENDED 0x80000001 |
#define AMD_EXT_NOEXECUTE 20 |
#define AMD_EXT_LONG_MODE 29 |
#define INTEL_CPUID_STANDARD 0x00000001 |
#define INTEL_CPUID_EXTENDED 0x80000000 |
#define INTEL_SSE2 26 |
#define INTEL_FXSAVE 24 |
#define INTEL_CPUID_LEVEL 0x00000000 |
#define INTEL_CPUID_STANDARD 0x00000001 |
#define INTEL_CPUID_EXTENDED 0x80000000 |
#define INTEL_SSE2 26 |
#define INTEL_FXSAVE 24 |
#ifndef __ASM__ |
/branches/dynload/kernel/arch/amd64/src/amd64.c |
---|
65,7 → 65,6 |
#include <syscall/syscall.h> |
#include <console/console.h> |
#include <ddi/irq.h> |
#include <ddi/device.h> |
#include <sysinfo/sysinfo.h> |
/** Disable I/O on non-privileged levels |
194,13 → 193,11 |
void arch_post_smp_init(void) |
{ |
#ifdef CONFIG_PC_KBD |
devno_t devno = device_assign_devno(); |
/* |
* Initialize the i8042 controller. Then initialize the keyboard |
* module and connect it to i8042. Enable keyboard interrupts. |
*/ |
indev_t *kbrdin = i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD); |
indev_t *kbrdin = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD); |
if (kbrdin) { |
kbrd_init(kbrdin); |
trap_virtual_enable_irqs(1 << IRQ_KBD); |
211,7 → 208,6 |
* self-sufficient. |
*/ |
sysinfo_set_item_val("kbd", NULL, true); |
sysinfo_set_item_val("kbd.devno", NULL, devno); |
sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD); |
sysinfo_set_item_val("kbd.address.physical", NULL, |
(uintptr_t) I8042_BASE); |
/branches/dynload/kernel/arch/mips32/src/mips32.c |
---|
56,7 → 56,6 |
#include <genarch/drivers/dsrln/dsrlnout.h> |
#include <genarch/srln/srln.h> |
#include <macros.h> |
#include <ddi/device.h> |
#include <config.h> |
#include <string.h> |
#include <arch/drivers/msim.h> |
166,13 → 165,11 |
void arch_post_smp_init(void) |
{ |
#ifdef CONFIG_MIPS_KBD |
devno_t devno = device_assign_devno(); |
/* |
* Initialize the msim/GXemul keyboard port. Then initialize the serial line |
* module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts. |
*/ |
indev_t *kbrdin = dsrlnin_init((dsrlnin_t *) MSIM_KBD_ADDRESS, devno, MSIM_KBD_IRQ); |
indev_t *kbrdin = dsrlnin_init((dsrlnin_t *) MSIM_KBD_ADDRESS, MSIM_KBD_IRQ); |
if (kbrdin) { |
srln_init(kbrdin); |
cp0_unmask_int(MSIM_KBD_IRQ); |
183,7 → 180,6 |
* self-sufficient. |
*/ |
sysinfo_set_item_val("kbd", NULL, true); |
sysinfo_set_item_val("kbd.devno", NULL, devno); |
sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ); |
sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS); |
#endif |
/branches/dynload/kernel/arch/ia32/include/cpuid.h |
---|
35,6 → 35,13 |
#ifndef KERN_ia32_CPUID_H_ |
#define KERN_ia32_CPUID_H_ |
#define INTEL_CPUID_LEVEL 0x00000000 |
#define INTEL_CPUID_STANDARD 0x00000001 |
#define INTEL_PSE 3 |
#define INTEL_SEP 11 |
#ifndef __ASM__ |
#include <arch/types.h> |
typedef struct { |
104,6 → 111,7 |
); |
} |
#endif /* !def __ASM__ */ |
#endif |
/** @} |
/branches/dynload/kernel/arch/ia32/src/ia32.c |
---|
65,7 → 65,6 |
#include <proc/thread.h> |
#include <syscall/syscall.h> |
#include <console/console.h> |
#include <ddi/device.h> |
#include <sysinfo/sysinfo.h> |
#include <arch/boot/boot.h> |
152,13 → 151,11 |
void arch_post_smp_init(void) |
{ |
#ifdef CONFIG_PC_KBD |
devno_t devno = device_assign_devno(); |
/* |
* Initialize the i8042 controller. Then initialize the keyboard |
* module and connect it to i8042. Enable keyboard interrupts. |
*/ |
indev_t *kbrdin = i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD); |
indev_t *kbrdin = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD); |
if (kbrdin) { |
kbrd_init(kbrdin); |
trap_virtual_enable_irqs(1 << IRQ_KBD); |
169,7 → 166,6 |
* self-sufficient. |
*/ |
sysinfo_set_item_val("kbd", NULL, true); |
sysinfo_set_item_val("kbd.devno", NULL, devno); |
sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD); |
sysinfo_set_item_val("kbd.address.physical", NULL, |
(uintptr_t) I8042_BASE); |
/branches/dynload/kernel/arch/ia32/src/smp/apic.c |
---|
26,7 → 26,7 |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/** @addtogroup ia32 |
/** @addtogroup ia32 |
* @{ |
*/ |
/** @file |
/branches/dynload/kernel/arch/ia32/src/boot/boot.S |
---|
31,6 → 31,7 |
#include <arch/boot/memmap.h> |
#include <arch/mm/page.h> |
#include <arch/pm.h> |
#include <arch/cpuid.h> |
#define START_STACK (BOOT_OFFSET - BOOT_STACK_SIZE) |
67,13 → 68,14 |
movl %eax, grub_eax # save parameters from GRUB |
movl %ebx, grub_ebx |
xorl %eax, %eax |
movl $(INTEL_CPUID_LEVEL), %eax |
cpuid |
cmp $0x0, %eax # any function > 0? |
jbe pse_unsupported |
movl $0x1, %eax # basic function code 1 |
movl $(INTEL_CPUID_STANDARD), %eax |
cpuid |
bt $3, %edx # test if PSE is supported |
bt $(INTEL_PSE), %edx |
jc pse_supported |
pse_unsupported: |
81,6 → 83,14 |
jmp error_halt |
pse_supported: |
bt $(INTEL_SEP), %edx |
jc sep_supported |
movl $sep_msg, %esi |
jmp error_halt |
sep_supported: |
#include "vesa_prot.inc" |
213,3 → 223,6 |
pse_msg: |
.asciz "Page Size Extension not supported. System halted." |
sep_msg: |
.asciz "SYSENTER/SYSEXIT not supported. System halted." |
/branches/dynload/kernel/arch/ia32/src/boot/vesa_real.inc |
---|
4,22 → 4,28 |
#define VESA_INFO_SIZE 1024 |
#define VESA_MODE_ATTRIBUTES_OFFSET 0 |
#define VESA_MODE_LIST_PTR_OFFSET 14 |
#define VESA_MODE_SCANLINE_OFFSET 16 |
#define VESA_MODE_WIDTH_OFFSET 18 |
#define VESA_MODE_HEIGHT_OFFSET 20 |
#define VESA_MODE_BPP_OFFSET 25 |
#define VESA_MODE_PHADDR_OFFSET 40 |
#define VESA_MODE_ATTRIBUTES_OFFSET 0 |
#define VESA_MODE_LIST_PTR_OFFSET 14 |
#define VESA_MODE_SCANLINE_OFFSET 16 |
#define VESA_MODE_WIDTH_OFFSET 18 |
#define VESA_MODE_HEIGHT_OFFSET 20 |
#define VESA_MODE_BPP_OFFSET 25 |
#define VESA_MODE_RED_MASK_OFFSET 31 |
#define VESA_MODE_RED_POS_OFFSET 32 |
#define VESA_MODE_GREEN_MASK_OFFSET 33 |
#define VESA_MODE_GREEN_POS_OFFSET 34 |
#define VESA_MODE_BLUE_MASK_OFFSET 35 |
#define VESA_MODE_BLUE_POS_OFFSET 36 |
#define VESA_MODE_PHADDR_OFFSET 40 |
#define VESA_END_OF_MODES 0xffff |
#define VESA_END_OF_MODES 0xffff |
#define VESA_OK 0x4f |
#define VESA_OK 0x4f |
#define VESA_GET_INFO 0x4f00 |
#define VESA_GET_MODE_INFO 0x4f01 |
#define VESA_SET_MODE 0x4f02 |
#define VESA_SET_PALETTE 0x4f09 |
#define VESA_GET_INFO 0x4f00 |
#define VESA_GET_MODE_INFO 0x4f01 |
#define VESA_SET_MODE 0x4f02 |
#define VESA_SET_PALETTE 0x4f09 |
.code32 |
vesa_init: |
163,7 → 169,7 |
# try next mode |
mov %gs:(%si), %cx |
cmp $VESA_END_OF_MODES, %cx |
jz no_mode |
je no_mode |
inc %si |
inc %si |
177,29 → 183,40 |
pop %di |
pop %cx |
cmp $VESA_OK, %al |
jnz no_mode |
jne no_mode |
# check for proper attributes (supported, color, graphics, linear framebuffer) |
mov VESA_MODE_ATTRIBUTES_OFFSET(%di), %ax |
and $0x99, %ax |
cmp $0x99, %ax |
jne next_mode |
# check for proper resolution |
mov default_width - vesa_init, %ax |
cmp VESA_MODE_WIDTH_OFFSET(%di), %ax |
jnz next_mode |
jne next_mode |
mov default_height - vesa_init, %ax |
cmp VESA_MODE_HEIGHT_OFFSET(%di), %ax |
jnz next_mode |
jne next_mode |
# check for proper bpp |
mov default_bpp - vesa_init, %al |
cmp VESA_MODE_BPP_OFFSET(%di), %al |
jz set_mode |
je set_mode |
mov $24, %al |
cmp default_bpp - vesa_init, %al |
jnz next_mode |
jne next_mode |
# for 24 bpp modes accept also 32 bit bpp |
mov $32, %al |
cmp VESA_MODE_BPP_OFFSET(%di), %al |
jnz next_mode |
jne next_mode |
set_mode: |
mov %cx, %bx |
266,21 → 283,42 |
vga_not_set: |
mov VESA_MODE_PHADDR_OFFSET(%di), %esi |
mov VESA_MODE_WIDTH_OFFSET(%di), %ax |
# store mode parameters |
# eax = bpp[8] scanline[16] |
# ebx = width[16] height[16] |
# edx = red_mask[8] red_pos[8] green_mask[8] green_pos[8] |
# esi = blue_mask[8] blue_pos[8] |
# edi = linear frame buffer |
mov VESA_MODE_BPP_OFFSET(%di), %al |
xor %ah, %ah |
shl $16, %eax |
mov VESA_MODE_HEIGHT_OFFSET(%di), %ax |
mov VESA_MODE_BPP_OFFSET(%di), %bl |
xor %bh, %bh |
mov VESA_MODE_SCANLINE_OFFSET(%di), %ax |
mov VESA_MODE_WIDTH_OFFSET(%di), %bx |
shl $16, %ebx |
mov VESA_MODE_SCANLINE_OFFSET(%di), %bx |
mov %eax, %edi |
mov VESA_MODE_HEIGHT_OFFSET(%di), %bx |
mov VESA_MODE_BLUE_MASK_OFFSET(%di), %dl |
shl $8, %edx |
mov VESA_MODE_BLUE_POS_OFFSET(%di), %dl |
mov %edx, %esi |
mov VESA_MODE_RED_MASK_OFFSET(%di), %dl |
shl $8, %edx |
mov VESA_MODE_RED_POS_OFFSET(%di), %dl |
shl $8, %edx |
mov VESA_MODE_GREEN_MASK_OFFSET(%di), %dl |
shl $8, %edx |
mov VESA_MODE_GREEN_POS_OFFSET(%di), %dl |
mov VESA_MODE_PHADDR_OFFSET(%di), %edi |
vesa_leave_real: |
mov %cr0, %eax |
or $1, %eax |
mov %eax, %cr0 |
mov %cr0, %ecx |
or $1, %ecx |
mov %ecx, %cr0 |
jmp vesa_leave_real2 |
/branches/dynload/kernel/arch/ia32/src/boot/vesa_prot.inc |
---|
38,9 → 38,18 |
jmp skip_loop |
skip_loop_done: |
mov (%esi), %al |
cmp $0, %al |
je no_cmdline |
space_loop: |
mov (%esi), %al |
cmp $0, %al |
je no_cmdline |
cmp $' ', %al |
jne space_loop_done |
inc %esi |
jmp space_loop |
space_loop_done: |
# copy at most 23 characters from command line |
73,11 → 82,26 |
vesa_meeting_point: |
# returned back to protected mode |
mov %esi, KA2PA(vesa_ph_addr) |
mov %di, KA2PA(vesa_height) |
shr $16, %edi |
mov %di, KA2PA(vesa_width) |
mov %bx, KA2PA(vesa_scanline) |
mov %ax, KA2PA(vesa_scanline) |
shr $16, %eax |
mov %ax, KA2PA(vesa_bpp) |
mov %bx, KA2PA(vesa_height) |
shr $16, %ebx |
mov %bx, KA2PA(vesa_bpp) |
mov %bx, KA2PA(vesa_width) |
mov %dl, KA2PA(vesa_green_pos) |
shr $8, %edx |
mov %dl, KA2PA(vesa_green_mask) |
shr $8, %edx |
mov %dl, KA2PA(vesa_red_pos) |
shr $8, %edx |
mov %dl, KA2PA(vesa_red_mask) |
mov %esi, %edx |
mov %dl, KA2PA(vesa_blue_pos) |
shr $8, %edx |
mov %dl, KA2PA(vesa_blue_mask) |
mov %edi, KA2PA(vesa_ph_addr) |
#endif |
/branches/dynload/kernel/arch/ia32/src/drivers/vesa.c |
---|
56,6 → 56,15 |
uint16_t vesa_bpp; |
uint16_t vesa_scanline; |
uint8_t vesa_red_mask; |
uint8_t vesa_red_pos; |
uint8_t vesa_green_mask; |
uint8_t vesa_green_pos; |
uint8_t vesa_blue_mask; |
uint8_t vesa_blue_pos; |
int vesa_present(void) |
{ |
if ((vesa_width != 0xffff) && (vesa_height != 0xffff)) |
73,7 → 82,12 |
visual = VISUAL_INDIRECT_8; |
break; |
case 16: |
visual = VISUAL_RGB_5_6_5; |
if ((vesa_red_mask == 5) && (vesa_red_pos == 10) |
&& (vesa_green_mask == 5) && (vesa_green_pos == 5) |
&& (vesa_blue_mask == 5) && (vesa_blue_pos == 0)) |
visual = VISUAL_RGB_5_5_5; |
else |
visual = VISUAL_RGB_5_6_5; |
break; |
case 24: |
visual = VISUAL_RGB_8_8_8; |
/branches/dynload/kernel/arch/ia32/src/drivers/i8254.c |
---|
26,12 → 26,12 |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/** @addtogroup ia32 |
/** @addtogroup ia32 |
* @{ |
*/ |
/** |
* @file |
* @brief i8254 chip driver. |
* @brief i8254 chip driver. |
* |
* Low level time functions. |
*/ |