0,0 → 1,125 |
#include <unistd.h> |
#include <ddi.h> |
#include <libarch/ddi.h> |
#include <stdio.h> |
|
#include "internal.h" |
#include "header.h" |
|
/* physical addresses and offsets */ |
#define U2P_BASE 0x1FE00000000 |
#define PCI_CONF_OFFSET 0x001000000 |
#define PCI_CONF_SIZE 0x001000000 |
#define PCI_CONF_BASE (U2P_BASE + PCI_CONF_OFFSET) |
|
/* virtual address of PCI configuration space */ |
static void *conf_addr = 0; |
|
/* |
* virtual address of specified PCI configuration register: |
* bus ... bus number (0 for top level PCI bus B, 1 for top level PCI bus A) |
* dev ... device number (0 - 15) |
* fn ... function number (0 - 7) |
* reg ... register number (register's position within PCI configuration header) |
**/ |
#define CONF_ADDR(bus, dev, fn, reg) (conf_addr + ((bus << 16) | (dev << 11) | (fn << 8) | (reg << 2))) |
|
|
static void us2i_init(struct pci_access *a) |
{ |
} |
|
static void us2i_cleanup(struct pci_access *a UNUSED) |
{ |
} |
|
static int us2i_detect(struct pci_access *a) |
{ |
unsigned int tmp; |
|
/* |
* Gain control over PCI configuration ports. |
*/ |
if (pio_enable((void *)PCI_CONF_BASE, PCI_CONF_SIZE, &conf_addr)) { |
return 0; |
} |
|
printf("PCI: conf_addr = %lx", conf_addr); |
printf("PCI: vendor id address = %lx", CONF_ADDR(0, 0, 0, PCI_VENDOR_ID)); |
|
asm volatile ("sethi 0x42224, %g0"); |
int vendor_id = pio_read_16(CONF_ADDR(0, 0, 0, PCI_VENDOR_ID)); |
vendor_id = vendor_id | pio_read_8(CONF_ADDR(0, 0, 0, PCI_VENDOR_ID + 1)) << 8; |
int device_id = pio_read_8(CONF_ADDR(0, 0, 0, PCI_DEVICE_ID)); |
device_id = device_id | pio_read_8(CONF_ADDR(0, 0, 0, PCI_DEVICE_ID + 1)) << 8; |
|
printf("PCI: vendor id = %x", vendor_id); |
printf("PCI: device id = %x", device_id); |
|
return vendor_id == 0x108E && device_id == 0x8000; // should be Psycho from Sun Microsystems |
} |
|
static int us2i_read(struct pci_dev *d, int pos, byte * buf, int len) |
{ |
if (pos >= 256) |
return 0; |
|
switch (len) { |
case 1: |
buf[0] = pio_read_8(CONF_ADDR(d->bus, d->dev, d->func, pos)); |
break; |
case 2: |
us2i_read(d, pos + 1, buf, 1); // unlike PCI, sparc uses big endian |
us2i_read(d, pos, buf + 1, 1); |
break; |
case 4: |
us2i_read(d, pos + 3, buf, 1); // endians in an ugly way ... FIX ME |
us2i_read(d, pos + 2, buf + 1, 1); |
us2i_read(d, pos + 1, buf + 2, 1); |
us2i_read(d, pos, buf + 3, 1); |
break; |
default: |
return pci_generic_block_read(d, pos, buf, len); |
} |
return 1; |
} |
|
static int us2i_write(struct pci_dev *d, int pos, byte * buf, int len) |
{ |
if (pos >= 256) |
return 0; |
|
switch (len) { |
case 1: |
pio_write_8(CONF_ADDR(d->bus, d->dev, d->func, pos), buf[0]); |
break; |
case 2: |
us2i_write(d, pos + 1, buf, 1); // unlike PCI, sparc uses big endian |
us2i_write(d, pos, buf + 1, 1); |
break; |
case 4: |
us2i_write(d, pos + 3, buf, 1); // endians in an ugly way ... FIX ME |
us2i_write(d, pos + 2, buf + 1, 1); |
us2i_write(d, pos + 1, buf + 2, 1); |
us2i_write(d, pos, buf + 3, 1); |
break; |
default: |
return pci_generic_block_write(d, pos, buf, len); |
} |
return 1; |
} |
|
|
struct pci_methods pm_us2i = { |
"Ultra Sparc IIi", |
NULL, /* config */ |
us2i_detect, |
us2i_init, |
us2i_cleanup, |
pci_generic_scan, |
pci_generic_fill_info, |
us2i_read, |
us2i_write, |
NULL, /* init_dev */ |
NULL /* cleanup_dev */ |
}; |