4,10 → 4,10 |
#include <stdio.h> |
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#include "internal.h" |
#include "header.h" |
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/* physical addresses and offsets */ |
#define U2P_BASE 0x1FE00000000 |
//#define U2P_BASE 0x1FE00000000 |
#define U2P_BASE 0x1ca00000000 |
#define PCI_CONF_OFFSET 0x001000000 |
#define PCI_CONF_SIZE 0x001000000 |
#define PCI_CONF_BASE (U2P_BASE + PCI_CONF_OFFSET) |
22,9 → 22,10 |
* fn ... function number (0 - 7) |
* reg ... register number (register's position within PCI configuration header) |
**/ |
#define CONF_ADDR(bus, dev, fn, reg) (conf_addr + ((bus << 16) | (dev << 11) | (fn << 8) | (reg << 2))) |
#define CONF_ADDR(bus, dev, fn, reg) ((void *)(conf_addr + ((bus << 16) | (dev << 11) | (fn << 8) | (reg << 0)))) |
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static void us2i_init(struct pci_access *a) |
{ |
} |
33,39 → 34,118 |
{ |
} |
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static int us2i_detect(struct pci_access *a) |
static inline uint64_t pio_read_64(uint64_t *port) |
{ |
unsigned int tmp; |
uint64_t rv; |
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rv = *port; |
memory_barrier(); |
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return rv; |
} |
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// read whole 8-byte blocks |
static void us2i_read_aligned(int bus, int dev, int fn, int pos, byte * buf, int len) |
{ |
uint64_t aux; |
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int offset = pos % 8; |
int aligned_pos = pos - offset; |
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if (len + offset > 8) { |
len = 8 - offset; |
} |
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void *addr = CONF_ADDR(bus, dev, fn, aligned_pos); |
aux = pio_read_64(addr); |
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int i; |
for (i = 0; i < len; i++) { |
buf[i] = ((byte *)(&aux))[offset + i]; |
} |
} |
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static int us2i_detect(struct pci_access *a) |
{ |
/* |
* Gain control over PCI configuration ports. |
*/ |
if (pio_enable((void *)PCI_CONF_BASE, PCI_CONF_SIZE, &conf_addr)) { |
return 0; |
} |
} |
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printf("PCI: conf_addr = %lx", conf_addr); |
printf("PCI: vendor id address = %lx", CONF_ADDR(0, 0, 0, PCI_VENDOR_ID)); |
u16 vendor_id, device_id; |
us2i_read_aligned(0, 0, 0, PCI_VENDOR_ID, &vendor_id, 2); |
vendor_id = cpu_to_le16(vendor_id); |
us2i_read_aligned(0, 0, 0, PCI_DEVICE_ID, &device_id, 2); |
device_id = cpu_to_le16(device_id); |
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//int vendor_id = le16_to_cpu(pio_read_16(CONF_ADDR(0, 0, 0, PCI_VENDOR_ID))); |
//int device_id = le16_to_cpu(pio_read_16(CONF_ADDR(0, 0, 0, PCI_DEVICE_ID))); |
//int vendor_id = pio_read_8(CONF_ADDR(0, 0, 0, PCI_VENDOR_ID)); |
//vendor_id = vendor_id + pio_read_8(CONF_ADDR(0, 0, 0, PCI_VENDOR_ID + 1)) << 8; |
//int device_id = pio_read_8(CONF_ADDR(0, 0, 0, PCI_DEVICE_ID)); |
//device_id = device_id | pio_read_8(CONF_ADDR(0, 0, 0, PCI_DEVICE_ID + 1)) << 8; |
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asm volatile ("sethi 0x42224, %g0"); |
int vendor_id = pio_read_16(CONF_ADDR(0, 0, 0, PCI_VENDOR_ID)); |
vendor_id = vendor_id | pio_read_8(CONF_ADDR(0, 0, 0, PCI_VENDOR_ID + 1)) << 8; |
int device_id = pio_read_8(CONF_ADDR(0, 0, 0, PCI_DEVICE_ID)); |
device_id = device_id | pio_read_8(CONF_ADDR(0, 0, 0, PCI_DEVICE_ID + 1)) << 8; |
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printf("PCI: vendor id = %x", vendor_id); |
printf("PCI: device id = %x", device_id); |
printf("PCI: vendor id = %x\n", vendor_id); |
printf("PCI: device id = %x\n", device_id); |
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return vendor_id == 0x108E && device_id == 0x8000; // should be Psycho from Sun Microsystems |
// return vendor_id == 0x108E && device_id == 0x8000; // should be Psycho from Sun Microsystems ??? |
//return vendor_id == 0x108E /*&& device_id == 0x1000*/; // should be Psycho from Sun Microsystems |
return 1; |
} |
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static int us2i_read(struct pci_dev *d, int pos, byte * buf, int len) |
{ |
void * addr = CONF_ADDR(d->bus, d->dev, d->func, pos); |
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if (pos >= 256) |
return 0; |
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switch (len) { |
case 1: |
us2i_read_aligned(d->bus, d->dev, d->func, pos, buf, len); |
break; |
case 2: |
us2i_read_aligned(d->bus, d->dev, d->func, pos, buf, len); |
((u16 *) buf)[0] = cpu_to_le16(*((u16 *) buf)); |
break; |
case 4: |
us2i_read_aligned(d->bus, d->dev, d->func, pos, buf, len); |
((u32 *) buf)[0] = cpu_to_le32(*((u32 *) buf)); |
break; |
default: |
return pci_generic_block_read(d, pos, buf, len); |
} |
return 1; |
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/* |
void * addr = CONF_ADDR(d->bus, d->dev, d->func, pos); |
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if (pos >= 256) |
return 0; |
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switch (len) { |
case 1: |
buf[0] = pio_read_8(addr); |
break; |
case 2: |
((u16 *) buf)[0] = cpu_to_le16(pio_read_16(addr)); |
break; |
case 4: |
((u32 *) buf)[0] = cpu_to_le32(pio_read_32(addr)); |
break; |
default: |
return pci_generic_block_read(d, pos, buf, len); |
} |
return 1; */ |
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/*if (pos >= 256) |
return 0; |
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switch (len) { |
case 1: |
buf[0] = pio_read_8(CONF_ADDR(d->bus, d->dev, d->func, pos)); |
break; |
case 2: |
81,11 → 161,13 |
default: |
return pci_generic_block_read(d, pos, buf, len); |
} |
return 1; |
return 1;*/ |
} |
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static int us2i_write(struct pci_dev *d, int pos, byte * buf, int len) |
{ |
void * addr = CONF_ADDR(d->bus, d->dev, d->func, pos); |
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if (pos >= 256) |
return 0; |
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94,14 → 176,10 |
pio_write_8(CONF_ADDR(d->bus, d->dev, d->func, pos), buf[0]); |
break; |
case 2: |
us2i_write(d, pos + 1, buf, 1); // unlike PCI, sparc uses big endian |
us2i_write(d, pos, buf + 1, 1); |
pio_write_16(addr, le16_to_cpu(((u16 *) buf)[0])); |
break; |
case 4: |
us2i_write(d, pos + 3, buf, 1); // endians in an ugly way ... FIX ME |
us2i_write(d, pos + 2, buf + 1, 1); |
us2i_write(d, pos + 1, buf + 2, 1); |
us2i_write(d, pos, buf + 3, 1); |
pio_write_32(addr, le32_to_cpu(((u32 *) buf)[0])); |
break; |
default: |
return pci_generic_block_write(d, pos, buf, len); |