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Ignore whitespace Rev 3022 → Rev 4055

/branches/dd/uspace/lib/libc/arch/ia32/include/syscall.h
36,8 → 36,25
#ifndef LIBC_ia32_SYSCALL_H_
#define LIBC_ia32_SYSCALL_H_
 
#include <syscall.h>
#include <sys/types.h>
#include <kernel/syscall/syscall.h>
 
#define __syscall0 __syscall_sysenter
#define __syscall1 __syscall_sysenter
#define __syscall2 __syscall_sysenter
#define __syscall3 __syscall_sysenter
#define __syscall4 __syscall_sysenter
#define __syscall5 __syscall_int
#define __syscall6 __syscall_int
 
extern sysarg_t
__syscall_sysenter(const sysarg_t, const sysarg_t, const sysarg_t, const sysarg_t,
const sysarg_t, const sysarg_t, const syscall_t);
 
extern sysarg_t
__syscall_int(const sysarg_t, const sysarg_t, const sysarg_t, const sysarg_t,
const sysarg_t, const sysarg_t, const syscall_t);
 
#endif
 
/** @}
/branches/dd/uspace/lib/libc/arch/ia32/include/atomic.h
36,11 → 36,11
#define LIBC_ia32_ATOMIC_H_
 
static inline void atomic_inc(atomic_t *val) {
asm volatile ("lock incl %0\n" : "=m" (val->count));
asm volatile ("lock incl %0\n" : "+m" (val->count));
}
 
static inline void atomic_dec(atomic_t *val) {
asm volatile ("lock decl %0\n" : "=m" (val->count));
asm volatile ("lock decl %0\n" : "+m" (val->count));
}
 
static inline long atomic_postinc(atomic_t *val)
50,7 → 50,7
asm volatile (
"movl $1, %0\n"
"lock xaddl %0, %1\n"
: "=r" (r), "=m" (val->count)
: "=r" (r), "+m" (val->count)
);
 
return r;
63,14 → 63,14
asm volatile (
"movl $-1, %0\n"
"lock xaddl %0, %1\n"
: "=r" (r), "=m" (val->count)
: "=r" (r), "+m" (val->count)
);
return r;
}
 
#define atomic_preinc(val) (atomic_postinc(val)+1)
#define atomic_predec(val) (atomic_postdec(val)-1)
#define atomic_preinc(val) (atomic_postinc(val) + 1)
#define atomic_predec(val) (atomic_postdec(val) - 1)
 
#endif
 
/branches/dd/uspace/lib/libc/arch/ia32/include/ddi.h
33,43 → 33,72
#ifndef LIBC_ia32_DDI_H_
#define LIBC_ia32_DDI_H_
 
static inline void outb(int16_t port, uint8_t b)
#include <sys/types.h>
#include <libarch/types.h>
 
#define IO_SPACE_BOUNDARY ((void *) (64 * 1024))
 
static inline uint8_t pio_read_8(ioport8_t *port)
{
asm volatile ("outb %0, %1\n" :: "a" (b), "d" (port));
uint8_t val;
asm volatile (
"inb %w[port], %b[val]\n"
: [val] "=a" (val)
: [port] "d" (port)
);
return val;
}
 
static inline void outw(int16_t port, int16_t w)
static inline uint16_t pio_read_16(ioport16_t *port)
{
asm volatile ("outw %0, %1\n" :: "a" (w), "d" (port));
uint16_t val;
asm volatile (
"inw %w[port], %w[val]\n"
: [val] "=a" (val)
: [port] "d" (port)
);
return val;
}
 
static inline void outl(int16_t port, uint32_t l)
static inline uint32_t pio_read_32(ioport32_t *port)
{
asm volatile ("outl %0, %1\n" :: "a" (l), "d" (port));
uint32_t val;
asm volatile (
"inl %w[port], %[val]\n"
: [val] "=a" (val)
: [port] "d" (port)
);
return val;
}
 
static inline uint8_t inb(int16_t port)
static inline void pio_write_8(ioport8_t *port, uint8_t val)
{
uint8_t val;
 
asm volatile ("inb %1, %0 \n" : "=a" (val) : "d"(port));
return val;
asm volatile (
"outb %b[val], %w[port]\n"
:: [val] "a" (val), [port] "d" (port)
);
}
 
static inline int16_t inw(int16_t port)
static inline void pio_write_16(ioport16_t *port, uint16_t val)
{
int16_t val;
 
asm volatile ("inw %1, %0 \n" : "=a" (val) : "d"(port));
return val;
asm volatile (
"outw %w[val], %w[port]\n"
:: [val] "a" (val), [port] "d" (port)
);
}
 
static inline uint32_t inl(int16_t port)
static inline void pio_write_32(ioport32_t *port, uint32_t val)
{
uint32_t val;
 
asm volatile ("inl %1, %0 \n" : "=a" (val) : "d"(port));
return val;
asm volatile (
"outl %[val], %w[port]\n"
:: [val] "a" (val), [port] "d" (port)
);
}
 
#endif
/branches/dd/uspace/lib/libc/arch/ia32/include/config.h
36,8 → 36,7
#define LIBC_ia32_CONFIG_H_
 
#define PAGE_WIDTH 12
#define PAGE_SIZE (1<<PAGE_WIDTH)
#define PAGE_COLOR_BITS 0 /* dummy */
#define PAGE_SIZE (1 << PAGE_WIDTH)
 
#endif