| /branches/dd/kernel/genarch/src/drivers/ns16550/ns16550.c |
|---|
| 43,10 → 43,6 |
| #define LSR_DATA_READY 0x01 |
| static indev_operations_t kbrdin_ops = { |
| .poll = NULL |
| }; |
| static irq_ownership_t ns16550_claim(irq_t *irq) |
| { |
| ns16550_instance_t *instance = irq->instance; |
| 64,11 → 60,18 |
| ns16550_t *dev = instance->ns16550; |
| if (pio_read_8(&dev->lsr) & LSR_DATA_READY) { |
| uint8_t x = pio_read_8(&dev->rbr); |
| indev_push_character(&instance->kbrdin, x); |
| uint8_t data = pio_read_8(&dev->rbr); |
| indev_push_character(instance->kbrdin, data); |
| } |
| } |
| /**< Clear input buffer. */ |
| static void ns16550_clear_buffer(ns16550_t *dev) |
| { |
| while ((pio_read_8(&dev->lsr) & LSR_DATA_READY)) |
| (void) pio_read_8(&dev->rbr); |
| } |
| /** Initialize ns16550. |
| * |
| * @param dev Addrress of the beginning of the device in I/O space. |
| 77,38 → 80,43 |
| * @param cir Clear interrupt function. |
| * @param cir_arg First argument to cir. |
| * |
| * @return Keyboard device pointer or NULL on failure. |
| * @return Keyboard instance or NULL on failure. |
| * |
| */ |
| indev_t *ns16550_init(ns16550_t *dev, inr_t inr, cir_t cir, void *cir_arg) |
| ns16550_instance_t *ns16550_init(ns16550_t *dev, inr_t inr, cir_t cir, void *cir_arg) |
| { |
| ns16550_instance_t *instance |
| = malloc(sizeof(ns16550_instance_t), FRAME_ATOMIC); |
| if (!instance) |
| return NULL; |
| if (instance) { |
| instance->ns16550 = dev; |
| instance->kbrdin = NULL; |
| irq_initialize(&instance->irq); |
| instance->irq.devno = device_assign_devno(); |
| instance->irq.inr = inr; |
| instance->irq.claim = ns16550_claim; |
| instance->irq.handler = ns16550_irq_handler; |
| instance->irq.instance = instance; |
| instance->irq.cir = cir; |
| instance->irq.cir_arg = cir_arg; |
| } |
| indev_initialize("ns16550", &instance->kbrdin, &kbrdin_ops); |
| return instance; |
| } |
| void ns16550_wire(ns16550_instance_t *instance, indev_t *kbrdin) |
| { |
| ASSERT(instance); |
| ASSERT(kbrdin); |
| instance->ns16550 = dev; |
| irq_initialize(&instance->irq); |
| instance->irq.devno = device_assign_devno(); |
| instance->irq.inr = inr; |
| instance->irq.claim = ns16550_claim; |
| instance->irq.handler = ns16550_irq_handler; |
| instance->irq.instance = instance; |
| instance->irq.cir = cir; |
| instance->irq.cir_arg = cir_arg; |
| instance->kbrdin = kbrdin; |
| irq_register(&instance->irq); |
| while ((pio_read_8(&dev->lsr) & LSR_DATA_READY)) |
| (void) pio_read_8(&dev->rbr); |
| ns16550_clear_buffer(instance->ns16550); |
| /* Enable interrupts */ |
| pio_write_8(&dev->ier, IER_ERBFI); |
| pio_write_8(&dev->mcr, MCR_OUT2); |
| return &instance->kbrdin; |
| pio_write_8(&instance->ns16550->ier, IER_ERBFI); |
| pio_write_8(&instance->ns16550->mcr, MCR_OUT2); |
| } |
| /** @} |
| /branches/dd/kernel/genarch/src/drivers/dsrln/dsrlnin.c |
|---|
| 40,10 → 40,6 |
| #include <arch/asm.h> |
| #include <ddi/device.h> |
| static indev_operations_t kbrdin_ops = { |
| .poll = NULL |
| }; |
| static irq_ownership_t dsrlnin_claim(irq_t *irq) |
| { |
| return IRQ_ACCEPT; |
| 54,29 → 50,35 |
| dsrlnin_instance_t *instance = irq->instance; |
| dsrlnin_t *dev = instance->dsrlnin; |
| indev_push_character(&instance->kbrdin, pio_read_8(&dev->data)); |
| indev_push_character(instance->srlnin, pio_read_8(&dev->data)); |
| } |
| indev_t *dsrlnin_init(dsrlnin_t *dev, inr_t inr) |
| dsrlnin_instance_t *dsrlnin_init(dsrlnin_t *dev, inr_t inr) |
| { |
| dsrlnin_instance_t *instance |
| = malloc(sizeof(dsrlnin_instance_t), FRAME_ATOMIC); |
| if (!instance) |
| return NULL; |
| if (instance) { |
| instance->dsrlnin = dev; |
| instance->srlnin = NULL; |
| irq_initialize(&instance->irq); |
| instance->irq.devno = device_assign_devno(); |
| instance->irq.inr = inr; |
| instance->irq.claim = dsrlnin_claim; |
| instance->irq.handler = dsrlnin_irq_handler; |
| instance->irq.instance = instance; |
| } |
| indev_initialize("dsrlnin", &instance->kbrdin, &kbrdin_ops); |
| return instance; |
| } |
| void dsrlnin_wire(dsrlnin_instance_t *instance, indev_t *srlnin) |
| { |
| ASSERT(instance); |
| ASSERT(srlnin); |
| instance->dsrlnin = dev; |
| irq_initialize(&instance->irq); |
| instance->irq.devno = device_assign_devno(); |
| instance->irq.inr = inr; |
| instance->irq.claim = dsrlnin_claim; |
| instance->irq.handler = dsrlnin_irq_handler; |
| instance->irq.instance = instance; |
| instance->srlnin = srlnin; |
| irq_register(&instance->irq); |
| return &instance->kbrdin; |
| } |
| /** @} |
| /branches/dd/kernel/genarch/src/drivers/i8042/i8042.c |
|---|
| 44,10 → 44,6 |
| #include <mm/slab.h> |
| #include <ddi/device.h> |
| static indev_operations_t kbrdin_ops = { |
| .poll = NULL |
| }; |
| #define i8042_SET_COMMAND 0x60 |
| #define i8042_COMMAND 0x69 |
| #define i8042_CPU_RESET 0xfe |
| 74,35 → 70,46 |
| if (((status = pio_read_8(&dev->status)) & i8042_BUFFER_FULL_MASK)) { |
| uint8_t data = pio_read_8(&dev->data); |
| indev_push_character(&instance->kbrdin, data); |
| indev_push_character(instance->kbrdin, data); |
| } |
| } |
| /**< Clear input buffer. */ |
| static void i8042_clear_buffer(i8042_t *dev) |
| { |
| while (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK) |
| (void) pio_read_8(&dev->data); |
| } |
| /** Initialize i8042. */ |
| indev_t *i8042_init(i8042_t *dev, inr_t inr) |
| i8042_instance_t *i8042_init(i8042_t *dev, inr_t inr) |
| { |
| i8042_instance_t *instance |
| = malloc(sizeof(i8042_instance_t), FRAME_ATOMIC); |
| if (!instance) |
| return NULL; |
| if (instance) { |
| instance->i8042 = dev; |
| instance->kbrdin = NULL; |
| irq_initialize(&instance->irq); |
| instance->irq.devno = device_assign_devno(); |
| instance->irq.inr = inr; |
| instance->irq.claim = i8042_claim; |
| instance->irq.handler = i8042_irq_handler; |
| instance->irq.instance = instance; |
| } |
| indev_initialize("i8042", &instance->kbrdin, &kbrdin_ops); |
| return instance; |
| } |
| void i8042_wire(i8042_instance_t *instance, indev_t *kbrdin) |
| { |
| ASSERT(instance); |
| ASSERT(kbrdin); |
| instance->i8042 = dev; |
| irq_initialize(&instance->irq); |
| instance->irq.devno = device_assign_devno(); |
| instance->irq.inr = inr; |
| instance->irq.claim = i8042_claim; |
| instance->irq.handler = i8042_irq_handler; |
| instance->irq.instance = instance; |
| instance->kbrdin = kbrdin; |
| irq_register(&instance->irq); |
| /* Clear input buffer */ |
| while (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK) |
| (void) pio_read_8(&dev->data); |
| return &instance->kbrdin; |
| i8042_clear_buffer(instance->i8042); |
| } |
| /* Reset CPU by pulsing pin 0 */ |
| 110,9 → 117,7 |
| { |
| interrupts_disable(); |
| /* Clear input buffer */ |
| while (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK) |
| (void) pio_read_8(&dev->data); |
| i8042_clear_buffer(dev); |
| /* Reset CPU */ |
| pio_write_8(&dev->status, i8042_CPU_RESET); |
| /branches/dd/kernel/genarch/src/drivers/z8530/z8530.c |
|---|
| 41,10 → 41,6 |
| #include <mm/slab.h> |
| #include <ddi/device.h> |
| static indev_operations_t kbrdin_ops = { |
| .poll = NULL |
| }; |
| static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val) |
| { |
| /* |
| 82,51 → 78,58 |
| z8530_t *dev = instance->z8530; |
| if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) { |
| uint8_t x = z8530_read(&dev->ctl_a, RR8); |
| indev_push_character(&instance->kbrdin, x); |
| uint8_t data = z8530_read(&dev->ctl_a, RR8); |
| indev_push_character(instance->kbrdin, data); |
| } |
| } |
| /** Initialize z8530. */ |
| indev_t *z8530_init(z8530_t *dev, inr_t inr, cir_t cir, void *cir_arg) |
| z8530_instance_t *z8530_init(z8530_t *dev, inr_t inr, cir_t cir, void *cir_arg) |
| { |
| z8530_instance_t *instance |
| = malloc(sizeof(z8530_instance_t), FRAME_ATOMIC); |
| if (!instance) |
| return false; |
| if (instance) { |
| instance->z8530 = dev; |
| instance->kbrdin = NULL; |
| irq_initialize(&instance->irq); |
| instance->irq.devno = device_assign_devno(); |
| instance->irq.inr = inr; |
| instance->irq.claim = z8530_claim; |
| instance->irq.handler = z8530_irq_handler; |
| instance->irq.instance = instance; |
| instance->irq.cir = cir; |
| instance->irq.cir_arg = cir_arg; |
| } |
| indev_initialize("z8530", &instance->kbrdin, &kbrdin_ops); |
| return instance; |
| } |
| void z8530_wire(z8530_instance_t *instance, indev_t *kbrdin) |
| { |
| ASSERT(instance); |
| ASSERT(kbrdin); |
| instance->z8530 = dev; |
| instance->kbrdin = kbrdin; |
| irq_initialize(&instance->irq); |
| instance->irq.devno = device_assign_devno(); |
| instance->irq.inr = inr; |
| instance->irq.claim = z8530_claim; |
| instance->irq.handler = z8530_irq_handler; |
| instance->irq.instance = instance; |
| instance->irq.cir = cir; |
| instance->irq.cir_arg = cir_arg; |
| irq_register(&instance->irq); |
| (void) z8530_read(&dev->ctl_a, RR8); |
| (void) z8530_read(&instance->z8530->ctl_a, RR8); |
| /* |
| * Clear any pending TX interrupts or we never manage |
| * to set FHC UART interrupt state to idle. |
| */ |
| z8530_write(&dev->ctl_a, WR0, WR0_TX_IP_RST); |
| z8530_write(&instance->z8530->ctl_a, WR0, WR0_TX_IP_RST); |
| /* interrupt on all characters */ |
| z8530_write(&dev->ctl_a, WR1, WR1_IARCSC); |
| z8530_write(&instance->z8530->ctl_a, WR1, WR1_IARCSC); |
| /* 8 bits per character and enable receiver */ |
| z8530_write(&dev->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
| z8530_write(&instance->z8530->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
| /* Master Interrupt Enable. */ |
| z8530_write(&dev->ctl_a, WR9, WR9_MIE); |
| return &instance->kbrdin; |
| z8530_write(&instance->z8530->ctl_a, WR9, WR9_MIE); |
| } |
| /** @} |
| /branches/dd/kernel/genarch/src/drivers/via-cuda/cuda.c |
|---|
| 0,0 → 1,78 |
| /* |
| * Copyright (c) 2006 Martin Decky |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup genarch |
| * @{ |
| */ |
| /** @file |
| */ |
| #include <genarch/drivers/via-cuda/cuda.h> |
| #include <console/chardev.h> |
| #include <ddi/irq.h> |
| #include <arch/asm.h> |
| #include <mm/slab.h> |
| #include <ddi/device.h> |
| static irq_ownership_t cuda_claim(irq_t *irq) |
| { |
| return IRQ_DECLINE; |
| } |
| static void cuda_irq_handler(irq_t *irq) |
| { |
| } |
| cuda_instance_t *cuda_init(cuda_t *dev, inr_t inr, cir_t cir, void *cir_arg) |
| { |
| cuda_instance_t *instance |
| = malloc(sizeof(cuda_instance_t), FRAME_ATOMIC); |
| if (instance) { |
| instance->cuda = dev; |
| instance->kbrdin = NULL; |
| irq_initialize(&instance->irq); |
| instance->irq.devno = device_assign_devno(); |
| instance->irq.inr = inr; |
| instance->irq.claim = cuda_claim; |
| instance->irq.handler = cuda_irq_handler; |
| instance->irq.instance = instance; |
| instance->irq.cir = cir; |
| instance->irq.cir_arg = cir_arg; |
| } |
| return instance; |
| } |
| void cuda_wire(cuda_instance_t *instance, indev_t *kbrdin) |
| { |
| } |
| /** @} |
| */ |
| Property changes: |
| Added: svn:mergeinfo |
| /branches/dd/kernel/genarch/src/drivers/ega/ega.c |
|---|
| 426,45 → 426,56 |
| /* |
| * This function takes care of scrolling. |
| */ |
| static void ega_check_cursor(void) |
| static void ega_check_cursor(bool silent) |
| { |
| if (ega_cursor < EGA_SCREEN) |
| return; |
| memmove((void *) videoram, (void *) (videoram + EGA_COLS * 2), |
| (EGA_SCREEN - EGA_COLS) * 2); |
| memmove((void *) backbuf, (void *) (backbuf + EGA_COLS * 2), |
| (EGA_SCREEN - EGA_COLS) * 2); |
| memsetw(videoram + (EGA_SCREEN - EGA_COLS) * 2, EGA_COLS, EMPTY_CHAR); |
| memsetw(backbuf + (EGA_SCREEN - EGA_COLS) * 2, EGA_COLS, EMPTY_CHAR); |
| if (!silent) { |
| memmove((void *) videoram, (void *) (videoram + EGA_COLS * 2), |
| (EGA_SCREEN - EGA_COLS) * 2); |
| memsetw(videoram + (EGA_SCREEN - EGA_COLS) * 2, EGA_COLS, EMPTY_CHAR); |
| } |
| ega_cursor = ega_cursor - EGA_COLS; |
| } |
| static void ega_show_cursor(void) |
| static void ega_show_cursor(bool silent) |
| { |
| pio_write_8(ega_base + EGA_INDEX_REG, 0x0a); |
| uint8_t stat = pio_read_8(ega_base + EGA_DATA_REG); |
| pio_write_8(ega_base + EGA_INDEX_REG, 0x0a); |
| pio_write_8(ega_base + EGA_DATA_REG, stat & (~(1 << 5))); |
| if (!silent) { |
| pio_write_8(ega_base + EGA_INDEX_REG, 0x0a); |
| uint8_t stat = pio_read_8(ega_base + EGA_DATA_REG); |
| pio_write_8(ega_base + EGA_INDEX_REG, 0x0a); |
| pio_write_8(ega_base + EGA_DATA_REG, stat & (~(1 << 5))); |
| } |
| } |
| static void ega_move_cursor(void) |
| static void ega_move_cursor(bool silent) |
| { |
| pio_write_8(ega_base + EGA_INDEX_REG, 0x0e); |
| pio_write_8(ega_base + EGA_DATA_REG, (uint8_t) ((ega_cursor >> 8) & 0xff)); |
| pio_write_8(ega_base + EGA_INDEX_REG, 0x0f); |
| pio_write_8(ega_base + EGA_DATA_REG, (uint8_t) (ega_cursor & 0xff)); |
| if (!silent) { |
| pio_write_8(ega_base + EGA_INDEX_REG, 0x0e); |
| pio_write_8(ega_base + EGA_DATA_REG, (uint8_t) ((ega_cursor >> 8) & 0xff)); |
| pio_write_8(ega_base + EGA_INDEX_REG, 0x0f); |
| pio_write_8(ega_base + EGA_DATA_REG, (uint8_t) (ega_cursor & 0xff)); |
| } |
| } |
| static void ega_sync_cursor(void) |
| static void ega_sync_cursor(bool silent) |
| { |
| pio_write_8(ega_base + EGA_INDEX_REG, 0x0e); |
| uint8_t hi = pio_read_8(ega_base + EGA_DATA_REG); |
| pio_write_8(ega_base + EGA_INDEX_REG, 0x0f); |
| uint8_t lo = pio_read_8(ega_base + EGA_DATA_REG); |
| if (!silent) { |
| pio_write_8(ega_base + EGA_INDEX_REG, 0x0e); |
| uint8_t hi = pio_read_8(ega_base + EGA_DATA_REG); |
| pio_write_8(ega_base + EGA_INDEX_REG, 0x0f); |
| uint8_t lo = pio_read_8(ega_base + EGA_DATA_REG); |
| ega_cursor = (hi << 8) | lo; |
| } else |
| ega_cursor = 0; |
| ega_cursor = (hi << 8) | lo; |
| if (ega_cursor >= EGA_SCREEN) |
| ega_cursor = 0; |
| 471,12 → 482,14 |
| if ((ega_cursor % EGA_COLS) != 0) |
| ega_cursor = (ega_cursor + EGA_COLS) - ega_cursor % EGA_COLS; |
| memsetw(videoram + ega_cursor * 2, EGA_SCREEN - ega_cursor, EMPTY_CHAR); |
| memsetw(backbuf + ega_cursor * 2, EGA_SCREEN - ega_cursor, EMPTY_CHAR); |
| ega_check_cursor(); |
| ega_move_cursor(); |
| ega_show_cursor(); |
| if (!silent) |
| memsetw(videoram + ega_cursor * 2, EGA_SCREEN - ega_cursor, EMPTY_CHAR); |
| ega_check_cursor(silent); |
| ega_move_cursor(silent); |
| ega_show_cursor(silent); |
| } |
| static void ega_display_char(wchar_t ch, bool silent) |
| 525,11 → 538,9 |
| ega_cursor++; |
| break; |
| } |
| ega_check_cursor(); |
| ega_check_cursor(silent); |
| ega_move_cursor(silent); |
| if (!silent) |
| ega_move_cursor(); |
| spinlock_unlock(&egalock); |
| interrupts_restore(ipl); |
| } |
| 552,7 → 563,7 |
| /* Synchronize the back buffer and cursor position. */ |
| memcpy(backbuf, videoram, EGA_VRAM_SIZE); |
| ega_sync_cursor(); |
| ega_sync_cursor(silent); |
| outdev_initialize("ega", &ega_console, &ega_ops); |
| stdout = &ega_console; |
| 568,8 → 579,8 |
| void ega_redraw(void) |
| { |
| memcpy(videoram, backbuf, EGA_VRAM_SIZE); |
| ega_move_cursor(); |
| ega_show_cursor(); |
| ega_move_cursor(silent); |
| ega_show_cursor(silent); |
| } |
| /** @} |