/branches/dd/kernel/arch/sparc64/src/drivers/kbd.c |
---|
86,9 → 86,9 |
/* |
* Determine keyboard serial controller type. |
*/ |
if (strcmp(name, "zs") == 0) |
if (str_cmp(name, "zs") == 0) |
kbd_type = KBD_Z8530; |
else if (strcmp(name, "su") == 0) |
else if (str_cmp(name, "su") == 0) |
kbd_type = KBD_NS16550; |
if (kbd_type == KBD_UNKNOWN) { |
162,8 → 162,8 |
switch (kbd_type) { |
#ifdef CONFIG_Z8530 |
case KBD_Z8530: |
z8530 = (z8530_t *) hw_map(aligned_addr, offset + size) + |
offset; |
z8530 = (z8530_t *) |
(hw_map(aligned_addr, offset + size) + offset); |
indev_t *kbrdin_z8530 = z8530_init(z8530, inr, cir, cir_arg); |
if (kbrdin_z8530) |
183,8 → 183,8 |
#endif |
#ifdef CONFIG_NS16550 |
case KBD_NS16550: |
ns16550 = (ns16550_t *) hw_map(aligned_addr, offset + size) + |
offset; |
ns16550 = (ns16550_t *) |
(hw_map(aligned_addr, offset + size) + offset); |
indev_t *kbrdin_ns16550 = ns16550_init(ns16550, inr, cir, cir_arg); |
if (kbrdin_ns16550) |
/branches/dd/kernel/arch/sparc64/src/drivers/scr.c |
---|
63,13 → 63,13 |
name = ofw_tree_node_name(node); |
if (strcmp(name, "SUNW,m64B") == 0) |
if (str_cmp(name, "SUNW,m64B") == 0) |
scr_type = SCR_ATYFB; |
else if (strcmp(name, "SUNW,XVR-100") == 0) |
else if (str_cmp(name, "SUNW,XVR-100") == 0) |
scr_type = SCR_XVR; |
else if (strcmp(name, "SUNW,ffb") == 0) |
else if (str_cmp(name, "SUNW,ffb") == 0) |
scr_type = SCR_FFB; |
else if (strcmp(name, "cgsix") == 0) |
else if (str_cmp(name, "cgsix") == 0) |
scr_type = SCR_CGSIX; |
if (scr_type == SCR_UNKNOWN) { |
/branches/dd/kernel/arch/sparc64/src/drivers/sgcn.c |
---|
31,7 → 31,7 |
*/ |
/** |
* @file |
* @brief SGCN driver. |
* @brief SGCN driver. |
*/ |
#include <arch.h> |
207,12 → 207,12 |
init_sram_begin(); |
ASSERT(strcmp(SRAM_TOC->magic, SRAM_TOC_MAGIC) == 0); |
ASSERT(str_cmp(SRAM_TOC->magic, SRAM_TOC_MAGIC) == 0); |
/* lookup TOC entry with the correct key */ |
uint32_t i; |
for (i = 0; i < MAX_TOC_ENTRIES; i++) { |
if (strcmp(SRAM_TOC->keys[i].key, CONSOLE_KEY) == 0) |
if (str_cmp(SRAM_TOC->keys[i].key, CONSOLE_KEY) == 0) |
break; |
} |
ASSERT(i < MAX_TOC_ENTRIES); |
277,7 → 277,7 |
sgcn_do_putchar('\r'); |
sgcn_do_putchar(ch); |
} else |
sgcn_do_putchar(invalch); |
sgcn_do_putchar(U_SPECIAL); |
spinlock_unlock(&sgcn_output_lock); |
} |
/branches/dd/kernel/arch/sparc64/src/drivers/pci.c |
---|
183,7 → 183,7 |
/* |
* First, verify this is a PCI node. |
*/ |
ASSERT(strcmp(ofw_tree_node_name(node), "pci") == 0); |
ASSERT(str_cmp(ofw_tree_node_name(node), "pci") == 0); |
/* |
* Determine PCI controller model. |
192,13 → 192,13 |
if (!prop || !prop->value) |
return NULL; |
if (strcmp(prop->value, "SUNW,sabre") == 0) { |
if (str_cmp(prop->value, "SUNW,sabre") == 0) { |
/* |
* PCI controller Sabre. |
* This model is found on UltraSPARC IIi based machines. |
*/ |
return pci_sabre_init(node); |
} else if (strcmp(prop->value, "SUNW,psycho") == 0) { |
} else if (str_cmp(prop->value, "SUNW,psycho") == 0) { |
/* |
* PCI controller Psycho. |
* Used on UltraSPARC II based processors, for instance, |