| 75,12 → 75,12 |
|---|
| l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, |
| FRAME_ATOMIC | FRAME_KA); |
| if (!l_apic_address) |
| panic("cannot allocate address for l_apic\n"); |
| panic("Cannot allocate address for l_apic."); |
| |
| io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, |
| FRAME_ATOMIC | FRAME_KA); |
| if (!io_apic_address) |
| panic("cannot allocate address for io_apic\n"); |
| panic("Cannot allocate address for io_apic."); |
| |
| if (config.cpu_count > 1) { |
| page_mapping_insert(AS_KERNEL, l_apic_address, |
| 122,8 → 122,8 |
|---|
| * Save 0xa to address 0xf of the CMOS RAM. |
| * BIOS will not do the POST after the INIT signal. |
| */ |
| outb(0x70, 0xf); |
| outb(0x71, 0xa); |
| pio_write_8((ioport8_t *)0x70, 0xf); |
| pio_write_8((ioport8_t *)0x71, 0xa); |
| |
| pic_disable_irqs(0xffff); |
| apic_init(); |
| 154,14 → 154,18 |
|---|
| /* |
| * Prepare new GDT for CPU in question. |
| */ |
| |
| /* XXX Flag FRAME_LOW_4_GiB was removed temporarily, |
| * it needs to be replaced by a generic fuctionality of |
| * the memory subsystem |
| */ |
| gdt_new = (struct descriptor *) malloc(GDT_ITEMS * |
| sizeof(struct descriptor), FRAME_ATOMIC); |
| if (!gdt_new) |
| panic("couldn't allocate memory for GDT\n"); |
| panic("Cannot allocate memory for GDT."); |
| |
| memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor)); |
| memsetb((uintptr_t)(&gdt_new[TSS_DES]), |
| sizeof(struct descriptor), 0); |
| memsetb(&gdt_new[TSS_DES], sizeof(struct descriptor), 0); |
| protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor); |
| protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new); |
| gdtr.base = (uintptr_t) gdt_new; |