/branches/arm/kernel/arch/arm32/include/regutils.h |
---|
0,0 → 1,59 |
/* |
* Copyright (c) 2007 Petr Stepan |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/** @addtogroup arm32 |
* @{ |
*/ |
/** |
* @file |
* @brief Utilities for convenient manipulation with ARM registries. |
*/ |
#ifndef KERN_arm32_REGUTILS_H_ |
#define KERN_arm32_REGUTILS_H_ |
#define status_reg_ie_enabled_bit (1 << 7) |
/** Returns the value of CPSR (Current Program Status Register). |
*/ |
static inline ipl_t status_reg_read (void) { |
ipl_t ipl; |
asm("mrs %0, CPSR" : "=r" (ipl)); |
return ipl; |
} |
/** Sets control bits of CPSR |
*/ |
static inline void status_reg_control_write(ipl_t ipl) { |
asm("msr CPSR_c, %0" : : "r" (ipl)); |
} |
#endif |
/** @} |
*/ |
/branches/arm/kernel/arch/arm32/Makefile.inc |
---|
68,5 → 68,6 |
arch/$(ARCH)/src/ddi/ddi.c \ |
arch/$(ARCH)/src/mm/as.c \ |
arch/$(ARCH)/src/mm/frame.c \ |
arch/$(ARCH)/src/mm/page.c |
arch/$(ARCH)/src/mm/page.c \ |
arch/$(ARCH)/src/interrupt.c |
/branches/arm/kernel/arch/arm32/src/dummy.S |
---|
38,10 → 38,10 |
.global fpu_context_save |
.global fpu_enable |
.global fpu_init |
.global interrupts_disable |
.global interrupts_enable |
.global interrupts_read |
.global interrupts_restore |
#.global interrupts_disable |
#.global interrupts_enable |
#.global interrupts_read |
#.global interrupts_restore |
.global memcpy |
.global memcpy_from_uspace |
.global memcpy_to_uspace |
63,10 → 63,10 |
fpu_context_save: |
fpu_enable: |
fpu_init: |
interrupts_disable: |
interrupts_enable: |
interrupts_read: |
interrupts_restore: |
#interrupts_disable: |
#interrupts_enable: |
#interrupts_read: |
#interrupts_restore: |
memcpy: |
memcpy_from_uspace: |
memcpy_to_uspace: |
/branches/arm/kernel/arch/arm32/src/interrupt.c |
---|
0,0 → 1,84 |
/* |
* Copyright (c) 2007 Petr Stepan |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/** @addtogroup arm32 |
* @{ |
*/ |
/** @file |
*/ |
#include<arch/asm.h> |
#include<arch/regutils.h> |
/** Disable interrupts. |
* |
* @return Old interrupt priority level. |
*/ |
ipl_t interrupts_disable(void) |
{ |
ipl_t ipl = status_reg_read(); |
status_reg_control_write(ipl & ~status_reg_ie_enabled_bit); |
return ipl; |
} |
/** Enable interrupts. |
* |
* @return Old interrupt priority level. |
*/ |
ipl_t interrupts_enable(void) |
{ |
ipl_t ipl = status_reg_read(); |
status_reg_control_write(ipl | status_reg_ie_enabled_bit); |
return ipl; |
} |
/** Restore interrupt priority level. |
* |
* @param ipl Saved interrupt priority level. |
*/ |
void interrupts_restore(ipl_t ipl) |
{ |
status_reg_control_write(status_reg_read() | (ipl & status_reg_ie_enabled_bit)); |
} |
/** Read interrupt priority level. |
* |
* @return Current interrupt priority level. |
*/ |
ipl_t interrupts_read(void) |
{ |
return status_reg_read(); |
} |
/** @} |
*/ |