59,6 → 59,7 |
#define PTL0_ENTRIES_ARCH (2<<12) // 4096 |
#define PTL1_ENTRIES_ARCH 0 |
#define PTL2_ENTRIES_ARCH 0 |
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/* coarse page tables used (256*4 = 1KB per page) */ |
#define PTL3_ENTRIES_ARCH (2<<8) // 256 |
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98,8 → 99,10 |
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/* pte should point into ptl3 */ |
#define PTE_GET_FRAME_ARCH(pte) ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH) |
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/* pte should point into ptl3 */ |
#define PTE_WRITABLE_ARCH(pte) ( ((pte_level1_t *)(pte))->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW ) |
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#define PTE_EXECUTABLE_ARCH(pte) 1 |
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120,7 → 123,7 |
* with 1KB per the coarse table) |
*/ |
unsigned coarse_table_addr : 22; |
} __attribute__ ((packed)) pte_level0_t; |
} ATTRIBUTE_PACKED pte_level0_t; |
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/** Level 1 page table entry (small (4KB) pages used). */ |
138,7 → 141,7 |
unsigned access_permission_2 : 2; |
unsigned access_permission_3 : 2; |
unsigned frame_base_addr : 20; |
} __attribute__ ((packed)) pte_level1_t; |
} ATTRIBUTE_PACKED pte_level1_t; |
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/* Level 1 page tables access permissions */ |