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Ignore whitespace Rev HEAD → Rev 3222

/trunk/kernel/arch/ppc32/src/asm.S
34,7 → 34,6
.global iret
.global iret_syscall
.global memsetb
.global memsetw
.global memcpy
.global memcpy_from_uspace
.global memcpy_to_uspace
67,9 → 66,9
mr sp, r4
 
# %r6 is defined to hold pcb_ptr - set it to 0
# %r3 is defined to hold pcb_ptr - set it to 0
 
xor r6, r6, r6
xor r3, r3, r3
# jump to userspace
132,8 → 131,8
lwz r12, 148(sp)
mtxer r12
lwz r12, 156(sp)
lwz sp, 160(sp)
lwz r12, 152(sp)
lwz sp, 156(sp)
rfi
 
198,17 → 197,14
lwz r12, 148(sp)
mtxer r12
lwz r12, 156(sp)
lwz sp, 160(sp)
lwz r12, 152(sp)
lwz sp, 156(sp)
 
rfi
 
memsetb:
b _memsetb
 
memsetw:
b _memsetw
 
memcpy:
memcpy_from_uspace:
memcpy_to_uspace:
/trunk/kernel/arch/ppc32/src/mm/tlb.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc32mm
/** @addtogroup ppc32mm
* @{
*/
/** @file
35,22 → 35,12
#include <mm/tlb.h>
#include <arch/mm/tlb.h>
#include <arch/interrupt.h>
#include <interrupt.h>
#include <mm/as.h>
#include <arch.h>
#include <print.h>
#include <macros.h>
#include <symtab.h>
 
static unsigned int seed = 10;
static unsigned int seed_real __attribute__ ((section("K_UNMAPPED_DATA_START"))) = 42;
 
 
#define TLB_FLUSH \
"tlbie %0\n" \
"addi %0, %0, 0x1000\n"
 
 
/** Try to find PTE for faulting address
*
* Try to find PTE for faulting address.
75,7 → 65,7
* Check if the mapping exists in page tables.
*/
pte_t *pte = page_mapping_find(as, badvaddr);
if ((pte) && (pte->present)) {
if ((pte) && (pte->p)) {
/*
* Mapping found in page tables.
* Immediately succeed.
97,7 → 87,7
*/
page_table_lock(as, lock);
pte = page_mapping_find(as, badvaddr);
ASSERT((pte) && (pte->present));
ASSERT((pte) && (pte->p));
*pfrc = 0;
return pte;
case AS_PF_DEFER:
106,10 → 96,11
return NULL;
case AS_PF_FAULT:
page_table_lock(as, lock);
printf("Page fault.\n");
*pfrc = rc;
return NULL;
default:
panic("Unexpected rc (%d).", rc);
panic("unexpected rc (%d)\n", rc);
}
}
}
117,20 → 108,21
 
static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate)
{
char *symbol;
char *sym2;
char *symbol = "";
char *sym2 = "";
 
symbol = symtab_fmt_name_lookup(istate->pc);
sym2 = symtab_fmt_name_lookup(istate->lr);
 
fault_if_from_uspace(istate,
"PHT Refill Exception on %p.", badvaddr);
panic("%p: PHT Refill Exception at %p (%s<-%s).", badvaddr,
char *s = get_symtab_entry(istate->pc);
if (s)
symbol = s;
s = get_symtab_entry(istate->lr);
if (s)
sym2 = s;
panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr,
istate->pc, symbol, sym2);
}
 
 
static void pht_insert(const uintptr_t vaddr, const pte_t *pte)
static void pht_insert(const uintptr_t vaddr, const pfn_t pfn)
{
uint32_t page = (vaddr >> 12) & 0xffff;
uint32_t api = (vaddr >> 22) & 0x3f;
156,12 → 148,11
uint32_t i;
bool found = false;
/* Find colliding PTE in PTEG */
/* Find unused or colliding
PTE in PTEG */
for (i = 0; i < 8; i++) {
if ((phte[base + i].v)
&& (phte[base + i].vsid == vsid)
&& (phte[base + i].api == api)
&& (phte[base + i].h == 0)) {
if ((!phte[base + i].v) || ((phte[base + i].vsid == vsid) &&
(phte[base + i].api == api))) {
found = true;
break;
}
168,25 → 159,86
}
if (!found) {
/* Find unused PTE in PTEG */
/* Secondary hash (not) */
uint32_t base2 = (~hash & 0x3ff) << 3;
/* Find unused or colliding
PTE in PTEG */
for (i = 0; i < 8; i++) {
if (!phte[base + i].v) {
if ((!phte[base2 + i].v) ||
((phte[base2 + i].vsid == vsid) &&
(phte[base2 + i].api == api))) {
found = true;
base = base2;
h = 1;
break;
}
}
if (!found) {
// TODO: A/C precedence groups
i = page % 8;
}
}
phte[base + i].v = 1;
phte[base + i].vsid = vsid;
phte[base + i].h = h;
phte[base + i].api = api;
phte[base + i].rpn = pfn;
phte[base + i].r = 0;
phte[base + i].c = 0;
phte[base + i].pp = 2; // FIXME
}
 
 
static void pht_real_insert(const uintptr_t vaddr, const pfn_t pfn)
{
uint32_t page = (vaddr >> 12) & 0xffff;
uint32_t api = (vaddr >> 22) & 0x3f;
uint32_t vsid;
asm volatile (
"mfsrin %0, %1\n"
: "=r" (vsid)
: "r" (vaddr)
);
uint32_t sdr1;
asm volatile (
"mfsdr1 %0\n"
: "=r" (sdr1)
);
phte_t *phte_physical = (phte_t *) (sdr1 & 0xffff0000);
/* Primary hash (xor) */
uint32_t h = 0;
uint32_t hash = vsid ^ page;
uint32_t base = (hash & 0x3ff) << 3;
uint32_t i;
bool found = false;
/* Find unused or colliding
PTE in PTEG */
for (i = 0; i < 8; i++) {
if ((!phte_physical[base + i].v) ||
((phte_physical[base + i].vsid == vsid) &&
(phte_physical[base + i].api == api))) {
found = true;
break;
}
}
if (!found) {
/* Secondary hash (not) */
uint32_t base2 = (~hash & 0x3ff) << 3;
/* Find colliding PTE in PTEG */
/* Find unused or colliding
PTE in PTEG */
for (i = 0; i < 8; i++) {
if ((phte[base2 + i].v)
&& (phte[base2 + i].vsid == vsid)
&& (phte[base2 + i].api == api)
&& (phte[base2 + i].h == 1)) {
if ((!phte_physical[base2 + i].v) ||
((phte_physical[base2 + i].vsid == vsid) &&
(phte_physical[base2 + i].api == api))) {
found = true;
base = base2;
h = 1;
195,37 → 247,26
}
if (!found) {
/* Find unused PTE in PTEG */
for (i = 0; i < 8; i++) {
if (!phte[base2 + i].v) {
found = true;
base = base2;
h = 1;
break;
}
}
// TODO: A/C precedence groups
i = page % 8;
}
if (!found)
i = RANDI(seed) % 8;
}
phte[base + i].v = 1;
phte[base + i].vsid = vsid;
phte[base + i].h = h;
phte[base + i].api = api;
phte[base + i].rpn = pte->pfn;
phte[base + i].r = 0;
phte[base + i].c = 0;
phte[base + i].wimg = (pte->page_cache_disable ? WIMG_NO_CACHE : 0);
phte[base + i].pp = 2; // FIXME
phte_physical[base + i].v = 1;
phte_physical[base + i].vsid = vsid;
phte_physical[base + i].h = h;
phte_physical[base + i].api = api;
phte_physical[base + i].rpn = pfn;
phte_physical[base + i].r = 0;
phte_physical[base + i].c = 0;
phte_physical[base + i].pp = 2; // FIXME
}
 
 
/** Process Instruction/Data Storage Exception
/** Process Instruction/Data Storage Interrupt
*
* @param n Exception vector number.
* @param istate Interrupted register context.
* @param n Interrupt vector number.
* @param istate Interrupted register context.
*
*/
void pht_refill(int n, istate_t *istate)
244,9 → 285,12
lock = true;
}
if (n == VECTOR_DATA_STORAGE)
badvaddr = istate->dar;
else
if (n == VECTOR_DATA_STORAGE) {
asm volatile (
"mfdar %0\n"
: "=r" (badvaddr)
);
} else
badvaddr = istate->pc;
page_table_lock(as, lock);
266,12 → 310,12
page_table_unlock(as, lock);
return;
default:
panic("Unexpected pfrc (%d).", pfrc);
panic("Unexpected pfrc (%d)\n", pfrc);
}
}
pte->accessed = 1; /* Record access to PTE */
pht_insert(badvaddr, pte);
pte->a = 1; /* Record access to PTE */
pht_insert(badvaddr, pte->pfn);
page_table_unlock(as, lock);
return;
282,19 → 326,22
}
 
 
/** Process Instruction/Data Storage Exception in Real Mode
/** Process Instruction/Data Storage Interrupt in Real Mode
*
* @param n Exception vector number.
* @param istate Interrupted register context.
* @param n Interrupt vector number.
* @param istate Interrupted register context.
*
*/
bool pht_refill_real(int n, istate_t *istate)
bool pht_real_refill(int n, istate_t *istate)
{
uintptr_t badvaddr;
if (n == VECTOR_DATA_STORAGE)
badvaddr = istate->dar;
else
if (n == VECTOR_DATA_STORAGE) {
asm volatile (
"mfdar %0\n"
: "=r" (badvaddr)
);
} else
badvaddr = istate->pc;
uint32_t physmem;
303,140 → 350,15
: "=r" (physmem)
);
if ((badvaddr < PA2KA(0)) || (badvaddr >= PA2KA(physmem)))
return false;
uint32_t page = (badvaddr >> 12) & 0xffff;
uint32_t api = (badvaddr >> 22) & 0x3f;
uint32_t vsid;
asm volatile (
"mfsrin %0, %1\n"
: "=r" (vsid)
: "r" (badvaddr)
);
uint32_t sdr1;
asm volatile (
"mfsdr1 %0\n"
: "=r" (sdr1)
);
phte_t *phte_real = (phte_t *) (sdr1 & 0xffff0000);
/* Primary hash (xor) */
uint32_t h = 0;
uint32_t hash = vsid ^ page;
uint32_t base = (hash & 0x3ff) << 3;
uint32_t i;
bool found = false;
/* Find colliding PTE in PTEG */
for (i = 0; i < 8; i++) {
if ((phte_real[base + i].v)
&& (phte_real[base + i].vsid == vsid)
&& (phte_real[base + i].api == api)
&& (phte_real[base + i].h == 0)) {
found = true;
break;
}
if ((badvaddr >= PA2KA(0)) && (badvaddr < PA2KA(physmem))) {
pht_real_insert(badvaddr, KA2PA(badvaddr) >> 12);
return true;
}
if (!found) {
/* Find unused PTE in PTEG */
for (i = 0; i < 8; i++) {
if (!phte_real[base + i].v) {
found = true;
break;
}
}
}
if (!found) {
/* Secondary hash (not) */
uint32_t base2 = (~hash & 0x3ff) << 3;
/* Find colliding PTE in PTEG */
for (i = 0; i < 8; i++) {
if ((phte_real[base2 + i].v)
&& (phte_real[base2 + i].vsid == vsid)
&& (phte_real[base2 + i].api == api)
&& (phte_real[base2 + i].h == 1)) {
found = true;
base = base2;
h = 1;
break;
}
}
if (!found) {
/* Find unused PTE in PTEG */
for (i = 0; i < 8; i++) {
if (!phte_real[base2 + i].v) {
found = true;
base = base2;
h = 1;
break;
}
}
}
if (!found) {
/* Use secondary hash to avoid collisions
with usual PHT refill handler. */
i = RANDI(seed_real) % 8;
base = base2;
h = 1;
}
}
phte_real[base + i].v = 1;
phte_real[base + i].vsid = vsid;
phte_real[base + i].h = h;
phte_real[base + i].api = api;
phte_real[base + i].rpn = KA2PA(badvaddr) >> 12;
phte_real[base + i].r = 0;
phte_real[base + i].c = 0;
phte_real[base + i].wimg = 0;
phte_real[base + i].pp = 2; // FIXME
return true;
return false;
}
 
 
/** Process ITLB/DTLB Miss Exception in Real Mode
*
*
*/
void tlb_refill_real(int n, uint32_t tlbmiss, ptehi_t ptehi, ptelo_t ptelo, istate_t *istate)
{
uint32_t badvaddr = tlbmiss & 0xfffffffc;
uint32_t physmem;
asm volatile (
"mfsprg3 %0\n"
: "=r" (physmem)
);
if ((badvaddr < PA2KA(0)) || (badvaddr >= PA2KA(physmem)))
return; // FIXME
ptelo.rpn = KA2PA(badvaddr) >> 12;
ptelo.wimg = 0;
ptelo.pp = 2; // FIXME
uint32_t index = 0;
asm volatile (
"mtspr 981, %0\n"
"mtspr 982, %1\n"
"tlbld %2\n"
"tlbli %2\n"
: "=r" (index)
: "r" (ptehi),
"r" (ptelo)
);
}
 
 
void tlb_arch_init(void)
{
tlb_invalidate_all();
445,87 → 367,9
 
void tlb_invalidate_all(void)
{
uint32_t index;
asm volatile (
"li %0, 0\n"
"sync\n"
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
TLB_FLUSH
"eieio\n"
"tlbia\n"
"tlbsync\n"
"sync\n"
: "=r" (index)
);
}
 
549,7 → 393,7
}
 
 
void tlb_invalidate_pages(asid_t asid, uintptr_t page, size_t cnt)
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
{
// TODO
tlb_invalidate_all();
594,7 → 438,7
: "=r" (vsid)
: "r" (sr << 28)
);
printf("sr[%02u]: vsid=%.*p (asid=%u)%s%s\n", sr,
printf("vsid[%d]: VSID=%.*p (ASID=%d)%s%s\n", sr,
sizeof(vsid) * 2, vsid & 0xffffff, (vsid & 0xffffff) >> 4,
((vsid >> 30) & 1) ? " supervisor" : "",
((vsid >> 29) & 1) ? " user" : "");
/trunk/kernel/arch/ppc32/src/mm/page.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc32mm
/** @addtogroup ppc32mm
* @{
*/
/** @file
49,7 → 49,7
{
if (last_frame + ALIGN_UP(size, PAGE_SIZE) >
KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
panic("Unable to map physical memory %p (%" PRIs " bytes).",
panic("Unable to map physical memory %p (%" PRIs " bytes)",
physaddr, size)
uintptr_t virtaddr = PA2KA(last_frame);
/trunk/kernel/arch/ppc32/src/mm/frame.c
57,7 → 57,7
void frame_arch_init(void)
{
pfn_t minconf = 2;
size_t i;
count_t i;
pfn_t start, conf;
size_t size;
74,7 → 74,7
if (last_frame < ALIGN_UP(bootinfo.memmap.zones[i].start + bootinfo.memmap.zones[i].size, FRAME_SIZE))
last_frame = ALIGN_UP(bootinfo.memmap.zones[i].start + bootinfo.memmap.zones[i].size, FRAME_SIZE);
}
 
/* First is exception vector, second is 'implementation specific',
third and fourth is reserved, other contain real mode code */
frame_mark_unavailable(0, 8);
/trunk/kernel/arch/ppc32/src/interrupt.c
60,6 → 60,7
int inum;
while ((inum = pic_get_pending()) != -1) {
bool ack = false;
irq_t *irq = irq_dispatch_and_lock(inum);
if (irq) {
/*
68,17 → 69,11
if (irq->preack) {
/* Acknowledge the interrupt before processing */
if (irq->cir)
irq->cir(irq->cir_arg, irq->inr);
pic_ack_interrupt(inum);
ack = true;
}
irq->handler(irq);
if (!irq->preack) {
if (irq->cir)
irq->cir(irq->cir_arg, irq->inr);
}
irq->handler(irq, irq->arg);
spinlock_unlock(&irq->lock);
} else {
/*
88,6 → 83,9
printf("cpu%u: spurious interrupt (inum=%d)\n", CPU->id, inum);
#endif
}
if (!ack)
pic_ack_interrupt(inum);
}
}
 
94,8 → 92,8
 
static void exception_decrementer(int n, istate_t *istate)
{
clock();
start_decrementer();
clock();
}
 
 
/trunk/kernel/arch/ppc32/src/ppc32.c
35,8 → 35,7
#include <config.h>
#include <arch.h>
#include <arch/boot/boot.h>
#include <genarch/drivers/via-cuda/cuda.h>
#include <genarch/kbrd/kbrd.h>
#include <arch/drivers/cuda.h>
#include <arch/interrupt.h>
#include <genarch/fb/fb.h>
#include <genarch/fb/visuals.h>
43,29 → 42,24
#include <userspace.h>
#include <proc/uarg.h>
#include <console/console.h>
#include <ddi/device.h>
#include <ddi/irq.h>
#include <arch/drivers/pic.h>
#include <align.h>
#include <macros.h>
#include <string.h>
 
#define IRQ_COUNT 64
#define IRQ_CUDA 10
#define IRQ_COUNT 64
 
bootinfo_t bootinfo;
 
/** Performs ppc32-specific initialization before main_bsp() is called. */
void arch_pre_main(void)
{
/* Setup usermode */
init.cnt = bootinfo.taskmap.count;
uint32_t i;
for (i = 0; i < min3(bootinfo.taskmap.count, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
for (i = 0; i < bootinfo.taskmap.count; i++) {
init.tasks[i].addr = PA2KA(bootinfo.taskmap.tasks[i].addr);
init.tasks[i].size = bootinfo.taskmap.tasks[i].size;
str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
bootinfo.taskmap.tasks[i].name);
}
}
 
81,43 → 75,36
void arch_post_mm_init(void)
{
if (config.cpu_active == 1) {
 
#ifdef CONFIG_FB
/* Initialize framebuffer */
if (bootinfo.screen.addr) {
unsigned int visual;
switch (bootinfo.screen.bpp) {
case 8:
visual = VISUAL_INDIRECT_8;
break;
case 16:
visual = VISUAL_RGB_5_5_5;
break;
case 24:
visual = VISUAL_RGB_8_8_8;
break;
case 32:
visual = VISUAL_RGB_0_8_8_8;
break;
default:
panic("Unsupported bits per pixel.");
}
fb_properties_t prop = {
.addr = bootinfo.screen.addr,
.offset = 0,
.x = bootinfo.screen.width,
.y = bootinfo.screen.height,
.scan = bootinfo.screen.scanline,
.visual = visual,
};
fb_init(&prop);
unsigned int visual;
switch (bootinfo.screen.bpp) {
case 8:
visual = VISUAL_INDIRECT_8;
break;
case 16:
visual = VISUAL_RGB_5_5_5;
break;
case 24:
visual = VISUAL_RGB_8_8_8;
break;
case 32:
visual = VISUAL_RGB_0_8_8_8;
break;
default:
panic("Unsupported bits per pixel");
}
#endif
fb_init(bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height, bootinfo.screen.scanline, visual);
/* Initialize IRQ routing */
irq_init(IRQ_COUNT, IRQ_COUNT);
/* Initialize PIC */
pic_init(bootinfo.keyboard.addr, PAGE_SIZE);
/* Initialize I/O controller */
cuda_init(device_assign_devno(), bootinfo.keyboard.addr + 0x16000, 2 * PAGE_SIZE);
/* Merge all zones to 1 big zone */
zone_merge_all();
}
133,35 → 120,6
 
void arch_post_smp_init(void)
{
if (bootinfo.macio.addr) {
/* Initialize PIC */
cir_t cir;
void *cir_arg;
pic_init(bootinfo.macio.addr, PAGE_SIZE, &cir, &cir_arg);
 
#ifdef CONFIG_MAC_KBD
uintptr_t pa = bootinfo.macio.addr + 0x16000;
uintptr_t aligned_addr = ALIGN_DOWN(pa, PAGE_SIZE);
size_t offset = pa - aligned_addr;
size_t size = 2 * PAGE_SIZE;
cuda_t *cuda = (cuda_t *)
(hw_map(aligned_addr, offset + size) + offset);
/* Initialize I/O controller */
cuda_instance_t *cuda_instance =
cuda_init(cuda, IRQ_CUDA, cir, cir_arg);
if (cuda_instance) {
kbrd_instance_t *kbrd_instance = kbrd_init();
if (kbrd_instance) {
indev_t *sink = stdin_wire();
indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
cuda_wire(cuda_instance, kbrd);
pic_enable_interrupt(IRQ_CUDA);
}
}
#endif
}
}
 
void calibrate_delay_loop(void)
170,13 → 128,11
 
void userspace(uspace_arg_t *kernel_uarg)
{
userspace_asm((uintptr_t) kernel_uarg->uspace_uarg,
(uintptr_t) kernel_uarg->uspace_stack +
THREAD_STACK_SIZE - SP_DELTA,
(uintptr_t) kernel_uarg->uspace_entry);
userspace_asm((uintptr_t) kernel_uarg->uspace_uarg, (uintptr_t) kernel_uarg->uspace_stack + THREAD_STACK_SIZE - SP_DELTA, (uintptr_t) kernel_uarg->uspace_entry);
/* Unreachable */
while (true);
for (;;)
;
}
 
/** Acquire console back for kernel
184,9 → 140,7
*/
void arch_grab_console(void)
{
#ifdef CONFIG_FB
fb_redraw();
#endif
cuda_grab();
}
 
/** Return console to userspace
194,27 → 148,8
*/
void arch_release_console(void)
{
cuda_release();
}
 
/** Construct function pointer
*
* @param fptr function pointer structure
* @param addr function address
* @param caller calling function address
*
* @return address of the function pointer
*
*/
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
return addr;
}
 
void arch_reboot(void)
{
// TODO
while (1);
}
 
/** @}
*/
/trunk/kernel/arch/ppc32/src/drivers/cuda.c
0,0 → 1,355
/*
* Copyright (c) 2006 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc32
* @{
*/
/** @file
*/
 
#include <arch/drivers/cuda.h>
#include <ipc/irq.h>
#include <arch/asm.h>
#include <console/console.h>
#include <console/chardev.h>
#include <arch/drivers/pic.h>
#include <sysinfo/sysinfo.h>
#include <interrupt.h>
#include <stdarg.h>
 
#define CUDA_IRQ 10
#define SPECIAL '?'
 
#define PACKET_ADB 0x00
#define PACKET_CUDA 0x01
 
#define CUDA_POWERDOWN 0x0a
#define CUDA_RESET 0x11
 
#define RS 0x200
#define B (0 * RS)
#define A (1 * RS)
#define SR (10 * RS)
#define ACR (11 * RS)
 
#define SR_OUT 0x10
#define TACK 0x10
#define TIP 0x20
 
 
static volatile uint8_t *cuda = NULL;
static irq_t cuda_irq; /**< Cuda's IRQ. */
 
static char lchars[0x80] = {
'a',
's',
'd',
'f',
'h',
'g',
'z',
'x',
'c',
'v',
SPECIAL,
'b',
'q',
'w',
'e',
'r',
'y',
't',
'1',
'2',
'3',
'4',
'6',
'5',
'=',
'9',
'7',
'-',
'8',
'0',
']',
'o',
'u',
'[',
'i',
'p',
'\n', /* Enter */
'l',
'j',
'\'',
'k',
';',
'\\',
',',
'/',
'n',
'm',
'.',
'\t', /* Tab */
' ',
'`',
'\b', /* Backspace */
SPECIAL,
SPECIAL, /* Escape */
SPECIAL, /* Ctrl */
SPECIAL, /* Alt */
SPECIAL, /* Shift */
SPECIAL, /* Caps-Lock */
SPECIAL, /* RAlt */
SPECIAL, /* Left */
SPECIAL, /* Right */
SPECIAL, /* Down */
SPECIAL, /* Up */
SPECIAL,
SPECIAL,
'.', /* Keypad . */
SPECIAL,
'*', /* Keypad * */
SPECIAL,
'+', /* Keypad + */
SPECIAL,
SPECIAL, /* NumLock */
SPECIAL,
SPECIAL,
SPECIAL,
'/', /* Keypad / */
'\n', /* Keypad Enter */
SPECIAL,
'-', /* Keypad - */
SPECIAL,
SPECIAL,
SPECIAL,
'0', /* Keypad 0 */
'1', /* Keypad 1 */
'2', /* Keypad 2 */
'3', /* Keypad 3 */
'4', /* Keypad 4 */
'5', /* Keypad 5 */
'6', /* Keypad 6 */
'7', /* Keypad 7 */
SPECIAL,
'8', /* Keypad 8 */
'9', /* Keypad 9 */
SPECIAL,
SPECIAL,
SPECIAL,
SPECIAL, /* F5 */
SPECIAL, /* F6 */
SPECIAL, /* F7 */
SPECIAL, /* F3 */
SPECIAL, /* F8 */
SPECIAL, /* F9 */
SPECIAL,
SPECIAL, /* F11 */
SPECIAL,
SPECIAL, /* F13 */
SPECIAL,
SPECIAL, /* ScrollLock */
SPECIAL,
SPECIAL, /* F10 */
SPECIAL,
SPECIAL, /* F12 */
SPECIAL,
SPECIAL, /* Pause */
SPECIAL, /* Insert */
SPECIAL, /* Home */
SPECIAL, /* PageUp */
SPECIAL, /* Delete */
SPECIAL, /* F4 */
SPECIAL, /* End */
SPECIAL, /* F2 */
SPECIAL, /* PageDown */
SPECIAL /* F1 */
};
 
 
static void receive_packet(uint8_t *kind, index_t count, uint8_t data[])
{
cuda[B] = cuda[B] & ~TIP;
*kind = cuda[SR];
index_t i;
for (i = 0; i < count; i++)
data[i] = cuda[SR];
cuda[B] = cuda[B] | TIP;
}
 
 
/* Called from getc(). */
static void cuda_resume(chardev_t *d)
{
}
 
 
/* Called from getc(). */
static void cuda_suspend(chardev_t *d)
{
}
 
 
static char key_read(chardev_t *d)
{
char ch;
ch = 0;
return ch;
}
 
 
static chardev_t kbrd;
static chardev_operations_t ops = {
.suspend = cuda_suspend,
.resume = cuda_resume,
.read = key_read
};
 
 
int cuda_get_scancode(void)
{
uint8_t kind;
uint8_t data[4];
receive_packet(&kind, 4, data);
if ((kind == PACKET_ADB) && (data[0] == 0x40) && (data[1] == 0x2c))
return data[2];
return -1;
}
 
static void cuda_irq_handler(irq_t *irq, void *arg, ...)
{
if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
ipc_irq_send_notif(irq);
else {
int scan_code = cuda_get_scancode();
if (scan_code != -1) {
uint8_t scancode = (uint8_t) scan_code;
if ((scancode & 0x80) != 0x80)
chardev_push_character(&kbrd, lchars[scancode & 0x7f]);
}
}
}
 
static irq_ownership_t cuda_claim(void)
{
return IRQ_ACCEPT;
}
 
 
/** Initialize keyboard and service interrupts using kernel routine */
void cuda_grab(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&cuda_irq.lock);
cuda_irq.notif_cfg.notify = false;
spinlock_unlock(&cuda_irq.lock);
interrupts_restore(ipl);
}
 
 
/** Resume the former interrupt vector */
void cuda_release(void)
{
ipl_t ipl = interrupts_disable();
spinlock_lock(&cuda_irq.lock);
if (cuda_irq.notif_cfg.answerbox)
cuda_irq.notif_cfg.notify = true;
spinlock_unlock(&cuda_irq.unlock);
interrupts_restore(ipl);
}
 
 
void cuda_init(devno_t devno, uintptr_t base, size_t size)
{
cuda = (uint8_t *) hw_map(base, size);
chardev_initialize("cuda_kbd", &kbrd, &ops);
stdin = &kbrd;
irq_initialize(&cuda_irq);
cuda_irq.devno = devno;
cuda_irq.inr = CUDA_IRQ;
cuda_irq.claim = cuda_claim;
cuda_irq.handler = cuda_irq_handler;
irq_register(&cuda_irq);
pic_enable_interrupt(CUDA_IRQ);
 
sysinfo_set_item_val("kbd", NULL, true);
sysinfo_set_item_val("kbd.devno", NULL, devno);
sysinfo_set_item_val("kbd.inr", NULL, CUDA_IRQ);
sysinfo_set_item_val("kbd.address.virtual", NULL, base);
}
 
 
static void send_packet(const uint8_t kind, count_t count, ...)
{
index_t i;
va_list va;
cuda[B] = cuda[B] | TIP;
cuda[ACR] = cuda[ACR] | SR_OUT;
cuda[SR] = kind;
cuda[B] = cuda[B] & ~TIP;
va_start(va, count);
for (i = 0; i < count; i++) {
cuda[ACR] = cuda[ACR] | SR_OUT;
cuda[SR] = va_arg(va, int);
cuda[B] = cuda[B] | TACK;
}
va_end(va);
cuda[B] = cuda[B] | TIP;
}
 
 
void cpu_halt(void) {
asm volatile (
"b 0\n"
);
}
 
void arch_reboot(void) {
send_packet(PACKET_CUDA, 1, CUDA_RESET);
asm volatile (
"b 0\n"
);
}
 
/** @}
*/
/trunk/kernel/arch/ppc32/src/drivers/pic.c
26,7 → 26,7
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/** @addtogroup ppc32
/** @addtogroup ppc32
* @{
*/
/** @file
38,61 → 38,53
#include <byteorder.h>
#include <bitops.h>
 
static volatile uint32_t *pic = NULL;
static volatile uint32_t *pic;
 
void pic_init(uintptr_t base, size_t size, cir_t *cir, void **cir_arg)
void pic_init(uintptr_t base, size_t size)
{
pic = (uint32_t *) hw_map(base, size);
*cir = pic_ack_interrupt;
*cir_arg = NULL;
}
 
void pic_enable_interrupt(inr_t intnum)
void pic_enable_interrupt(int intnum)
{
if (pic) {
if (intnum < 32)
pic[PIC_MASK_LOW] = pic[PIC_MASK_LOW] | (1 << intnum);
else
pic[PIC_MASK_HIGH] = pic[PIC_MASK_HIGH] | (1 << (intnum - 32));
if (intnum < 32) {
pic[PIC_MASK_LOW] = pic[PIC_MASK_LOW] | (1 << intnum);
} else {
pic[PIC_MASK_HIGH] = pic[PIC_MASK_HIGH] | (1 << (intnum - 32));
}
}
 
void pic_disable_interrupt(inr_t intnum)
void pic_disable_interrupt(int intnum)
{
if (pic) {
if (intnum < 32)
pic[PIC_MASK_LOW] = pic[PIC_MASK_LOW] & (~(1 << intnum));
else
pic[PIC_MASK_HIGH] = pic[PIC_MASK_HIGH] & (~(1 << (intnum - 32)));
if (intnum < 32) {
pic[PIC_MASK_LOW] = pic[PIC_MASK_LOW] & (~(1 << intnum));
} else {
pic[PIC_MASK_HIGH] = pic[PIC_MASK_HIGH] & (~(1 << (intnum - 32)));
}
}
 
void pic_ack_interrupt(void *arg, inr_t intnum)
void pic_ack_interrupt(int intnum)
{
if (pic) {
if (intnum < 32)
pic[PIC_ACK_LOW] = 1 << intnum;
else
pic[PIC_ACK_HIGH] = 1 << (intnum - 32);
}
if (intnum < 32)
pic[PIC_ACK_LOW] = 1 << intnum;
else
pic[PIC_ACK_HIGH] = 1 << (intnum - 32);
}
 
/** Return number of pending interrupt */
int pic_get_pending(void)
{
if (pic) {
int pending;
pending = pic[PIC_PENDING_LOW];
if (pending)
return fnzb32(pending);
pending = pic[PIC_PENDING_HIGH];
if (pending)
return fnzb32(pending) + 32;
}
int pending;
 
pending = pic[PIC_PENDING_LOW];
if (pending)
return fnzb32(pending);
pending = pic[PIC_PENDING_HIGH];
if (pending)
return fnzb32(pending) + 32;
return -1;
}
 
/trunk/kernel/arch/ppc32/src/exception.S
60,7 → 60,7
2:
subi sp, sp, 164
subi sp, sp, 160
stw r0, 8(sp)
stw r2, 12(sp)
stw r3, 16(sp)
109,14 → 109,11
mfxer r12
stw r12, 148(sp)
mfdar r12
mfsprg1 r12
stw r12, 152(sp)
mfsprg1 r12
mfsprg2 r12
stw r12, 156(sp)
mfsprg2 r12
stw r12, 160(sp)
.endm
 
.org 0x100
140,7 → 137,16
exc_data_storage:
CONTEXT_STORE
b data_storage
li r3, 2
mr r4, sp
addi r4, r4, 8
bl pht_real_refill
cmpwi r3, 0
bne iret_real
li r3, 2
b jump_to_kernel
 
.org 0x400
.global exc_instruction_storage
147,8 → 153,17
exc_instruction_storage:
CONTEXT_STORE
b instruction_storage
li r3, 3
mr r4, sp
addi r4, r4, 8
bl pht_real_refill
cmpwi r3, 0
bne iret_real
 
li r3, 3
b jump_to_kernel
 
.org 0x500
.global exc_external
exc_external:
208,7 → 223,7
.org 0xc00
.global exc_syscall
exc_syscall:
CONTEXT_STORE
CONTEXT_STORE
b jump_to_kernel_syscall
 
220,63 → 235,7
li r3, 12
b jump_to_kernel
 
.org 0x1000
.global exc_itlb_miss
exc_itlb_miss:
CONTEXT_STORE
b tlb_miss
 
.org 0x1100
.global exc_dtlb_miss_load
exc_dtlb_miss_load:
CONTEXT_STORE
b tlb_miss
 
.org 0x1200
.global exc_dtlb_miss_store
exc_dtlb_miss_store:
CONTEXT_STORE
b tlb_miss
 
.org 0x4000
data_storage:
li r3, 2
mr r4, sp
addi r4, r4, 8
bl pht_refill_real
cmpwi r3, 0
bne iret_real
li r3, 2
b jump_to_kernel
 
instruction_storage:
li r3, 3
mr r4, sp
addi r4, r4, 8
bl pht_refill_real
cmpwi r3, 0
bne iret_real
li r3, 3
b jump_to_kernel
 
tlb_miss:
li r3, 16
mfspr r4, tlbmiss
mfspr r5, ptehi
mfspr r6, ptelo
mr r7, sp
addi r7, r7, 20
bl tlb_refill_real
b iret_real
 
jump_to_kernel:
lis r12, iret@ha
addi r12, r12, iret@l
313,6 → 272,7
rfi
 
iret_real:
lwz r0, 8(sp)
lwz r2, 12(sp)
lwz r3, 16(sp)
362,7 → 322,7
lwz r12, 148(sp)
mtxer r12
lwz r12, 156(sp)
lwz sp, 160(sp)
lwz r12, 152(sp)
lwz sp, 156(sp)
rfi
/trunk/kernel/arch/ppc32/src/boot/boot.S
33,7 → 33,7
 
.global kernel_image_start
kernel_image_start:
 
# load temporal kernel stack
lis sp, kernel_stack@ha
52,7 → 52,7
beq bootinfo_end
addis r3, r3, 0x8000
 
lis r31, bootinfo@ha
addi r31, r31, bootinfo@l # r31 = bootinfo
/trunk/kernel/arch/ppc32/src/dummy.s
30,7 → 30,6
 
.global asm_delay_loop
.global sys_tls_set
.global cpu_halt
 
sys_tls_set:
b sys_tls_set
37,6 → 36,3
 
asm_delay_loop:
blr
 
cpu_halt:
b cpu_halt