| /trunk/kernel/arch/mips32/include/context_offset.h |
|---|
| 76,17 → 76,26 |
| #define EOFFSET_T5 0x30 |
| #define EOFFSET_T6 0x34 |
| #define EOFFSET_T7 0x38 |
| #define EOFFSET_T8 0x3c |
| #define EOFFSET_T9 0x40 |
| #define EOFFSET_GP 0x44 |
| #define EOFFSET_SP 0x48 |
| #define EOFFSET_RA 0x4c |
| #define EOFFSET_LO 0x50 |
| #define EOFFSET_HI 0x54 |
| #define EOFFSET_STATUS 0x58 |
| #define EOFFSET_EPC 0x5c |
| #define EOFFSET_K1 0x60 |
| #define REGISTER_SPACE 104 /* respect stack alignment */ |
| #define EOFFSET_S0 0x3c |
| #define EOFFSET_S1 0x40 |
| #define EOFFSET_S2 0x44 |
| #define EOFFSET_S3 0x48 |
| #define EOFFSET_S4 0x4c |
| #define EOFFSET_S5 0x50 |
| #define EOFFSET_S6 0x54 |
| #define EOFFSET_S7 0x58 |
| #define EOFFSET_T8 0x5c |
| #define EOFFSET_T9 0x60 |
| #define EOFFSET_GP 0x64 |
| #define EOFFSET_SP 0x68 |
| #define EOFFSET_S8 0x6c |
| #define EOFFSET_RA 0x70 |
| #define EOFFSET_LO 0x74 |
| #define EOFFSET_HI 0x78 |
| #define EOFFSET_STATUS 0x7c |
| #define EOFFSET_EPC 0x80 |
| #define EOFFSET_K1 0x84 |
| #define REGISTER_SPACE 136 |
| #ifdef __ASM__ |
| 105,10 → 114,10 |
| sw $s8,OFFSET_S8(\ctx) |
| sw $gp,OFFSET_GP(\ctx) |
| #ifndef KERNEL |
| #ifndef KERNEL |
| sw $k1,OFFSET_TLS(\ctx) |
| #ifdef CONFIG_FPU |
| # ifdef CONFIG_MIPS_FPU |
| mfc1 $t0,$20 |
| sw $t0, OFFSET_F20(\ctx) |
| 141,7 → 150,7 |
| mfc1 $t0,$30 |
| sw $t0, OFFSET_F30(\ctx) |
| #endif /* CONFIG_FPU */ |
| # endif /* CONFIG_MIPS_FPU */ |
| #endif /* KERNEL */ |
| sw $ra,OFFSET_PC(\ctx) |
| 163,7 → 172,7 |
| #ifndef KERNEL |
| lw $k1,OFFSET_TLS(\ctx) |
| #ifdef CONFIG_FPU |
| # ifdef CONFIG_MIPS_FPU |
| lw $t0, OFFSET_F20(\ctx) |
| mtc1 $t0,$20 |
| 196,9 → 205,9 |
| lw $t0, OFFSET_F30(\ctx) |
| mtc1 $t0,$30 |
| #endif /* CONFIG_FPU */ |
| # endif /* CONFIG_MIPS_FPU */ |
| #endif /* KERNEL */ |
| lw $ra,OFFSET_PC(\ctx) |
| lw $sp,OFFSET_SP(\ctx) |
| .endm |