/branches/arm/kernel/arch/arm32/src/userspace.c |
---|
File deleted |
/branches/arm/kernel/arch/arm32/src/machine_func.c |
---|
File deleted |
/branches/arm/kernel/arch/arm32/src/panic.S |
---|
File deleted |
/branches/arm/kernel/arch/arm32/src/exc_handler.S |
---|
File deleted |
/branches/arm/kernel/arch/arm32/src/exception.c |
---|
File deleted |
/branches/arm/kernel/arch/arm32/src/mach/testarm/testarm.c |
---|
File deleted |
Property changes: |
Deleted: svn:mergeinfo |
/branches/arm/kernel/arch/arm32/src/mach/integratorcp/integratorcp.c |
---|
File deleted |
/branches/arm/kernel/arch/arm32/src/mm/page_fault.c |
---|
File deleted |
/branches/arm/kernel/arch/arm32/src/mm/as.c |
---|
1,5 → 1,5 |
/* |
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
* Copyright (c) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
30,7 → 30,6 |
* @{ |
*/ |
/** @file |
* @brief Address space functions. |
*/ |
#include <arch/mm/as.h> |
39,14 → 38,12 |
#include <mm/as.h> |
#include <arch.h> |
/** Architecture dependent address space init. |
* |
* Since ARM supports page tables, #as_pt_operations are used. |
*/ |
/** Architecture dependent address space init. */ |
void as_arch_init(void) |
{ |
as_operations = &as_pt_operations; |
as_operations = &as_pt_operations; |
} |
/** @} |
*/ |
/branches/arm/kernel/arch/arm32/src/mm/tlb.c |
---|
1,5 → 1,5 |
/* |
* Copyright (c) 2007 Michal Kebrt |
* Copyright (c) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
30,7 → 30,6 |
* @{ |
*/ |
/** @file |
* @brief TLB related functions. |
*/ |
#include <mm/tlb.h> |
39,15 → 38,13 |
#include <arch/types.h> |
#include <arch/mm/page.h> |
/** Invalidate all entries in TLB. |
* |
* @note See ARM Architecture reference section 3.7.7 for details. |
*/ |
/** Invalidate all entries in TLB. */ |
void tlb_invalidate_all(void) |
{ |
asm volatile ( |
asm volatile ( |
"eor r1, r1\n" |
"mcr p15, 0, r1, c8, c7, 0\n" |
"MCR p15, 0, r1, c8, c7, 0\n" // see ARM Architecture reference relE 3.7.7 p.528 |
::: "r1" |
); |
} |
54,7 → 51,7 |
/** Invalidate all entries in TLB that belong to specified address space. |
* |
* @param asid Ignored as the ARM architecture doesn't support ASIDs. |
* @param asid This parameter is ignored as the ARM architecture doesn't support it. |
*/ |
void tlb_invalidate_asid(asid_t asid) |
{ |
62,39 → 59,30 |
} |
/** Invalidate single entry in TLB |
* |
* @param page Virtual adress of the page |
*/ |
static inline void invalidate_page(uintptr_t page) |
static inline void invlpg(uintptr_t page) |
{ |
asm volatile ( |
"mcr p15, 0, %[page], c8, c7, 1\n" |
:: [page] "r" (page) |
); |
"MCR p15, 0, %0, c8, c7, 1" |
: /* no output */ |
: "r"(page) /* input */ |
); |
} |
/** Invalidate TLB entries for specified page range belonging to specified |
* address space. |
/** Invalidate TLB entries for specified page range belonging to specified address space. |
* |
* @param asid Ignored as the ARM architecture doesn't support it. |
* @param asid This parameter is ignored as the ARM architecture doesn't support it. |
* @param page Address of the first page whose entry is to be invalidated. |
* @param cnt Number of entries to invalidate. |
*/ |
void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, size_t cnt) |
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
{ |
unsigned int i; |
for (i = 0; i < cnt; i++) |
invalidate_page(page + i * PAGE_SIZE); |
invlpg(page + i * PAGE_SIZE); |
} |
void tlb_arch_init(void) |
{ |
} |
void tlb_print(void) |
{ |
} |
/** @} |
*/ |
/branches/arm/kernel/arch/arm32/src/mm/frame.c |
---|
1,5 → 1,5 |
/* |
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
* Copyright (c) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
26,44 → 26,19 |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/** @addtogroup arm32mm |
/** @addtogroup arm32mm |
* @{ |
*/ |
/** @file |
* @brief Frame related functions. |
*/ |
#include <mm/frame.h> |
#include <arch/mm/frame.h> |
#include <arch/machine.h> |
#include <config.h> |
/** Address of the last frame in the memory. */ |
uintptr_t last_frame = 0; |
/** Creates memory zones. */ |
/** Create memory zones. */ |
void frame_arch_init(void) |
{ |
last_frame = machine_get_memory_size(); |
/* All memory as one zone */ |
zone_create(0, ADDR2PFN(last_frame), |
BOOT_PAGE_TABLE_START_FRAME + BOOT_PAGE_TABLE_SIZE_IN_FRAMES, 0); |
/* blacklist boot page table */ |
frame_mark_unavailable(BOOT_PAGE_TABLE_START_FRAME, |
BOOT_PAGE_TABLE_SIZE_IN_FRAMES); |
machine_frame_init(); |
/* TODO */ |
} |
/** Frees the boot page table. */ |
void boot_page_table_free(void) |
{ |
unsigned int i; |
for (i = 0; i < BOOT_PAGE_TABLE_SIZE_IN_FRAMES; i++) |
frame_free(i * FRAME_SIZE + BOOT_PAGE_TABLE_ADDRESS); |
} |
/** @} |
*/ |
/branches/arm/kernel/arch/arm32/src/mm/page.c |
---|
1,5 → 1,5 |
/* |
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
* Copyright (c) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
30,76 → 30,22 |
* @{ |
*/ |
/** @file |
* @brief Paging related functions. |
*/ |
#include <arch/mm/page.h> |
#include <genarch/mm/page_pt.h> |
#include <mm/page.h> |
#include <align.h> |
#include <config.h> |
#include <arch/exception.h> |
#include <typedefs.h> |
#include <arch/types.h> |
#include <interrupt.h> |
#include <arch/mm/frame.h> |
/** Initializes page tables. |
* |
* 1:1 virtual-physical mapping is created in kernel address space. Mapping |
* for table with exception vectors is also created. |
*/ |
void page_arch_init(void) |
{ |
int flags = PAGE_CACHEABLE; |
page_mapping_operations = &pt_mapping_operations; |
uintptr_t cur; |
/* Kernel identity mapping */ |
for (cur = 0; cur < last_frame; cur += FRAME_SIZE) |
page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); |
/* Create mapping for exception table at high offset */ |
#ifdef HIGH_EXCEPTION_VECTORS |
void *virtaddr = frame_alloc(ONE_FRAME, FRAME_KA); |
page_mapping_insert(AS_KERNEL, EXC_BASE_ADDRESS, KA2PA(virtaddr), flags); |
#else |
#error "Only high exception vector supported now" |
#endif |
as_switch(NULL, AS_KERNEL); |
boot_page_table_free(); |
} |
/** Maps device into the kernel space. |
* |
* Maps physical address of device into kernel virtual address space (so it can |
* be accessed only by kernel through virtual address). |
* |
* @param physaddr Physical address where device is connected. |
* @param size Length of area where device is present. |
* |
* @return Virtual address where device will be accessible. |
*/ |
/** Map device into kernel space. */ |
uintptr_t hw_map(uintptr_t physaddr, size_t size) |
{ |
if (last_frame + ALIGN_UP(size, PAGE_SIZE) > |
KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH)) { |
panic("Unable to map physical memory %p (%d bytes).", |
physaddr, size) |
} |
uintptr_t virtaddr = PA2KA(last_frame); |
pfn_t i; |
for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) { |
page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), |
physaddr + PFN2ADDR(i), |
PAGE_NOT_CACHEABLE | PAGE_READ | PAGE_WRITE | PAGE_KERNEL); |
} |
last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE); |
return virtaddr; |
/* TODO */ |
return NULL; |
} |
/** @} |
/branches/arm/kernel/arch/arm32/src/console.c |
---|
0,0 → 1,61 |
/* |
* Copyright (c) 2007 Michal Kebrt |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/** @addtogroup arm32 |
* @{ |
*/ |
/** @file |
*/ |
#include <console/console.h> |
#include <arch/console.h> |
#include <arch/drivers/msim_gxemul.h> |
void console_init(devno_t devno) |
{ |
msim_gxemul_console(devno); |
} |
/** Acquire console back for kernel |
* |
*/ |
void arch_grab_console(void) |
{ |
msim_gxemul_kbd_grab(); |
} |
/** Return console to userspace |
* |
*/ |
void arch_release_console(void) |
{ |
msim_gxemul_kbd_release(); |
} |
/** @} |
*/ |
/branches/arm/kernel/arch/arm32/src/arm32.c |
---|
30,166 → 30,77 |
* @{ |
*/ |
/** @file |
* @brief ARM32 architecture specific functions. |
*/ |
#include <arch.h> |
#include <arch/boot.h> |
#include <config.h> |
#include <genarch/fb/fb.h> |
#include <genarch/fb/visuals.h> |
#include <genarch/drivers/dsrln/dsrlnin.h> |
#include <genarch/drivers/dsrln/dsrlnout.h> |
#include <genarch/srln/srln.h> |
#include <sysinfo/sysinfo.h> |
#include <console/console.h> |
#include <ddi/irq.h> |
#include <arch/machine.h> |
#include <print.h> |
#include <config.h> |
#include <interrupt.h> |
#include <arch/regutils.h> |
#include <userspace.h> |
#include <macros.h> |
#include <string.h> |
#include <arch/console.h> |
#include <ddi/device.h> |
/** Performs arm32-specific initialization before main_bsp() is called. */ |
void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo) |
#include "aux_print/printf.h" |
bootinfo_t bootinfo; |
void arch_pre_main(void) |
{ |
unsigned int i; |
init.cnt = bootinfo->cnt; |
for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); ++i) { |
init.tasks[i].addr = bootinfo->tasks[i].addr; |
init.tasks[i].size = bootinfo->tasks[i].size; |
str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN, |
bootinfo->tasks[i].name); |
aux_printf("arch_pre_main\n"); |
int i; |
init.cnt = bootinfo.cnt; |
for (i = 0; i < bootinfo.cnt; ++i) { |
init.tasks[i].addr = bootinfo.tasks[i].addr; |
init.tasks[i].size = bootinfo.tasks[i].size; |
// aux_printf("%L, %d\n", bootinfo.tasks[i].addr, bootinfo.tasks[i].size); |
} |
} |
/** Performs arm32 specific initialization before mm is initialized. */ |
void arch_pre_mm_init(void) |
{ |
/* It is not assumed by default */ |
interrupts_disable(); |
aux_printf("arch_pre_mm_init\n"); |
console_init(device_assign_devno()); |
} |
/** Performs arm32 specific initialization afterr mm is initialized. */ |
void arch_post_mm_init(void) |
{ |
machine_init(); |
/* Initialize exception dispatch table */ |
exception_init(); |
interrupt_init(); |
#ifdef CONFIG_FB |
machine_fb_init(); |
#else |
#ifdef CONFIG_ARM_PRN |
machine_srlnout_init(); |
#endif /* CONFIG_ARM_PRN */ |
#endif /* CONFIG_FB */ |
/* TODO */ |
} |
/** Performs arm32 specific tasks needed after cpu is initialized. |
* |
* Currently the function is empty. |
*/ |
void arch_post_cpu_init(void) |
{ |
/* TODO */ |
} |
/** Performs arm32 specific tasks needed before the multiprocessing is |
* initialized. |
* |
* Currently the function is empty because SMP is not supported. |
*/ |
void arch_pre_smp_init(void) |
{ |
/* TODO */ |
} |
/** Performs arm32 specific tasks needed after the multiprocessing is |
* initialized. |
* |
* Currently the function is empty because SMP is not supported. |
*/ |
void arch_post_smp_init(void) |
{ |
machine_input_init(); |
/* TODO */ |
} |
/** Performs arm32 specific tasks needed before the new task is run. */ |
/** Perform arm32 specific tasks needed before the new task is run. */ |
void before_task_runs_arch(void) |
{ |
/* TODO */ |
} |
/** Performs arm32 specific tasks needed before the new thread is scheduled. |
* |
* It sets supervisor_sp. |
*/ |
/** Perform arm32 specific tasks needed before the new thread is scheduled. */ |
void before_thread_runs_arch(void) |
{ |
uint8_t *stck; |
tlb_invalidate_all(); |
stck = &THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA]; |
supervisor_sp = (uintptr_t) stck; |
/* TODO */ |
} |
/** Performs arm32 specific tasks before a thread stops running. |
* |
* Currently the function is empty. |
*/ |
void after_thread_ran_arch(void) |
{ |
/* TODO */ |
} |
/** Halts CPU. */ |
void cpu_halt(void) |
{ |
machine_cpu_halt(); |
} |
/** Reboot. */ |
void arch_reboot() |
{ |
/* not implemented */ |
while (1); |
} |
/** Construct function pointer |
* |
* @param fptr function pointer structure |
* @param addr function address |
* @param caller calling function address |
* |
* @return address of the function pointer |
* |
*/ |
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) |
{ |
return addr; |
} |
/** Acquire console back for kernel. */ |
void arch_grab_console(void) |
{ |
machine_grab_console(); |
#ifdef CONFIG_FB |
fb_redraw(); |
#endif |
} |
/** Return console to userspace. */ |
void arch_release_console(void) |
{ |
machine_release_console(); |
} |
/** @} |
*/ |
/branches/arm/kernel/arch/arm32/src/drivers/msim_gxemul.c |
---|
0,0 → 1,164 |
/* |
* Copyright (c) 2005-2007 Ondrej Palkovsky, Michal Kebrt |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/** @addtogroup arm32 |
* @{ |
*/ |
/** @file |
*/ |
#include <interrupt.h> |
#include <ipc/irq.h> |
#include <console/chardev.h> |
#include <arch/drivers/msim_gxemul.h> |
//#include <arch/cp0.h> |
#include <console/console.h> |
#include <sysinfo/sysinfo.h> |
/** Address of devices. */ |
#define MSIM_VIDEORAM 0xB0000000 |
#define MSIM_KBD_ADDRESS 0xB0000000 |
#define MSIM_KBD_IRQ 2 |
static chardev_t console; |
static irq_t msim_irq; |
static void msim_write(chardev_t *dev, const char ch); |
static void msim_enable(chardev_t *dev); |
static void msim_disable(chardev_t *dev); |
static char msim_do_read(chardev_t *dev); |
static chardev_operations_t msim_ops = { |
.resume = msim_enable, |
.suspend = msim_disable, |
.write = msim_write, |
.read = msim_do_read, |
}; |
/** Putchar that works with MSIM & gxemul */ |
void msim_write(chardev_t *dev, const char ch) |
{ |
*((char *) MSIM_VIDEORAM) = ch; |
} |
/* Called from getc(). */ |
void msim_enable(chardev_t *dev) |
{ |
// cp0_unmask_int(MSIM_KBD_IRQ); |
} |
/* Called from getc(). */ |
void msim_disable(chardev_t *dev) |
{ |
// cp0_mask_int(MSIM_KBD_IRQ); |
} |
#include <print.h> |
/** Read character using polling, assume interrupts disabled */ |
static char msim_do_read(chardev_t *dev) |
{ |
char ch; |
while (1) { |
ch = *((volatile char *) MSIM_KBD_ADDRESS); |
if (ch) { |
if (ch == '\r') |
return '\n'; |
if (ch == 0x7f) |
return '\b'; |
return ch; |
} |
} |
} |
/** Process keyboard interrupt. */ |
static void msim_irq_handler(irq_t *irq, void *arg, ...) |
{ |
if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox)) |
ipc_irq_send_notif(irq); |
else { |
char ch = 0; |
ch = *((char *) MSIM_KBD_ADDRESS); |
if (ch =='\r') |
ch = '\n'; |
if (ch == 0x7f) |
ch = '\b'; |
chardev_push_character(&console, ch); |
} |
} |
static irq_ownership_t msim_claim(void) |
{ |
return IRQ_ACCEPT; |
} |
void msim_gxemul_kbd_grab(void) |
{ |
ipl_t ipl = interrupts_disable(); |
spinlock_lock(&msim_irq.lock); |
msim_irq.notif_cfg.notify = false; |
spinlock_unlock(&msim_irq.lock); |
interrupts_restore(ipl); |
} |
void msim_gxemul_kbd_release(void) |
{ |
ipl_t ipl = interrupts_disable(); |
spinlock_lock(&msim_irq.lock); |
if (msim_irq.notif_cfg.answerbox) |
msim_irq.notif_cfg.notify = true; |
spinlock_unlock(&msim_irq.lock); |
interrupts_restore(ipl); |
} |
/* Return console object representing msim console */ |
void msim_gxemul_console(devno_t devno) |
{ |
chardev_initialize("msim_console", &console, &msim_ops); |
stdin = &console; |
stdout = &console; |
irq_initialize(&msim_irq); |
msim_irq.devno = devno; |
msim_irq.inr = MSIM_KBD_IRQ; |
msim_irq.claim = msim_claim; |
msim_irq.handler = msim_irq_handler; |
irq_register(&msim_irq); |
// cp0_unmask_int(MSIM_KBD_IRQ); |
sysinfo_set_item_val("kbd", NULL, true); |
sysinfo_set_item_val("kbd.devno", NULL, devno); |
sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ); |
sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS); |
} |
/** @} |
*/ |
/branches/arm/kernel/arch/arm32/src/asm.S |
---|
30,7 → 30,11 |
.text |
.global memsetb |
.global memsetw |
memsetb: |
b _memsetb |
nop |
.global memcpy |
.global memcpy_from_uspace |
.global memcpy_to_uspace |
37,12 → 41,6 |
.global memcpy_from_uspace_failover_address |
.global memcpy_to_uspace_failover_address |
memsetb: |
b _memsetb |
memsetw: |
b _memsetw |
memcpy: |
memcpy_from_uspace: |
memcpy_to_uspace: |
49,55 → 47,55 |
add r3, r1, #3 |
bic r3, r3, #3 |
cmp r1, r3 |
stmdb sp!, {r4, r5, lr} |
mov r5, r0 /* save dst */ |
beq 4f |
1: |
stmdb sp!, {r4, lr} |
beq case_4 |
case_1: |
cmp r2, #0 |
movne ip, #0 |
beq 3f |
2: |
beq case_3 |
case_2: |
ldrb r3, [ip, r1] |
strb r3, [ip, r0] |
add ip, ip, #1 |
cmp ip, r2 |
bne 2b |
3: |
mov r0, r5 |
ldmia sp!, {r4, r5, pc} |
4: |
bne case_2 |
case_3: |
mov r0, r1 |
ldmia sp!, {r4, pc} |
case_4: |
add r3, r0, #3 |
bic r3, r3, #3 |
cmp r0, r3 |
bne 1b |
bne case_1 |
movs r4, r2, lsr #2 |
moveq lr, r4 |
beq 6f |
beq case_6 |
mov lr, #0 |
mov ip, lr |
5: |
case_5: |
ldr r3, [ip, r1] |
add lr, lr, #1 |
cmp lr, r4 |
str r3, [ip, r0] |
add ip, ip, #4 |
bne 5b |
6: |
bne case_5 |
case_6: |
ands r4, r2, #3 |
beq 3b |
beq case_3 |
mov r3, lr, lsl #2 |
add r0, r3, r0 |
add ip, r3, r1 |
mov r2, #0 |
7: |
case_7: |
ldrb r3, [r2, ip] |
strb r3, [r2, r0] |
add r2, r2, #1 |
cmp r2, r4 |
bne 7b |
b 3b |
bne case_7 |
b case_3 |
memcpy_from_uspace_failover_address: |
memcpy_to_uspace_failover_address: |
mov r0, #0 |
ldmia sp!, {r4, r5, pc} |
mov r0, #0 |
ldmia sp!, {r4, pc} |
/branches/arm/kernel/arch/arm32/src/dummy.S |
---|
1,5 → 1,5 |
# |
# Copyright (c) 2007 Michal Kebry, Pavel Jancik, Petr Stepan |
# Copyright (c) 2003-2004 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
30,35 → 30,61 |
.global calibrate_delay_loop |
.global asm_delay_loop |
.global dummy |
#.global arch_grab_console |
#.global arch_release_console |
.global cpu_halt |
.global fpu_context_restore |
.global fpu_context_save |
.global fpu_enable |
.global fpu_init |
#.global interrupts_disable |
#.global interrupts_enable |
#.global interrupts_read |
#.global interrupts_restore |
#.global memcpy |
#.global memcpy_from_uspace |
#.global memcpy_to_uspace |
#.global memsetb |
.global panic_printf |
.global symbol_table |
.global sys_tls_set |
.global dummy |
#.global tlb_invalidate_asid |
#.global tlb_invalidate_pages |
.global userspace |
calibrate_delay_loop: |
mov pc, lr |
asm_delay_loop: |
mov pc, lr |
#arch_grab_console: |
#arch_release_console: |
cpu_halt: |
fpu_context_restore: |
mov pc, lr |
fpu_context_save: |
mov pc, lr |
fpu_enable: |
mov pc, lr |
fpu_init: |
mov pc, lr |
# not used on ARM |
#interrupts_disable: |
#interrupts_enable: |
#interrupts_read: |
#interrupts_restore: |
#memcpy: |
#memcpy_from_uspace: |
#memcpy_to_uspace: |
#memsetb: |
panic_printf: |
symbol_table: |
sys_tls_set: |
#tlb_invalidate_asid: |
#tlb_invalidate_pages: |
userspace: |
dummy: |
mov pc, lr |
0: |
b 0b |
/branches/arm/kernel/arch/arm32/src/context.S |
---|
1,5 → 1,5 |
# |
# Copyright (c) 2007 Petr Stepan |
# Copyright (c) 2003-2004 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
32,28 → 32,24 |
.global context_restore_arch |
context_save_arch: |
stmfd sp!, {r1} |
mrs r1, cpsr |
and r1, r1, #0x1f |
stmia r0!, {r1} |
ldmfd sp!, {r1} |
stmia r0!, {sp, lr} |
stmia r0!, {r4-r11} |
stmia r0!, {r4-r8, r10-r11} |
mov r0, #1 |
mov pc, lr |
/* debug print |
ldr r0, =0x10000000 |
mov r1, #1 |
str r1, [r0] |
*/ |
context_restore_arch: |
ldmia r0!, {r4} |
mrs r5, cpsr |
bic r5, r5, #0x1f |
orr r5, r5, r4 |
msr cpsr_c, r5 |
ldmia r0!, {sp, lr} |
ldmia r0!, {r4-r11} |
ldmia r0!, {r4-r8, r10-r11} |
mov r0, #0 |
mov pc, lr |
/branches/arm/kernel/arch/arm32/src/start.S |
---|
31,50 → 31,40 |
.text |
.global kernel_image_start |
.global exc_stack |
.global supervisor_sp |
kernel_image_start: |
# initialize Stack pointer for exception modes |
mrs r4, cpsr |
bic r4, r4, #0x1f |
ldr sp, =end_stack |
cmp r2, #0 |
beq bootinfo_end |
#FIQ Mode |
orr r3, r4, #0x11 |
msr cpsr_c, r3 |
ldr sp, =exc_stack |
ldr r3, =bootinfo |
#IRQ Mode |
orr r3, r4, #0x12 |
msr cpsr_c, r3 |
ldr sp, =exc_stack |
bootinfo_loop: |
ldr r4, [r1] |
str r4, [r3] |
#ABORT Mode |
orr r3, r4, #0x17 |
msr cpsr_c, r3 |
ldr sp, =exc_stack |
add r1, r1, #4 |
add r3, r3, #4 |
add r2, r2, #-4 |
#UNDEFINED Mode |
orr r3, r4, #0x1b |
msr cpsr_c, r3 |
ldr sp, =exc_stack |
cmp r2, #0 |
bne bootinfo_loop |
bootinfo_end: |
# switch to supervisor mode |
orr r3, r4, #0x13 |
msr cpsr_c, r3 |
ldr sp, =temp_stack |
bl arch_pre_main |
bl main_bsp |
b halt |
.space TEMP_STACK_SIZE |
temp_stack: |
end_stack: |
.space 1024 |
exc_stack: |
halt: |
ldr r0,=0x10000010 |
ldr r1, [r0] |
b halt |
supervisor_sp: |
.space 4 |
/branches/arm/kernel/arch/arm32/src/aux_print/printf.c |
---|
0,0 → 1,243 |
/* |
* Copyright (c) 2006 Martin Decky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include "printf.h" |
#include "stdarg.h" |
#include "types.h" |
typedef char *char_ptr; |
static char digits[] = "0123456789abcdef"; /**< Hexadecimal characters */ |
void aux_puts(const char *str) |
{ |
int len = 0; |
while (str[len] != 0) |
len++; |
aux_write(str, len); |
} |
/** Print hexadecimal digits |
* |
* Print fixed count of hexadecimal digits from |
* the number num. The digits are printed in |
* natural left-to-right order starting with |
* the width-th digit. |
* |
* @param num Number containing digits. |
* @param width Count of digits to print. |
* |
*/ |
static void print_fixed_hex(const uint64_t num, const int width) |
{ |
int i; |
for (i = width * 8 - 4; i >= 0; i -= 4) |
aux_write(digits + ((num >> i) & 0xf), 1); |
} |
/** Print number in given base |
* |
* Print significant digits of a number in given |
* base. |
* |
* @param num Number to print. |
* @param base Base to print the number in (should |
* be in range 2 .. 16). |
* |
*/ |
static void print_number(const unative_t num, const unsigned int base) |
{ |
int val = num; |
char d[sizeof(unative_t) * 8 + 1]; /* this is good enough even for base == 2 */ |
int i = sizeof(unative_t) * 8 - 1; |
do { |
d[i--] = digits[val % base]; |
} while (val /= base); |
d[sizeof(unative_t) * 8] = 0; |
aux_puts(&d[i + 1]); |
} |
/** General formatted text print |
* |
* Print text formatted according the fmt parameter |
* and variant arguments. Each formatting directive |
* begins with \% (percentage) character and one of the |
* following character: |
* |
* \% Prints the percentage character. |
* |
* s The next variant argument is treated as char* |
* and printed as a NULL terminated string. |
* |
* c The next variant argument is treated as a single char. |
* |
* p The next variant argument is treated as a maximum |
* bit-width integer with respect to architecture |
* and printed in full hexadecimal width. |
* |
* P As with 'p', but '0x' is prefixed. |
* |
* q The next variant argument is treated as a 64b integer |
* and printed in full hexadecimal width. |
* |
* Q As with 'q', but '0x' is prefixed. |
* |
* l The next variant argument is treated as a 32b integer |
* and printed in full hexadecimal width. |
* |
* L As with 'l', but '0x' is prefixed. |
* |
* w The next variant argument is treated as a 16b integer |
* and printed in full hexadecimal width. |
* |
* W As with 'w', but '0x' is prefixed. |
* |
* b The next variant argument is treated as a 8b integer |
* and printed in full hexadecimal width. |
* |
* B As with 'b', but '0x' is prefixed. |
* |
* d The next variant argument is treated as integer |
* and printed in standard decimal format (only significant |
* digits). |
* |
* x The next variant argument is treated as integer |
* and printed in standard hexadecimal format (only significant |
* digits). |
* |
* X As with 'x', but '0x' is prefixed. |
* |
* All other characters from fmt except the formatting directives |
* are printed in verbatim. |
* |
* @param fmt Formatting NULL terminated string. |
*/ |
void aux_printf(const char *fmt, ...) |
{ |
int i = 0; |
va_list ap; |
char c; |
va_start(ap, fmt); |
while ((c = fmt[i++])) { |
switch (c) { |
/* control character */ |
case '%': |
switch (c = fmt[i++]) { |
/* percentile itself */ |
case '%': |
break; |
/* |
* String and character conversions. |
*/ |
case 's': |
aux_puts(va_arg(ap, char_ptr)); |
goto loop; |
case 'c': |
c = (char) va_arg(ap, int); |
break; |
/* |
* Hexadecimal conversions with fixed width. |
*/ |
case 'P': |
aux_puts("0x"); |
case 'p': |
print_fixed_hex(va_arg(ap, unative_t), sizeof(unative_t)); |
goto loop; |
case 'Q': |
aux_puts("0x"); |
case 'q': |
print_fixed_hex(va_arg(ap, uint64_t), INT64); |
goto loop; |
case 'L': |
aux_puts("0x"); |
case 'l': |
print_fixed_hex(va_arg(ap, unative_t), INT32); |
goto loop; |
case 'W': |
aux_puts("0x"); |
case 'w': |
print_fixed_hex(va_arg(ap, unative_t), INT16); |
goto loop; |
case 'B': |
aux_puts("0x"); |
case 'b': |
print_fixed_hex(va_arg(ap, unative_t), INT8); |
goto loop; |
/* |
* Decimal and hexadecimal conversions. |
*/ |
case 'd': |
print_number(va_arg(ap, unative_t), 10); |
goto loop; |
case 'X': |
aux_puts("0x"); |
case 'x': |
print_number(va_arg(ap, unative_t), 16); |
goto loop; |
/* |
* Bad formatting. |
*/ |
default: |
goto out; |
} |
default: |
aux_write(&c, 1); |
} |
loop: |
; |
} |
out: |
va_end(ap); |
} |
/branches/arm/kernel/arch/arm32/src/aux_print/gentypes.h |
---|
0,0 → 1,38 |
/* |
* Copyright (c) 2006 Martin Decky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef BOOT_GENTYPES_H_ |
#define BOOT_GENTYPES_H_ |
#define NULL 0 |
#define false 0 |
#define true 1 |
typedef unsigned long size_t; |
#endif |
/branches/arm/kernel/arch/arm32/src/aux_print/io.c |
---|
0,0 → 1,50 |
/* |
* Copyright (c) 2007 Michal Kebrt |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include "printf.h" |
#define PUTC_ADDRESS 0x10000000 |
/** |
* Prints a character to console. |
* |
* @param ch character to be printed |
*/ |
static void putc(char ch) { |
*((volatile char *)PUTC_ADDRESS) = ch; |
} |
void aux_write(const char *str, const int len) { |
int i; |
for (i = 0; i < len; ++i) { |
putc(str[i]); |
} |
} |
/branches/arm/kernel/arch/arm32/src/aux_print/printf.h |
---|
0,0 → 1,42 |
/* |
* Copyright (c) 2006 Martin Decky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef BOOT_PRINTF_H_ |
#define BOOT_PRINTF_H_ |
#define INT8 1 |
#define INT16 2 |
#define INT32 4 |
#define INT64 8 |
extern void aux_puts(const char *str); |
extern void aux_printf(const char *fmt, ...); |
extern void aux_write(const char *str, const int len); |
#endif |
/branches/arm/kernel/arch/arm32/src/aux_print/stdarg.h |
---|
0,0 → 1,38 |
/* |
* Copyright (c) 2006 Martin Decky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef STDARG_H__ |
#define STDARG_H__ |
typedef __builtin_va_list va_list; |
#define va_start(ap, last) __builtin_va_start(ap, last) |
#define va_arg(ap, type) __builtin_va_arg(ap, type) |
#define va_end(ap) __builtin_va_end(ap) |
#endif |
/branches/arm/kernel/arch/arm32/src/aux_print/types.h |
---|
0,0 → 1,44 |
/* |
* Copyright (c) 2006 Martin Decky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef TYPES_H__ |
#define TYPES_H__ |
#include "gentypes.h" |
typedef signed char int8_t; |
typedef unsigned char uint8_t; |
typedef unsigned short uint16_t; |
typedef unsigned int uint32_t; |
typedef unsigned long long uint64_t; |
typedef uint32_t uintptr_t; |
typedef uint32_t unative_t; |
#endif |
/branches/arm/kernel/arch/arm32/src/aux_print/README |
---|
0,0 → 1,0 |
TO BE DELETED, ONLY FOR DEBUGGING |
/branches/arm/kernel/arch/arm32/src/interrupt.c |
---|
30,18 → 30,11 |
* @{ |
*/ |
/** @file |
* @brief Interrupts controlling routines. |
*/ |
#include <arch/asm.h> |
#include <arch/regutils.h> |
#include <arch/machine.h> |
#include <ddi/irq.h> |
#include <ddi/device.h> |
#include <interrupt.h> |
#include<arch/asm.h> |
#include<arch/regutils.h> |
/** Initial size of a table holding interrupt handlers. */ |
#define IRQ_COUNT 8 |
/** Disable interrupts. |
* |
49,9 → 42,9 |
*/ |
ipl_t interrupts_disable(void) |
{ |
ipl_t ipl = current_status_reg_read(); |
ipl_t ipl = status_reg_read(); |
current_status_reg_control_write(STATUS_REG_IRQ_DISABLED_BIT | ipl); |
status_reg_control_write(ipl & ~status_reg_ie_enabled_bit); |
return ipl; |
} |
62,10 → 55,10 |
*/ |
ipl_t interrupts_enable(void) |
{ |
ipl_t ipl = current_status_reg_read(); |
ipl_t ipl = status_reg_read(); |
current_status_reg_control_write(ipl & ~STATUS_REG_IRQ_DISABLED_BIT); |
status_reg_control_write(ipl | status_reg_ie_enabled_bit); |
return ipl; |
} |
75,9 → 68,7 |
*/ |
void interrupts_restore(ipl_t ipl) |
{ |
current_status_reg_control_write( |
(current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) | |
(ipl & STATUS_REG_IRQ_DISABLED_BIT)); |
status_reg_control_write(status_reg_read() | (ipl & status_reg_ie_enabled_bit)); |
} |
/** Read interrupt priority level. |
86,18 → 77,8 |
*/ |
ipl_t interrupts_read(void) |
{ |
return current_status_reg_read(); |
return status_reg_read(); |
} |
/** Initialize basic tables for exception dispatching |
* and starts the timer. |
*/ |
void interrupt_init(void) |
{ |
irq_init(IRQ_COUNT, IRQ_COUNT); |
machine_timer_irq_start(); |
} |
/** @} |
*/ |
/branches/arm/kernel/arch/arm32/src/ddi/ddi.c |
---|
30,7 → 30,6 |
* @{ |
*/ |
/** @file |
* @brief DDI. |
*/ |
#include <ddi/ddi.h> |
/branches/arm/kernel/arch/arm32/src/cpu/cpu.c |
---|
1,5 → 1,5 |
/* |
* Copyright (c) 2007 Michal Kebrt |
* Copyright (c) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
30,101 → 30,23 |
* @{ |
*/ |
/** @file |
* @brief CPU identification. |
*/ |
#include <arch/cpu.h> |
#include <cpu.h> |
#include <arch.h> |
#include <print.h> |
#include <print.h> |
/** Number of indexes left out in the #imp_data array */ |
#define IMP_DATA_START_OFFSET 0x40 |
/** Implementators (vendor) names */ |
static char *imp_data[] = { |
"?", /* IMP_DATA_START_OFFSET */ |
"ARM Ltd", /* 0x41 */ |
"", /* 0x42 */ |
"", /* 0x43 */ |
"Digital Equipment Corporation", /* 0x44 */ |
"", "", "", "", "", "", "", "", "", "", /* 0x45 - 0x4e */ |
"", "", "", "", "", "", "", "", "", "", /* 0x4f - 0x58 */ |
"", "", "", "", "", "", "", "", "", "", /* 0x59 - 0x62 */ |
"", "", "", "", "", "", /* 0x63 - 0x68 */ |
"Intel Corporation" /* 0x69 */ |
}; |
/** Length of the #imp_data array */ |
static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *); |
/** Architecture names */ |
static char *arch_data[] = { |
"?", /* 0x0 */ |
"4", /* 0x1 */ |
"4T", /* 0x2 */ |
"5", /* 0x3 */ |
"5T", /* 0x4 */ |
"5TE", /* 0x5 */ |
"5TEJ", /* 0x6 */ |
"6" /* 0x7 */ |
}; |
/** Length of the #arch_data array */ |
static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *); |
/** Retrieves processor identification from CP15 register 0. |
* |
* @param cpu Structure for storing CPU identification. |
*/ |
static void arch_cpu_identify(cpu_arch_t *cpu) |
{ |
uint32_t ident; |
asm volatile ( |
"mrc p15, 0, %[ident], c0, c0, 0\n" |
: [ident] "=r" (ident) |
); |
cpu->imp_num = ident >> 24; |
cpu->variant_num = (ident << 8) >> 28; |
cpu->arch_num = (ident << 12) >> 28; |
cpu->prim_part_num = (ident << 16) >> 20; |
cpu->rev_num = (ident << 28) >> 28; |
} |
/** Does nothing on ARM. */ |
void cpu_arch_init(void) |
{ |
} |
/** Retrieves processor identification and stores it to #CPU.arch */ |
void cpu_identify(void) |
void cpu_identify(void) |
{ |
arch_cpu_identify(&CPU->arch); |
/* TODO */ |
} |
/** Prints CPU identification. */ |
void cpu_print_report(cpu_t *m) |
{ |
char * vendor = imp_data[0]; |
char * architecture = arch_data[0]; |
cpu_arch_t * cpu_arch = &m->arch; |
if ((cpu_arch->imp_num) > 0 && |
(cpu_arch->imp_num < (imp_data_length + IMP_DATA_START_OFFSET))) { |
vendor = imp_data[cpu_arch->imp_num - IMP_DATA_START_OFFSET]; |
} |
if ((cpu_arch->arch_num) > 0 && |
(cpu_arch->arch_num < arch_data_length)) { |
architecture = arch_data[cpu_arch->arch_num]; |
} |
printf("cpu%d: vendor=%s, architecture=ARM%s, part number=%x, " |
"variant=%x, revision=%x\n", |
m->id, vendor, architecture, cpu_arch->prim_part_num, |
cpu_arch->variant_num, cpu_arch->rev_num); |
/* TODO */ |
} |
/** @} |