| 52,6 → 52,7 |
|---|
| ); |
| } |
| |
| |
| /** Invalidate all entries in TLB that belong to specified address space. |
| * |
| * @param asid Ignored as the ARM architecture doesn't support ASIDs. |
| 61,6 → 62,7 |
|---|
| tlb_invalidate_all(); |
| } |
| |
| |
| /** Invalidate single entry in TLB |
| * |
| * @param page Virtual adress of the page |
| 68,19 → 70,21 |
|---|
| static inline void invalidate_page(uintptr_t page) |
| { |
| asm volatile ( |
| "mcr p15, 0, %[page], c8, c7, 1\n" |
| :: [page] "r" (page) |
| "mcr p15, 0, %0, c8, c7, 1" |
| |
| : |
| : "r"(page) |
| ); |
| } |
| |
| /** Invalidate TLB entries for specified page range belonging to specified |
| * address space. |
| |
| /** Invalidate TLB entries for specified page range belonging to specified address space. |
| * |
| * @param asid Ignored as the ARM architecture doesn't support it. |
| * @param page Address of the first page whose entry is to be invalidated. |
| * @param cnt Number of entries to invalidate. |
| */ |
| void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, size_t cnt) |
| void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
| { |
| unsigned int i; |
| |
| 88,13 → 92,5 |
|---|
| invalidate_page(page + i * PAGE_SIZE); |
| } |
| |
| void tlb_arch_init(void) |
| { |
| } |
| |
| void tlb_print(void) |
| { |
| } |
| |
| /** @} |
| */ |