| 35,10 → 35,42 |
|---|
| #include <arch/mm/page.h> |
| #include <genarch/mm/page_pt.h> |
| #include <mm/page.h> |
| #include <align.h> |
| #include <config.h> |
| #include "../aux_print/printf.h" |
| |
| void page_arch_init(void) |
| { |
| aux_printf("page_arch_init\n"); |
| |
| uintptr_t cur; |
| int flags; |
| |
| page_mapping_operations = &pt_mapping_operations; |
| |
| flags = PAGE_CACHEABLE; |
| const unsigned maxmem = ALIGN_DOWN(config.memory_size, FRAME_SIZE); |
| |
| for (cur = 0; cur < maxmem; cur += FRAME_SIZE) { |
| page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); |
| } |
| //TODO set page fault routines |
| // no problem no ... kernel doesn't do page faults |
| |
| |
| asm volatile ( |
| "ldr r0, =0x55555555 \n" |
| "mrc p15, 0, r0, c3, c0, 0 \n" //set domain acces rights to client <==> take rights from page tables |
| "mcr p15, 0, r0, c1, c0, 0 \n" // get current setting of system ... register 1 isn't only for memmory management |
| "ldr r1, =0xFFFFFE8D \n" // mask to disable aligment checks, System, Rom bit disable |
| "and r0, r0, r1 \n" |
| "ldr r1, =0x00000001 \n" // mask to enable paging |
| "orr r0, r0, r1 \n" |
| "mrc p15, 0, r0, c1, c0, 0 \n" // store setting |
| : |
| : |
| : "r0", "r1" |
| ); |
| } |
| |
| /** Map device into kernel space. */ |
| 50,3 → 82,4 |
|---|
| |
| /** @} |
| */ |
| |