42,7 → 42,6 |
/** Initial size of a table holding interrupt handlers. */ |
#define IRQ_COUNT 8 |
|
|
/** Disable interrupts. |
* |
* @return Old interrupt priority level. |
56,7 → 55,6 |
return ipl; |
} |
|
|
/** Enable interrupts. |
* |
* @return Old interrupt priority level. |
70,7 → 68,6 |
return ipl; |
} |
|
|
/** Restore interrupt priority level. |
* |
* @param ipl Saved interrupt priority level. |
78,12 → 75,10 |
void interrupts_restore(ipl_t ipl) |
{ |
current_status_reg_control_write( |
(current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) | |
(ipl & STATUS_REG_IRQ_DISABLED_BIT) |
); |
(current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) | |
(ipl & STATUS_REG_IRQ_DISABLED_BIT)); |
} |
|
|
/** Read interrupt priority level. |
* |
* @return Current interrupt priority level. |
93,7 → 88,6 |
return current_status_reg_read(); |
} |
|
|
/** Initialize basic tables for exception dispatching |
* and starts the timer. |
*/ |
103,6 → 97,5 |
machine_timer_irq_start(); |
} |
|
|
/** @} |
*/ |