1,5 → 1,5 |
/* |
* Copyright (c) 2005-2007 Ondrej Palkovsky, Michal Kebrt |
* Copyright (c) 2005-2007 Ondrej Palkovsky, Michal Kebrt, Petr Stepan |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
39,14 → 39,25 |
#include <console/console.h> |
#include <sysinfo/sysinfo.h> |
#include <print.h> |
#include <ddi/device.h> |
|
/** Address of devices. */ |
#define GXEMUL_VIDEORAM 0x10000000 |
#define GXEMUL_KBD_ADDRESS 0x10000000 |
#define GXEMUL_KBD_IRQ 0 |
#define GXEMUL_RTC 0x15000000 |
#define GXEMUL_RTC_FREQ 0x15000100 |
#define GXEMUL_RTC_ACK 0x15000110 |
#define GXEMUL_IRQC 0x16000000 |
#define GXEMUL_IRQC_MASK 0x16000004 |
#define GXEMUL_IRQC_UNMASK 0x16000008 |
|
/** IRQs */ |
#define GXEMUL_KBD_IRQ 2 |
#define GXEMUL_TIMER_IRQ 4 |
|
static chardev_t console; |
static irq_t gxemul_irq; |
static irq_t gxemul_timer_irq; |
|
static void gxemul_write(chardev_t *dev, const char ch); |
static void gxemul_enable(chardev_t *dev); |
70,6 → 81,7 |
void gxemul_enable(chardev_t *dev) |
{ |
// cp0_unmask_int(GXEMUL_KBD_IRQ); |
gxemul_irqc_unmask(GXEMUL_KBD_IRQ); |
} |
|
/* Called from getc(). */ |
76,6 → 88,7 |
void gxemul_disable(chardev_t *dev) |
{ |
// cp0_mask_int(GXEMUL_KBD_IRQ); |
gxemul_irqc_mask(GXEMUL_KBD_IRQ); |
} |
|
/** Read character using polling, assume interrupts disabled */ |
108,7 → 121,8 |
ch = '\n'; |
if (ch == 0x7f) |
ch = '\b'; |
chardev_push_character(&console, ch); |
//chardev_push_character(&console, ch); |
printf("%c", ch); |
} |
} |
|
137,7 → 151,7 |
} |
|
|
/* Return console object representing msim console */ |
/** Return console object representing msim console */ |
void gxemul_console(devno_t devno) |
{ |
chardev_initialize("msim_console", &console, &gxemul_ops); |
152,6 → 166,7 |
irq_register(&gxemul_irq); |
|
// cp0_unmask_int(GXEMUL_KBD_IRQ); |
gxemul_irqc_unmask(GXEMUL_KBD_IRQ); |
|
sysinfo_set_item_val("kbd", NULL, true); |
sysinfo_set_item_val("kbd.devno", NULL, devno); |
159,5 → 174,87 |
sysinfo_set_item_val("kbd.address.virtual", NULL, GXEMUL_KBD_ADDRESS); |
} |
|
/** Return the mask of active interrupts. */ |
inline uint32_t gxemul_irqc_get_sources(void) |
{ |
return *(uint32_t*) GXEMUL_IRQC; |
} |
|
/** Masks interrupt. |
* |
* @param irq interrupt number |
*/ |
inline void gxemul_irqc_mask(uint32_t irq) |
{ |
*(uint32_t*) GXEMUL_IRQC_MASK = irq; |
} |
|
/** Unmasks interrupt. |
* |
* @param irq interrupt number |
*/ |
inline void gxemul_irqc_unmask(uint32_t irq) |
{ |
*(uint32_t*) GXEMUL_IRQC_UNMASK = irq; |
} |
|
|
/** Starts gxemul Real Time Clock device, which asserts regular interrupts. |
* |
* @param frequency interrupts frequency (0 disables RTC) |
*/ |
void gxemul_timer_start(uint32_t frequency) |
{ |
*(uint32_t*) GXEMUL_RTC_FREQ = frequency; |
} |
|
static irq_ownership_t gxemul_timer_claim(void) |
{ |
return IRQ_ACCEPT; |
} |
|
static void gxemul_timer_irq_handler(irq_t *irq, void *arg, ...) |
{ |
/* TODO time drifts ?? |
unsigned long drift; |
|
drift = cp0_count_read() - nextcount; |
while (drift > cp0_compare_value) { |
drift -= cp0_compare_value; |
CPU->missed_clock_ticks++; |
} |
nextcount = cp0_count_read() + cp0_compare_value - drift; |
cp0_compare_write(nextcount); |
*/ |
|
/* |
* We are holding a lock which prevents preemption. |
* Release the lock, call clock() and reacquire the lock again. |
*/ |
spinlock_unlock(&irq->lock); |
//clock(); |
puts(" "); |
spinlock_lock(&irq->lock); |
|
/* TODO what's that? * |
if (virtual_timer_fnc != NULL) |
virtual_timer_fnc(); |
*/ |
} |
|
/** |
* Initializes and registers timer interrupt handler. |
*/ |
void gxemul_timer_irq_init() |
{ |
irq_initialize(&gxemul_timer_irq); |
gxemul_timer_irq.devno = device_assign_devno(); |
gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ; |
gxemul_timer_irq.claim = gxemul_timer_claim; |
gxemul_timer_irq.handler = gxemul_timer_irq_handler; |
irq_register(&gxemul_timer_irq); |
} |
|
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/** @} |
*/ |