| /branches/arm/kernel/arch/arm32/src/exception.c |
|---|
| 153,6 → 153,7 |
| ); |
| } |
| /** Switch CPU to mode in which interrupts are serviced (currently it |
| * is Undefined mode). |
| * |
| 186,6 → 187,7 |
| ); |
| } |
| /** Calls exception dispatch routine. */ |
| #define CALL_EXC_DISPATCH(exception) \ |
| asm("mov r0, %0" : : "i" (exception)); \ |
| /branches/arm/kernel/arch/arm32/src/ddi/ddi.c |
|---|
| 37,7 → 37,7 |
| #include <proc/task.h> |
| #include <arch/types.h> |
| /** Enable I/O space range for task. Not used on ARM. |
| /** Enable I/O space range for task (not used on ARM). |
| * |
| * Interrupts are disabled and task is locked. |
| * |
| /branches/arm/kernel/arch/arm32/src/arm32.c |
|---|
| 68,6 → 68,7 |
| } |
| /** Performs arm32 specific initialization before mm is initialized. */ |
| void arch_pre_mm_init(void) |
| { |
| 75,6 → 76,7 |
| interrupts_disable(); |
| } |
| /** Performs arm32 specific initialization afterr mm is initialized. */ |
| void arch_post_mm_init(void) |
| { |
| 92,6 → 94,7 |
| #endif |
| } |
| /** Performs arm32 specific tasks needed after cpu is initialized. |
| * |
| * Currently the function is empty. |
| 100,6 → 103,7 |
| { |
| } |
| /** Performs arm32 specific tasks needed before the multiprocessing is |
| * initialized. |
| * |
| 109,6 → 113,7 |
| { |
| } |
| /** Performs arm32 specific tasks needed after the multiprocessing is |
| * initialized. |
| * |
| 125,6 → 130,7 |
| tlb_invalidate_all(); |
| } |
| /** Performs arm32 specific tasks needed before the new thread is scheduled. |
| * |
| * It sets supervisor_sp. |
| 134,6 → 140,7 |
| supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
| } |
| /** Performs arm32 specific tasks before a thread stops running. |
| * |
| * Currently the function is empty. |
| 142,6 → 149,7 |
| { |
| } |
| /** Halts CPU. */ |
| void cpu_halt(void) |
| { |
| /branches/arm/kernel/arch/arm32/src/mm/tlb.c |
|---|
| 50,6 → 50,7 |
| ); |
| } |
| /** Invalidate all entries in TLB that belong to specified address space. |
| * |
| * @param asid This parameter is ignored as the ARM architecture doesn't support it. |
| 59,6 → 60,7 |
| tlb_invalidate_all(); |
| } |
| /** Invalidate single entry in TLB |
| * |
| * @param page Virtual adress of the page |
| 73,6 → 75,7 |
| ); |
| } |
| /** Invalidate TLB entries for specified page range belonging to specified address space. |
| * |
| * @param asid This parameter is ignored as the ARM architecture doesn't support it. |
| /branches/arm/kernel/arch/arm32/src/mm/page.c |
|---|
| 87,6 → 87,7 |
| * |
| * @param physaddr Physical addres where device is connected |
| * @param size Length of area where device is present |
| * |
| * @return Virtual address where device will be accessable |
| */ |
| uintptr_t hw_map(uintptr_t physaddr, size_t size) |
| /branches/arm/kernel/arch/arm32/src/userspace.c |
|---|
| 55,6 → 55,7 |
| uint32_t pc; |
| } ustate_t; |
| /** Changes processor mode and jumps to the address specified in the first parameter. |
| * |
| * @param kernel_uarg Userspace settings (entry point, stack, ...). |
| /branches/arm/kernel/arch/arm32/src/interrupt.c |
|---|
| 56,6 → 56,7 |
| return ipl; |
| } |
| /** Enable interrupts. |
| * |
| * @return Old interrupt priority level. |
| 69,6 → 70,7 |
| return ipl; |
| } |
| /** Restore interrupt priority level. |
| * |
| * @param ipl Saved interrupt priority level. |
| 81,6 → 83,7 |
| ); |
| } |
| /** Read interrupt priority level. |
| * |
| * @return Current interrupt priority level. |
| 90,6 → 93,7 |
| return current_status_reg_read(); |
| } |
| /** Initialize basic tables for exception dispatching |
| * and starts the timer. |
| */ |