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Ignore whitespace Rev 2303 → Rev 2304

/branches/arm/kernel/arch/arm32/include/exception.h
1,6 → 1,5
/*
* Copyright (c) 2007 Michal Kebrt
* Copyright (c) 2007 Petr Stepan
* Copyright (c) 2007 Michal Kebrt, Petr Stepan
*
* All rights reserved.
*
49,43 → 48,43
#endif
 
/* Exception Vectors */
#define EXC_RESET_VEC (EXC_BASE_ADDRESS + 0x0)
#define EXC_UNDEF_INSTR_VEC (EXC_BASE_ADDRESS + 0x4)
#define EXC_SWI_VEC (EXC_BASE_ADDRESS + 0x8)
#define EXC_PREFETCH_ABORT_VEC (EXC_BASE_ADDRESS + 0xc)
#define EXC_DATA_ABORT_VEC (EXC_BASE_ADDRESS + 0x10)
#define EXC_IRQ_VEC (EXC_BASE_ADDRESS + 0x18)
#define EXC_FIQ_VEC (EXC_BASE_ADDRESS + 0x1c)
#define EXC_RESET_VEC (EXC_BASE_ADDRESS + 0x0)
#define EXC_UNDEF_INSTR_VEC (EXC_BASE_ADDRESS + 0x4)
#define EXC_SWI_VEC (EXC_BASE_ADDRESS + 0x8)
#define EXC_PREFETCH_ABORT_VEC (EXC_BASE_ADDRESS + 0xc)
#define EXC_DATA_ABORT_VEC (EXC_BASE_ADDRESS + 0x10)
#define EXC_IRQ_VEC (EXC_BASE_ADDRESS + 0x18)
#define EXC_FIQ_VEC (EXC_BASE_ADDRESS + 0x1c)
 
/* Exception numbers */
#define EXC_RESET 0
#define EXC_UNDEF_INSTR 1
#define EXC_SWI 2
#define EXC_PREFETCH_ABORT 3
#define EXC_DATA_ABORT 4
#define EXC_IRQ 5
#define EXC_FIQ 6
#define EXC_RESET 0
#define EXC_UNDEF_INSTR 1
#define EXC_SWI 2
#define EXC_PREFETCH_ABORT 3
#define EXC_DATA_ABORT 4
#define EXC_IRQ 5
#define EXC_FIQ 6
 
typedef struct {
uint32_t spsr;
uint32_t spsr;
uint32_t sp;
uint32_t lr;
 
uint32_t r0;
uint32_t r1;
uint32_t r2;
uint32_t r3;
uint32_t r4;
uint32_t r5;
uint32_t r6;
uint32_t r7;
uint32_t r8;
uint32_t r9;
uint32_t r10;
uint32_t r11;
uint32_t r12;
uint32_t r0;
uint32_t r1;
uint32_t r2;
uint32_t r3;
uint32_t r4;
uint32_t r5;
uint32_t r6;
uint32_t r7;
uint32_t r8;
uint32_t r9;
uint32_t r10;
uint32_t r11;
uint32_t r12;
 
uint32_t pc;
uint32_t pc;
} istate_t;
 
 
108,6 → 107,7
extern void setup_exception_stacks(void);
extern void install_exception_handlers(void);
extern void exception_init(void);
extern void print_istate(istate_t *istate);
 
#endif
 
/branches/arm/kernel/arch/arm32/include/mm/page_fault.h
36,50 → 36,51
 
#include <arch/types.h>
 
/**
* Decribes structure of fault status register in coprocessor 15
 
/** Decribes CP15 "fault status register" (FSR).
*/
typedef struct {
unsigned status : 3;
unsigned domain : 4;
unsigned zero : 1;
unsigned should_be_zero : 24;
unsigned status : 3;
unsigned domain : 4;
unsigned zero : 1;
unsigned should_be_zero : 24;
} __attribute__ ((packed)) fault_status_t;
 
/**
* Help union used for overcasting integer value into fault_status_t type
 
/** Help union used for casting integer value into #fault_status_t.
*/
typedef union {
fault_status_t fsr;
uint32_t dummy;
fault_status_t fs;
uint32_t dummy;
} fault_status_union_t;
 
/**
* Very simplyfied description of instruction code structure intended for
* recognising memmory access of instruction ( reads or writes into memmory)
* more details: see ARM architecture preference
* chapter:3.1 Instruction set encoding
 
/** Simplified description of instruction code.
*
* \note Used for recognizing memory access instructions.
* \see ARM architecture reference (chapter 3.1)
*/
typedef struct {
unsigned dummy1 : 4;
unsigned bit4 : 1;
unsigned bits567 : 3;
unsigned dummy : 12;
unsigned access : 1;
unsigned opcode : 4;
unsigned instr_type : 3;
unsigned condition : 4;
unsigned dummy1 : 4;
unsigned bit4 : 1;
unsigned bits567 : 3;
unsigned dummy : 12;
unsigned access : 1;
unsigned opcode : 4;
unsigned type : 3;
unsigned condition : 4;
} __attribute__ ((packed)) instruction_t;
 
/**
* Help union used for overcasting ip register (uint_32_t) value into
* instruction_t pointer
 
/** Help union used for casting pc register (uint_32_t) value into
* #instruction_t pointer.
*/
typedef union {
instruction_t* instr;
uint32_t ip;
instruction_t* instr;
uint32_t pc;
} instruction_union_t;
 
 
extern void prefetch_abort(int n, istate_t *istate);
extern void data_abort(int n, istate_t *istate);