30,14 → 30,17 |
* @{ |
*/ |
/** @file |
* @brief Type definitions. |
*/ |
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#ifndef KERN_arm32_TYPES_H_ |
#define KERN_arm32_TYPES_H_ |
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#define NULL 0 |
#define false 0 |
#define true 1 |
#ifndef DOXYGEN |
# define ATTRIBUTE_PACKED __attribute__ ((packed)) |
#else |
# define ATTRIBUTE_PACKED |
#endif |
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typedef signed char int8_t; |
typedef signed short int16_t; |
50,8 → 53,6 |
typedef unsigned long long uint64_t; |
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typedef uint32_t size_t; |
typedef uint32_t count_t; |
typedef uint32_t index_t; |
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typedef uint32_t uintptr_t; |
typedef uint32_t pfn_t; |
61,77 → 62,39 |
typedef uint32_t unative_t; |
typedef int32_t native_t; |
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typedef uint8_t bool; |
typedef uint64_t task_id_t; |
typedef uint32_t context_id_t; |
typedef struct { |
} fncptr_t; |
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typedef int32_t inr_t; |
typedef int32_t devno_t; |
#define PRIp "x" /**< Format for uintptr_t. */ |
#define PRIs "u" /**< Format for size_t. */ |
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typedef uint32_t __address; |
#define PRId8 "d" /**< Format for int8_t. */ |
#define PRId16 "d" /**< Format for int16_t. */ |
#define PRId32 "d" /**< Format for int32_t. */ |
#define PRId64 "lld" /**< Format for int64_t. */ |
#define PRIdn "d" /**< Format for native_t. */ |
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#define PRIu8 "u" /**< Format for uint8_t. */ |
#define PRIu16 "u" /**< Format for uint16_t. */ |
#define PRIu32 "u" /**< Format for uint32_t. */ |
#define PRIu64 "llu" /**< Format for uint64_t. */ |
#define PRIun "u" /**< Format for unative_t. */ |
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#define PRIx8 "x" /**< Format for hexadecimal (u)int8_t. */ |
#define PRIx16 "x" /**< Format for hexadecimal (u)int16_t. */ |
#define PRIx32 "x" /**< Format for hexadecimal (u)uint32_t. */ |
#define PRIx64 "llx" /**< Format for hexadecimal (u)int64_t. */ |
#define PRIxn "x" /**< Format for hexadecimal (u)native_t. */ |
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/** Page table entry. |
* |
* |
* We have different structs for level 0 and level 1 page table entries. |
* */ |
* See page.h for definition of pte_level*_t. |
*/ |
typedef struct { |
unsigned dummy : 32; |
unsigned dummy : 32; |
} pte_t; |
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/** Level 0 page table entry. */ |
typedef struct { |
/* 01b for coarse tables, see below for details */ |
unsigned descriptor_type : 2; |
unsigned impl_specific : 3; |
unsigned domain : 4; |
unsigned should_be_zero : 1; |
/* Pointer to the coarse 2nd level page table (holding entries for small (4KB) |
* or large (64KB) pages. ARM also supports fine 2nd level page tables that |
* may hold even tiny pages (1KB) but they are bigger (4KB per table in comparison |
* with 1KB per the coarse table) |
*/ |
unsigned coarse_table_addr : 22; |
} __attribute__ ((packed)) pte_level0_t; |
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/** Level 1 page table entry (small (4KB) pages used) */ |
typedef struct { |
/* 0b10 for small pages */ |
unsigned descriptor_type : 2; |
unsigned bufferable : 1; |
unsigned cacheable : 1; |
/* access permissions for each of 4 subparts of a page |
* (for each 1KB when small pages used */ |
unsigned access_permission_0 : 2; |
unsigned access_permission_1 : 2; |
unsigned access_permission_2 : 2; |
unsigned access_permission_3 : 2; |
unsigned frame_base_addr : 20; |
} __attribute__ ((packed)) pte_level1_t; |
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/* Level 1 page tables access permissions */ |
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/** User mode: no access, privileged mode: no access */ |
#define pte_ap_user_no_kernel_no 0 |
/** User mode: no access, privileged mode: read/write */ |
#define pte_ap_user_no_kernel_rw 1 |
/** User mode: read only, privileged mode: read/write */ |
#define pte_ap_user_ro_kernel_rw 2 |
/// User mode: read/write, privileged mode: read/write |
#define pte_ap_user_rw_kernel_rw 3 |
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/* pte_level0_t and pte_level1_t descriptor_type flags */ |
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/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type) */ |
#define pte_descriptor_not_preset 0 |
/** pte_level0_t coarse page table flag (used in descriptor_type) */ |
#define pte_descriptor_coarse_table 1 |
/** pte_level1_t small page table flag (used in descriptor type) */ |
#define pte_descriptor_small_page 2 |
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#endif |
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/** @} |