0,0 → 1,81 |
/* |
* Copyright (c) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
|
/** @addtogroup arm32mm |
* @{ |
*/ |
/** @file |
*/ |
#include "mm.h" |
|
void init_pte_level0_section_entry( pte_level0_section* pte, unsigned frame){ |
pte->descriptor_type = pte_descriptor_section; |
pte->bufferable = 0; // disable |
pte->cacheable = 0; |
pte->machine_depend = 0; |
pte->domain = 0; |
pte->should_be_zero_1 = 0; |
pte->access_permission = pte_ap_user_no_kernel_rw; |
pte->should_be_zero_2 = 0; |
pte->section_base_addr = (frame << FRAME_WIDTH) >> 20; |
}; |
|
|
// set memory mapping for kernel |
void mm_kernel_mapping(void) { |
int i; |
// Create 1:1 mapping |
for( i=0; i < 4096; i++) |
init_pte_level0_section_entry(&page_table[i+0000], i * FRAMES_PER_SECTION); |
|
// Create Kernel mapping |
const unsigned int offset = ADDR2PFN(PA2KA(0)) / FRAMES_PER_SECTION; |
for( i = offset; i < 4096; i++) |
init_pte_level0_section_entry(&page_table[i], (i - offset) * FRAMES_PER_SECTION); |
|
SET_PTL0_ADDRESS_ARCH( page_table); |
|
// enable paging |
asm volatile ( |
"ldr r0, =0x55555555 \n" |
"mcr p15, 0, r0, c3, c0, 0 \n" //set domain acces rights to client <==> take rights from page tables |
"mrc p15, 0, r0, c1, c0, 0 \n" // get current setting of system ... register 1 isn't only for memmory management |
"ldr r1, =0xFFFFFE8D \n" // mask to disable aligment checks, System, Rom bit disable |
"and r0, r0, r1 \n" |
"ldr r1, =0x00000001 \n" // mask to enable paging |
"orr r0, r0, r1 \n" |
"mcr p15, 0, r0, c1, c0, 0 \n" // store setting |
: |
: |
: "r0", "r1" |
); |
}; |
|
/** @} |
*/ |
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