| /branches/arm/boot/arch/arm32/loader/print/gxemul.c |
|---|
| File deleted |
| /branches/arm/boot/arch/arm32/loader/main.c |
|---|
| 26,14 → 26,6 |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32boot |
| * @{ |
| */ |
| /** @file |
| */ |
| #include "main.h" |
| #include "asm.h" |
| #include "_components.h" |
| 41,10 → 33,8 |
| #include "mm.h" |
| /** Kernel entry point address. */ |
| #define KERNEL_VIRTUAL_ADDRESS 0x80200000 |
| #define KERNEL_VIRTUAL_ADDRESS 0x80150000 |
| char *release = RELEASE; |
| #ifdef REVISION |
| 59,8 → 49,7 |
| char *timestamp = ""; |
| #endif |
| /** Prints bootloader version information. */ |
| /** Print version information. */ |
| static void version_print(void) |
| { |
| printf("HelenOS ARM32 Bootloader\nRelease %s%s%s\nCopyright (c) 2007 HelenOS project\n", |
| 67,7 → 56,7 |
| release, revision, timestamp); |
| } |
| /** Copies all images (kernel + user tasks) to #KERNEL_VIRTUAL_ADDRESS and jumps there. */ |
| /** Copies all images to #KERNEL_VIRTUAL_ADDRESS and jumps there. */ |
| void bootstrap(void) |
| { |
| mmu_start(); |
| 108,6 → 97,3 |
| jump_to_kernel((void *) KERNEL_VIRTUAL_ADDRESS, &bootinfo, sizeof(bootinfo)); |
| } |
| /** @} |
| */ |
| /branches/arm/boot/arch/arm32/loader/mm.h |
|---|
| 26,7 → 26,6 |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32boot |
| * @{ |
| */ |
| 34,58 → 33,49 |
| */ |
| #ifndef BOOT_arm32__MM_H |
| #define BOOT_arm32__MM_H |
| #ifndef __MM_H__ |
| #define __MM_H__ |
| #ifndef __ASM__ |
| #include "types.h" |
| #endif |
| /** Frame width. */ |
| #define FRAME_WIDTH 12 /* 4KB frames */ |
| #define FRAME_WIDTH 12 /* 4KB frames */ |
| #define FRAME_SIZE (1 << FRAME_WIDTH) |
| /** Frame size. */ |
| #define FRAME_SIZE (1 << FRAME_WIDTH) |
| #define PAGE_WIDTH FRAME_WIDTH |
| #define PAGE_SIZE FRAME_SIZE |
| /** Page size in 2-level paging which is switched on later in the kernel initialization. */ |
| #define PAGE_SIZE FRAME_SIZE |
| #ifndef __ASM__ |
| # define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) |
| # define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) |
| # define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) |
| # define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) |
| #else |
| # define KA2PA(x) ((x) - 0x80000000) |
| # define PA2KA(x) ((x) + 0x80000000) |
| # define KA2PA(x) ((x) - 0x80000000) |
| # define PA2KA(x) ((x) + 0x80000000) |
| #endif |
| /** Number of entries in PTL0 */ |
| #define PTL0_ENTRIES_ARCH (1<<12) /* 4096 */ |
| /** Number of entries in PTL0. */ |
| #define PTL0_ENTRIES (1<<12) /* 4096 */ |
| /** Frames per 1MB section */ |
| #define FRAMES_PER_SECTION ( ( 1 << 20 ) / FRAME_SIZE ) |
| /** Size of an entry in PTL0. */ |
| #define PTL0_ENTRY_SIZE 4 |
| /** Converts adress to frame number */ |
| #define ADDR2PFN( addr ) ( ((uintptr_t)(addr))>>FRAME_WIDTH ) |
| /** Number of frames per 1MB section. */ |
| #define FRAMES_PER_SECTION ( ( 1 << 20 ) / FRAME_SIZE ) |
| /** Descriptor type that signs "section" page table entry |
| * (one-level paging with 1MB sized pages) */ |
| #define PTE_DESCRIPTOR_SECTION 2 |
| /** Returns number of frame the address belongs to. */ |
| #define ADDR2PFN( addr ) ( ((uintptr_t)(addr)) >> FRAME_WIDTH ) |
| /** Access rights to page table: user-no access, kernel-read/write */ |
| #define PTE_AP_USER_NO_KERNEL_RW 1 |
| /** Describes "section" page table entry (one-level paging with 1MB sized pages). */ |
| #define PTE_DESCRIPTOR_SECTION 0x2 |
| /** Page table access rights: user - no access, kernel - read/write. */ |
| #define PTE_AP_USER_NO_KERNEL_RW 0x1 |
| #ifndef __ASM__ |
| /** Page table level 0 entry - "section" format is used (one-level paging, 1MB sized |
| * pages). Used only while booting the kernel. */ |
| /** Page table level 0 entry - "section" format (one-level paging, 1MB sized |
| * pages). Used only for booting the kernel. */ |
| typedef struct { |
| unsigned descriptor_type : 2; |
| unsigned bufferable : 1; |
| 99,12 → 89,14 |
| } __attribute__ ((packed)) pte_level0_section_t; |
| /** Page table that holds 1:1 virtual to physical mapping used while booting the kernel. */ |
| extern pte_level0_section_t page_table[PTL0_ENTRIES]; |
| /** Page table that holds 1:1 mapping for booting the kernel. */ |
| extern pte_level0_section_t page_table[PTL0_ENTRIES_ARCH]; |
| extern void mmu_start(void); |
| /** Starts the MMU - initializes page table and enables paging. */ |
| void mmu_start(void); |
| /** Enables paging. */ |
| static inline void enable_paging() |
| { |
| 115,14 → 107,17 |
| // behave as a client of domains |
| "ldr r0, =0x55555555 \n" |
| "mcr p15, 0, r0, c3, c0, 0 \n" |
| // current settings |
| "mrc p15, 0, r0, c1, c0, 0 \n" |
| /* TODO: talk to Alf why needed |
| // mask to disable aligment checks; system & rom bit set to 0 (has no |
| // special effect) |
| "ldr r1, =0xfffffe8f \n" |
| "and r0, r0, r1 \n" |
| */ |
| // mask to enable paging |
| "ldr r1, =0x00000001 \n" |
| "orr r0, r0, r1 \n" |
| // store settings |
| "mcr p15, 0, r0, c1, c0, 0 \n" |
| : |
| 132,20 → 127,17 |
| } |
| /** Sets the address of level 0 page table to CP15 register 2. |
| * |
| * @param pt Address of a page table to set. |
| /** Sets the address of level 0 page table. |
| * \param pt pointer to the page table to set |
| */ |
| static inline void set_ptl0_address(pte_level0_section_t* pt) |
| { |
| asm volatile ( |
| "mcr p15, 0, %0, c2, c0, 0 \n" |
| asm volatile ( "mcr p15, 0, %0, c2, c0, 0 \n" |
| : |
| : "r"(pt) |
| ); |
| } |
| #endif |
| #endif |
| /branches/arm/boot/arch/arm32/loader/mm.c |
|---|
| 26,7 → 26,6 |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32boot |
| * @{ |
| */ |
| 33,19 → 32,17 |
| /** @file |
| */ |
| #include "mm.h" |
| /** Initializes "section" page table entry. |
| /** Initializes section page table entry. |
| * |
| * Will be readable/writable by kernel with no access from user mode. |
| * Will belong to domain 0. No cache or buffering is enabled. |
| * |
| * @param pte Section entry to initialize. |
| * @param frame First frame in the section (frame number). |
| * |
| * @note If #frame is not 1MB aligned, first lower 1MB aligned frame will be used. |
| * \param pte page table entry to set |
| * \param frame first frame in the section (frame number) |
| * \note If frame is not 1MB aligned, first lower 1MB aligned frame will be used. |
| */ |
| static void init_pte_level0_section(pte_level0_section_t* pte, unsigned frame) |
| { |
| 61,27 → 58,23 |
| } |
| /** Initializes page table used while booting the kernel. */ |
| static void init_page_table(void) |
| { |
| int i; |
| const unsigned int first_kernel_section = ADDR2PFN(PA2KA(0)) / FRAMES_PER_SECTION; |
| // create 1:1 virtual-physical mapping (in lower 2GB) |
| for (i = 0; i < first_kernel_section; i++) { |
| // create 1:1 mapping virtual-physical (in lower 2GB) |
| for(i = 0; i < first_kernel_section; i++) { |
| init_pte_level0_section(&page_table[i], i * FRAMES_PER_SECTION); |
| } |
| // create 1:1 virtual-physical mapping in kernel space (upper 2GB), |
| // physical addresses start from 0 |
| for (i = first_kernel_section; i < PTL0_ENTRIES; i++) { |
| // create kernel mapping (in upper 2GB), physical addresses starting from 0 |
| for(i = first_kernel_section; i < PTL0_ENTRIES_ARCH; i++) { |
| init_pte_level0_section(&page_table[i], (i - first_kernel_section) * FRAMES_PER_SECTION); |
| } |
| } |
| /** Starts the MMU - initializes page table and enables paging. |
| */ |
| void mmu_start() { |
| init_page_table(); |
| set_ptl0_address(page_table); |
| 88,7 → 81,6 |
| enable_paging(); |
| } |
| /** @} |
| */ |
| /branches/arm/boot/arch/arm32/loader/boot.S |
|---|
| 42,11 → 42,9 |
| bx r0 |
| # place page_table to PT section |
| # align for start of page |
| .section PT |
| # make place for PTL0 page table |
| # make place for first level page table |
| page_table: |
| .skip PTL0_ENTRIES * PTL0_ENTRY_SIZE |
| .skip PTL0_ENTRIES_ARCH * 4 |
| /branches/arm/boot/arch/arm32/loader/asm.h |
|---|
| 26,39 → 26,12 |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ASM_H__ |
| #define __ASM_H__ |
| /** @addtogroup arm32boot |
| * @{ |
| */ |
| /** @file |
| */ |
| #ifndef BOOT_arm32_ASM_H |
| #define BOOT_arm32_ASM_H |
| /** Copies #cnt bytes from #dst to #src. |
| * |
| * @param dst Destination address. |
| * @param src Source address. |
| * @param cnt Count of bytes to be copied. |
| */ |
| #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) |
| /** Jumps to the kernel. |
| * |
| * @param entry Kernel entry point address. |
| * @param bootinfo Structure holding information about loaded tasks. |
| * @param bootinto_size Size of the #bootinfo structure. |
| */ |
| /*void memcpy(void *dst, void *src, int cnt);*/ |
| void jump_to_kernel(void *entry, void *bootinfo, unsigned int bootinfo_size) __attribute__((noreturn)); |
| #endif |
| /** @} |
| */ |
| /branches/arm/boot/arch/arm32/loader/asm.S |
|---|
| 36,50 → 36,50 |
| bic r3, r3, #3 |
| cmp r1, r3 |
| stmdb sp!, {r4, lr} |
| beq 4f |
| 1: |
| beq case_4 |
| case_1: |
| cmp r2, #0 |
| movne ip, #0 |
| beq 3f |
| 2: |
| beq case_3 |
| case_2: |
| ldrb r3, [ip, r1] |
| strb r3, [ip, r0] |
| add ip, ip, #1 |
| cmp ip, r2 |
| bne 2b |
| 3: |
| bne case_2 |
| case_3: |
| mov r0, r1 |
| ldmia sp!, {r4, pc} |
| 4: |
| case_4: |
| add r3, r0, #3 |
| bic r3, r3, #3 |
| cmp r0, r3 |
| bne 1b |
| bne case_1 |
| movs r4, r2, lsr #2 |
| moveq lr, r4 |
| beq 6f |
| beq case_6 |
| mov lr, #0 |
| mov ip, lr |
| 5: |
| case_5: |
| ldr r3, [ip, r1] |
| add lr, lr, #1 |
| cmp lr, r4 |
| str r3, [ip, r0] |
| add ip, ip, #4 |
| bne 5b |
| 6: |
| bne case_5 |
| case_6: |
| ands r4, r2, #3 |
| beq 3b |
| beq case_3 |
| mov r3, lr, lsl #2 |
| add r0, r3, r0 |
| add ip, r3, r1 |
| mov r2, #0 |
| 7: |
| case_7: |
| ldrb r3, [r2, ip] |
| strb r3, [r2, r0] |
| add r2, r2, #1 |
| cmp r2, r4 |
| bne 7b |
| b 3b |
| bne case_7 |
| b case_3 |
| /branches/arm/boot/arch/arm32/loader/main.h |
|---|
| 26,54 → 26,29 |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __MAIN_H__ |
| #define __MAIN_H__ |
| /** @addtogroup arm32boot |
| * @{ |
| */ |
| /** @file |
| */ |
| #ifndef BOOT_arm32_MAIN_H |
| #define BOOT_arm32_MAIN_H |
| /** Aligns to the nearest higher address. |
| /** Align to the nearest higher address. |
| * |
| * @param addr Address or number to be aligned. |
| * @param addr Address or size to be aligned. |
| * @param align Size of alignment, must be power of 2. |
| */ |
| #define ALIGN_UP(addr, align) (((addr) + ((align) - 1)) & ~((align) - 1)) |
| /** Maximum number of tasks in the #bootinfo_t structure. */ |
| #define TASKMAP_MAX_RECORDS 32 |
| /** Structure holding information about single loaded task. */ |
| typedef struct { |
| /** Address where the task was placed. */ |
| void *addr; |
| /** Size of the task binary. */ |
| unsigned int size; |
| } task_t; |
| /** Structure holding information about loaded tasks. */ |
| typedef struct { |
| /** Number of loaded tasks. */ |
| unsigned int cnt; |
| /** Array of loaded tasks. */ |
| task_t tasks[TASKMAP_MAX_RECORDS]; |
| } bootinfo_t; |
| /** Run when the CPU is switched on. */ |
| extern void start(void); |
| extern void bootstrap(void); |
| #endif |
| /** @} |
| */ |
| /branches/arm/boot/arch/arm32/loader/types.h |
|---|
| 26,18 → 26,9 |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef TYPES_H__ |
| #define TYPES_H__ |
| /** @addtogroup arm32boot |
| * @{ |
| */ |
| /** @file |
| */ |
| #ifndef BOOT_arm32_TYPES_H |
| #define BOOT_arm32_TYPES_H |
| #include <gentypes.h> |
| typedef signed char int8_t; |
| 50,10 → 41,4 |
| typedef uint32_t uintptr_t; |
| typedef uint32_t unative_t; |
| #endif |
| /** @} |
| */ |