/branches/arm/uspace/libc/arch/arm32/include/psthread.h |
---|
37,13 → 37,27 |
#define LIBC_arm32_PSTHREAD_H_ |
#include <types.h> |
#define STACK_ITEM_SIZE 4 |
#define SP_DELTA 0 /* TODO */ |
/** see <a href="http://www.arm.com/support/faqdev/14269.html">ABI</a> for details */ |
#define STACK_ALIGNMENT 8 |
#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) |
//TODO: check if correct |
typedef struct { |
uint32_t sp; |
uint32_t pc; |
uint32_t tls; |
uint32_t tls; //? where will be stored? |
// registers that called subrutine cannot change |
uint32_t r4; |
uint32_t r5; |
uint32_t r6; |
uint32_t r7; |
uint32_t r8; |
uint32_t r10; |
uint32_t r11; |
// not shure if not to be changed r9, IP, |
} context_t; |
#endif |
/branches/arm/uspace/libc/arch/arm32/include/atomic.h |
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1,5 → 1,5 |
/* |
* Copyright (c) 2005 Jakub Jermar |
* Copyright (c) 2007 Michal Kebrt |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
38,14 → 38,30 |
/** Atomic addition. |
* |
* @param val Atomic value. |
* @param imm Value to add. |
* @param i Value to add. |
* |
* @return Value after addition. |
*/ |
static inline long atomic_add(atomic_t *val, int imm) |
static inline long atomic_add(atomic_t *val, int i) |
{ |
/* TODO */ |
return (val->count += imm); |
int ret; |
volatile long * mem = &(val->count); |
asm volatile ( |
"1: \n" |
"ldr r2, [%1] \n" |
"add r3, r2, %2 \n" |
"str r3, %0 \n" |
"swp r3, r3, [%1] \n" |
"cmp r3, r2 \n" |
"bne 1b \n" |
: "=m" (ret) |
: "r" (mem), "r" (i) |
: "r3", "r2" |
); |
return ret; |
} |
static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); } |
/branches/arm/uspace/libc/arch/arm32/src/psthread.S |
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32,7 → 32,18 |
.global context_restore |
context_save: |
/* TODO */ |
stmia r0!, {sp, lr} |
stmia r0!, {r4-r8, r10-r11} |
# return 1 |
mov r0, #1 |
mov pc, lr |
context_restore: |
/* TODO */ |
ldmia r0!, {sp, lr} |
ldmia r0!, {r4-r8, r10-r11} |
#return 0 |
mov r0, #0 |
mov pc, lr |