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Ignore whitespace Rev 2255 → Rev 2256

/branches/arm/kernel/arch/arm32/include/types.h
68,9 → 68,7
typedef int32_t inr_t;
typedef int32_t devno_t;
 
typedef uint32_t __address;
 
 
/** Page table entry.
*
* We have different structs for level 0 and level 1 page table entries.
113,23 → 111,23
/* Level 1 page tables access permissions */
 
/** User mode: no access, privileged mode: no access */
#define pte_ap_user_no_kernel_no 0
#define PTE_AP_USER_NO_KERNEL_NO 0
/** User mode: no access, privileged mode: read/write */
#define pte_ap_user_no_kernel_rw 1
#define PTE_AP_USER_NO_KERNEL_RW 1
/** User mode: read only, privileged mode: read/write */
#define pte_ap_user_ro_kernel_rw 2
#define PTE_AP_USER_RO_KERNEL_RW 2
/// User mode: read/write, privileged mode: read/write
#define pte_ap_user_rw_kernel_rw 3
#define PTE_AP_USER_RW_KERNEL_RW 3
 
 
/* pte_level0_t and pte_level1_t descriptor_type flags */
 
/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type) */
#define pte_descriptor_not_preset 0
#define PTE_DESCRIPTOR_NOT_PRESENT 0
/** pte_level0_t coarse page table flag (used in descriptor_type) */
#define pte_descriptor_coarse_table 1
#define PTE_DESCRIPTOR_COARSE_TABLE 1
/** pte_level1_t small page table flag (used in descriptor type) */
#define pte_descriptor_small_page 2
#define PTE_DESCRIPTOR_SMALL_PAGE 2
 
 
#endif
/branches/arm/kernel/arch/arm32/include/mm/frame.h
43,7 → 43,7
 
#include <arch/types.h>
 
extern __address last_frame;
extern uintptr_t last_frame;
 
extern void frame_arch_init(void);
 
/branches/arm/kernel/arch/arm32/include/mm/page.h
69,8 → 69,7
#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 20) & 0xfff)
#define PTL1_INDEX_ARCH(vaddr) 0
#define PTL2_INDEX_ARCH(vaddr) 0
/* TODO: ?? 0xfff or 0x0ff */
#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0xfff)
#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x0ff)
 
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *)( (((pte_level0_t*)(ptl0))[(i)]).coarse_table_addr << 10 ))
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)
100,7 → 99,7
/* pte should point into ptl3 */
#define PTE_GET_FRAME_ARCH(pte) ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH)
/* pte should point into ptl3 */
#define PTE_WRITABLE_ARCH(pte) ( ((pte_level1_t *)(pte))->access_permission_0 == pte_ap_user_rw_kernel_rw )
#define PTE_WRITABLE_ARCH(pte) ( ((pte_level1_t *)(pte))->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW )
 
#define PTE_EXECUTABLE_ARCH(pte) 1
 
130,14 → 129,14
{
pte_level0_t *p = &pt[i];
 
return (
( p->descriptor_type != pte_descriptor_not_preset ) << PAGE_PRESENT_SHIFT |
return
( (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT ) |
( 1 << PAGE_USER_SHIFT ) |
( 1 << PAGE_READ_SHIFT ) |
( 1 << PAGE_WRITE_SHIFT ) |
( 1 << PAGE_EXEC_SHIFT ) |
( 1 << PAGE_CACHEABLE_SHIFT )
);
;
}
 
/**
150,15 → 149,15
{
pte_level1_t *p = &pt[i];
 
return (
( p->descriptor_type != pte_descriptor_not_preset ) << PAGE_PRESENT_SHIFT |
( (p->access_permission_0 == pte_ap_user_ro_kernel_rw) << PAGE_READ_SHIFT ) |
( (p->access_permission_0 == pte_ap_user_rw_kernel_rw) << PAGE_READ_SHIFT ) |
( (p->access_permission_0 == pte_ap_user_rw_kernel_rw) << PAGE_WRITE_SHIFT ) |
( (p->access_permission_0 != pte_ap_user_no_kernel_rw) << PAGE_USER_SHIFT ) |
return
( (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) |
( (p->access_permission_0 == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT ) |
( (p->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT ) |
( (p->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) << PAGE_WRITE_SHIFT ) |
( (p->access_permission_0 != PTE_AP_USER_NO_KERNEL_RW) << PAGE_USER_SHIFT ) |
( 1 << PAGE_EXEC_SHIFT ) |
( p->bufferable << PAGE_CACHEABLE )
);
;
}
 
/**
173,13 → 172,13
static inline void set_pt_level0_flags(pte_level0_t *pt, index_t i, int flags)
{
pte_level0_t *p = &pt[i];
 
if (flags & PAGE_NOT_PRESENT) {
p->descriptor_type = pte_descriptor_not_preset;
p->should_be_zero = 1;
p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT;
// p->should_be_zero = 1;
} else {
p->descriptor_type = pte_descriptor_coarse_table;
p->should_be_zero = 0;
p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE;
// p->should_be_zero = 0;
}
}
 
199,11 → 198,11
pte_level1_t *p = &pt[i];
if (flags & PAGE_NOT_PRESENT) {
p->descriptor_type = pte_descriptor_not_preset;
p->access_permission_3 = 1;
p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT;
// p->access_permission_3 = 1;
} else {
p->descriptor_type = pte_descriptor_small_page;
p->access_permission_3 = p->access_permission_0;
p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE;
// p->access_permission_3 = p->access_permission_0;
}
p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0;
210,18 → 209,18
 
/* default access permission */
p->access_permission_0 = p->access_permission_1 =
p->access_permission_2 = p->access_permission_3 = pte_ap_user_no_kernel_rw;
p->access_permission_2 = p->access_permission_3 = PTE_AP_USER_NO_KERNEL_RW;
 
if (flags & PAGE_USER) {
if (flags & PAGE_READ) {
p->access_permission_0 = p->access_permission_1 =
p->access_permission_2 = p->access_permission_3 =
pte_ap_user_ro_kernel_rw;
PTE_AP_USER_RO_KERNEL_RW;
}
if (flags & PAGE_WRITE) {
p->access_permission_0 = p->access_permission_1 =
p->access_permission_2 = p->access_permission_3 =
pte_ap_user_rw_kernel_rw;
PTE_AP_USER_RW_KERNEL_RW;
}
}
}
/branches/arm/kernel/arch/arm32/src/asm.S
32,7 → 32,6
.global memsetb
memsetb:
b _memsetb
nop
 
 
.global memcpy
/branches/arm/kernel/arch/arm32/src/mm/frame.c
33,24 → 33,21
*/
 
#include <mm/frame.h>
#include <arch/mm/frame.h>
#include <config.h>
#include "../aux_print/printf.h"
 
__address last_frame = 0;
uintptr_t last_frame = 0;
 
/** Create memory zones. */
void frame_arch_init(void)
{
aux_printf("frame_arch_init ... begin\n");
 
// all memory as one zone
zone_create(0, ADDR2PFN(config.memory_size), 11, 0);
zone_create(0, ADDR2PFN(config.memory_size), 2, 0);
last_frame = config.memory_size;
 
/* Blacklist interrupt vector + Kernels from boot loader page table */
frame_mark_unavailable(0, 10);
 
aux_printf("frame_arch_init ... end\n");
// blacklist interrupt vector
frame_mark_unavailable(0, 1);
}
 
/** @}
/branches/arm/kernel/arch/arm32/src/mm/page.c
35,6 → 35,7
#include <arch/mm/page.h>
#include <genarch/mm/page_pt.h>
#include <mm/page.h>
#include <mm/tlb.h>
#include <align.h>
#include <config.h>
#include "../aux_print/printf.h"
52,11 → 53,17
for (cur = 0; cur < last_frame; cur += FRAME_SIZE) {
page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
}
//SET_PTL0_ADDRESS_ARCH(AS_KERNEL->genarch.page_table);
 
// TODO: move to the kernel space
page_mapping_insert(AS_KERNEL, 0x00000000, 0x00000000, flags);
page_mapping_insert(AS_KERNEL, 0x10000000, 0x10000000, flags);
page_mapping_insert(AS_KERNEL, 0x15000000, 0x15000000, flags);
page_mapping_insert(AS_KERNEL, 0x16000000, 0x16000000, flags);
 
tlb_invalidate_all();
SET_PTL0_ADDRESS_ARCH(AS_KERNEL->genarch.page_table);
 
// note for Alf: kernel part of page table is copied in generic/mm/as_pt.c/ptl0_create
 
// TODO: register fault routine
}