Subversion Repositories HelenOS

Compare Revisions

Ignore whitespace Rev 2182 → Rev 2181

/branches/arm/kernel/arch/arm32/include/mm/page.h
36,10 → 36,7
#define KERN_arm32_PAGE_H_
 
#include <arch/mm/frame.h>
#include <mm/mm.h>
#include <arch/exception.h>
 
 
#define PAGE_WIDTH FRAME_WIDTH
#define PAGE_SIZE FRAME_SIZE
 
71,11 → 68,11
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) ( (uintptr_t)(((pte_level1_t*)(ptl3))[(i)]).frame_base_addr << 12 ))
 
#define SET_PTL0_ADDRESS_ARCH(ptl0) ( set_ptl0_addr((pte_level0_t *)(ptl0)) )
#define SET_PTL0_ADDRESS_ARCH(ptl0) // TODO
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_level0_t *)(ptl0))[(i)].coarse_table_addr = (a)>>10)
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_level1_t *)(ptl3))[(i)].frame_base_addr = (a)>>12)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_level1_t *)(ptl3))[(i)].frame_base_addr = (a)>>12)
 
#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_level0_flags((pte_level0_t *)(ptl0), (index_t)(i))
#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT
87,24 → 84,16
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_level1_flags((pte_level1_t *)(ptl3), (index_t)(i), (x))
 
#define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0)
#define PTE_PRESENT_ARCH(pte) ( ((pte_level0_t *)(pte))->descriptor_type )
#define PTE_GET_FRAME_ARCH(pte) ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH) // pte should point into ptl3
#define PTE_WRITABLE_ARCH(pte) ( ((pte_level1_t *)(pte))->access_permission_0 == pte_ap_user_rw_kernel_rw ) // pte should point into ptl3
#define PTE_EXECUTABLE_ARCH(pte) 1
#define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0)
#define PTE_PRESENT_ARCH(pte) ( ((pte_level0_t *)(pte))->descriptor_type )
#define PTE_GET_FRAME_ARCH(pte) ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH) // pte should point into ptl3
#define PTE_WRITABLE_ARCH(pte) ( ((pte_level1_t *)(pte))->access_permission_0 == pte_ap_user_rw_kernel_rw ) // pte should point into ptl3
#define PTE_EXECUTABLE_ARCH(pte) 1
 
#ifndef __ASM__
 
/** Set adress of paging level 0 table
* \param pt pointer to page table to set
*/
static inline void set_ptl0_addr( pte_level0_t* pt){
asm volatile ( "mrc p15, 0, %0, c2, c0, 0 \n"
:
: "r"(pt)
);
}
#include <mm/mm.h>
#include <arch/exception.h>
 
//TODO Comment: Page table structure as in other architectures
117,6 → 106,8
( 1 << PAGE_READ_SHIFT ) |
( 1 << PAGE_EXEC_SHIFT ) |
( 1 << PAGE_CACHEABLE )
// Alf Note: MayBe return WriteAble because level0 should use only kernel which can write
// Alf Note: MayBe return global flag if index i > 2048 (horni 2GB because kernel is mapped globaly)
);
 
}
129,9 → 120,10
( (p->access_permission_0 == pte_ap_user_ro_kernel_rw) << PAGE_READ_SHIFT ) |
( (p->access_permission_0 == pte_ap_user_rw_kernel_rw) << PAGE_READ_SHIFT ) |
( (p->access_permission_0 == pte_ap_user_rw_kernel_rw) << PAGE_WRITE_SHIFT ) |
( (p->access_permission_0 != pte_ap_user_no_kernel_rw) << PAGE_USER_SHIFT ) |
( (p->access_permission_0 != pte_ap_user_no_kernel_rw) << PAGE_USER_SHIFT ) |
( 1 << PAGE_EXEC_SHIFT ) |
( p->bufferable << PAGE_CACHEABLE )
// Alf Note: MayBe return global flag if index i > 2048 (horni 2GB because kernel is mapped globaly)
);
163,7 → 155,7
if ( flags & PAGE_NOT_PRESENT ) {
p->descriptor_type = pte_descriptor_not_preset;
p->access_permission_3 = 1;
p->access_permission_3 = 1; // Ensure not all bits set to zero ... correct acess rights are stored in other 0-2 access permission entries
} else
{
p->descriptor_type = pte_descriptor_coarse_table;
/branches/arm/kernel/arch/arm32/include/mm/memory_init.h
37,7 → 37,7
 
#include <config.h>
 
size_t get_memory_size(void);
#define get_memory_size() CONFIG_MEMORY_SIZE /* TODO */
 
#endif
 
/branches/arm/kernel/arch/arm32/Makefile.inc
79,6 → 79,5
arch/$(ARCH)/src/aux_print/io.c \
arch/$(ARCH)/src/console.c \
arch/$(ARCH)/src/drivers/msim_gxemul.c \
arch/$(ARCH)/src/exception.c \
arch/$(ARCH)/src/mm/memory_init.c
arch/$(ARCH)/src/exception.c
/branches/arm/kernel/arch/arm32/src/mm/memory_init.c
File deleted
/branches/arm/kernel/arch/arm32/src/mm/frame.c
33,22 → 33,11
*/
 
#include <mm/frame.h>
#include <config.h>
#include "../aux_print/printf.h"
 
/** Create memory zones. */
void frame_arch_init(void)
{
aux_printf("frame_arch_init ... begin\n");
// all memory as one zone
zone_create(0, ADDR2PFN(config.memory_size), 1, 0);
aux_printf("frame_arch_init ... 1\n");
/*
* Blacklist interrupt vector
*/
frame_mark_unavailable(0, 1);
aux_printf("frame_arch_init ... end\n");
 
/* TODO */
}
 
/** @}
/branches/arm/kernel/arch/arm32/src/mm/page.c
35,42 → 35,10
#include <arch/mm/page.h>
#include <genarch/mm/page_pt.h>
#include <mm/page.h>
#include <align.h>
#include <config.h>
#include "../aux_print/printf.h"
 
void page_arch_init(void)
{
aux_printf("page_arch_init\n");
 
uintptr_t cur;
int flags;
 
page_mapping_operations = &pt_mapping_operations;
 
flags = PAGE_CACHEABLE;
const unsigned maxmem = ALIGN_DOWN(config.memory_size, FRAME_SIZE);
for (cur = 0; cur < maxmem; cur += FRAME_SIZE) {
page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
}
//TODO set page fault routines
// no problem no ... kernel doesn't do page faults
asm volatile (
"ldr r0, =0x55555555 \n"
"mrc p15, 0, r0, c3, c0, 0 \n" //set domain acces rights to client <==> take rights from page tables
"mcr p15, 0, r0, c1, c0, 0 \n" // get current setting of system ... register 1 isn't only for memmory management
"ldr r1, =0xFFFFFE8D \n" // mask to disable aligment checks, System, Rom bit disable
"and r0, r0, r1 \n"
"ldr r1, =0x00000001 \n" // mask to enable paging
"orr r0, r0, r1 \n"
"mrc p15, 0, r0, c1, c0, 0 \n" // store setting
:
:
: "r0", "r1"
);
}
 
/** Map device into kernel space. */
82,4 → 50,3
 
/** @}
*/
 
/branches/arm/kernel/arch/arm32/src/arm32.c
63,12 → 63,10
aux_printf("arch_pre_mm_init\n");
 
console_init(device_assign_devno());
 
}
 
void arch_post_mm_init(void)
{
aux_printf("arch_post_mm_init\n");
/* TODO */
}