29,11 → 29,6 |
#include "regname.h" |
#include "spr.h" |
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.data |
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flush_buffer: |
.space 4 |
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.text |
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.global memsetb |
149,44 → 144,10 |
halt: |
b halt |
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flush_instruction_cache: |
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# Flush data cache |
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lis r3, flush_buffer@h |
ori r3, r3, flush_buffer@l |
li r4, L1_CACHE_LINES |
mtctr r4 |
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0: |
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lwz r4, 0(r3) |
addi r3, r3, L1_CACHE_BYTES |
bdnz 0b |
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# Invalidate instruction cache |
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li r3, 0 |
ori r3, r3, (HID0_ICE | HID0_DCE | HID0_ICFI | HID0_DCI) |
mfspr r4, SPRN_HID0 |
or r5, r4, r3 |
isync |
mtspr SPRN_HID0, r5 |
sync |
isync |
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# Enable instruction cache |
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ori r5, r4, HID0_ICE |
mtspr SPRN_HID0, r5 |
sync |
isync |
blr |
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jump_to_kernel: |
mfmsr r4 |
andis. r4, r4, (~MSR_DR | MSR_IR) >> 16 |
mtspr SPRN_SRR0, r3 |
mtspr SPRN_SRR1, r4 |
bl flush_instruction_cache |
rfi |
sync |
RFI |