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Ignore whitespace Rev 205 → Rev 206

/SPARTAN/trunk/src/clean.amd64
1,3 → 1,7
#! /bin/sh
 
make dist-clean ARCH=amd64
make dist-clean ARCH=ia32
 
find ../arch/amd64 -type l | xargs rm
rm ../arch/amd64/src/context_offset.h
/SPARTAN/trunk/src/build.amd64
4,7 → 4,13
# Generate context_offset.h
(cd ../arch/amd64/src;make gencontext;./gencontext)
# Create links to ia32 architecture
ln -sf ../../../arch/ia32/src/drivers ../arch/amd64/src/
ln -sf ../../../arch/ia32/include/ega.h ../arch/amd64/include/
for a in drivers bios; do
ln -sf ../../../arch/ia32/src/$a ../arch/amd64/src/
done
 
for a in ega.h i8042.h i8259.h i8254.h cpuid.h interrupt.h bios; do
ln -sf ../../../arch/ia32/include/$a ../arch/amd64/include/
done
 
make dist-clean ARCH=ia32
make all ARCH=amd64
/SPARTAN/trunk/arch/amd64/include/interrupt.h
1,5 → 1,5
/*
* Copyright (C) 2005 Martin Decky
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
26,9 → 26,63
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#ifndef __amd64_INTERRUPT_H__
#define __amd64_INTERRUPT_H__
#ifndef __INTERRUPT_H__
#define __INTERRUPT_H__
 
extern void interrupt(void);
#include <arch/types.h>
#include <arch/pm.h>
 
#define IVT_ITEMS IDT_ITEMS
 
#define IVT_EXCBASE 0
#define EXCLAST 31
 
#define IVT_IRQBASE (IVT_EXCBASE+EXCLAST+1)
#define IRQLAST 15
 
#define IVT_FREEBASE (IVT_IRQBASE+IRQLAST+1)
 
#define IRQ_CLK 0
#define IRQ_KBD 1
#define IRQ_PIC1 2
#define IRQ_PIC_SPUR 7
 
/* this one must have four least significant bits set to ones */
#define VECTOR_APIC_SPUR (IVT_ITEMS-1)
 
#if (((VECTOR_APIC_SPUR + 1)%16) || VECTOR_APIC_SPUR >= IVT_ITEMS)
#error Wrong definition of VECTOR_APIC_SPUR
#endif
 
#define VECTOR_PIC_SPUR (IVT_IRQBASE+IRQ_PIC_SPUR)
#define VECTOR_CLK (IVT_IRQBASE+IRQ_CLK)
#define VECTOR_KBD (IVT_IRQBASE+IRQ_KBD)
 
#define VECTOR_SYSCALL (IVT_FREEBASE+0)
#define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE+1)
#define VECTOR_WAKEUP_IPI (IVT_FREEBASE+2)
 
typedef void (* iroutine)(__u8 n, __native stack[]);
 
extern void (* disable_irqs_function)(__u16 irqmask);
extern void (* enable_irqs_function)(__u16 irqmask);
extern void (* eoi_function)(void);
 
extern iroutine trap_register(__u8 n, iroutine f);
 
extern void trap_dispatcher(__u8 n, __native stack[]);
 
extern void null_interrupt(__u8 n, __native stack[]);
extern void gp_fault(__u8 n, __native stack[]);
extern void nm_fault(__u8 n, __native stack[]);
extern void ss_fault(__u8 n, __native stack[]);
extern void page_fault(__u8 n, __native stack[]);
extern void syscall(__u8 n, __native stack[]);
extern void tlb_shootdown_ipi(__u8 n, __native stack[]);
extern void wakeup_ipi(__u8 n, __native stack[]);
 
extern void trap_virtual_enable_irqs(__u16 irqmask);
extern void trap_virtual_disable_irqs(__u16 irqmask);
extern void trap_virtual_eoi(void);
 
#endif
/SPARTAN/trunk/arch/amd64/include/pm.h
36,7 → 36,7
#endif
 
#define IDT_ITEMS 64
#define GDT_ITEMS 7
#define GDT_ITEMS 8
 
#define NULL_DES 0
#define KTEXT_DES 1
46,7 → 46,8
#define KTEXT32_DES 5
#define TSS_DES 6
 
#define selector(des) ((des)<<3)
#define gdtselector(des) ((des)<<3)
#define idtselector(des) ((des)<<4)
 
#define PL_KERNEL 0
#define PL_USER 3
56,8 → 57,9
#define AR_CODE (3<<3)
#define AR_WRITABLE (1<<1)
#define AR_READABLE (1<<1)
#define AR_INTERRUPT (0xe)
#define AR_TSS (0x9)
#define AR_INTERRUPT (0xe)
#define AR_TRAP (0xf)
 
#define DPL_KERNEL (PL_KERNEL<<5)
#define DPL_USER (PL_USER<<5)
66,11 → 68,6
 
#ifndef __ASM__
 
struct ptr_16_32 {
__u16 limit;
__u32 base;
} __attribute__ ((packed));
 
struct descriptor {
unsigned limit_0_15: 16;
unsigned base_0_15: 16;
84,66 → 81,70
unsigned base_24_31: 8;
} __attribute__ ((packed));
 
struct tss_descriptor {
unsigned limit_0_15: 16;
unsigned base_0_15: 16;
unsigned base_16_23: 8;
unsigned type: 4;
unsigned reserve1 : 1;
unsigned dpl : 2;
unsigned present : 1;
unsigned limit_16_19: 4;
unsigned available: 1;
unsigned reserve2: 2;
unsigned granularity : 1;
unsigned base_24_31: 8;
unsigned base_32_63 : 32;
unsigned reserve3 : 32;
} __attribute__ ((packed));
 
struct idescriptor {
unsigned offset_0_15: 16;
unsigned selector: 16;
unsigned unused: 8;
unsigned access: 8;
unsigned ist:3;
unsigned unused: 5;
unsigned type: 5;
unsigned dpl: 2;
unsigned present : 1;
unsigned offset_16_31: 16;
unsigned offset_32_63: 16;
unsigned reserved : 32;
} __attribute__ ((packed));
 
struct ptr_16_64 {
__u16 limit;
__u64 base;
} __attribute__ ((packed));
 
struct tss {
__u16 link;
unsigned : 16;
__u32 esp0;
__u16 ss0;
unsigned : 16;
__u32 esp1;
__u16 ss1;
unsigned : 16;
__u32 esp2;
__u16 ss2;
unsigned : 16;
__u32 cr3;
__u32 eip;
__u32 eflags;
__u32 eax;
__u32 ecx;
__u32 edx;
__u32 ebx;
__u32 esp;
__u32 ebp;
__u32 esi;
__u32 edi;
__u16 es;
unsigned : 16;
__u16 cs;
unsigned : 16;
__u16 ss;
unsigned : 16;
__u16 ds;
unsigned : 16;
__u16 fs;
unsigned : 16;
__u16 gs;
unsigned : 16;
__u16 ldtr;
unsigned : 16;
unsigned : 16;
__u16 io_map_base;
__u32 reserve1;
__u64 rsp0;
__u64 rsp1;
__u64 rsp2;
__u64 reserve2;
__u64 ist1;
__u64 ist2;
__u64 ist3;
__u64 ist4;
__u64 ist5;
__u64 ist6;
__u64 ist7;
__u64 reserve3;
__u16 reserve4;
__u16 iomap;
} __attribute__ ((packed));
 
extern struct ptr_16_32 gdtr;
extern struct tss *tss_p;
 
extern struct descriptor gdt[];
extern struct idescriptor idt[];
 
extern struct ptr_16_64 gdtr;
 
extern void pm_init(void);
 
extern void gdt_setbase(struct descriptor *d, __address base);
extern void gdt_setlimit(struct descriptor *d, __u32 limit);
extern void gdt_tss_setbase(struct descriptor *d, __address base);
extern void gdt_tss_setlimit(struct descriptor *d, __u32 limit);
 
extern void idt_init(void);
extern void idt_setoffset(struct idescriptor *d, __address offset);
/SPARTAN/trunk/arch/amd64/include/asm.h
34,7 → 34,9
 
 
void asm_delay_loop(__u32 t);
void asm_fake_loop(__u32 t);
 
 
/* TODO: implement the real stuff */
static inline __address get_stack_base(void)
{
54,7 → 56,7
"mov %%al, %1;"
:"=m"(out)
:"m"(port)
:"dx","al"
:"%dx","%al"
);
return out;
}
67,7 → 69,7
"outb %%al,%%dx;"
:
:"m"( port), "m" (b)
:"dx","al"
:"%dx","%al"
);
}
 
115,5 → 117,21
);
}
 
/** Return raw priority level
*
* Return EFLAFS.
*/
static inline pri_t cpu_priority_read(void) {
pri_t v;
__asm__ volatile (
"pushfq\n"
"popq %0\n"
: "=r" (v)
);
return v;
}
 
extern size_t interrupt_handler_size;
extern void interrupt_handlers(void);
 
#endif
/SPARTAN/trunk/arch/amd64/include/types.h
36,7 → 36,7
typedef unsigned char __u8;
typedef unsigned short __u16;
typedef unsigned int __u32;
typedef long long __u64;
typedef unsigned long long __u64;
 
typedef __u64 __address;
 
/SPARTAN/trunk/arch/amd64/Makefile.inc
20,4 → 20,11
arch/pm.c \
arch/context.S \
arch/drivers/ega.c \
arch/supplib.c
arch/drivers/i8042.c \
arch/drivers/i8254.c \
arch/drivers/i8259.c \
arch/supplib.c \
arch/delay.S \
arch/amd64.c \
arch/bios/bios.c
 
/SPARTAN/trunk/arch/amd64/src/delay.S
0,0 → 1,48
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#
# Micro second delay loop functions.
#
 
.text
 
.global asm_delay_loop
.global asm_fake_loop
 
asm_delay_loop:
0: lahf
dec %edi
jnz 0b
ret
 
asm_fake_loop:
0: lahf
dec %edi
jz 0b
ret
/SPARTAN/trunk/arch/amd64/src/boot/boot.S
66,6 → 66,8
 
# Load gdtr, idtr
lgdt gdtr_inst
# Load idtr, but it contains mess - we should not get interrupt
# anyway
lidt idtr_inst
movl %cr0,%eax
72,7 → 74,7
orl $0x1,%eax
movl %eax,%cr0 # switch to protected mode
 
jmpl $selector(KTEXT32_DES), $now_in_prot
jmpl $gdtselector(KTEXT32_DES), $now_in_prot
 
no_long_mode:
1:
82,7 → 84,7
# the Default operand size must not be 1 when entering long mode
now_in_prot:
# Set up stack & data descriptors
movw $selector(KDATA_DES), %ax
movw $gdtselector(KDATA_DES), %ax
movw %ax, %ds
movw %ax, %fs
movw %ax, %gs
110,21 → 112,20
movl %eax, %cr0
# At this point we are in compatibility mode
jmpl $selector(KTEXT_DES), $start64
jmpl $gdtselector(KTEXT_DES), $start64
 
.code64
start64:
movq START_STACK_64, %rsp
lidt idtr_inst
call main_bsp # never returns
1:
jmp 1b
 
.section K_DATA_START
.align 4096
 
# Identical mapping of first 16MB and the same of -2GB -> 0
.global ptl_2
ptl_2:
.quad 0x0 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
153,10 → 154,10
 
.global gdtr_inst
gdtr_inst:
.word selector(GDT_ITEMS)
.word gdtselector(GDT_ITEMS)
.long KA2PA(gdt)
 
.global idtr_inst
idtr_inst:
.word 0
.word idtselector(IDT_ITEMS)
.long KA2PA(idt)
/SPARTAN/trunk/arch/amd64/src/dummy.s
28,10 → 28,6
 
.text
 
.global cpu_priority_high
.global cpu_priority_low
.global cpu_priority_read
.global cpu_priority_restore
.global userspace
.global before_thread_runs_arch
.global panic_printf
40,27 → 36,51
.global cpu_sleep
.global cpu_print_report
.global get_memory_size
.global arch_pre_mm_init
.global arch_post_mm_init
.global arch_late_init
.global calibrate_delay_loop
.global asm_delay_loop
.global cpu_halt
.global page_arch_init
.global frame_arch_init
.global dummy
.global asm_delay_loop
.global trap_register
.global trap_virtual_eoi
.global trap_virtual_enable_irqs
.global rdtsc
.global trap_virtual_disable_irqs
.global enable_irqs_function
.global disable_irqs_function
.global eoi_function
.global syscall
.global null_interrupt
.global interrupt_handler_size
.global gp_fault
.global nm_fault
.global ss_fault
.global tss_p
.global interrupt_handlers
.global memcpy
 
cpu_priority_high:
cpu_priority_low:
cpu_priority_restore:
cpu_priority_read:
asm_delay_loop:
null_interrupt:
interrupt_handler_size:
interrupt_handlers:
gp_fault:
nm_fault:
ss_fault:
tss_p:
eoi_function:
syscall:
enable_irqs_function:
disable_irqs_function:
rdtsc:
trap_virtual_eoi:
trap_virtual_enable_irqs:
trap_virtual_disable_irqs:
trap_register:
before_thread_runs_arch:
userspace:
calibrate_delay_loop:
asm_delay_loop:
panic_printf:
cpu_identify:
cpu_arch_init:
67,8 → 87,6
cpu_sleep:
cpu_print_report:
get_memory_size:
arch_pre_mm_init:
arch_post_mm_init:
arch_late_init:
calibrate_delay_loop:
cpu_halt:
/SPARTAN/trunk/arch/amd64/src/amd64.c
0,0 → 1,66
/*
* Copyright (C) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#include <arch.h>
 
#include <arch/types.h>
 
#include <config.h>
 
#include <arch/ega.h>
#include <arch/i8042.h>
#include <arch/i8254.h>
#include <arch/i8259.h>
 
#include <arch/bios/bios.h>
 
void arch_pre_mm_init(void)
{
pm_init();
 
if (config.cpu_active == 1) {
bios_init();
i8042_init(); /* a20 bit */
i8259_init(); /* PIC */
i8254_init(); /* hard clock */
 
trap_register(VECTOR_SYSCALL, syscall);
#ifdef __SMP__
trap_register(VECTOR_TLB_SHOOTDOWN_IPI, tlb_shootdown_ipi);
trap_register(VECTOR_WAKEUP_IPI, wakeup_ipi);
#endif /* __SMP__ */
}
}
 
void arch_post_mm_init(void)
{
if (config.cpu_active == 1) {
ega_init(); /* video */
}
}
/SPARTAN/trunk/arch/amd64/src/pm.c
29,8 → 29,15
#include <arch/pm.h>
#include <arch/mm/page.h>
#include <arch/types.h>
#include <arch/interrupt.h>
#include <arch/asm.h>
 
#include <config.h>
 
#include <memstr.h>
#include <mm/heap.h>
#include <debug.h>
 
/*
* There is no segmentation in long mode so we set up flat mode. In this
* mode, we use, for each privilege level, two segments spanning the
71,7 → 78,7
.available = 0,
.longmode = 1,
.special = 0,
.granularity = 0,
.granularity = 1,
.base_24_31 = 0 },
/* UDATA descriptor */
{ .limit_0_15 = 0xffff,
95,13 → 102,157
.special = 0,
.granularity = 1,
.base_24_31 = 0 },
/* TSS descriptor - set up will be completed later */
/* TSS descriptor - set up will be completed later,
* on AMD64 it is 64-bit - 2 items in table */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
};
 
struct ptr_16_64 gdtr = {.limit = sizeof(gdtr), .base= (__u64) &gdtr };
 
struct idescriptor idt[IDT_ITEMS];
 
static struct tss tss;
 
/* Does not compile correctly if it does not exist */
/* TODO: Does not compile correctly if it does not exist ???? */
int __attribute__ ((section ("K_DATA_START"))) __fake;
 
void gdt_tss_setbase(struct descriptor *d, __address base)
{
struct tss_descriptor *td = (struct tss_descriptor *) d;
 
td->base_0_15 = base & 0xffff;
td->base_16_23 = ((base) >> 16) & 0xff;
td->base_24_31 = ((base) >> 24) & 0xff;
td->base_32_63 = ((base) >> 32);
}
 
void gdt_tss_setlimit(struct descriptor *d, __u32 limit)
{
struct tss_descriptor *td = (struct tss_descriptor *) d;
 
td->limit_0_15 = limit & 0xffff;
td->limit_16_19 = (limit >> 16) & 0xf;
}
 
void idt_setoffset(struct idescriptor *d, __address offset)
{
/*
* Offset is a linear address.
*/
d->offset_0_15 = offset & 0xffff;
d->offset_16_31 = offset >> 16 & 0xffff;
d->offset_32_63 = offset >> 32;
}
 
void tss_initialize(struct tss *t)
{
memsetb((__address) t, sizeof(struct tss), 0);
}
 
/*
* This function takes care of proper setup of IDT and IDTR.
*/
void idt_init(void)
{
struct idescriptor *d;
int i;
 
for (i = 0; i < IDT_ITEMS; i++) {
d = &idt[i];
 
d->unused = 0;
d->selector = idtselector(KTEXT_DES);
 
d->present = 1;
d->type = AR_INTERRUPT; /* masking interrupt */
 
if (i == VECTOR_SYSCALL) {
/*
* The syscall interrupt gate must be calleable from userland.
*/
d->dpl |= PL_USER;
}
idt_setoffset(d, ((__address) interrupt_handlers) + i*interrupt_handler_size);
trap_register(i, null_interrupt);
}
trap_register(13, gp_fault);
trap_register( 7, nm_fault);
trap_register(12, ss_fault);
}
 
 
/* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */
static void clean_IOPL_NT_flags(void)
{
asm
(
"pushfq;"
"pop %%rax;"
"and $~(0x7000),%%rax;"
"pushq %%rax;"
"popfq;"
:
:
:"%rax"
);
}
 
/* Clean AM(18) flag in CR0 register */
static void clean_AM_flag(void)
{
asm
(
"mov %%cr0,%%rax;"
"and $~(0x40000),%%rax;"
"mov %%rax,%%cr0;"
:
:
:"%rax"
);
}
 
void pm_init(void)
{
struct descriptor *gdt_p = (struct descriptor *) PA2KA(gdtr.base);
struct tss_descriptor *tss_d;
 
/*
* Each CPU has its private GDT and TSS.
* All CPUs share one IDT.
*/
 
if (config.cpu_active == 1) {
idt_init();
/*
* NOTE: bootstrap CPU has statically allocated TSS, because
* the heap hasn't been initialized so far.
*/
tss_p = &tss;
}
else {
tss_p = (struct tss *) malloc(sizeof(struct tss));
if (!tss_p)
panic("could not allocate TSS\n");
}
 
tss_initialize(tss_p);
 
tss_d = (struct tss_descriptor *) &gdt_p[TSS_DES];
tss_d[TSS_DES].present = 1;
tss_d[TSS_DES].type = AR_TSS;
tss_d[TSS_DES].dpl = PL_KERNEL;
gdt_tss_setbase(&gdt_p[TSS_DES], (__address) tss_p);
gdt_tss_setlimit(&gdt_p[TSS_DES], sizeof(struct tss) - 1);
 
/*
* As of this moment, the current CPU has its own GDT pointing
* to its own TSS. We just need to load the TR register.
*/
__asm__("ltr %0" : : "r" ((__u16) gdtselector(TSS_DES)));
clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels */
clean_AM_flag(); /* Disable alignment check */
}
/SPARTAN/trunk/arch/ia32/include/interrupt.h
62,10 → 62,8
#define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE+1)
#define VECTOR_WAKEUP_IPI (IVT_FREEBASE+2)
 
typedef void (* iroutine)(__u8 n, __u32 stack[]);
typedef void (* iroutine)(__u8 n, __native stack[]);
 
extern iroutine ivt[IVT_ITEMS];
 
extern void (* disable_irqs_function)(__u16 irqmask);
extern void (* enable_irqs_function)(__u16 irqmask);
extern void (* eoi_function)(void);
72,16 → 70,16
 
extern iroutine trap_register(__u8 n, iroutine f);
 
extern void trap_dispatcher(__u8 n, __u32 stack[]);
extern void trap_dispatcher(__u8 n, __native stack[]);
 
extern void null_interrupt(__u8 n, __u32 stack[]);
extern void gp_fault(__u8 n, __u32 stack[]);
extern void nm_fault(__u8 n, __u32 stack[]);
extern void ss_fault(__u8 n, __u32 stack[]);
extern void page_fault(__u8 n, __u32 stack[]);
extern void syscall(__u8 n, __u32 stack[]);
extern void tlb_shootdown_ipi(__u8 n, __u32 stack[]);
extern void wakeup_ipi(__u8 n, __u32 stack[]);
extern void null_interrupt(__u8 n, __native stack[]);
extern void gp_fault(__u8 n, __native stack[]);
extern void nm_fault(__u8 n, __native stack[]);
extern void ss_fault(__u8 n, __native stack[]);
extern void page_fault(__u8 n, __native stack[]);
extern void syscall(__u8 n, __native stack[]);
extern void tlb_shootdown_ipi(__u8 n, __native stack[]);
extern void wakeup_ipi(__u8 n, __native stack[]);
 
extern void trap_virtual_enable_irqs(__u16 irqmask);
extern void trap_virtual_disable_irqs(__u16 irqmask);
/SPARTAN/trunk/arch/ia32/include/i8042.h
32,6 → 32,6
#include <arch/types.h>
 
extern void i8042_init(void);
extern void i8042_interrupt(__u8 n, __u32 stack[]);
extern void i8042_interrupt(__u8 n, __native stack[]);
 
#endif
/SPARTAN/trunk/arch/ia32/include/i8254.h
32,7 → 32,7
#include <arch/types.h>
 
extern void i8254_init(void);
extern void i8254_interrupt(__u8 n, __u32 stack[]);
extern void i8254_interrupt(__u8 n, __native stack[]);
extern void i8254_calibrate_delay_loop(void);
extern void i8254_normal_operation(void);
 
/SPARTAN/trunk/arch/ia32/include/pm.h
132,7 → 132,6
extern struct tss *tss_p;
 
extern struct descriptor gdt[];
extern struct idescriptor idt[];
 
extern void pm_init(void);
 
/SPARTAN/trunk/arch/ia32/include/i8259.h
46,6 → 46,6
extern void pic_enable_irqs(__u16 irqmask);
extern void pic_disable_irqs(__u16 irqmask);
extern void pic_eoi(void);
extern void pic_spurious(__u8 n, __u32 stack[]);
extern void pic_spurious(__u8 n, __native stack[]);
 
#endif
/SPARTAN/trunk/arch/ia32/src/acpi/acpi.c
41,7 → 41,7
struct acpi_xsdt *acpi_xsdt = NULL;
 
struct acpi_signature_map signature_map[] = {
{ "APIC", (struct acpi_sdt_header **) &acpi_madt, "Multiple APIC Description Table" }
{ (__u8 *)"APIC", (struct acpi_sdt_header **) &acpi_madt, "Multiple APIC Description Table" }
};
 
int rsdp_check(__u8 *rsdp) {
/SPARTAN/trunk/arch/ia32/src/drivers/i8259.c
115,7 → 115,7
outb(0xa0,0x20);
}
 
void pic_spurious(__u8 n, __u32 stack[])
void pic_spurious(__u8 n, __native stack[])
{
printf("cpu%d: PIC spurious interrupt\n", CPU->id);
}
/SPARTAN/trunk/arch/ia32/src/drivers/i8042.c
48,7 → 48,7
trap_register(VECTOR_KBD, i8042_interrupt);
}
 
void i8042_interrupt(__u8 n, __u32 stack[])
void i8042_interrupt(__u8 n, __native stack[])
{
__u8 x;
 
/SPARTAN/trunk/arch/ia32/src/drivers/i8254.c
122,7 → 122,7
return;
}
 
void i8254_interrupt(__u8 n, __u32 stack[])
void i8254_interrupt(__u8 n, __native stack[])
{
trap_virtual_eoi();
clock();