/SPARTAN/trunk/include/arch.h |
---|
39,16 → 39,9 |
#include <proc/thread.h> |
#include <proc/task.h> |
/* |
* NOTE: |
* CPU, THREAD and TASK are not preemption-safe. |
* Provisions must be made to prevent preemption prior |
* to using these macros. Simple cpu_priority_high() |
* call will suffice. |
*/ |
#define CPU (&cpus[CPU_ID_ARCH]) |
#define THREAD (cpu_private_data[CPU_ID_ARCH].thread) |
#define TASK (cpu_private_data[CPU_ID_ARCH].task) |
#define CPU THE->cpu |
#define THREAD THE->thread |
#define TASK THE->task |
/* |
* For each possible kernel stack, structure |
/SPARTAN/trunk/include/cpu.h |
---|
71,16 → 71,6 |
__u8 *stack; |
}; |
/* |
* read/write by associated CPU |
* read only by other CPUs |
*/ |
struct cpu_private_data { |
thread_t *thread; |
task_t *task; |
}; |
extern cpu_private_data_t *cpu_private_data; |
extern cpu_t *cpus; |
extern void cpu_init(void); |
/SPARTAN/trunk/src/Makefile.config |
---|
20,7 → 20,7 |
#USERSPACE=__USERSPACE__ |
# Uncomment if you want to run in the test mode |
TEST=__TEST__ |
#TEST=__TEST__ |
TEST_FILE=test.c |
33,4 → 33,4 |
#TEST_DIR=synch/semaphore1/ |
#TEST_DIR=synch/semaphore2/ |
#TEST_DIR=fpu/fpu1 |
TEST_DIR=print/print1 |
#TEST_DIR=print/print1 |
/SPARTAN/trunk/src/main/main.c |
---|
179,7 → 179,6 |
*/ |
t = thread_create(kinit, NULL, k, 0); |
if (!t) panic("can't create kinit thread\n"); |
thread_ready(t); |
/* |
210,6 → 209,11 |
*/ |
config.cpu_active++; |
/* |
* The THE structure is well defined because ctx.sp is used as stack. |
*/ |
the_initialize(THE); |
arch_pre_mm_init(); |
frame_init(); |
page_init(); |
221,6 → 225,7 |
l_apic_init(); |
l_apic_debug(); |
the_copy(THE, (the_t *) CPU->stack); |
/* |
* If we woke kmp up before we left the kernel stack, we could |
/SPARTAN/trunk/src/cpu/cpu.c |
---|
39,11 → 39,8 |
#include <memstr.h> |
#include <list.h> |
cpu_private_data_t *cpu_private_data; |
cpu_t *cpus; |
/** Initialize CPUs |
* |
* Initialize kernel CPUs support. |
55,20 → 52,15 |
#ifdef __SMP__ |
if (config.cpu_active == 1) { |
#endif /* __SMP__ */ |
cpu_private_data = (cpu_private_data_t *) malloc(sizeof(cpu_private_data_t) * config.cpu_count); |
if (!cpu_private_data) |
panic("malloc/cpu_private_data"); |
cpus = (cpu_t *) malloc(sizeof(cpu_t) * config.cpu_count); |
if (!cpus) |
panic("malloc/cpus"); |
/* initialize everything */ |
memsetb((__address) cpu_private_data, sizeof(cpu_private_data_t) * config.cpu_count, 0); |
memsetb((__address) cpus, sizeof(cpu_t) * config.cpu_count, 0); |
for (i=0; i < config.cpu_count; i++) { |
cpus[i].stack = (__u8 *) malloc(CPU_STACK_SIZE); |
cpus[i].stack = (__u8 *) frame_alloc(FRAME_KA | FRAME_PANIC); |
if (!cpus[i].stack) |
panic("malloc/cpus[%d].stack\n", i); |
87,6 → 79,8 |
} |
#endif /* __SMP__ */ |
CPU = &cpus[config.cpu_active-1]; |
CPU->active = 1; |
CPU->tlb_active = 1; |
/SPARTAN/trunk/arch/ppc/include/cpu.h |
---|
31,8 → 31,6 |
#include <typedefs.h> |
#define CPU_ID_ARCH 0 |
struct cpu_arch { |
}; |
/SPARTAN/trunk/arch/ia64/include/cpu.h |
---|
31,8 → 31,6 |
#include <typedefs.h> |
#define CPU_ID_ARCH 0 |
struct cpu_arch { |
}; |
/SPARTAN/trunk/arch/mips/include/cpu.h |
---|
29,8 → 29,6 |
#ifndef __mips_CPU_H__ |
#define __mips_CPU_H__ |
#define CPU_ID_ARCH 0 |
struct cpu_arch { |
int imp_num; |
int rev_num; |
/SPARTAN/trunk/arch/amd64/include/cpu.h |
---|
35,12 → 35,6 |
#include <arch/pm.h> |
#include <arch/asm.h> |
#ifdef __SMP__ |
#define CPU_ID_ARCH (read_dr0()) |
#else |
#define CPU_ID_ARCH (0) |
#endif |
struct cpu_arch { |
int vendor; |
int family; |
/SPARTAN/trunk/arch/ia32/include/asm.h |
---|
83,22 → 83,6 |
*/ |
static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0" : "=r" (v)); return v; } |
/** Write DR0 |
* |
* Write value to DR0. |
* |
* @param v Value to be written. |
*/ |
static inline void write_dr0(__u32 v) { __asm__ volatile ("movl %0,%%dr0\n" : : "r" (v)); } |
/** Read DR0 |
* |
* Return value in DR0 |
* |
* @return Value read. |
*/ |
static inline __u32 read_dr0(void) { __u32 v; __asm__ volatile ("movl %%dr0,%0" : "=r" (v)); return v; } |
/** Set priority level low |
* |
* Enable interrupts and return previous |
/SPARTAN/trunk/arch/ia32/include/cpu.h |
---|
33,12 → 33,6 |
#include <arch/pm.h> |
#include <arch/asm.h> |
#ifdef __SMP__ |
#define CPU_ID_ARCH (read_dr0()) |
#else |
#define CPU_ID_ARCH (0) |
#endif |
struct cpu_arch { |
int vendor; |
int family; |
/SPARTAN/trunk/arch/ia32/src/ia32.c |
---|
51,8 → 51,6 |
{ |
pm_init(); |
write_dr0(config.cpu_active - 1); |
if (config.cpu_active == 1) { |
bios_init(); |
i8042_init(); /* a20 bit */ |