/SPARTAN/trunk/arch/mips32/boot/Makefile |
---|
0,0 → 1,26 |
MIPS_BINUTILS_DIR=/usr/local/mipsel/bin |
MIPS_TARGET=mipsel-linux-gnu |
.PHONY: nothing build |
nothing: |
build: boot.bin |
cp boot.bin ../../../load.bin |
AS=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-as |
CC=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-gcc |
LD=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-ld |
ASFLAGS=-mips2 -I../../../generic/include |
LFLAGS=--oformat=binary -e start -T _link.ld |
.S.o: |
$(CC) $(ASFLAGS) -c -o $@ $< |
boot.bin: boot.o |
$(LD) $(LFLAGS) $< -o $@ |
clean: |
-rm *.o *.bin |
/SPARTAN/trunk/arch/mips32/boot/_link.ld |
---|
0,0 → 1,8 |
/* OUTPUT_FORMAT(ecoff-littlemips) */ |
OUTPUT_FORMAT(binary) |
SECTIONS { |
.image 0x0: AT (0) { |
*(.text); |
*(.reginfo); |
} |
} |
/SPARTAN/trunk/arch/mips32/boot/boot.S |
---|
0,0 → 1,47 |
# |
# Copyright (C) 2003-2004 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
.text |
.set noat |
.set noreorder |
.set nomacro |
#include <arch/asm/boot.h> |
#ifndef KERNEL_LOAD_ADDRESS |
# define KERNEL_LOAD_ADDRESS 0x80100000 |
#endif |
.global start |
start: |
lui $ra, KERNEL_LOAD_ADDRESS >> 16 |
ori $ra, KERNEL_LOAD_ADDRESS & 0xffff |
j $ra |
nop |
/SPARTAN/trunk/arch/mips32/Makefile.inc |
---|
0,0 → 1,96 |
MIPS_TARGET=mipsel-linux-gnu |
MIPS_CC_DIR=/usr/local/mipsel/bin |
MIPS_BINUTILS_DIR=/usr/local/mipsel/bin |
CC=$(MIPS_CC_DIR)/$(MIPS_TARGET)-gcc |
AS=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-as |
LD=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-ld |
OBJDUMP=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-objdump |
OBJCOPY=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-objcopy |
BFD_ARCH=mips |
DEFS=-DARCH=$(ARCH) -DMACHINE=${MACHINE} -DKERNEL_LOAD_ADDRESS=${KERNEL_LOAD_ADDRESS} |
CFLAGS=$(DEFS) -mno-abicalls -G 0 -nostdlib -fno-builtin -O2 -fno-zero-initialized-in-bss |
LFLAGS= |
BFD_ARCH=mips |
# GCC 4.0.1 compiled for mipsEL has problems compiling in |
# BigEndian mode with the swl/swr/lwl/lwr instructions. |
# We have to compile it with mips-sgi-irix5 to get it right. |
ifeq (${MACHINE},indy) |
MIPS_TARGET=mips-sgi-irix5 |
MIPS_CC_DIR=/usr/local/mips/bin |
MIPS_BINUTILS_DIR=/usr/local/mips/bin |
CFLAGS += -EB -DBIG_ENDIAN -DHAVE_FPU -DFPU_LAZY -march=r4600 |
BFD = ecoff-bigmips |
KERNEL_LOAD_ADDRESS = 0x88002000 |
BFD_NAME=elf32-bigmips |
endif |
ifeq (${MACHINE},lgxemul) |
CFLAGS += -DHAVE_FPU -DFPU_LAZY -mips3 |
BFD = ecoff-littlemips |
KERNEL_LOAD_ADDRESS = 0x80100000 |
BFD_NAME=elf32-little |
endif |
ifeq (${MACHINE},bgxemul) |
MIPS_TARGET=mips-sgi-irix5 |
MIPS_CC_DIR=/usr/local/mips/bin |
MIPS_BINUTILS_DIR=/usr/local/mips/bin |
CFLAGS += -EB -DBIG_ENDIAN -DHAVE_FPU -DFPU_LAZY -mips3 |
BFD = ecoff-bigmips |
KERNEL_LOAD_ADDRESS = 0x80100000 |
BFD_NAME=elf32-bigmips |
endif |
# MSIM needs lwl/swl patch & 4kc instruction patch to work |
# otherwise add -mmemcpy -mips3 |
ifeq (${MACHINE},msim4kc) |
BFD = binary |
CFLAGS += -mhard-float -march=4kc |
KERNEL_LOAD_ADDRESS = 0x80100000 |
BFD_NAME=elf32-little |
endif |
ifeq (${MACHINE},msim) |
BFD = binary |
CFLAGS += -mhard-float -mips3 |
KERNEL_LOAD_ADDRESS = 0x80100000 |
BFD_NAME=elf32-little |
endif |
# SIMICS 4kc emulation is broken, although for instructions |
# that do not bother us |
ifeq (${MACHINE},simics) |
BFD = elf32-little |
CFLAGS += -mhard-float -mips3 |
KERNEL_LOAD_ADDRESS = 0x80100000 |
BFD_NAME=elf32-little |
endif |
arch/$(ARCH)/_link.ld: arch/$(ARCH)/_link.ld.in |
$(CC) $(CFLAGS) -C -DBFD=${BFD} -E -x c $< | grep -v "^\#" > $@ |
arch_sources= \ |
generic/src/arch/start.S \ |
generic/src/arch/context.S \ |
generic/src/arch/panic.S \ |
generic/src/arch/mips32.c \ |
generic/src/arch/dummy.S \ |
generic/src/arch/console.c \ |
generic/src/arch/asm.S \ |
generic/src/arch/exception.c \ |
generic/src/arch/interrupt.c \ |
generic/src/arch/cache.c \ |
generic/src/arch/cpu/cpu.c \ |
generic/src/arch/mm/asid.c \ |
generic/src/arch/mm/frame.c \ |
generic/src/arch/mm/page.c \ |
generic/src/arch/mm/tlb.c \ |
generic/src/arch/mm/vm.c \ |
generic/src/arch/fpu_context.c \ |
generic/src/arch/fmath.c \ |
generic/src/arch/drivers/arc.c |
/SPARTAN/trunk/arch/mips32/include/arg.h |
---|
0,0 → 1,54 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_ARG_H__ |
#define __mips32_ARG_H__ |
#include <arch/types.h> |
typedef struct va_list { |
int pos; |
__u8 *last; |
} va_list; |
#define va_start(ap, lst) \ |
(ap).pos = sizeof(lst); \ |
(ap).last = (__u8 *) &(lst) |
/** |
* va_arg macro for MIPS32 - problem is that 64 bit values must be aligned on an 8-byte boundary (32bit values not) |
* To satisfy this, paddings must be sometimes inserted. |
*/ |
#define va_arg(ap, type) \ |
(*((type *)((ap).last + ((ap).pos += sizeof(type) + ((sizeof(type)==8)&&(((ap).pos)&(4))?4:0)) - sizeof(type)))) |
#define va_end(ap) |
#endif |
/SPARTAN/trunk/arch/mips32/include/context.h |
---|
0,0 → 1,70 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_CONTEXT_H__ |
#define __mips32_CONTEXT_H__ |
#define STACK_ITEM_SIZE 4 |
/* |
* Put one item onto the stack to support get_stack_base(). |
*/ |
#define SP_DELTA (0+STACK_ITEM_SIZE) |
#ifndef __ASM__ |
#ifndef __mips32_TYPES_H__ |
# include <arch/types.h> |
#endif |
/* |
* Only save registers that must be preserved across |
* function calls. |
*/ |
struct context { |
__address sp; |
__address pc; |
__u32 s0; |
__u32 s1; |
__u32 s2; |
__u32 s3; |
__u32 s4; |
__u32 s5; |
__u32 s6; |
__u32 s7; |
__u32 s8; |
__u32 gp; |
ipl_t ipl; |
}; |
#endif /* __ASM__ */ |
#endif |
/SPARTAN/trunk/arch/mips32/include/types.h |
---|
0,0 → 1,54 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_TYPES_H__ |
#define __mips32_TYPES_H__ |
#define NULL 0 |
typedef signed char __s8; |
typedef unsigned char __u8; |
typedef signed short __s16; |
typedef unsigned short __u16; |
typedef unsigned long __u32; |
typedef signed long __s32; |
typedef unsigned long long __u64; |
typedef signed long long __s64; |
typedef __u32 __address; |
typedef __u32 ipl_t; |
typedef __u32 __native; |
typedef union pte pte_t; |
#endif |
/SPARTAN/trunk/arch/mips32/include/mm/page.h |
---|
0,0 → 1,122 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_PAGE_H__ |
#define __mips32_PAGE_H__ |
#define PAGE_SIZE FRAME_SIZE |
#ifndef __ASM__ |
# define KA2PA(x) (((__address) (x)) - 0x80000000) |
# define PA2KA(x) (((__address) (x)) + 0x80000000) |
#else |
# define KA2PA(x) ((x) - 0x80000000) |
# define PA2KA(x) ((x) + 0x80000000) |
#endif |
/* |
* Implementation of generic 4-level page table interface. |
* NOTE: this implementation is under construction |
* |
* Page table layout: |
* - 32-bit virtual addresses |
* - Offset is 14 bits => pages are 16K long |
* - PTE's use similar format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long |
* - PTE's make use of CP0 EntryLo's two-bit reserved field for bit W (writable) and bit A (accessed) |
* - PTL0 has 64 entries (6 bits) |
* - PTL1 is not used |
* - PTL2 is not used |
* - PTL3 has 4096 entries (12 bits) |
*/ |
#define PTL0_INDEX_ARCH(vaddr) ((vaddr)>>26) |
#define PTL1_INDEX_ARCH(vaddr) 0 |
#define PTL2_INDEX_ARCH(vaddr) 0 |
#define PTL3_INDEX_ARCH(vaddr) (((vaddr)>>14)&0x3fff) |
#define GET_PTL0_ADDRESS_ARCH() (PTL0) |
#define SET_PTL0_ADDRESS_ARCH(ptl0) (PTL0 = (pte_t *)(ptl0)) |
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *)(ptl0))[(i)].lo.pfn<<12) |
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1) |
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2) |
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *)(ptl3))[(i)].lo.pfn<<12) |
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *)(ptl0))[(i)].lo.pfn = (a)>>12) |
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *)(ptl3))[(i)].lo.pfn = (a)>>12) |
#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i)) |
#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT |
#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT |
#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i)) |
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x)) |
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x)) |
#ifndef __ASM__ |
#include <arch/mm/tlb.h> |
#include <mm/page.h> |
#include <arch/mm/frame.h> |
#include <arch/types.h> |
static inline int get_pt_flags(pte_t *pt, index_t i) |
{ |
pte_t *p = &pt[i]; |
return ( |
((p->lo.c>PAGE_UNCACHED)<<PAGE_CACHEABLE_SHIFT) | |
((!p->lo.v)<<PAGE_PRESENT_SHIFT) | |
(1<<PAGE_USER_SHIFT) | |
(1<<PAGE_READ_SHIFT) | |
((p->w)<<PAGE_WRITE_SHIFT) | |
(1<<PAGE_EXEC_SHIFT) |
); |
} |
static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
{ |
pte_t *p = &pt[i]; |
p->lo.c = (flags & PAGE_CACHEABLE) != 0 ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED; |
p->lo.v = !(flags & PAGE_NOT_PRESENT); |
p->w = (flags & PAGE_WRITE) != 0; |
} |
extern void page_arch_init(void); |
extern pte_t *PTL0; |
#endif /* __ASM__ */ |
#endif |
/SPARTAN/trunk/arch/mips32/include/mm/tlb.h |
---|
0,0 → 1,139 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_TLB_H__ |
#define __mips32_TLB_H__ |
#include <arch/exception.h> |
#include <typedefs.h> |
#define TLB_SIZE 48 |
#define TLB_WIRED 1 |
#define TLB_KSTACK_WIRED_INDEX 0 |
#define TLB_PAGE_MASK_16K (0x3<<13) |
#define PAGE_UNCACHED 2 |
#define PAGE_CACHEABLE_EXC_WRITE 5 |
typedef union entry_lo entry_lo_t; |
typedef union entry_hi entry_hi_t; |
typedef union page_mask page_mask_t; |
typedef union index tlb_index_t; |
union entry_lo { |
struct { |
unsigned g : 1; /* global bit */ |
unsigned v : 1; /* valid bit */ |
unsigned d : 1; /* dirty/write-protect bit */ |
unsigned c : 3; /* cache coherency attribute */ |
unsigned pfn : 24; /* frame number */ |
unsigned : 2; /* zero */ |
} __attribute__ ((packed)); |
__u32 value; |
}; |
union pte { |
entry_lo_t lo; |
struct { |
unsigned : 30; |
unsigned w : 1; /* writable */ |
unsigned a : 1; /* accessed */ |
} __attribute__ ((packed)); |
}; |
union entry_hi { |
struct { |
unsigned asid : 8; |
unsigned : 5; |
unsigned vpn2 : 19; |
} __attribute__ ((packed)); |
__u32 value; |
}; |
union page_mask { |
struct { |
unsigned : 13; |
unsigned mask : 12; |
unsigned : 7; |
} __attribute__ ((packed)); |
__u32 value; |
}; |
union index { |
struct { |
unsigned index : 4; |
unsigned : 27; |
unsigned p : 1; |
} __attribute__ ((packed)); |
__u32 value; |
}; |
/** Probe TLB for Matching Entry |
* |
* Probe TLB for Matching Entry. |
*/ |
static inline void tlbp(void) |
{ |
__asm__ volatile ("tlbp\n\t"); |
} |
/** Read Indexed TLB Entry |
* |
* Read Indexed TLB Entry. |
*/ |
static inline void tlbr(void) |
{ |
__asm__ volatile ("tlbr\n\t"); |
} |
/** Write Indexed TLB Entry |
* |
* Write Indexed TLB Entry. |
*/ |
static inline void tlbwi(void) |
{ |
__asm__ volatile ("tlbwi\n\t"); |
} |
/** Write Random TLB Entry |
* |
* Write Random TLB Entry. |
*/ |
static inline void tlbwr(void) |
{ |
__asm__ volatile ("tlbwr\n\t"); |
} |
extern void tlb_invalid(struct exception_regdump *pstate); |
extern void tlb_refill(struct exception_regdump *pstate); |
extern void tlb_modified(struct exception_regdump *pstate); |
#endif |
/SPARTAN/trunk/arch/mips32/include/mm/asid.h |
---|
0,0 → 1,45 |
/* |
* Copyright (C) 2005 Martin Decky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_ASID_H__ |
#define __mips32_ASID_H__ |
#include <arch/types.h> |
#include <typedefs.h> |
#define ASIDS 256 |
#define ASID_INVALID 0 |
#define ASID_START 1 |
typedef __u8 asid_t; |
extern asid_t asid_get(void); |
extern void asid_put(asid_t asid); |
extern bool asid_has_conflicts(asid_t asid); |
#endif |
/SPARTAN/trunk/arch/mips32/include/mm/vm.h |
---|
0,0 → 1,46 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_VM_H__ |
#define __mips32_VM_H__ |
#include <arch/types.h> |
#include <typedefs.h> |
#define KERNEL_ADDRESS_SPACE_START_ARCH (__address) 0x80000000 |
#define KERNEL_ADDRESS_SPACE_END_ARCH (__address) 0xffffffff |
#define USER_ADDRESS_SPACE_START_ARCH (__address) 0x00000000 |
#define USER_ADDRESS_SPACE_END_ARCH (__address) 0x7fffffff |
#define UTEXT_ADDRESS_ARCH 0x00004000 |
#define USTACK_ADDRESS_ARCH (0x80000000-PAGE_SIZE) |
#define UDATA_ADDRESS_ARCH 0x01001000 |
extern void vm_install_arch(vm_t *vm); |
#endif |
/SPARTAN/trunk/arch/mips32/include/mm/frame.h |
---|
0,0 → 1,36 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_FRAME_H__ |
#define __mips32_FRAME_H__ |
#define FRAME_SIZE 16384 |
extern void frame_arch_init(void); |
#endif |
/SPARTAN/trunk/arch/mips32/include/mm/memory_init.h |
---|
0,0 → 1,37 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_MEMORY_INIT_H__ |
#define __mips32_MEMORY_INIT_H__ |
#include <config.h> |
#define get_memory_size() CONFIG_MEMORY_SIZE |
//#define get_memory_size() 150*1024*1024 |
#endif |
/SPARTAN/trunk/arch/mips32/include/cp0.h |
---|
0,0 → 1,103 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_CP0_H__ |
#define __mips32_CP0_H__ |
#include <arch/types.h> |
#include <arch/mm/tlb.h> |
#define cp0_status_ie_enabled_bit (1<<0) |
#define cp0_status_exl_exception_bit (1<<1) |
#define cp0_status_erl_error_bit (1<<2) |
#define cp0_status_um_bit (1<<4) |
#define cp0_status_bev_bootstrap_bit (1<<22) |
#define cp0_status_fpu_bit (1<<29) |
#define cp0_status_im_shift 8 |
#define cp0_status_im_mask 0xff00 |
#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f) |
#define cp0_cause_coperr(cause) ((cause >> 28) & 0x3) |
#define fpu_cop_id 1 |
/* |
* Magic value for use in msim. |
* On AMD Duron 800Mhz, this roughly seems like one us. |
*/ |
#define cp0_compare_value 10000 |
#define cp0_mask_all_int() cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) |
#define cp0_unmask_all_int() cp0_status_write(cp0_status_read() | cp0_status_im_mask) |
#define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1<<(cp0_status_im_shift+(it)))) |
#define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1<<(cp0_status_im_shift+(it)))) |
extern __u32 cp0_index_read(void); |
extern void cp0_index_write(__u32 val); |
extern __u32 cp0_random_read(void); |
extern __u32 cp0_entry_lo0_read(void); |
extern void cp0_entry_lo0_write(__u32 val); |
extern __u32 cp0_entry_lo1_read(void); |
extern void cp0_entry_lo1_write(__u32 val); |
extern __u32 cp0_context_read(void); |
extern void cp0_context_write(__u32 val); |
extern __u32 cp0_pagemask_read(void); |
extern void cp0_pagemask_write(__u32 val); |
extern __u32 cp0_wired_read(void); |
extern void cp0_wired_write(__u32 val); |
extern __u32 cp0_badvaddr_read(void); |
extern volatile __u32 cp0_count_read(void); |
extern void cp0_count_write(__u32 val); |
extern volatile __u32 cp0_entry_hi_read(void); |
extern void cp0_entry_hi_write(__u32 val); |
extern volatile __u32 cp0_compare_read(void); |
extern void cp0_compare_write(__u32 val); |
extern __u32 cp0_status_read(void); |
extern void cp0_status_write(__u32 val); |
extern __u32 cp0_cause_read(void); |
extern void cp0_cause_write(__u32 val); |
extern __u32 cp0_epc_read(void); |
extern void cp0_epc_write(__u32 val); |
extern __u32 cp0_prid_read(void); |
#endif |
/SPARTAN/trunk/arch/mips32/include/memstr.h |
---|
0,0 → 1,39 |
/* |
* Copyright (C) 2005 Sergey Bondari |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_MEMSTR_H__ |
#define __mips32_MEMSTR_H__ |
#define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)); |
extern void memsetw(__address dst, size_t cnt, __u16 x); |
extern void memsetb(__address dst, size_t cnt, __u8 x); |
extern int memcmp(__address src, __address dst, int cnt); |
#endif |
/SPARTAN/trunk/arch/mips32/include/byteorder.h |
---|
0,0 → 1,51 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_BYTEORDER_H__ |
#define __mips32_BYTEORDER_H__ |
#include <arch/types.h> |
#include <byteorder.h> |
#ifdef BIG_ENDIAN |
static inline __u64 __u64_le2host(__u64 n) |
{ |
return __u64_byteorder_swap(n); |
} |
static inline __native __native_le2host(__native n) |
{ |
return __u32_byteorder_swap(n); |
} |
#else |
# define __native_le2host(n) (n) |
# define __u64_le2host(n) (n) |
#endif |
#endif |
/SPARTAN/trunk/arch/mips32/include/drivers/arc.h |
---|
0,0 → 1,216 |
/* |
* Copyright (C) 2005 Ondrej Palkovsky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_ARC_H__ |
#define __mips32_ARC_H__ |
#include <arch/types.h> |
#define ARC_BASE_ADDR 0x1000; |
#define ARC_MAGIC 0x53435241 |
typedef enum { |
SystemClass = 0, |
ProcessorClass, |
CacheClass, |
AdapterClass, |
ControllerClass, |
PeripheralClass, |
MemoryClass |
} arc_component_class; |
typedef enum { |
ARC_type = 0, |
CPU_type, |
FPU_type, |
PrimaryICache, |
PrimaryDCache, |
SecondaryICache, |
SecondaryDCache, |
SecondaryCache, |
Memory, /* Not in NT PROM */ |
EISAAdapter, |
TCAdapter, |
SCSIAdapter, |
DTIAdapter, |
MultiFunctionAdapter, |
DiskController, |
TapeController, |
CDROMController, |
WORMController, |
SerialController, |
NetworkController, |
DisplayController, |
ParallelController, |
PointerController, |
KeyboardController, |
AudioController, |
OtherController, |
DiskPeripheral, |
FloppyDiskPeripheral, |
TapePeripheral, |
ModemPeripheral, |
MonitorPeripheral, |
PrinterPeripheral, |
PointerPeripheral, |
KeyboardPeripheral, |
TerminalPeripheral, |
LinePeripheral, |
NetworkPeripheral, |
OtherPeripheral, |
XTalkAdapter, |
PCIAdapter, |
GIOAdapter, |
TPUAdapter, |
Anonymous |
}arc_component_type; |
typedef enum { |
Failed = 1, |
ReadOnly = 2, |
Removable = 4, |
ConsoleIn = 8, |
ConsoleOut = 16, |
Input = 32, |
Output = 64 |
}arc_component_flags; |
typedef struct { |
arc_component_class class; |
arc_component_type type; |
arc_component_flags flags; |
__u16 revision; |
__u16 version; |
__u32 key; |
__u32 affinitymask; |
__u32 configdatasize; |
__u32 identifier_len; |
char *identifier; |
} __attribute__ ((packed)) arc_component; |
typedef struct { |
__u16 year; |
__u16 month; |
__u16 day; |
__u16 hour; |
__u16 minutes; |
__u16 seconds; |
__u16 mseconds; |
} __attribute__ ((packed)) arc_timeinfo; |
/* This is the SGI block structure, WinNT has it different */ |
typedef enum { |
ExceptionBlock, |
SystemParameterBlock, |
FreeContiguous, |
FreeMemory, |
BadMemory, |
LoadedProgram, |
FirmwareTemporary, |
FirmwarePermanent |
}arc_memorytype_t; |
typedef struct { |
arc_memorytype_t type; |
__u32 basepage; /* *4096 = baseaddr */ |
__u32 basecount; |
}arc_memdescriptor_t; |
typedef struct { |
char vendorid[8]; |
char prodid[8]; |
}arc_sysid_t; |
typedef struct { |
long (*load)(void); /* ... */ |
long (*invoke)(__u32 eaddr,__u32 saddr,__u32 argc,char **argv, |
char **envp); |
long (*execute)(char *path,__u32 argc,char **argv,char **envp); |
void (*halt)(void); |
void (*powerdown)(void); |
void (*restart)(void); |
void (*reboot)(void); |
void (*enterinteractivemode)(void); |
long (*reserved)(void); |
/* 10 */ |
arc_component * (*getpeer)(arc_component *c); |
arc_component * (*getchild)(arc_component *c); |
arc_component * (*getparent)(arc_component *c); |
long (*getconfigurationdata)(void *configdata, arc_component *c); |
long (*addchild)(arc_component *c, arc_component *template, |
void *configdata); |
long (*deletecomponet)(arc_component *current); |
long (*getcomponent)(char *path); |
long (*saveconfiguration)(void); |
arc_sysid_t (*getsystemid)(void); |
arc_memdescriptor_t * (*getmemorydescriptor)(arc_memdescriptor_t *cur); |
/* 20 */ |
long (*reserved2)(void); |
arc_timeinfo * (*gettime)(void); |
__u32 (*getrelativetime)(void); |
long (*getdirectoryentry)(); |
long (*open)(void); /* ... */ |
long (*close)(__u32 fileid); |
long (*read)(__u32 fileid,void *buf,__u32 n,__u32 *cnt); |
long (*getreadstatus)(); |
long (*write)(__u32 fileid, void *buf,__u32 n,__u32 *cnt); |
long (*seek)(void); /* ... */ |
/* 30 */ |
long (*mount)(void); /* ... */ |
char * (*getenvironmentvariable)(char *name); |
char * (*setenvironmentvariable)(char *name, char *value); |
long (*getfileinformation)(void); /* ... */ |
long (*setfileinformation)(__u32 fileid,__u32 attflags,__u32 attmask); |
void (*flushallcaches)(void); |
long (*testunicodecharacter)(void); /* ... */ |
long (*getdisplaystatus)(void); /* ... */ |
} arc_func_vector_t; |
typedef struct { |
__u32 signature; |
__u32 length; |
__u16 version; |
__u16 revision; |
void *restartblock; |
void *debugblock; |
void *gevector; |
void *utlbmissvector; |
__u32 firmwarevectorlen; |
arc_func_vector_t *firmwarevector; |
__u32 privvectorlen; |
void *privvector; |
__u32 adaptercount; |
}__attribute__ ((packed)) arc_sbp; |
extern int init_arc(void); |
extern void arc_print_memory_map(void); |
extern int arc_enabled(void); |
extern void arc_putchar(char ch); |
extern void arc_print_devices(void); |
#endif |
/SPARTAN/trunk/arch/mips32/include/asm/regname.h |
---|
0,0 → 1,89 |
/* |
* Copyright (C) 2005 Ondrej Palkovsky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_REGNAME_H_ |
#define __mips32_REGNAME_H_ |
#define zero 0 |
#define at 1 |
#define v0 2 |
#define v1 3 |
#define a0 4 |
#define a1 5 |
#define a2 6 |
#define a3 7 |
#define t0 8 |
#define t1 9 |
#define t2 10 |
#define t3 11 |
#define t4 12 |
#define t5 13 |
#define t6 14 |
#define t7 15 |
#define s0 16 |
#define s1 17 |
#define s2 18 |
#define s3 19 |
#define s4 20 |
#define s5 21 |
#define s6 22 |
#define s7 23 |
#define t8 24 |
#define t9 25 |
#define k0 26 |
#define k1 27 |
#define gp 28 |
#define sp 29 |
#define s8 30 |
#define ra 31 |
#define index 0 |
#define random 1 |
#define entrylo0 2 |
#define entrylo1 3 |
#define context 4 |
#define pagemask 5 |
#define wired 6 |
#define badvaddr 8 |
#define count 9 |
#define entryhi 10 |
#define compare 11 |
#define status 12 |
#define cause 13 |
#define epc 14 |
#define config 16 |
#define lladdr 17 |
#define watchlo 18 |
#define watchhi 19 |
#define xcontext 20 |
#define debug 23 |
#define depc 24 |
#define eepc 30 |
#endif /* _REGNAME_H_ */ |
/SPARTAN/trunk/arch/mips32/include/asm/boot.h |
---|
0,0 → 1,36 |
/* |
* Copyright (C) 2005 Ondrej Palkovsky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_BOOT_H_ |
#define __mips32_BOOT_H_ |
/* Temporary stack size for boot process */ |
#define TEMP_STACK_SIZE 0x100 |
#endif |
/SPARTAN/trunk/arch/mips32/include/interrupt.h |
---|
0,0 → 1,38 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_INTERRUPT_H__ |
#define __mips32_INTERRUPT_H__ |
#include <arch/exception.h> |
#define TIMER_INTERRUPT 7 |
extern void interrupt(struct exception_regdump *pstate); |
#endif |
/SPARTAN/trunk/arch/mips32/include/exception.h |
---|
0,0 → 1,97 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_EXCEPTION_H__ |
#define __mips32_EXCEPTION_H__ |
#ifndef __mips32_TYPES_H__ |
# include <arch/types.h> |
#endif |
#define EXC_Int 0 |
#define EXC_Mod 1 |
#define EXC_TLBL 2 |
#define EXC_TLBS 3 |
#define EXC_AdEL 4 |
#define EXC_AdES 5 |
#define EXC_IBE 6 |
#define EXC_DBE 7 |
#define EXC_Sys 8 |
#define EXC_Bp 9 |
#define EXC_RI 10 |
#define EXC_CpU 11 |
#define EXC_Ov 12 |
#define EXC_Tr 13 |
#define EXC_VCEI 14 |
#define EXC_FPE 15 |
#define EXC_WATCH 23 |
#define EXC_VCED 31 |
struct exception_regdump { |
__u32 at; |
__u32 v0; |
__u32 v1; |
__u32 a0; |
__u32 a1; |
__u32 a2; |
__u32 a3; |
__u32 t0; |
__u32 t1; |
__u32 t2; |
__u32 t3; |
__u32 t4; |
__u32 t5; |
__u32 t6; |
__u32 t7; |
__u32 s0; |
__u32 s1; |
__u32 s2; |
__u32 s3; |
__u32 s4; |
__u32 s5; |
__u32 s6; |
__u32 s7; |
__u32 t8; |
__u32 t9; |
__u32 gp; |
__u32 sp; |
__u32 s8; |
__u32 ra; |
__u32 lo; |
__u32 hi; |
__u32 status; /* cp0_status */ |
__u32 epc; /* cp0_epc */ |
}; |
extern void exception(struct exception_regdump *pstate); |
extern void tlb_refill_entry(void); |
extern void exception_entry(void); |
extern void cache_error_entry(void); |
#endif |
/SPARTAN/trunk/arch/mips32/include/fpu_context.h |
---|
0,0 → 1,39 |
/* |
* Copyright (C) 2005 Jakub Vana |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_FPU_CONTEXT_H__ |
#define __mips32_FPU_CONTEXT_H__ |
#include <arch/types.h> |
struct fpu_context { |
__native dregs[32]; |
__native cregs[32]; |
}; |
#endif |
/SPARTAN/trunk/arch/mips32/include/fmath.h |
---|
0,0 → 1,69 |
/* |
* Copyright (C) 2005 Josef Cejka |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_FMATH_H__ |
#define __mips32_FMATH_H__ |
#include <arch/types.h> |
#define FMATH_EXPONENT_BIAS 1023 |
typedef unsigned char fmath_ld_descr_t[8]; |
typedef union { double bf; unsigned char ldd[8]; } fmath_ld_union_t; |
/**returns exponent in binary encoding*/ |
signed short fmath_get_binary_exponent(double num); |
/**returns exponent in decimal encoding*/ |
double fmath_get_decimal_exponent(double num); |
/**returns mantisa in binary encoding */ |
__u64 fmath_get_binary_mantisa(double num) ; |
/** Function for extract integer part from double |
* @param num input value |
* @param intp integer part of num |
* @return non-integer part |
*/ |
double fmath_fint(double num, double *intp); |
/** count base^exponent from positive exponent |
* @param base |
* @param exponent - Must be > 0.0 |
* @return base^exponent or 0.0 (if exponent <=0.0) |
*/ |
double fmath_dpow(double base, double exponent) ; |
/** return 1, if num is NaN */ |
int fmath_is_nan(double num); |
/** return 1, if fmath is a infinity */ |
int fmath_is_infinity(double num); |
#endif |
/SPARTAN/trunk/arch/mips32/include/console.h |
---|
0,0 → 1,41 |
/* |
* Copyright (C) 2005 Martin Decky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_CONSOLE_H__ |
#define __mips32_CONSOLE_H__ |
#define VIDEORAM 0xB0000000 |
#define SERIAL_PORT_BASE ((char *) 0xB80003f8 ) |
#define SERIAL_LSR ((char *) (SERIAL_PORT_BASE + 5)) |
#define TRANSMIT_EMPTY_BIT 5 |
void console_init(void); |
#endif |
/SPARTAN/trunk/arch/mips32/include/cache.h |
---|
0,0 → 1,34 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_CACHE_H__ |
#define __mips32_CACHE_H__ |
extern void cache_error(void); |
#endif |
/SPARTAN/trunk/arch/mips32/include/thread.h |
---|
0,0 → 1,36 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_THREAD_H__ |
#define __mips32_THREAD_H__ |
#include <arch/exception.h> |
#define ARCH_THREAD_DATA struct exception_regdump *pstate |
#endif |
/SPARTAN/trunk/arch/mips32/include/atomic.h |
---|
0,0 → 1,96 |
/* |
* Copyright (C) 2005 Ondrej Palkovsky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_ATOMIC_H__ |
#define __mips32_ATOMIC_H__ |
#define atomic_inc(x) (a_add(x,1)) |
#define atomic_dec(x) (a_sub(x,1)) |
/* |
* Atomic addition |
* |
* This case is harder, and we have to use the special LL and SC operations |
* to achieve atomicity. The instructions are similar to LW (load) and SW |
* (store), except that the LL (load-linked) instruction loads the address |
* of the variable to a special register and if another process writes to |
* the same location, the SC (store-conditional) instruction fails. |
*/ |
static inline int a_add( volatile int *val, int i) |
{ |
int tmp, tmp2; |
asm volatile ( |
" .set push\n" |
" .set noreorder\n" |
" nop\n" |
"1:\n" |
" ll %0, %1\n" |
" addu %0, %0, %3\n" |
" move %2, %0\n" |
" sc %0, %1\n" |
" beq %0, 0x0, 1b\n" |
" move %0, %2\n" |
" .set pop\n" |
: "=&r" (tmp), "=o" (*val), "=r" (tmp2) |
: "r" (i) |
); |
return tmp; |
} |
/* |
* Atomic subtraction |
* |
* Implemented in the same manner as a_add, except we substract the value. |
*/ |
static inline int a_sub( volatile int *val, int i) |
{ |
int tmp, tmp2; |
asm volatile ( |
" .set push\n" |
" .set noreorder\n" |
" nop\n" |
"1:\n" |
" ll %0, %1\n" |
" subu %0, %0, %3\n" |
" move %2, %0\n" |
" sc %0, %1\n" |
" beq %0, 0x0, 1b\n" |
" move %0, %2\n" |
" .set pop\n" |
: "=&r" (tmp), "=o" (*val), "=r" (tmp2) |
: "r" (i) |
); |
return tmp; |
} |
#endif |
/SPARTAN/trunk/arch/mips32/include/arch.h |
---|
0,0 → 1,32 |
/* |
* Copyright (C) 2005 Martin Decky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_ARCH_H__ |
#define __mips32_ARCH_H__ |
#endif |
/SPARTAN/trunk/arch/mips32/include/faddr.h |
---|
0,0 → 1,36 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_FADDR_H__ |
#define __mips32_FADDR_H__ |
#include <arch/types.h> |
#define FADDR(fptr) ((__address) (fptr)) |
#endif |
/SPARTAN/trunk/arch/mips32/include/asm.h |
---|
0,0 → 1,62 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_ASM_H__ |
#define __mips32_ASM_H__ |
#include <arch/types.h> |
#include <typedefs.h> |
#include <config.h> |
static inline void cpu_sleep(void) |
{ |
/* Most of the simulators do not support */ |
/* __asm__ volatile ("wait"); */ |
} |
/** Return base address of current stack |
* |
* Return the base address of the current stack. |
* The stack is assumed to be STACK_SIZE bytes long. |
* The stack must start on page boundary. |
*/ |
static inline __address get_stack_base(void) |
{ |
__address v; |
__asm__ volatile ("and %0, $29, %1\n" : "=r" (v) : "r" (~(STACK_SIZE-1))); |
return v; |
} |
extern void cpu_halt(void); |
extern void asm_delay_loop(__u32 t); |
extern void userspace_asm(__address ustack); |
#endif |
/SPARTAN/trunk/arch/mips32/include/debug.h |
---|
0,0 → 1,45 |
/* |
* Copyright (C) 2005 Ondrej Palkovsky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_DEBUG_H__ |
#define __mips23_DEBUG_H__ |
/** simulator enters the trace mode */ |
#define ___traceon() asm volatile ( "\t.word\t0x39\n"); |
/** simulator leaves the trace mode */ |
#define ___traceoff() asm volatile ( "\t.word\t0x3d\n"); |
/** register dump */ |
#define ___regview() asm volatile ( "\t.word\t0x37\n"); |
/** halt the simulator */ |
#define ___halt() asm volatile ( "\t.word\t0x28\n"); |
/** simulator enters interactive mode */ |
#define ___intmode() asm volatile ( "\t.word\t0x29\n"); |
#endif |
/SPARTAN/trunk/arch/mips32/include/barrier.h |
---|
0,0 → 1,42 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_BARRIER_H__ |
#define __mips32_BARRIER_H__ |
/* |
* TODO: implement true MIPS memory barriers for macros below. |
*/ |
#define CS_ENTER_BARRIER() __asm__ volatile ("" ::: "memory") |
#define CS_LEAVE_BARRIER() __asm__ volatile ("" ::: "memory") |
#define memory_barrier() |
#define read_barrier() |
#define write_barrier() |
#endif |
/SPARTAN/trunk/arch/mips32/include/cpu.h |
---|
0,0 → 1,37 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_CPU_H__ |
#define __mips32_CPU_H__ |
struct cpu_arch { |
int imp_num; |
int rev_num; |
}; |
#endif |
/SPARTAN/trunk/arch/mips32/_link.ld.in |
---|
0,0 → 1,62 |
/* |
* MIPS32 linker script |
* |
* kernel text |
* kernel data |
* |
*/ |
#undef mips |
#define mips mips |
OUTPUT_FORMAT(BFD) |
OUTPUT_ARCH(mips) |
ENTRY(kernel_image_start) |
SECTIONS { |
. = KERNEL_LOAD_ADDRESS; |
.text : { |
ktext_start = .; |
*(.text); |
ktext_end = .; |
} |
.data : { |
kdata_start = .; |
*(.data); /* initialized data */ |
hardcoded_ktext_size = .; |
LONG(ktext_end - ktext_start); |
hardcoded_kdata_size = .; |
LONG(kdata_end - kdata_start); |
hardcoded_load_address = .; |
LONG(KERNEL_LOAD_ADDRESS); |
*(.rodata*); |
*(.sdata); |
*(.reginfo); |
/* Unfortunately IRIX does not allow us |
* to include this as a last section :-( |
* BSS/SBSS addresses will be wrong */ |
symbol_table = .; |
*(symtab.*); |
} |
_gp = . + 0x8000; |
.lit8 : { *(.lit8) } |
.lit4 : { *(.lit4) } |
.sbss : { |
*(.sbss); |
*(.scommon); |
} |
.bss : { |
*(.bss); /* uninitialized static variables */ |
*(COMMON); /* global variables */ |
} |
kdata_end = .; |
/DISCARD/ : { |
*(.mdebug*); |
*(.pdr); |
*(.comment); |
*(.note); |
} |
} |
/SPARTAN/trunk/arch/mips32/src/context.S |
---|
0,0 → 1,87 |
# |
# Copyright (C) 2003-2004 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
#define __ASM__ |
#include <arch/asm/regname.h> |
#include <arch/context_offset.h> |
.text |
.set noat |
.set noreorder |
.set nomacro |
.global context_save_arch |
.global context_restore_arch |
.macro CONTEXT_STORE r |
sw $s0,OFFSET_S0(\r) |
sw $s1,OFFSET_S1(\r) |
sw $s2,OFFSET_S2(\r) |
sw $s3,OFFSET_S3(\r) |
sw $s4,OFFSET_S4(\r) |
sw $s5,OFFSET_S5(\r) |
sw $s6,OFFSET_S6(\r) |
sw $s7,OFFSET_S7(\r) |
sw $s8,OFFSET_S7(\r) |
sw $gp,OFFSET_GP(\r) |
sw $ra,OFFSET_PC(\r) |
sw $sp,OFFSET_SP(\r) |
.endm |
.macro CONTEXT_LOAD r |
lw $s0,OFFSET_S0(\r) |
lw $s1,OFFSET_S1(\r) |
lw $s2,OFFSET_S2(\r) |
lw $s3,OFFSET_S3(\r) |
lw $s4,OFFSET_S4(\r) |
lw $s5,OFFSET_S5(\r) |
lw $s6,OFFSET_S6(\r) |
lw $s7,OFFSET_S7(\r) |
lw $s8,OFFSET_S7(\r) |
lw $gp,OFFSET_GP(\r) |
lw $ra,OFFSET_PC(\r) |
lw $sp,OFFSET_SP(\r) |
.endm |
context_save_arch: |
CONTEXT_STORE $a0 |
# context_save returns 1 |
j $31 |
li $2, 1 |
context_restore_arch: |
CONTEXT_LOAD $a0 |
# context_restore returns 0 |
j $31 |
xor $2, $2 |
/SPARTAN/trunk/arch/mips32/src/exception.c |
---|
0,0 → 1,137 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/exception.h> |
#include <arch/interrupt.h> |
#include <panic.h> |
#include <arch/cp0.h> |
#include <arch/types.h> |
#include <arch.h> |
#include <debug.h> |
#include <proc/thread.h> |
void exception(struct exception_regdump *pstate) |
{ |
int cause; |
int excno; |
__u32 epc_shift = 0; |
ASSERT(CPU != NULL); |
/* |
* NOTE ON OPERATION ORDERING |
* |
* On entry, interrupts_disable() must be called before |
* exception bit is cleared. |
*/ |
interrupts_disable(); |
cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit | |
cp0_status_um_bit)); |
/* Save pstate so that the threads can access it */ |
/* If THREAD->pstate is set, this is nested exception, |
* do not rewrite it |
*/ |
if (THREAD && !THREAD->pstate) |
THREAD->pstate = pstate; |
cause = cp0_cause_read(); |
excno = cp0_cause_excno(cause); |
/* decode exception number and process the exception */ |
switch (excno) { |
case EXC_Int: |
interrupt(pstate); |
break; |
case EXC_TLBL: |
case EXC_TLBS: |
tlb_invalid(pstate); |
break; |
case EXC_CpU: |
#ifdef FPU_LAZY |
if (cp0_cause_coperr(cause) == fpu_cop_id) |
scheduler_fpu_lazy_request(); |
else |
#endif |
panic("unhandled Coprocessor Unusable Exception\n"); |
break; |
case EXC_Mod: |
tlb_modified(pstate); |
break; |
case EXC_AdEL: |
panic("unhandled Address Error Exception - load or instruction fetch\n"); |
break; |
case EXC_AdES: |
panic("unhandled Address Error Exception - store\n"); |
break; |
case EXC_IBE: |
panic("unhandled Bus Error Exception - fetch instruction\n"); |
break; |
case EXC_DBE: |
panic("unhandled Bus Error Exception - data reference: load or store\n"); |
break; |
case EXC_Bp: |
/* it is necessary to not re-execute BREAK instruction after returning from Exception handler |
(see page 138 in R4000 Manual for more information) */ |
epc_shift = 4; |
break; |
case EXC_RI: |
panic("unhandled Reserved Instruction Exception\n"); |
break; |
case EXC_Ov: |
panic("unhandled Arithmetic Overflow Exception\n"); |
break; |
case EXC_Tr: |
panic("unhandled Trap Exception\n"); |
break; |
case EXC_VCEI: |
panic("unhandled Virtual Coherency Exception - instruction\n"); |
break; |
case EXC_FPE: |
panic("unhandled Floating-Point Exception\n"); |
break; |
case EXC_WATCH: |
panic("unhandled reference to WatchHi/WatchLo address\n"); |
break; |
case EXC_VCED: |
panic("unhandled Virtual Coherency Exception - data\n"); |
break; |
default: |
panic("unhandled exception %d\n", excno); |
} |
pstate->epc += epc_shift; |
/* Set to NULL, so that we can still support nested |
* exceptions |
* TODO: We should probably set EXL bit before this command, |
* nesting. On the other hand, if some exception occurs between |
* here and ERET, it won't set anything on the pstate anyway. |
*/ |
if (THREAD) |
THREAD->pstate = NULL; |
} |
/SPARTAN/trunk/arch/mips32/src/mm/asid.c |
---|
0,0 → 1,120 |
/* |
* Copyright (C) 2005 Martin Decky |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/mm/asid.h> |
#include <synch/spinlock.h> |
#include <arch.h> |
#include <debug.h> |
#include <typedefs.h> |
static spinlock_t asid_usage_lock; |
static count_t asid_usage[ASIDS]; /**< Usage tracking array for ASIDs */ |
/** Get ASID |
* |
* Get the least used ASID. |
* |
* @return ASID |
*/ |
asid_t asid_get(void) |
{ |
ipl_t ipl; |
int i, j; |
count_t min; |
min = (unsigned) -1; |
ipl = interrupts_disable(); |
spinlock_lock(&asid_usage_lock); |
for (i = ASID_START, j = ASID_START; i < ASIDS; i++) { |
if (asid_usage[i] < min) { |
j = i; |
min = asid_usage[i]; |
if (!min) |
break; |
} |
} |
asid_usage[j]++; |
spinlock_unlock(&asid_usage_lock); |
interrupts_restore(ipl); |
return i; |
} |
/** Release ASID |
* |
* Release ASID by decrementing its usage count. |
* |
* @param asid ASID. |
*/ |
void asid_put(asid_t asid) |
{ |
ipl_t ipl; |
ipl = interrupts_disable(); |
spinlock_lock(&asid_usage_lock); |
ASSERT(asid != ASID_INVALID); |
ASSERT(asid_usage[asid] > 0); |
asid_usage[asid]--; |
spinlock_unlock(&asid_usage_lock); |
interrupts_restore(ipl); |
} |
/** Find out whether ASID is used by more address spaces |
* |
* Find out whether ASID is used by more address spaces. |
* |
* @param asid ASID in question. |
* |
* @return True if 'asid' is used by more address spaces, false otherwise. |
*/ |
bool asid_has_conflicts(asid_t asid) |
{ |
bool has_conflicts = false; |
ipl_t ipl; |
ASSERT(asid != ASID_INVALID); |
ipl = interrupts_disable(); |
spinlock_lock(&asid_usage_lock); |
if (asid_usage[asid] > 1) |
has_conflicts = true; |
spinlock_unlock(&asid_usage_lock); |
interrupts_restore(ipl); |
return has_conflicts; |
} |
/SPARTAN/trunk/arch/mips32/src/mm/tlb.c |
---|
0,0 → 1,400 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/mm/tlb.h> |
#include <arch/mm/asid.h> |
#include <mm/tlb.h> |
#include <mm/page.h> |
#include <mm/vm.h> |
#include <arch/cp0.h> |
#include <panic.h> |
#include <arch.h> |
#include <symtab.h> |
#include <synch/spinlock.h> |
#include <print.h> |
#include <debug.h> |
static void tlb_refill_fail(struct exception_regdump *pstate); |
static void tlb_invalid_fail(struct exception_regdump *pstate); |
static void tlb_modified_fail(struct exception_regdump *pstate); |
static pte_t *find_mapping_and_check(__address badvaddr); |
static void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, int c, __address pfn); |
static void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr); |
/** Initialize TLB |
* |
* Initialize TLB. |
* Invalidate all entries and mark wired entries. |
*/ |
void tlb_init_arch(void) |
{ |
int i; |
cp0_pagemask_write(TLB_PAGE_MASK_16K); |
cp0_entry_hi_write(0); |
cp0_entry_lo0_write(0); |
cp0_entry_lo1_write(0); |
/* |
* Invalidate all entries. |
*/ |
for (i = 0; i < TLB_SIZE; i++) { |
cp0_index_write(i); |
tlbwi(); |
} |
/* |
* The kernel is going to make use of some wired |
* entries (e.g. mapping kernel stacks in kseg3). |
*/ |
cp0_wired_write(TLB_WIRED); |
} |
/** Process TLB Refill Exception |
* |
* Process TLB Refill Exception. |
* |
* @param pstate Interrupted register context. |
*/ |
void tlb_refill(struct exception_regdump *pstate) |
{ |
entry_lo_t lo; |
entry_hi_t hi; |
__address badvaddr; |
pte_t *pte; |
badvaddr = cp0_badvaddr_read(); |
spinlock_lock(&VM->lock); |
pte = find_mapping_and_check(badvaddr); |
if (!pte) |
goto fail; |
/* |
* Record access to PTE. |
*/ |
pte->a = 1; |
prepare_entry_hi(&hi, VM->asid, badvaddr); |
prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->lo.d, pte->lo.c, pte->lo.pfn); |
/* |
* New entry is to be inserted into TLB |
*/ |
cp0_entry_hi_write(hi.value); |
if ((badvaddr/PAGE_SIZE) % 2 == 0) { |
cp0_entry_lo0_write(lo.value); |
cp0_entry_lo1_write(0); |
} |
else { |
cp0_entry_lo0_write(0); |
cp0_entry_lo1_write(lo.value); |
} |
tlbwr(); |
spinlock_unlock(&VM->lock); |
return; |
fail: |
spinlock_unlock(&VM->lock); |
tlb_refill_fail(pstate); |
} |
/** Process TLB Invalid Exception |
* |
* Process TLB Invalid Exception. |
* |
* @param pstate Interrupted register context. |
*/ |
void tlb_invalid(struct exception_regdump *pstate) |
{ |
tlb_index_t index; |
__address badvaddr; |
entry_lo_t lo; |
entry_hi_t hi; |
pte_t *pte; |
badvaddr = cp0_badvaddr_read(); |
/* |
* Locate the faulting entry in TLB. |
*/ |
hi.value = cp0_entry_hi_read(); |
prepare_entry_hi(&hi, hi.asid, badvaddr); |
cp0_entry_hi_write(hi.value); |
tlbp(); |
index.value = cp0_index_read(); |
spinlock_lock(&VM->lock); |
/* |
* Fail if the entry is not in TLB. |
*/ |
if (index.p) { |
printf("TLB entry not found.\n"); |
goto fail; |
} |
pte = find_mapping_and_check(badvaddr); |
if (!pte) |
goto fail; |
/* |
* Read the faulting TLB entry. |
*/ |
tlbr(); |
/* |
* Record access to PTE. |
*/ |
pte->a = 1; |
prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->lo.d, pte->lo.c, pte->lo.pfn); |
/* |
* The entry is to be updated in TLB. |
*/ |
if ((badvaddr/PAGE_SIZE) % 2 == 0) |
cp0_entry_lo0_write(lo.value); |
else |
cp0_entry_lo1_write(lo.value); |
tlbwi(); |
spinlock_unlock(&VM->lock); |
return; |
fail: |
spinlock_unlock(&VM->lock); |
tlb_invalid_fail(pstate); |
} |
/** Process TLB Modified Exception |
* |
* Process TLB Modified Exception. |
* |
* @param pstate Interrupted register context. |
*/ |
void tlb_modified(struct exception_regdump *pstate) |
{ |
tlb_index_t index; |
__address badvaddr; |
entry_lo_t lo; |
entry_hi_t hi; |
pte_t *pte; |
badvaddr = cp0_badvaddr_read(); |
/* |
* Locate the faulting entry in TLB. |
*/ |
hi.value = cp0_entry_hi_read(); |
prepare_entry_hi(&hi, hi.asid, badvaddr); |
cp0_entry_hi_write(hi.value); |
tlbp(); |
index.value = cp0_index_read(); |
spinlock_lock(&VM->lock); |
/* |
* Fail if the entry is not in TLB. |
*/ |
if (index.p) { |
printf("TLB entry not found.\n"); |
goto fail; |
} |
pte = find_mapping_and_check(badvaddr); |
if (!pte) |
goto fail; |
/* |
* Fail if the page is not writable. |
*/ |
if (!pte->w) |
goto fail; |
/* |
* Read the faulting TLB entry. |
*/ |
tlbr(); |
/* |
* Record access and write to PTE. |
*/ |
pte->a = 1; |
pte->lo.d = 1; |
prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->w, pte->lo.c, pte->lo.pfn); |
/* |
* The entry is to be updated in TLB. |
*/ |
if ((badvaddr/PAGE_SIZE) % 2 == 0) |
cp0_entry_lo0_write(lo.value); |
else |
cp0_entry_lo1_write(lo.value); |
tlbwi(); |
spinlock_unlock(&VM->lock); |
return; |
fail: |
spinlock_unlock(&VM->lock); |
tlb_modified_fail(pstate); |
} |
void tlb_refill_fail(struct exception_regdump *pstate) |
{ |
char *symbol = ""; |
char *sym2 = ""; |
char *s = get_symtab_entry(pstate->epc); |
if (s) |
symbol = s; |
s = get_symtab_entry(pstate->ra); |
if (s) |
sym2 = s; |
panic("%X: TLB Refill Exception at %X(%s<-%s)\n", cp0_badvaddr_read(), pstate->epc, symbol, sym2); |
} |
void tlb_invalid_fail(struct exception_regdump *pstate) |
{ |
char *symbol = ""; |
char *s = get_symtab_entry(pstate->epc); |
if (s) |
symbol = s; |
panic("%X: TLB Invalid Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol); |
} |
void tlb_modified_fail(struct exception_regdump *pstate) |
{ |
char *symbol = ""; |
char *s = get_symtab_entry(pstate->epc); |
if (s) |
symbol = s; |
panic("%X: TLB Modified Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol); |
} |
/** Invalidate TLB entries with specified ASID |
* |
* Invalidate TLB entries with specified ASID. |
* |
* @param asid ASID. |
*/ |
void tlb_invalidate(asid_t asid) |
{ |
entry_hi_t hi; |
ipl_t ipl; |
int i; |
ASSERT(asid != ASID_INVALID); |
ipl = interrupts_disable(); |
for (i = 0; i < TLB_SIZE; i++) { |
cp0_index_write(i); |
tlbr(); |
hi.value = cp0_entry_hi_read(); |
if (hi.asid == asid) { |
cp0_pagemask_write(TLB_PAGE_MASK_16K); |
cp0_entry_hi_write(0); |
cp0_entry_lo0_write(0); |
cp0_entry_lo1_write(0); |
tlbwi(); |
} |
} |
interrupts_restore(ipl); |
} |
/** Try to find PTE for faulting address |
* |
* Try to find PTE for faulting address. |
* The VM->lock must be held on entry to this function. |
* |
* @param badvaddr Faulting virtual address. |
* |
* @return PTE on success, NULL otherwise. |
*/ |
pte_t *find_mapping_and_check(__address badvaddr) |
{ |
entry_hi_t hi; |
pte_t *pte; |
hi.value = cp0_entry_hi_read(); |
/* |
* Handler cannot succeed if the ASIDs don't match. |
*/ |
if (hi.asid != VM->asid) { |
printf("EntryHi.asid=%d, VM->asid=%d\n", hi.asid, VM->asid); |
return NULL; |
} |
/* |
* Handler cannot succeed if badvaddr has no mapping. |
*/ |
pte = find_mapping(badvaddr, 0); |
if (!pte) { |
printf("No such mapping.\n"); |
return NULL; |
} |
/* |
* Handler cannot succeed if the mapping is marked as invalid. |
*/ |
if (!pte->lo.v) { |
printf("Invalid mapping.\n"); |
return NULL; |
} |
return pte; |
} |
void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, int c, __address pfn) |
{ |
lo->value = 0; |
lo->g = g; |
lo->v = v; |
lo->d = d; |
lo->c = c; |
lo->pfn = pfn; |
} |
void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr) |
{ |
hi->value = (((addr/PAGE_SIZE)/2)*PAGE_SIZE*2); |
hi->asid = asid; |
} |
/SPARTAN/trunk/arch/mips32/src/mm/vm.c |
---|
0,0 → 1,54 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/mm/vm.h> |
#include <arch/mm/tlb.h> |
#include <mm/vm.h> |
#include <arch/cp0.h> |
#include <arch.h> |
/** Install ASID of the current VM |
* |
* Install ASID of the current VM. |
* |
* @param vm VM structure. |
*/ |
void vm_install_arch(vm_t *vm) |
{ |
entry_hi_t hi; |
ipl_t ipl; |
hi.value = cp0_entry_hi_read(); |
ipl = interrupts_disable(); |
spinlock_lock(&vm->lock); |
hi.asid = vm->asid; |
cp0_entry_hi_write(hi.value); |
spinlock_lock(&vm->unlock); |
interrupts_restore(ipl); |
} |
/SPARTAN/trunk/arch/mips32/src/mm/frame.c |
---|
0,0 → 1,48 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/mm/frame.h> |
#include <mm/frame.h> |
#include <arch/asm/boot.h> |
#include <arch/mm/page.h> |
#include <config.h> |
#include <panic.h> |
void frame_arch_init(void) |
{ |
zone_t *z; |
z = zone_create(0, config.memory_size, 0); |
if (!z) { |
panic("Can't allocate zone (%dB).\n", config.memory_size); |
} |
zone_attach(z); |
/* Disable Everything until load address */ |
frame_region_not_free(0, KA2PA(KERNEL_LOAD_ADDRESS)); |
} |
/SPARTAN/trunk/arch/mips32/src/mm/page.c |
---|
0,0 → 1,46 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/types.h> |
#include <arch/mm/page.h> |
#include <arch/mm/frame.h> |
#include <mm/frame.h> |
#include <mm/page.h> |
#include <memstr.h> |
pte_t *PTL0 = NULL; |
void page_arch_init(void) |
{ |
__address ptl0; |
ptl0 = frame_alloc(FRAME_KA | FRAME_PANIC); |
memsetb(ptl0, FRAME_SIZE, 0); |
SET_PTL0_ADDRESS(KA2PA(ptl0)); |
} |
/SPARTAN/trunk/arch/mips32/src/interrupt.c |
---|
0,0 → 1,129 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/interrupt.h> |
#include <arch/types.h> |
#include <arch.h> |
#include <arch/cp0.h> |
#include <time/clock.h> |
#include <panic.h> |
#include <print.h> |
#include <symtab.h> |
#include <arch/drivers/arc.h> |
static void print_regdump(struct exception_regdump *pstate) |
{ |
char *pcsymbol = ""; |
char *rasymbol = ""; |
char *s = get_symtab_entry(pstate->epc); |
if (s) |
pcsymbol = s; |
s = get_symtab_entry(pstate->ra); |
if (s) |
rasymbol = s; |
printf("PC: %X(%s) RA: %X(%s)\n",pstate->epc,pcsymbol, |
pstate->ra,rasymbol); |
} |
/** Disable interrupts. |
* |
* @return Old interrupt priority level. |
*/ |
ipl_t interrupts_disable(void) |
{ |
ipl_t ipl = (ipl_t) cp0_status_read(); |
cp0_status_write(ipl & ~cp0_status_ie_enabled_bit); |
return ipl; |
} |
/** Enable interrupts. |
* |
* @return Old interrupt priority level. |
*/ |
ipl_t interrupts_enable(void) |
{ |
ipl_t ipl = (ipl_t) cp0_status_read(); |
cp0_status_write(ipl | cp0_status_ie_enabled_bit); |
return ipl; |
} |
/** Restore interrupt priority level. |
* |
* @param ipl Saved interrupt priority level. |
*/ |
void interrupts_restore(ipl_t ipl) |
{ |
cp0_status_write(cp0_status_read() | (ipl & cp0_status_ie_enabled_bit)); |
} |
/** Read interrupt priority level. |
* |
* @return Current interrupt priority level. |
*/ |
ipl_t interrupts_read(void) |
{ |
return cp0_status_read(); |
} |
void interrupt(struct exception_regdump *pstate) |
{ |
__u32 cause; |
int i; |
/* decode interrupt number and process the interrupt */ |
cause = (cp0_cause_read() >> 8) &0xff; |
for (i = 0; i < 8; i++) { |
if (cause & (1 << i)) { |
switch (i) { |
case 0: /* SW0 - Software interrupt 0 */ |
cp0_cause_write(cp0_cause_read() & ~(1 << 8)); /* clear SW0 interrupt */ |
break; |
case 1: /* SW1 - Software interrupt 1 */ |
cp0_cause_write(cp0_cause_read() & ~(1 << 9)); /* clear SW1 interrupt */ |
break; |
case 2: /* IRQ0 */ |
case 3: /* IRQ1 */ |
case 4: /* IRQ2 */ |
case 5: /* IRQ3 */ |
case 6: /* IRQ4 */ |
print_regdump(pstate); |
panic("unhandled interrupt %d\n", i); |
break; |
case TIMER_INTERRUPT: |
/* clear timer interrupt & set new */ |
cp0_compare_write(cp0_count_read() + cp0_compare_value); |
clock(); |
break; |
} |
} |
} |
} |
/SPARTAN/trunk/arch/mips32/src/drivers/arc.c |
---|
0,0 → 1,185 |
/* |
* Copyright (C) 2005 Ondrej Palkovsky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/drivers/arc.h> |
#include <arch/mm/page.h> |
#include <print.h> |
#include <arch.h> |
#include <arch/byteorder.h> |
/* This is a good joke, SGI HAS different types than NT bioses... */ |
/* Here is the SGI type */ |
static char *basetypes[] = { |
"ExceptionBlock", |
"SystemParameterBlock", |
"FreeContiguous", |
"FreeMemory", |
"BadMemory", |
"LoadedProgram", |
"FirmwareTemporary", |
"FirmwarePermanent" |
}; |
static char *ctypes[] = { |
"ARC_type", |
"CPU_type", |
"FPU_type", |
"PrimaryICache", |
"PrimaryDCache", |
"SecondaryICache", |
"SecondaryDCache", |
"SecondaryCache", |
"Memory", |
"EISAAdapter", |
"TCAdapter", |
"SCSIAdapter", |
"DTIAdapter", |
"MultiFunctionAdapter", |
"DiskController", |
"TapeController", |
"CDROMController", |
"WORMController", |
"SerialController", |
"NetworkController", |
"DisplayController", |
"ParallelController", |
"PointerController", |
"KeyboardController", |
"AudioController", |
"OtherController", |
"DiskPeripheral", |
"FloppyDiskPeripheral", |
"TapePeripheral", |
"ModemPeripheral", |
"MonitorPeripheral", |
"PrinterPeripheral", |
"PointerPeripheral", |
"KeyboardPeripheral", |
"TerminalPeripheral", |
"OtherPeripheral", |
"LinePeripheral", |
"NetworkPeripheral" |
"OtherPeripheral", |
"XTalkAdapter", |
"PCIAdapter", |
"GIOAdapter", |
"TPUAdapter", |
"Anonymous" |
}; |
static arc_sbp *sbp = (arc_sbp *)PA2KA(0x1000); |
static arc_func_vector_t *arc_entry; |
static void _arc_putchar(char ch); |
/** Initialize ARC structure |
* |
* @return 0 - ARC OK, -1 - ARC does not exist |
*/ |
int init_arc(void) |
{ |
if (sbp->signature != ARC_MAGIC) { |
sbp = NULL; |
return -1; |
} |
arc_entry = sbp->firmwarevector; |
arc_putchar('A'); |
arc_putchar('R'); |
arc_putchar('C'); |
arc_putchar('\n'); |
} |
/** Return true if ARC is available */ |
int arc_enabled(void) |
{ |
return sbp != NULL; |
} |
static void arc_print_component(arc_component *c) |
{ |
int i; |
printf("%s: ",ctypes[c->type]); |
for (i=0;i < c->identifier_len;i++) |
putchar(c->identifier[i]); |
putchar('\n'); |
} |
void arc_print_devices(void) |
{ |
arc_component *c,*next; |
if (!arc_enabled()) |
return; |
c = arc_entry->getchild(NULL); |
while (c) { |
arc_print_component(c); |
next = arc_entry->getchild(c); |
while (!next) { |
next = arc_entry->getpeer(c); |
if (!next) |
c = arc_entry->getparent(c); |
if (!c) |
return; |
} |
c = next; |
} |
} |
void arc_print_memory_map(void) |
{ |
arc_memdescriptor_t *desc; |
if (!arc_enabled()) |
return; |
printf("Memory map:\n"); |
desc = arc_entry->getmemorydescriptor(NULL); |
while (desc) { |
printf("%s: %d (size: %dKB)\n",basetypes[desc->type], |
desc->basepage * 4096, |
desc->basecount*4); |
desc = arc_entry->getmemorydescriptor(desc); |
} |
} |
/** Print charactor to console */ |
void arc_putchar(char ch) |
{ |
__u32 cnt; |
ipl_t ipl; |
/* TODO: Should be spinlock? */ |
ipl = interrupts_disable(); |
arc_entry->write(1, &ch, 1, &cnt); |
interrupts_restore(ipl); |
} |
/SPARTAN/trunk/arch/mips32/src/mips32.c |
---|
0,0 → 1,117 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch.h> |
#include <arch/cp0.h> |
#include <arch/exception.h> |
#include <arch/asm/regname.h> |
#include <arch/asm.h> |
#include <mm/vm.h> |
#include <userspace.h> |
#include <arch/console.h> |
#include <memstr.h> |
#include <arch/interrupt.h> |
#include <arch/drivers/arc.h> |
#include <proc/thread.h> |
#include <print.h> |
/* Size of the code jumping to the exception handler code |
* - J+NOP |
*/ |
#define EXCEPTION_JUMP_SIZE 8 |
#define TLB_EXC ((char *) 0x80000000) |
#define NORM_EXC ((char *) 0x80000180) |
#define CACHE_EXC ((char *) 0x80000100) |
void arch_pre_mm_init(void) |
{ |
/* It is not assumed by default */ |
interrupts_disable(); |
init_arc(); |
/* Copy the exception vectors to the right places */ |
memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE); |
memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE); |
/* |
* Switch to BEV normal level so that exception vectors point to the kernel. |
* Clear the error level. |
*/ |
cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); |
/* |
* Mask all interrupts |
*/ |
cp0_mask_all_int(); |
/* |
* Unmask hardware clock interrupt. |
*/ |
cp0_unmask_int(TIMER_INTERRUPT); |
/* |
* Start hardware clock. |
*/ |
cp0_compare_write(cp0_compare_value + cp0_count_read()); |
console_init(); |
arc_print_memory_map(); |
arc_print_devices(); |
} |
void arch_post_mm_init(void) |
{ |
} |
void arch_late_init(void) |
{ |
} |
void userspace(void) |
{ |
/* EXL=1, UM=1, IE=1 */ |
cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
cp0_status_um_bit | |
cp0_status_ie_enabled_bit)); |
cp0_epc_write(UTEXT_ADDRESS); |
userspace_asm(USTACK_ADDRESS+PAGE_SIZE); |
while (1) |
; |
} |
/* Stack pointer saved when entering user mode */ |
/* TODO: How do we do it on SMP system???? */ |
__address supervisor_sp; |
void before_thread_runs_arch(void) |
{ |
supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
} |
/SPARTAN/trunk/arch/mips32/src/asm.S |
---|
0,0 → 1,311 |
# |
# Copyright (C) 2003-2004 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
#include <arch/asm/regname.h> |
.text |
.macro cp0_read reg |
mfc0 $2,\reg |
j $31 |
nop |
.endm |
.macro cp0_write reg |
mtc0 $4,\reg |
j $31 |
nop |
.endm |
.set noat |
.set noreorder |
.set nomacro |
.global cp0_index_read |
.global cp0_index_write |
.global cp0_random_read |
.global cp0_entry_lo0_read |
.global cp0_entry_lo0_write |
.global cp0_entry_lo1_read |
.global cp0_entry_lo1_write |
.global cp0_context_read |
.global cp0_context_write |
.global cp0_pagemask_read |
.global cp0_pagemask_write |
.global cp0_wired_read |
.global cp0_wired_write |
.global cp0_badvaddr_read |
.global cp0_count_read |
.global cp0_count_write |
.global cp0_entry_hi_read |
.global cp0_entry_hi_write |
.global cp0_compare_read |
.global cp0_compare_write |
.global cp0_status_read |
.global cp0_status_write |
.global cp0_cause_read |
.global cp0_cause_write |
.global cp0_epc_read |
.global cp0_epc_write |
.global cp0_prid_read |
cp0_index_read: cp0_read $0 |
cp0_index_write: cp0_write $0 |
cp0_random_read: cp0_read $1 |
cp0_entry_lo0_read: cp0_read $2 |
cp0_entry_lo0_write: cp0_write $2 |
cp0_entry_lo1_read: cp0_read $3 |
cp0_entry_lo1_write: cp0_write $3 |
cp0_context_read: cp0_read $4 |
cp0_context_write: cp0_write $4 |
cp0_pagemask_read: cp0_read $5 |
cp0_pagemask_write: cp0_write $5 |
cp0_wired_read: cp0_read $6 |
cp0_wired_write: cp0_write $6 |
cp0_badvaddr_read: cp0_read $8 |
cp0_count_read: cp0_read $9 |
cp0_count_write: cp0_write $9 |
cp0_entry_hi_read: cp0_read $10 |
cp0_entry_hi_write: cp0_write $10 |
cp0_compare_read: cp0_read $11 |
cp0_compare_write: cp0_write $11 |
cp0_status_read: cp0_read $12 |
cp0_status_write: cp0_write $12 |
cp0_cause_read: cp0_read $13 |
cp0_cause_write: cp0_write $13 |
cp0_epc_read: cp0_read $14 |
cp0_epc_write: cp0_write $14 |
cp0_prid_read: cp0_read $15 |
.global cpu_halt |
cpu_halt: |
j cpu_halt |
nop |
.global memsetb |
memsetb: |
j _memsetb |
nop |
.global memcpy |
memcpy: |
j _memcpy |
nop |
.macro fpu_gp_save reg ctx |
mfc1 $t0,$\reg |
sw $t0, \reg*4(\ctx) |
.endm |
.macro fpu_gp_restore reg ctx |
lw $t0, \reg*4(\ctx) |
mtc1 $t0,$\reg |
.endm |
.macro fpu_ct_save reg ctx |
cfc1 $t0,$1 |
sw $t0, (\reg+32)*4(\ctx) |
.endm |
.macro fpu_ct_restore reg ctx |
lw $t0, (\reg+32)*4(\ctx) |
ctc1 $t0,$\reg |
.endm |
.global fpu_context_save |
fpu_context_save: |
#ifdef HAVE_FPU |
fpu_gp_save 0,$a0 |
fpu_gp_save 1,$a0 |
fpu_gp_save 2,$a0 |
fpu_gp_save 3,$a0 |
fpu_gp_save 4,$a0 |
fpu_gp_save 5,$a0 |
fpu_gp_save 6,$a0 |
fpu_gp_save 7,$a0 |
fpu_gp_save 8,$a0 |
fpu_gp_save 9,$a0 |
fpu_gp_save 10,$a0 |
fpu_gp_save 11,$a0 |
fpu_gp_save 12,$a0 |
fpu_gp_save 13,$a0 |
fpu_gp_save 14,$a0 |
fpu_gp_save 15,$a0 |
fpu_gp_save 16,$a0 |
fpu_gp_save 17,$a0 |
fpu_gp_save 18,$a0 |
fpu_gp_save 19,$a0 |
fpu_gp_save 20,$a0 |
fpu_gp_save 21,$a0 |
fpu_gp_save 22,$a0 |
fpu_gp_save 23,$a0 |
fpu_gp_save 24,$a0 |
fpu_gp_save 25,$a0 |
fpu_gp_save 26,$a0 |
fpu_gp_save 27,$a0 |
fpu_gp_save 28,$a0 |
fpu_gp_save 29,$a0 |
fpu_gp_save 30,$a0 |
fpu_gp_save 31,$a0 |
fpu_ct_save 1,$a0 |
fpu_ct_save 2,$a0 |
fpu_ct_save 3,$a0 |
fpu_ct_save 4,$a0 |
fpu_ct_save 5,$a0 |
fpu_ct_save 6,$a0 |
fpu_ct_save 7,$a0 |
fpu_ct_save 8,$a0 |
fpu_ct_save 9,$a0 |
fpu_ct_save 10,$a0 |
fpu_ct_save 11,$a0 |
fpu_ct_save 12,$a0 |
fpu_ct_save 13,$a0 |
fpu_ct_save 14,$a0 |
fpu_ct_save 15,$a0 |
fpu_ct_save 16,$a0 |
fpu_ct_save 17,$a0 |
fpu_ct_save 18,$a0 |
fpu_ct_save 19,$a0 |
fpu_ct_save 20,$a0 |
fpu_ct_save 21,$a0 |
fpu_ct_save 22,$a0 |
fpu_ct_save 23,$a0 |
fpu_ct_save 24,$a0 |
fpu_ct_save 25,$a0 |
fpu_ct_save 26,$a0 |
fpu_ct_save 27,$a0 |
fpu_ct_save 28,$a0 |
fpu_ct_save 29,$a0 |
fpu_ct_save 30,$a0 |
fpu_ct_save 31,$a0 |
#endif |
j $ra |
nop |
.global fpu_context_restore |
fpu_context_restore: |
#ifdef HAVE_FPU |
fpu_gp_restore 0,$a0 |
fpu_gp_restore 1,$a0 |
fpu_gp_restore 2,$a0 |
fpu_gp_restore 3,$a0 |
fpu_gp_restore 4,$a0 |
fpu_gp_restore 5,$a0 |
fpu_gp_restore 6,$a0 |
fpu_gp_restore 7,$a0 |
fpu_gp_restore 8,$a0 |
fpu_gp_restore 9,$a0 |
fpu_gp_restore 10,$a0 |
fpu_gp_restore 11,$a0 |
fpu_gp_restore 12,$a0 |
fpu_gp_restore 13,$a0 |
fpu_gp_restore 14,$a0 |
fpu_gp_restore 15,$a0 |
fpu_gp_restore 16,$a0 |
fpu_gp_restore 17,$a0 |
fpu_gp_restore 18,$a0 |
fpu_gp_restore 19,$a0 |
fpu_gp_restore 20,$a0 |
fpu_gp_restore 21,$a0 |
fpu_gp_restore 22,$a0 |
fpu_gp_restore 23,$a0 |
fpu_gp_restore 24,$a0 |
fpu_gp_restore 25,$a0 |
fpu_gp_restore 26,$a0 |
fpu_gp_restore 27,$a0 |
fpu_gp_restore 28,$a0 |
fpu_gp_restore 29,$a0 |
fpu_gp_restore 30,$a0 |
fpu_gp_restore 31,$a0 |
fpu_ct_restore 1,$a0 |
fpu_ct_restore 2,$a0 |
fpu_ct_restore 3,$a0 |
fpu_ct_restore 4,$a0 |
fpu_ct_restore 5,$a0 |
fpu_ct_restore 6,$a0 |
fpu_ct_restore 7,$a0 |
fpu_ct_restore 8,$a0 |
fpu_ct_restore 9,$a0 |
fpu_ct_restore 10,$a0 |
fpu_ct_restore 11,$a0 |
fpu_ct_restore 12,$a0 |
fpu_ct_restore 13,$a0 |
fpu_ct_restore 14,$a0 |
fpu_ct_restore 15,$a0 |
fpu_ct_restore 16,$a0 |
fpu_ct_restore 17,$a0 |
fpu_ct_restore 18,$a0 |
fpu_ct_restore 19,$a0 |
fpu_ct_restore 20,$a0 |
fpu_ct_restore 21,$a0 |
fpu_ct_restore 22,$a0 |
fpu_ct_restore 23,$a0 |
fpu_ct_restore 24,$a0 |
fpu_ct_restore 25,$a0 |
fpu_ct_restore 26,$a0 |
fpu_ct_restore 27,$a0 |
fpu_ct_restore 28,$a0 |
fpu_ct_restore 29,$a0 |
fpu_ct_restore 30,$a0 |
fpu_ct_restore 31,$a0 |
#endif |
j $ra |
nop |
# THIS IS USERSPACE CODE |
.global utext |
utext: |
j $31 |
nop |
utext_end: |
.data |
.global utext_size |
utext_size: |
.long utext_end-utext |
/SPARTAN/trunk/arch/mips32/src/console.c |
---|
0,0 → 1,73 |
/* |
* Copyright (C) 2005 Ondrej Palkovsky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <putchar.h> |
#include <arch/types.h> |
#include <arch/cp0.h> |
#include <arch/console.h> |
#include <arch.h> |
#include <arch/drivers/arc.h> |
#include <arch/arch.h> |
/** Putchar that works with MSIM & gxemul */ |
static void cons_putchar(const char ch) |
{ |
*((char *) VIDEORAM) = ch; |
} |
/** Putchar that works with simics */ |
static void serial_putchar(const char ch) |
{ |
int i; |
if (ch=='\n') |
putchar('\r'); |
/* Wait until transmit buffer empty */ |
while (! ((*SERIAL_LSR) & (1<<TRANSMIT_EMPTY_BIT))) |
; |
*(SERIAL_PORT_BASE) = ch; |
} |
static void (*putchar_func)(const char ch) = cons_putchar; |
void console_init(void) |
{ |
if (arc_enabled()) |
putchar_func = arc_putchar; |
/* The LSR on the start usually contains this value */ |
else if (*SERIAL_LSR == 0x60) |
putchar_func = serial_putchar; |
else |
putchar_func = cons_putchar; |
} |
void putchar(const char ch) |
{ |
putchar_func(ch); |
} |
/SPARTAN/trunk/arch/mips32/src/cpu/cpu.c |
---|
0,0 → 1,129 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/cpu.h> |
#include <cpu.h> |
#include <arch.h> |
#include <arch/cp0.h> |
#include <typedefs.h> |
#include <print.h> |
struct data_t { |
char *vendor; |
char *model; |
}; |
static struct data_t imp_data[] = { |
{ "Invalid", "Invalid" }, /* 0x00 */ |
{ "MIPS", "R2000" }, /* 0x01 */ |
{ "MIPS", "R3000" }, /* 0x02 */ |
{ "MIPS", "R6000" }, /* 0x03 */ |
{ "MIPS", " R4000/R4400" }, /* 0x04 */ |
{ "LSI Logic", "R3000" }, /* 0x05 */ |
{ "MIPS", "R6000A" }, /* 0x06 */ |
{ "IDT", "3051/3052" }, /* 0x07 */ |
{ "Invalid", "Invalid" }, /* 0x08 */ |
{ "MIPS", "R10000/T5" }, /* 0x09 */ |
{ "MIPS", "R4200" }, /* 0x0a */ |
{ "Unknown", "Unknown" }, /* 0x0b */ |
{ "Unknown", "Unknown" }, /* 0x0c */ |
{ "Invalid", "Invalid" }, /* 0x0d */ |
{ "Invalid", "Invalid" }, /* 0x0e */ |
{ "Invalid", "Invalid" }, /* 0x0f */ |
{ "MIPS", "R8000" }, /* 0x10 */ |
{ "Invalid", "Invalid" }, /* 0x11 */ |
{ "Invalid", "Invalid" }, /* 0x12 */ |
{ "Invalid", "Invalid" }, /* 0x13 */ |
{ "Invalid", "Invalid" }, /* 0x14 */ |
{ "Invalid", "Invalid" }, /* 0x15 */ |
{ "Invalid", "Invalid" }, /* 0x16 */ |
{ "Invalid", "Invalid" }, /* 0x17 */ |
{ "Invalid", "Invalid" }, /* 0x18 */ |
{ "Invalid", "Invalid" }, /* 0x19 */ |
{ "Invalid", "Invalid" }, /* 0x1a */ |
{ "Invalid", "Invalid" }, /* 0x1b */ |
{ "Invalid", "Invalid" }, /* 0x1c */ |
{ "Invalid", "Invalid" }, /* 0x1d */ |
{ "Invalid", "Invalid" }, /* 0x1e */ |
{ "Invalid", "Invalid" }, /* 0x1f */ |
{ "QED", "R4600" }, /* 0x20 */ |
{ "Sony", "R3000" }, /* 0x21 */ |
{ "Toshiba", "R3000" }, /* 0x22 */ |
{ "NKK", "R3000" }, /* 0x23 */ |
{ NULL, NULL } |
}; |
static struct data_t imp_data80[] = { |
{ "MIPS", "4Kc" }, /* 0x80 */ |
{"Invalid","Invalid"}, /* 0x81 */ |
{"Invalid","Invalid"}, /* 0x82 */ |
{"MIPS","4Km & 4Kp"}, /* 0x83 */ |
{ NULL, NULL} |
}; |
void cpu_arch_init(void) |
{ |
} |
void cpu_identify(void) |
{ |
CPU->arch.rev_num = cp0_prid_read() & 0xff; |
CPU->arch.imp_num = (cp0_prid_read() >> 8) & 0xff; |
} |
void cpu_print_report(cpu_t *m) |
{ |
struct data_t *data; |
int i; |
if (m->arch.imp_num & 0x80) { |
/* Count records */ |
for (i=0;imp_data80[i].vendor;i++) |
; |
if (m->arch.imp_num & 0x7f >= i) { |
printf("imp=%d\n",m->arch.imp_num); |
return; |
} |
data = &imp_data80[m->arch.imp_num & 0x7f]; |
} else { |
for (i=0;imp_data[i].vendor;i++) |
; |
if (m->arch.imp_num >= i) { |
printf("imp=%d\n",m->arch.imp_num); |
return; |
} |
data = &imp_data[m->arch.imp_num]; |
} |
printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n", |
m->id, data->vendor, data->model, m->arch.rev_num >> 4, |
m->arch.rev_num & 0xf, m->arch.imp_num); |
} |
/SPARTAN/trunk/arch/mips32/src/fpu_context.c |
---|
0,0 → 1,55 |
/* |
* Copyright (C) 2005 Jakub Vana |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
* |
*/ |
#include <fpu_context.h> |
#include <arch.h> |
#include <arch/cp0.h> |
void fpu_disable(void) |
{ |
#ifdef HAVE_FPU |
cp0_status_write(cp0_status_read() & ~cp0_status_fpu_bit); |
if (THREAD && THREAD->pstate) |
THREAD->pstate->status &= ~cp0_status_fpu_bit; |
#endif |
} |
void fpu_enable(void) |
{ |
#ifdef HAVE_FPU |
cp0_status_write(cp0_status_read() | cp0_status_fpu_bit); |
if (THREAD && THREAD->pstate) |
THREAD->pstate->status |= cp0_status_fpu_bit; |
#endif |
} |
void fpu_init(void) |
{ |
/* TODO: Zero all registers */ |
} |
/SPARTAN/trunk/arch/mips32/src/panic.S |
---|
0,0 → 1,43 |
# |
# Copyright (C) 2003-2004 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
.text |
.set noat |
.set noreorder |
.set nomacro |
#include <arch/asm/regname.h> |
.global panic_printf |
/* From printf return directly to halt() */ |
panic_printf: |
lui $ra, %hi(halt) |
j printf |
ori $ra, %lo(halt) |
/SPARTAN/trunk/arch/mips32/src/dummy.S |
---|
0,0 → 1,41 |
# |
# Copyright (C) 2003-2004 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
.text |
.set noat |
.global calibrate_delay_loop |
.global asm_delay_loop |
.global dummy |
calibrate_delay_loop: |
asm_delay_loop: |
dummy: |
j $31 |
nop |
/SPARTAN/trunk/arch/mips32/src/start.S |
---|
0,0 → 1,233 |
# |
# Copyright (C) 2003-2004 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
#define __ASM__ |
#include <arch/asm/regname.h> |
#include <arch/mm/page.h> |
#include <arch/asm/boot.h> |
#include <arch/context_offset.h> |
.text |
.set noat |
.set noreorder |
.set nomacro |
.global kernel_image_start |
.global tlb_refill_entry |
.global cache_error_entry |
.global exception_entry |
.global userspace_asm |
# Save registers to space defined by \r |
# We will change $at on the way |
.macro REGISTERS_STORE r |
sw $at,EOFFSET_AT(\r) |
sw $v0,EOFFSET_V0(\r) |
sw $v1,EOFFSET_V1(\r) |
sw $a0,EOFFSET_A0(\r) |
sw $a1,EOFFSET_A1(\r) |
sw $a2,EOFFSET_A2(\r) |
sw $a3,EOFFSET_A3(\r) |
sw $t0,EOFFSET_T0(\r) |
sw $t1,EOFFSET_T1(\r) |
sw $t2,EOFFSET_T2(\r) |
sw $t3,EOFFSET_T3(\r) |
sw $t4,EOFFSET_T4(\r) |
sw $t5,EOFFSET_T5(\r) |
sw $t6,EOFFSET_T6(\r) |
sw $t7,EOFFSET_T7(\r) |
sw $t8,EOFFSET_T8(\r) |
sw $t9,EOFFSET_T9(\r) |
mflo $at |
sw $at, EOFFSET_LO(\r) |
mfhi $at |
sw $at, EOFFSET_HI(\r) |
sw $s0,EOFFSET_S0(\r) |
sw $s1,EOFFSET_S1(\r) |
sw $s2,EOFFSET_S2(\r) |
sw $s3,EOFFSET_S3(\r) |
sw $s4,EOFFSET_S4(\r) |
sw $s5,EOFFSET_S5(\r) |
sw $s6,EOFFSET_S6(\r) |
sw $s7,EOFFSET_S7(\r) |
sw $s8,EOFFSET_S8(\r) |
sw $gp,EOFFSET_GP(\r) |
sw $ra,EOFFSET_RA(\r) |
sw $sp,EOFFSET_SP(\r) |
mfc0 $at, $status |
sw $at,EOFFSET_STATUS(\r) |
mfc0 $at, $epc |
sw $at,EOFFSET_EPC(\r) |
.endm |
.macro REGISTERS_LOAD r |
lw $v0,EOFFSET_V0(\r) |
lw $v1,EOFFSET_V1(\r) |
lw $a0,EOFFSET_A0(\r) |
lw $a1,EOFFSET_A1(\r) |
lw $a2,EOFFSET_A2(\r) |
lw $a3,EOFFSET_A3(\r) |
lw $t0,EOFFSET_T0(\r) |
lw $t1,EOFFSET_T1(\r) |
lw $t2,EOFFSET_T2(\r) |
lw $t3,EOFFSET_T3(\r) |
lw $t4,EOFFSET_T4(\r) |
lw $t5,EOFFSET_T5(\r) |
lw $t6,EOFFSET_T6(\r) |
lw $t7,EOFFSET_T7(\r) |
lw $t8,EOFFSET_T8(\r) |
lw $t9,EOFFSET_T9(\r) |
lw $s0,EOFFSET_S0(\r) |
lw $s1,EOFFSET_S1(\r) |
lw $s2,EOFFSET_S2(\r) |
lw $s3,EOFFSET_S3(\r) |
lw $s4,EOFFSET_S4(\r) |
lw $s5,EOFFSET_S5(\r) |
lw $s6,EOFFSET_S6(\r) |
lw $s7,EOFFSET_S7(\r) |
lw $s8,EOFFSET_S8(\r) |
lw $gp,EOFFSET_GP(\r) |
lw $ra,EOFFSET_RA(\r) |
lw $at,EOFFSET_LO(\r) |
mtlo $at |
lw $at,EOFFSET_HI(\r) |
mthi $at |
lw $at,EOFFSET_STATUS(\r) |
mtc0 $at, $status |
lw $at,EOFFSET_EPC(\r) |
mtc0 $at, $epc |
lw $at,EOFFSET_AT(\r) |
lw $sp,EOFFSET_SP(\r) |
.endm |
# Move kernel stack pointer address to register K0 |
# - if we are in user mode, load the appropriate stack |
# address |
.macro KERNEL_STACK_TO_K0 |
# If we are in user mode |
mfc0 $k0, $status |
andi $k0, 0x10 |
beq $k0, $0, 1f |
add $k0, $sp, 0 |
# Move $k0 pointer to kernel stack |
lui $k0, %hi(supervisor_sp) |
ori $k0, $k0, %lo(supervisor_sp) |
# Move $k0 (superveisor_sp) |
lw $k0, 0($k0) |
1: |
.endm |
.org 0x0 |
kernel_image_start: |
/* Load temporary stack */ |
lui $sp, %hi(end_stack) |
ori $sp, $sp, %lo(end_stack) |
/* Not sure about this, but might be needed for PIC code???? */ |
lui $gp, 0x8000 |
jal main_bsp |
nop |
.space TEMP_STACK_SIZE |
end_stack: |
tlb_refill_entry: |
j tlb_refill_handler |
nop |
cache_error_entry: |
j cache_error_handler |
nop |
exception_entry: |
j exception_handler |
nop |
exception_handler: |
KERNEL_STACK_TO_K0 |
sub $k0, REGISTER_SPACE |
REGISTERS_STORE $k0 |
add $sp, $k0, 0 |
add $a0, $sp, 0 |
jal exception /* exception(register_space) */ |
nop |
REGISTERS_LOAD $sp |
# The $sp is automatically restored to former value |
eret |
nop |
tlb_refill_handler: |
KERNEL_STACK_TO_K0 |
sub $k0, REGISTER_SPACE |
REGISTERS_STORE $k0 |
add $sp, $k0, 0 |
add $a0, $sp, 0 |
jal tlb_refill /* tlb_refill(register_space) */ |
nop |
REGISTERS_LOAD $sp |
eret |
nop |
cache_error_handler: |
KERNEL_STACK_TO_K0 |
sub $sp, REGISTER_SPACE |
REGISTERS_STORE $sp |
add $sp, $k0, 0 |
jal cache_error |
nop |
REGISTERS_LOAD $sp |
eret |
nop |
userspace_asm: |
add $sp, $a0, 0 |
eret |
nop |
/SPARTAN/trunk/arch/mips32/src/cache.c |
---|
0,0 → 1,35 |
/* |
* Copyright (C) 2003-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/cache.h> |
#include <panic.h> |
void cache_error(void) |
{ |
panic("cache_error exception\n"); |
} |
/SPARTAN/trunk/arch/mips32/src/fmath.c |
---|
0,0 → 1,161 |
/* |
* Copyright (C) 2005 Josef Cejka |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/fmath.h> |
#include <print.h> |
//TODO: |
#define FMATH_MANTISA_MASK ( 0x000fffffffffffffLL ) |
signed short fmath_get_binary_exponent(double num) |
{ //TODO: |
/* fmath_ld_union_t fmath_ld_union; |
fmath_ld_union.bf = num; |
return (signed short)((((fmath_ld_union.ldd[7])&0x7f)<<4) + (((fmath_ld_union.ldd[6])&0xf0)>>4)) -FMATH_EXPONENT_BIAS; // exponent is 11 bits lenght, so sevent bits is in 8th byte and 4 bits in 7th |
*/ |
return 0; |
} |
double fmath_get_decimal_exponent(double num) |
{ //TODO: |
double value; |
// log10(2)*log2(x) => log10(x) |
/* __asm__ __volatile__ ( \ |
"fldlg2 #load log10(2) \n\t" \ |
"fxch %%st(1) \n\t" \ |
"fyl2x #count st(0)*log2(st(1))->st(1); pop st(0) \n\t" \ |
: "=t" (value) : "0"(num) ); |
*/ return value; |
} |
__u64 fmath_get_binary_mantisa(double num) |
{ //TODO: |
/* union { __u64 _u; double _d;} un = { _d : num }; |
un._u=un._u &(FMATH_MANTISA_MASK); // mask 52 bits of mantisa |
return un._u; |
*/ |
return 0; |
} |
double fmath_fint(double num, double *intp) |
{ //TODO: |
/* fmath_ld_union_t fmath_ld_union_num; |
fmath_ld_union_t fmath_ld_union_int; |
signed short exp; |
__u64 mask,mantisa; |
int i; |
exp=fmath_get_binary_exponent(num); |
if (exp<0) { |
*intp = 0.0; |
*intp = fmath_set_sign(0.0L,fmath_is_negative(num)); |
return num; |
} |
if (exp>51) { |
*intp=num; |
num=0.0; |
num= fmath_set_sign(0.0L,fmath_is_negative(*intp)); |
return num; |
} |
fmath_ld_union_num.bf = num; |
mask = FMATH_MANTISA_MASK>>exp; |
//mantisa = (fmath_get-binary_mantisa(num))&(~mask); |
for (i=0;i<7;i++) { |
// Ugly construction for obtain sign, exponent and integer part from num |
fmath_ld_union_int.ldd[i]=fmath_ld_union_num.ldd[i]&(((~mask)>>(i*8))&0xff); |
} |
fmath_ld_union_int.ldd[6]|=((fmath_ld_union_num.ldd[6])&(0xf0)); |
fmath_ld_union_int.ldd[7]=fmath_ld_union_num.ldd[7]; |
*intp=fmath_ld_union_int.bf; |
return fmath_ld_union_num.bf-fmath_ld_union_int.bf; |
*/ |
return 0.0; |
}; |
double fmath_dpow(double base, double exponent) |
{ //TODO: |
/* double value=1.0; |
if (base<=0.0) return base; |
//2^(x*log2(10)) = 2^y = 10^x |
__asm__ __volatile__ ( \ |
"fyl2x # ST(1):=ST(1)*log2(ST(0)), pop st(0) \n\t " \ |
"fld %%st(0) \n\t" \ |
"frndint \n\t" \ |
"fxch %%st(1) \n\t" \ |
"fsub %%st(1),%%st(0) \n\t" \ |
"f2xm1 # ST := 2^ST -1\n\t" \ |
"fld1 \n\t" \ |
"faddp %%st(0),%%st(1) \n\t" \ |
"fscale #ST:=ST*2^(ST(1))\n\t" \ |
"fstp %%st(1) \n\t" \ |
"" : "=t" (value) : "0" (base), "u" (exponent) ); |
return value; |
*/ |
return 1.0; |
} |
int fmath_is_nan(double num) |
{ |
/* __u16 exp; |
fmath_ld_union_t fmath_ld_union; |
fmath_ld_union.bf = num; |
exp=(((fmath_ld_union.ldd[7])&0x7f)<<4) + (((fmath_ld_union.ldd[6])&0xf0)>>4); // exponent is 11 bits lenght, so sevent bits is in 8th byte and 4 bits in 7th |
if (exp!=0x07ff) return 0; |
if (fmath_get_binary_mantisa(num)>=FMATH_NAN) return 1; |
*/ |
return 0; |
} |
int fmath_is_infinity(double num) |
{ |
/* __u16 exp; |
fmath_ld_union_t fmath_ld_union; |
fmath_ld_union.bf = num; |
exp=(((fmath_ld_union.ldd[7])&0x7f)<<4) + (((fmath_ld_union.ldd[6])&0xf0)>>4); // exponent is 11 bits lenght, so sevent bits is in 8th byte and 4 bits in 7th |
if (exp!=0x07ff) return 0; |
if (fmath_get_binary_mantisa(num)==0x0) return 1; |
*/ return 0; |
} |