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Compare Revisions

• This comparison shows the changes necessary to convert path

  → /SPARTAN/trunk/arch/mips @ 11

  → /SPARTAN/trunk/arch/mips @ 15

  ↔ Reverse comparison

• Compare Path:	Rev

  With Path:	Rev

Ignore whitespace Rev 11 → Rev 15

/SPARTAN/trunk/arch/mips/src/exception.c
42,9 → 42,9
epc = cp0_epc_read();
cp0_status_write(cp0_status_read() & ~ cp0_status_exl_exception_bit);
if (the->thread) {
the->thread->saved_pri = pri;
the->thread->saved_epc = epc;
if (THREAD) {
THREAD->saved_pri = pri;
THREAD->saved_epc = epc;
}
/* decode exception number and process the exception */
switch(excno = (cp0_cause_read()>>2)&0x1f) {
54,9 → 54,9
default: panic(PANIC "unhandled exception %d\n", excno); break;
}
if (the->thread) {
pri = the->thread->saved_pri;
epc = the->thread->saved_epc;
if (THREAD) {
pri = THREAD->saved_pri;
epc = THREAD->saved_epc;
}
cp0_epc_write(epc);

/SPARTAN/trunk/arch/mips/src/cpu/cpu.c
83,8 → 83,8
void cpu_identify(void)
{
the->cpu->arch.rev_num = cp0_prid_read() & 0xff;
the->cpu->arch.imp_num = (cp0_prid_read() >> 8) & 0xff;
CPU->arch.rev_num = cp0_prid_read() & 0xff;
CPU->arch.imp_num = (cp0_prid_read() >> 8) & 0xff;
}
void cpu_print_report(cpu_t *m)

/SPARTAN/trunk/arch/mips/src/mm/tlb.c
46,7 → 46,7
void tlb_invalid(void)
{
panic(PANIC "%X: TLB exception at %X", cp0_badvaddr_read(), the->thread ? the->thread->saved_epc : 0);
panic(PANIC "%X: TLB exception at %X", cp0_badvaddr_read(), THREAD ? THREAD->saved_epc : 0);
}
void tlb_invalidate(int asid)