/SPARTAN/trunk/arch/mips/include/barrier.h |
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29,6 → 29,9 |
#ifndef __mips_BARRIER_H__ |
#define __mips_BARRIER_H__ |
/* |
* TODO: implement true MIPS memory barriers for macros below. |
*/ |
#define CS_ENTER_BARRIER() __asm__ volatile ("" ::: "memory") |
#define CS_LEAVE_BARRIER() __asm__ volatile ("" ::: "memory") |