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/SPARTAN/trunk/arch/mips/src/asm.S
0,0 → 1,170
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
.text
.macro cp0_read reg
mfc0 $2,\reg
j $31
nop
.endm
.macro cp0_write reg
mtc0 $4,\reg
j $31
nop
.endm
.set noat
.set noreorder
.set nomacro
.global cp0_index_read
.global cp0_index_write
.global cp0_random_read
.global cp0_entry_lo0_read
.global cp0_entry_lo0_write
.global cp0_entry_lo1_read
.global cp0_entry_lo1_write
.global cp0_context_read
.global cp0_context_write
.global cp0_pagemask_read
.global cp0_pagemask_write
.global cp0_wired_read
.global cp0_wired_write
.global cp0_badvaddr_read
.global cp0_count_read
.global cp0_count_write
.global cp0_hi_read
.global cp0_hi_write
.global cp0_compare_read
.global cp0_compare_write
.global cp0_status_read
.global cp0_status_write
.global cp0_cause_read
.global cp0_cause_write
.global cp0_epc_read
.global cp0_epc_write
.global cp0_prid_read
cp0_index_read: cp0_read $0
cp0_index_write: cp0_write $0
cp0_random_read: cp0_read $1
cp0_entry_lo0_read: cp0_read $2
cp0_entry_lo0_write: cp0_write $2
cp0_entry_lo1_read: cp0_read $3
cp0_entry_lo1_write: cp0_write $3
cp0_context_read: cp0_read $4
cp0_context_write: cp0_write $4
cp0_pagemask_read: cp0_read $5
cp0_pagemask_write: cp0_write $5
cp0_wired_read: cp0_read $6
cp0_wired_write: cp0_write $6
cp0_badvaddr_read: cp0_read $8
cp0_count_read: cp0_read $9
cp0_count_write: cp0_write $9
cp0_entry_hi_read: cp0_read $10
cp0_entry_hi_write: cp0_write $10
cp0_compare_read: cp0_read $11
cp0_compare_write: cp0_write $11
cp0_status_read: cp0_read $12
cp0_status_write: cp0_write $12
cp0_cause_read: cp0_read $13
cp0_cause_write: cp0_write $13
cp0_epc_read: cp0_read $14
cp0_epc_write: cp0_write $14
cp0_prid_read: cp0_read $15
.global tlbp
tlbp:
tlbp
j $31
nop
.global tlbr
tlbr:
tlbr
j $31
nop
.global tlbwi
tlbwi:
tlbwi
j $31
nop
.global tlbwr
tlbwr:
tlbwr
j $31
nop
.global cpu_halt
cpu_halt:
j cpu_halt
nop
.global memsetb
memsetb:
j _memsetb
nop
.global memcpy
memcpy:
j _memcpy
nop
# THIS IS USERSPACE CODE
.global utext
utext:
j $31
nop
utext_end:
.data
.global utext_size
utext_size:
.long utext_end-utext

/SPARTAN/trunk/arch/mips/src/start.S
0,0 → 1,234
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#define __ASM__
#include <arch/asm/regname.h>
#include <arch/mm/page.h>
#include <arch/asm/boot.h>
#include <arch/context.h>
.text
.set noat
.set noreorder
.set nomacro
.global kernel_image_start
.global tlb_refill_entry
.global cache_error_entry
.global exception_entry
.global userspace_asm
# Save registers to space defined by \r
# We will change $at on the way
.macro REGISTERS_STORE r
sw $at,EOFFSET_AT(\r)
sw $v0,EOFFSET_V0(\r)
sw $v1,EOFFSET_V1(\r)
sw $a0,EOFFSET_A0(\r)
sw $a1,EOFFSET_A1(\r)
sw $a2,EOFFSET_A2(\r)
sw $a3,EOFFSET_A3(\r)
sw $t0,EOFFSET_A4(\r)
sw $t1,EOFFSET_T1(\r)
sw $t2,EOFFSET_T2(\r)
sw $t3,EOFFSET_T3(\r)
sw $t4,EOFFSET_T4(\r)
sw $t5,EOFFSET_T5(\r)
sw $t6,EOFFSET_T6(\r)
sw $t7,EOFFSET_T7(\r)
sw $t8,EOFFSET_T8(\r)
sw $t9,EOFFSET_T9(\r)
mflo $at
sw $at, EOFFSET_LO(\r)
mfhi $at
sw $at, EOFFSET_HI(\r)
sw $s0,EOFFSET_S0(\r)
sw $s1,EOFFSET_S1(\r)
sw $s2,EOFFSET_S2(\r)
sw $s3,EOFFSET_S3(\r)
sw $s4,EOFFSET_S4(\r)
sw $s5,EOFFSET_S5(\r)
sw $s6,EOFFSET_S6(\r)
sw $s7,EOFFSET_S7(\r)
sw $s8,EOFFSET_S8(\r)
sw $gp,EOFFSET_GP(\r)
sw $ra,EOFFSET_RA(\r)
sw $sp,EOFFSET_SP(\r)
mfc0 $at, $status
sw $at,EOFFSET_STATUS(\r)
.endm
.macro REGISTERS_LOAD r
lw $v0,EOFFSET_V0(\r)
lw $v1,EOFFSET_V1(\r)
lw $a0,EOFFSET_A0(\r)
lw $a1,EOFFSET_A1(\r)
lw $a2,EOFFSET_A2(\r)
lw $a3,EOFFSET_A3(\r)
lw $t0,EOFFSET_A4(\r)
lw $t1,EOFFSET_T1(\r)
lw $t2,EOFFSET_T2(\r)
lw $t3,EOFFSET_T3(\r)
lw $t4,EOFFSET_T4(\r)
lw $t5,EOFFSET_T5(\r)
lw $t6,EOFFSET_T6(\r)
lw $t7,EOFFSET_T7(\r)
lw $t8,EOFFSET_T8(\r)
lw $t9,EOFFSET_T9(\r)
lw $s0,EOFFSET_S0(\r)
lw $s1,EOFFSET_S1(\r)
lw $s2,EOFFSET_S2(\r)
lw $s3,EOFFSET_S3(\r)
lw $s4,EOFFSET_S4(\r)
lw $s5,EOFFSET_S5(\r)
lw $s6,EOFFSET_S6(\r)
lw $s7,EOFFSET_S7(\r)
lw $s8,EOFFSET_S8(\r)
lw $gp,EOFFSET_GP(\r)
lw $ra,EOFFSET_RA(\r)
lw $at,EOFFSET_LO(\r)
mtlo $at
lw $at,EOFFSET_HI(\r)
mthi $at
lw $at,EOFFSET_STATUS(\r)
mtc0 $at, $status
lw $at,EOFFSET_AT(\r)
lw $sp,EOFFSET_SP(\r)
.endm
# Move kernel stack pointer address to register K0
# - if we are in user mode, load the appropriate stack
# address
.macro KERNEL_STACK_TO_K0
# If we are in user mode
mfc0 $k0, $status
andi $k0, 0x10
beq $k0, $0, 1f
add $k0, $sp, 0
# Move $k0 pointer to kernel stack
lui $k0, %hi(supervisor_sp)
ori $k0, %lo(supervisor_sp)
# Move $k0 (superveisor_sp)
lw $k0, 0($k0)
1:
.endm
.org 0x0
tlb_refill_entry:
j tlb_refill_handler
nop
.org 0x100
cache_error_entry:
j cache_error_handler
nop
.org 0x180
norm_exception:
j exception_handler
nop
.org 0x200
iv_exception:
j exception_handler
nop
.org KA2PA(KERNEL_STARTUP_ADDRESS)
kernel_image_start:
/* Load temporary stack */
lui $sp, %hi(end_stack)
ori $sp, $0, %lo(end_stack)
/* Not sure about this, but might be needed for PIC code???? */
lui $gp, 0x8000
jal main_bsp
nop
.space TEMP_STACK_SIZE
end_stack:
exception_handler:
exception_entry:
KERNEL_STACK_TO_K0
sub $k0, REGISTER_SPACE
REGISTERS_STORE $k0
add $sp, $k0, 0
jal exception
nop
REGISTERS_LOAD $sp
# The $sp is automatically restored to former value
eret
nop
tlb_refill_handler:
KERNEL_STACK_TO_K0
sub $k0, REGISTER_SPACE
REGISTERS_STORE $k0
add $sp, $k0, 0
jal tlb_refill
nop
REGISTERS_LOAD $sp
eret
nop
cache_error_handler:
KERNEL_STACK_TO_K0
sub $sp, REGISTER_SPACE
REGISTERS_STORE $sp
add $sp, $k0, 0
jal cache_error
nop
REGISTERS_LOAD $sp
eret
nop
userspace_asm:
add $sp, $a0, 0
eret
nop

/SPARTAN/trunk/arch/mips/src/exception.c
0,0 → 1,125
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/exception.h>
#include <arch/interrupt.h>
#include <panic.h>
#include <arch/cp0.h>
#include <arch/types.h>
#include <arch.h>
#include <debug.h>
void exception(void)
{
int excno;
__u32 epc;
__u32 epc_shift = 0;
ASSERT(CPU != NULL);
/*
* NOTE ON OPERATION ORDERING
*
* On entry, cpu_priority_high() must be called before exception bit is cleared.
* On exit, exception bit must be set before cpu_priority_restore() is called.
*/
cpu_priority_high();
epc = cp0_epc_read();
cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit |
cp0_status_um_bit));
if (THREAD) {
THREAD->saved_epc = epc;
}
/* decode exception number and process the exception */
switch (excno = (cp0_cause_read() >> 2) & 0x1f) {
case EXC_Int:
interrupt();
break;
case EXC_TLBL:
case EXC_TLBS:
tlb_invalid();
break;
case EXC_Mod:
panic("unhandled TLB Modification Exception\n");
break;
case EXC_AdEL:
panic("unhandled Address Error Exception - load or instruction fetch\n");
break;
case EXC_AdES:
panic("unhandled Address Error Exception - store\n");
break;
case EXC_IBE:
panic("unhandled Bus Error Exception - fetch instruction\n");
break;
case EXC_DBE:
panic("unhandled Bus Error Exception - data reference: load or store\n");
break;
case EXC_Bp:
/* it is necessary to not re-execute BREAK instruction after returning from Exception handler
(see page 138 in R4000 Manual for more information) */
epc_shift = 4;
break;
case EXC_RI:
panic("unhandled Reserved Instruction Exception\n");
break;
case EXC_CpU:
panic("unhandled Coprocessor Unusable Exception\n");
break;
case EXC_Ov:
panic("unhandled Arithmetic Overflow Exception\n");
break;
case EXC_Tr:
panic("unhandled Trap Exception\n");
break;
case EXC_VCEI:
panic("unhandled Virtual Coherency Exception - instruction\n");
break;
case EXC_FPE:
panic("unhandled Floating-Point Exception\n");
break;
case EXC_WATCH:
panic("unhandled reference to WatchHi/WatchLo address\n");
break;
case EXC_VCED:
panic("unhandled Virtual Coherency Exception - data\n");
break;
default:
panic("unhandled exception %d\n", excno);
}
if (THREAD)
epc = THREAD->saved_epc;
/* Raise EXL bit before epc_write, so that we support
* properly nested exceptions
*/
cp0_status_write(cp0_status_read() | cp0_status_exl_exception_bit);
cp0_epc_write(epc + epc_shift);
}

/SPARTAN/trunk/arch/mips/src/mips.c
0,0 → 1,87
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch.h>
#include <arch/cp0.h>
#include <arch/exception.h>
#include <arch/asm/regname.h>
#include <arch/asm.h>
#include <mm/vm.h>
#include <userspace.h>
void arch_pre_mm_init(void)
{
/*
* Switch to BEV normal level so that exception vectors point to the kernel.
* Clear the error level.
*/
cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
/*
* Unmask hardware clock interrupt.
*/
cp0_status_write(cp0_status_read() | (1<<cp0_status_im7_shift));
/*
* Start hardware clock.
*/
cp0_compare_write(cp0_compare_value);
cp0_count_write(0);
}
void arch_post_mm_init(void)
{
}
void arch_late_init(void)
{
}
void userspace(void)
{
/* EXL=1, UM=1, IE=1 */
cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
cp0_status_um_bit |
cp0_status_ie_enabled_bit));
cp0_epc_write(UTEXT_ADDRESS);
userspace_asm(USTACK_ADDRESS+PAGE_SIZE);
while (1)
;
}
/* Stack pointer saved when entering user mode */
/* TODO: How do we do it on SMP system???? */
__address supervisor_sp;
void before_thread_runs_arch(void)
{
supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
}

/SPARTAN/trunk/arch/mips/src/panic.S
0,0 → 1,42
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
.text
.set noat
.set noreorder
.set nomacro
.global panic_printf
panic_printf:
jal printf
nop
j cpu_halt
nop

/SPARTAN/trunk/arch/mips/src/dummy.S
0,0 → 1,47
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
.text
.set noat
.global calibrate_delay_loop
.global asm_delay_loop
.global dummy
.global fpu_enable
.global fpu_disable
.global fpu_init
calibrate_delay_loop:
asm_delay_loop:
fpu_enable:
fpu_disable:
fpu_init:
dummy:
j $31
nop

/SPARTAN/trunk/arch/mips/src/fpu_context.c
0,0 → 1,40
/*
* Copyright (C) 2005 Jakub Vana
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <fpu_context.h>
void fpu_context_save(fpu_context_t *fctx)
{
}
void fpu_context_restore(fpu_context_t *fctx)
{
}

/SPARTAN/trunk/arch/mips/src/context.S
0,0 → 1,87
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#define __ASM__
#include <arch/asm/regname.h>
#include "context_offset.h"
.text
.set noat
.set noreorder
.set nomacro
.global context_save
.global context_restore
.macro CONTEXT_STORE r
sw $s0,OFFSET_S0(\r)
sw $s1,OFFSET_S1(\r)
sw $s2,OFFSET_S2(\r)
sw $s3,OFFSET_S3(\r)
sw $s4,OFFSET_S4(\r)
sw $s5,OFFSET_S5(\r)
sw $s6,OFFSET_S6(\r)
sw $s7,OFFSET_S7(\r)
sw $s8,OFFSET_S7(\r)
sw $gp,OFFSET_GP(\r)
sw $ra,OFFSET_PC(\r)
sw $sp,OFFSET_SP(\r)
.endm
.macro CONTEXT_LOAD r
lw $s0,OFFSET_S0(\r)
lw $s1,OFFSET_S1(\r)
lw $s2,OFFSET_S2(\r)
lw $s3,OFFSET_S3(\r)
lw $s4,OFFSET_S4(\r)
lw $s5,OFFSET_S5(\r)
lw $s6,OFFSET_S6(\r)
lw $s7,OFFSET_S7(\r)
lw $s8,OFFSET_S7(\r)
lw $gp,OFFSET_GP(\r)
lw $ra,OFFSET_PC(\r)
lw $sp,OFFSET_SP(\r)
.endm
context_save:
CONTEXT_STORE $a0
# context_save returns 1
j $31
li $2, 1
context_restore:
CONTEXT_LOAD $a0
# context_restore returns 0
j $31
xor $2, $2

/SPARTAN/trunk/arch/mips/src/mm/tlb.c
0,0 → 1,67
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/mm/tlb.h>
#include <arch/mm/asid.h>
#include <mm/tlb.h>
#include <arch/cp0.h>
#include <panic.h>
#include <arch.h>
#include <symtab.h>
void tlb_refill(void)
{
panic("tlb_refill exception\n");
}
void tlb_invalid(void)
{
char *symbol = "";
if (THREAD) {
char *s = get_symtab_entry(THREAD->saved_epc);
if (s)
symbol = s;
}
panic("%X: TLB exception at %X(%s)\n", cp0_badvaddr_read(),
THREAD ? THREAD->saved_epc : 0, symbol);
}
void tlb_invalidate(int asid)
{
pri_t pri;
pri = cpu_priority_high();
// asid_bitmap_reset();
// TODO
cpu_priority_restore(pri);
}

/SPARTAN/trunk/arch/mips/src/mm/page.c
0,0 → 1,46
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/types.h>
#include <arch/mm/page.h>
#include <arch/mm/frame.h>
#include <mm/frame.h>
#include <mm/page.h>
#include <memstr.h>
pte_t *PTL0 = NULL;
void page_arch_init(void)
{
__address ptl0;
ptl0 = frame_alloc(FRAME_KA | FRAME_PANIC);
memsetb(ptl0, FRAME_SIZE, 0);
SET_PTL0_ADDRESS(KA2PA(ptl0));
}

/SPARTAN/trunk/arch/mips/src/mm/asid.c
0,0 → 1,56
/*
* Copyright (C) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch.h>
#include <memstr.h>
/**< Array of threads that have currently some ASID assigned,
NULL means no thread have ASID with number of that index assigned */
struct thread * asids[256];
int last_asid; /**< The number of last assigned ASID */
int asid_bitmap[32]; /**< Bitmap of ASIDs currently in TLB */
/** Cleanup asid_bitmap
*
*/
void asid_bitmap_reset(void)
{
memsetb(asid_bitmap, sizeof(asid_bitmap), 0);
}
/** Initialize manipulating with ASIDs
*
*/
void init_asids(void)
{
memsetb(asids, sizeof(asids), 0);
asid_bitmap_reset();
last_asid = 0;
}

/SPARTAN/trunk/arch/mips/src/mm/frame.c
0,0 → 1,34
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/mm/frame.h>
#include <mm/frame.h>
void frame_arch_init(void)
{
}

/SPARTAN/trunk/arch/mips/src/fmath.c
0,0 → 1,161
/*
* Copyright (C) 2005 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/fmath.h>
#include <print.h>
//TODO:
#define FMATH_MANTISA_MASK ( 0x000fffffffffffffLL )
signed short fmath_get_binary_exponent(double num)
{ //TODO:
/* fmath_ld_union_t fmath_ld_union;
fmath_ld_union.bf = num;
return (signed short)((((fmath_ld_union.ldd[7])&0x7f)<<4) + (((fmath_ld_union.ldd[6])&0xf0)>>4)) -FMATH_EXPONENT_BIAS; // exponent is 11 bits lenght, so sevent bits is in 8th byte and 4 bits in 7th
*/
return 0;
}
double fmath_get_decimal_exponent(double num)
{ //TODO:
double value;
// log10(2)*log2(x) => log10(x)
/* __asm__ __volatile__ ( \
"fldlg2 #load log10(2) \n\t" \
"fxch %%st(1) \n\t" \
"fyl2x #count st(0)*log2(st(1))->st(1); pop st(0) \n\t" \
: "=t" (value) : "0"(num) );
*/ return value;
}
__u64 fmath_get_binary_mantisa(double num)
{ //TODO:
/* union { __u64 _u; double _d;} un = { _d : num };
un._u=un._u &(FMATH_MANTISA_MASK); // mask 52 bits of mantisa
return un._u;
*/
return 0;
}
double fmath_fint(double num, double *intp)
{ //TODO:
/* fmath_ld_union_t fmath_ld_union_num;
fmath_ld_union_t fmath_ld_union_int;
signed short exp;
__u64 mask,mantisa;
int i;
exp=fmath_get_binary_exponent(num);
if (exp<0) {
*intp = 0.0;
*intp = fmath_set_sign(0.0L,fmath_is_negative(num));
return num;
}
if (exp>51) {
*intp=num;
num=0.0;
num= fmath_set_sign(0.0L,fmath_is_negative(*intp));
return num;
}
fmath_ld_union_num.bf = num;
mask = FMATH_MANTISA_MASK>>exp;
//mantisa = (fmath_get-binary_mantisa(num))&(~mask);
for (i=0;i<7;i++) {
// Ugly construction for obtain sign, exponent and integer part from num
fmath_ld_union_int.ldd[i]=fmath_ld_union_num.ldd[i]&(((~mask)>>(i*8))&0xff);
}
fmath_ld_union_int.ldd[6]|=((fmath_ld_union_num.ldd[6])&(0xf0));
fmath_ld_union_int.ldd[7]=fmath_ld_union_num.ldd[7];
*intp=fmath_ld_union_int.bf;
return fmath_ld_union_num.bf-fmath_ld_union_int.bf;
*/
return 0.0;
};
double fmath_dpow(double base, double exponent)
{ //TODO:
/* double value=1.0;
if (base<=0.0) return base;
//2^(x*log2(10)) = 2^y = 10^x
__asm__ __volatile__ ( \
"fyl2x # ST(1):=ST(1)*log2(ST(0)), pop st(0) \n\t " \
"fld %%st(0) \n\t" \
"frndint \n\t" \
"fxch %%st(1) \n\t" \
"fsub %%st(1),%%st(0) \n\t" \
"f2xm1 # ST := 2^ST -1\n\t" \
"fld1 \n\t" \
"faddp %%st(0),%%st(1) \n\t" \
"fscale #ST:=ST*2^(ST(1))\n\t" \
"fstp %%st(1) \n\t" \
"" : "=t" (value) : "0" (base), "u" (exponent) );
return value;
*/
return 1.0;
}
int fmath_is_nan(double num)
{
/* __u16 exp;
fmath_ld_union_t fmath_ld_union;
fmath_ld_union.bf = num;
exp=(((fmath_ld_union.ldd[7])&0x7f)<<4) + (((fmath_ld_union.ldd[6])&0xf0)>>4); // exponent is 11 bits lenght, so sevent bits is in 8th byte and 4 bits in 7th
if (exp!=0x07ff) return 0;
if (fmath_get_binary_mantisa(num)>=FMATH_NAN) return 1;
*/
return 0;
}
int fmath_is_infinity(double num)
{
/* __u16 exp;
fmath_ld_union_t fmath_ld_union;
fmath_ld_union.bf = num;
exp=(((fmath_ld_union.ldd[7])&0x7f)<<4) + (((fmath_ld_union.ldd[6])&0xf0)>>4); // exponent is 11 bits lenght, so sevent bits is in 8th byte and 4 bits in 7th
if (exp!=0x07ff) return 0;
if (fmath_get_binary_mantisa(num)==0x0) return 1;
*/ return 0;
}

/SPARTAN/trunk/arch/mips/src/putchar.c
0,0 → 1,42
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <putchar.h>
#include <arch/types.h>
#include <arch/cp0.h>
#define VIDEORAM 0xB0000000
void putchar(const char ch)
{
// __u32 status = cp0_status_read();
// cp0_status_write(cp0_status_read() | cp0_status_erl_error_bit);
*((char *) VIDEORAM) = ch;
// cp0_status_write(status);
}

/SPARTAN/trunk/arch/mips/src/cpu/cpu.c
0,0 → 1,95
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/cpu.h>
#include <cpu.h>
#include <arch.h>
#include <arch/cp0.h>
#include <typedefs.h>
#include <print.h>
struct {
char *vendor;
char *model;
} imp_data[] = {
{ "Invalid", "Invalid" }, /* 0x00 */
{ "MIPS", "R2000" }, /* 0x01 */
{ "MIPS", "R3000" }, /* 0x02 */
{ "MIPS", "R6000" }, /* 0x03 */
{ "MIPS", " R4000/R4400" }, /* 0x04 */
{ "LSI Logic", "R3000" }, /* 0x05 */
{ "MIPS", "R6000A" }, /* 0x06 */
{ "IDT", "3051/3052" }, /* 0x07 */
{ "Invalid", "Invalid" }, /* 0x08 */
{ "MIPS", "R10000/T5" }, /* 0x09 */
{ "MIPS", "R4200" }, /* 0x0a */
{ "Unknown", "Unknown" }, /* 0x0b */
{ "Unknown", "Unknown" }, /* 0x0c */
{ "Invalid", "Invalid" }, /* 0x0d */
{ "Invalid", "Invalid" }, /* 0x0e */
{ "Invalid", "Invalid" }, /* 0x0f */
{ "MIPS", "R8000" }, /* 0x10 */
{ "Invalid", "Invalid" }, /* 0x11 */
{ "Invalid", "Invalid" }, /* 0x12 */
{ "Invalid", "Invalid" }, /* 0x13 */
{ "Invalid", "Invalid" }, /* 0x14 */
{ "Invalid", "Invalid" }, /* 0x15 */
{ "Invalid", "Invalid" }, /* 0x16 */
{ "Invalid", "Invalid" }, /* 0x17 */
{ "Invalid", "Invalid" }, /* 0x18 */
{ "Invalid", "Invalid" }, /* 0x19 */
{ "Invalid", "Invalid" }, /* 0x1a */
{ "Invalid", "Invalid" }, /* 0x1b */
{ "Invalid", "Invalid" }, /* 0x1c */
{ "Invalid", "Invalid" }, /* 0x1d */
{ "Invalid", "Invalid" }, /* 0x1e */
{ "Invalid", "Invalid" }, /* 0x1f */
{ "QED", "R4600" }, /* 0x20 */
{ "Sony", "R3000" }, /* 0x21 */
{ "Toshiba", "R3000" }, /* 0x22 */
{ "NKK", "R3000" } /* 0x23 */
};
void cpu_arch_init(void)
{
}
void cpu_identify(void)
{
CPU->arch.rev_num = cp0_prid_read() & 0xff;
CPU->arch.imp_num = (cp0_prid_read() >> 8) & 0xff;
}
void cpu_print_report(cpu_t *m)
{
printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n",
m->id, imp_data[m->arch.imp_num].vendor, imp_data[m->arch.imp_num].model, m->arch.rev_num >> 4, m->arch.rev_num & 0xf, m->arch.imp_num);
}

/SPARTAN/trunk/arch/mips/src/interrupt.c
0,0 → 1,95
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/interrupt.h>
#include <arch/types.h>
#include <arch.h>
#include <arch/cp0.h>
#include <time/clock.h>
#include <panic.h>
pri_t cpu_priority_high(void)
{
pri_t pri = (pri_t) cp0_status_read();
cp0_status_write(pri & ~cp0_status_ie_enabled_bit);
return pri;
}
pri_t cpu_priority_low(void)
{
pri_t pri = (pri_t) cp0_status_read();
cp0_status_write(pri | cp0_status_ie_enabled_bit);
return pri;
}
void cpu_priority_restore(pri_t pri)
{
cp0_status_write(cp0_status_read() | (pri & cp0_status_ie_enabled_bit));
}
pri_t cpu_priority_read(void)
{
return cp0_status_read();
}
void interrupt(void)
{
__u32 cause;
int i;
/* decode interrupt number and process the interrupt */
cause = (cp0_cause_read() >> 8) &0xff;
for (i = 0; i < 8; i++) {
if (cause & (1 << i)) {
switch (i) {
case 0: /* SW0 - Software interrupt 0 */
cp0_cause_write(cause & ~(1 << 8)); /* clear SW0 interrupt */
break;
case 1: /* SW1 - Software interrupt 1 */
cp0_cause_write(cause & ~(1 << 9)); /* clear SW1 interrupt */
break;
case 2: /* IRQ0 */
case 3: /* IRQ1 */
case 4: /* IRQ2 */
case 5: /* IRQ3 */
case 6: /* IRQ4 */
panic("unhandled interrupt %d\n", i);
break;
case 7: /* Timer Interrupt */
cp0_compare_write(cp0_compare_value); /* clear timer interrupt */
/* start counting over again */
cp0_count_write(0);
clock();
break;
}
}
}
}

/SPARTAN/trunk/arch/mips/src/cache.c
0,0 → 1,35
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/cache.h>
#include <panic.h>
void cache_error(void)
{
panic("cache_error exception\n");
}

/SPARTAN/trunk/arch/mips/include/asm/boot.h
0,0 → 1,40
/*
* Copyright (C) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_BOOT_H_
#define __mips_BOOT_H_
/* Temporary stack size for boot process */
#define TEMP_STACK_SIZE 0x100
/* Kernel startup address */
#define KERNEL_STARTUP_ADDRESS 0x80000300
#endif

/SPARTAN/trunk/arch/mips/include/asm/regname.h
0,0 → 1,61
#ifndef __mips_REGNAME_H_
#define __mips_REGNAME_H_
#define zero 0
#define at 1
#define v0 2
#define v1 3
#define a0 4
#define a1 5
#define a2 6
#define a3 7
#define t0 8
#define t1 9
#define t2 10
#define t3 11
#define t4 12
#define t5 13
#define t6 14
#define t7 15
#define s0 16
#define s1 17
#define s2 18
#define s3 19
#define s4 20
#define s5 21
#define s6 22
#define s7 23
#define t8 24
#define t9 25
#define k0 26
#define k1 27
#define gp 28
#define sp 29
#define s8 30
#define ra 31
#define index 0
#define random 1
#define entrylo0 2
#define entrylo1 3
#define context 4
#define pagemask 5
#define wired 6
#define badvaddr 8
#define count 9
#define entryhi 10
#define compare 11
#define status 12
#define cause 13
#define epc 14
#define config 16
#define lladdr 17
#define watchlo 18
#define watchhi 19
#define xcontext 20
#define debug 23
#define depc 24
#define eepc 30
#endif /* _REGNAME_H_ */

/SPARTAN/trunk/arch/mips/include/thread.h
0,0 → 1,34
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_THREAD_H__
#define __mips_THREAD_H__
#define ARCH_THREAD_DATA __u32 saved_epc;
#endif

/SPARTAN/trunk/arch/mips/include/asm.h
0,0 → 1,57
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __MIPS_ASM_H__
#define __MIPS_ASM_H__
#include <arch/types.h>
#include <typedefs.h>
#include <config.h>
#define cpu_sleep() ;
/** Return base address of current stack
*
* Return the base address of the current stack.
* The stack is assumed to be STACK_SIZE bytes long.
* The stack must start on page boundary.
*/
static inline __address get_stack_base(void)
{
__address v;
__asm__ volatile ("and %0, $29, %1\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
return v;
}
extern void cpu_halt(void);
extern void asm_delay_loop(__u32 t);
extern void userspace_asm(__address ustack);
#endif

/SPARTAN/trunk/arch/mips/include/cp0.h
0,0 → 1,94
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __CP0_H__
#define __CP0_H__
#include <arch/types.h>
#define cp0_status_ie_enabled_bit (1<<0)
#define cp0_status_exl_exception_bit (1<<1)
#define cp0_status_erl_error_bit (1<<2)
#define cp0_status_bev_bootstrap_bit (1<<22)
#define cp0_status_um_bit (1<<4)
#define cp0_status_im7_shift 15
/*
* Magic value for use in msim.
* On AMD Duron 800Mhz, this roughly seems like one us.
*/
#define cp0_compare_value 10000
extern __u32 cp0_index_read(void);
extern void cp0_idnex_write(__u32 val);
extern __u32 cp0_random_read(void);
extern __u32 cp0_entry_lo0_read(void);
extern void cp0_entry_lo0_write(__u32 val);
extern __u32 cp0_entry_lo1_read(void);
extern void cp0_entry_lo1_write(__u32 val);
extern __u32 cp0_context_read(void);
extern void cp0_context_write(__u32 val);
extern __u32 cp0_pagemask_read(void);
extern void cp0_pagemask_write(__u32 val);
extern __u32 cp0_wired_read(void);
extern void cp0_wired_write(__u32 val);
extern __u32 cp0_badvaddr_read(void);
extern volatile __u32 cp0_count_read(void);
extern void cp0_count_write(__u32 val);
extern volatile __u32 cp0_entry_hi_read(void);
extern void cp0_entry_hi_write(__u32 val);
extern volatile __u32 cp0_compare_read(void);
extern void cp0_compare_write(__u32 val);
extern __u32 cp0_status_read(void);
extern void cp0_status_write(__u32 val);
extern __u32 cp0_cause_read(void);
extern void cp0_cause_write(__u32 val);
extern __u32 cp0_epc_read(void);
extern void cp0_epc_write(__u32 val);
extern __u32 cp0_prid_read(void);
extern void tlbp(void);
extern void tlbr(void);
extern void tlbwi(void);
extern void tlbwr(void);
#endif

/SPARTAN/trunk/arch/mips/include/mm/vm.h
0,0 → 1,43
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_VM_H__
#define __mips_VM_H__
#include <arch/types.h>
#define KERNEL_ADDRESS_SPACE_START_ARCH (__address) 0x80000000
#define KERNEL_ADDRESS_SPACE_END_ARCH (__address) 0xffffffff
#define USER_ADDRESS_SPACE_START_ARCH (__address) 0x00000000
#define USER_ADDRESS_SPACE_END_ARCH (__address) 0x7fffffff
#define UTEXT_ADDRESS_ARCH 0x00004000
#define USTACK_ADDRESS_ARCH (0x80000000-PAGE_SIZE)
#define UDATA_ADDRESS_ARCH 0x01001000
#endif

/SPARTAN/trunk/arch/mips/include/mm/page.h
0,0 → 1,121
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_PAGE_H__
#define __mips_PAGE_H__
#define PAGE_SIZE FRAME_SIZE
#ifndef __ASM__
# define KA2PA(x) (((__address) (x)) - 0x80000000)
# define PA2KA(x) (((__address) (x)) + 0x80000000)
#else
# define KA2PA(x) ((x) - 0x80000000)
# define PA2KA(x) ((x) + 0x80000000)
#endif
/*
* Implementation of generic 4-level page table interface.
* NOTE: this implementation is under construction
*
* Page table layout:
* - 32-bit virtual addresses
* - Offset is 14 bits => pages are 16K long
* - PTE's use the same format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long
* - PTL0 has 64 entries (6 bits)
* - PTL1 is not used
* - PTL2 is not used
* - PTL3 has 4096 entries (12 bits)
*/
#define PTL0_INDEX_ARCH(vaddr) ((vaddr)>>26)
#define PTL1_INDEX_ARCH(vaddr) 0
#define PTL2_INDEX_ARCH(vaddr) 0
#define PTL3_INDEX_ARCH(vaddr) (((vaddr)>>14)&0xfff)
#define GET_PTL0_ADDRESS_ARCH() (PTL0)
#define SET_PTL0_ADDRESS_ARCH(ptl0) (PTL0 = (pte_t *)(ptl0))
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *)(ptl0))[(i)].pfn<<14)
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *)(ptl3))[(i)].pfn<<14)
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *)(ptl0))[(i)].pfn = (a)>>14)
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *)(ptl3))[(i)].pfn = (a)>>14)
#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i))
#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT
#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT
#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i))
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
#ifndef __ASM__
#include <arch/mm/tlb.h>
#include <mm/page.h>
#include <arch/mm/frame.h>
#include <arch/types.h>
static inline int get_pt_flags(pte_t *pt, index_t i)
{
pte_t *p = &pt[i];
return (
((p->c>PAGE_UNCACHED)<<PAGE_CACHEABLE_SHIFT) |
((!p->v)<<PAGE_PRESENT_SHIFT) |
(1<<PAGE_USER_SHIFT) |
(1<<PAGE_READ_SHIFT) |
((p->d)<<PAGE_WRITE_SHIFT) |
(1<<PAGE_EXEC_SHIFT)
);
}
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
{
pte_t *p = &pt[i];
p->c = (flags & PAGE_CACHEABLE) != 0 ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED;
p->v = !(flags & PAGE_NOT_PRESENT);
p->d = (flags & PAGE_WRITE) != 0;
}
extern void page_arch_init(void);
extern pte_t *PTL0;
#endif /* __ASM__ */
#endif

/SPARTAN/trunk/arch/mips/include/mm/memory_init.h
0,0 → 1,36
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_MEMORY_INIT_H__
#define __mips_MEMORY_INIT_H__
#include <config.h>
#define get_memory_size() CONFIG_MEMORY_SIZE
#endif

/SPARTAN/trunk/arch/mips/include/mm/asid.h
0,0 → 1,34
/*
* Copyright (C) 2005 Matrin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_ASID_H__
#define __mips_ASID_H__
extern void asid_bitmap_reset(void);
#endif

/SPARTAN/trunk/arch/mips/include/mm/frame.h
0,0 → 1,36
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_FRAME_H__
#define __mips_FRAME_H__
#define FRAME_SIZE 16384
extern void frame_arch_init(void);
#endif

/SPARTAN/trunk/arch/mips/include/mm/tlb.h
0,0 → 1,69
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_TLB_H__
#define __mips_TLB_H__
#define PAGE_UNCACHED 2
#define PAGE_CACHEABLE_EXC_WRITE 5
struct entry_lo {
unsigned g : 1; /* global bit */
unsigned v : 1; /* valid bit */
unsigned d : 1; /* dirty/write-protect bit */
unsigned c : 3; /* cache coherency attribute */
unsigned pfn : 24; /* frame number */
unsigned : 2;
} __attribute__ ((packed));
struct entry_hi {
unsigned asid : 8;
unsigned : 4;
unsigned g : 1;
unsigned vpn2 : 19;
} __attribute__ ((packed));
struct page_mask {
unsigned : 13;
unsigned mask : 12;
unsigned : 7;
} __attribute__ ((packed));
struct tlb_entry {
struct entry_lo lo0;
struct entry_lo lo1;
struct entry_hi hi;
struct page_mask mask;
} __attribute__ ((packed));
typedef struct entry_lo pte_t;
extern void tlb_refill(void);
extern void tlb_invalid(void);
#endif

/SPARTAN/trunk/arch/mips/include/context.h
0,0 → 1,109
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_CONTEXT_H__
#define __mips_CONTEXT_H__
#define STACK_ITEM_SIZE 4
/* These are offsets into the register dump saved
* on exception entry
*/
#define EOFFSET_AT 0
#define EOFFSET_V0 4
#define EOFFSET_V1 8
#define EOFFSET_A0 12
#define EOFFSET_A1 16
#define EOFFSET_A2 20
#define EOFFSET_A3 24
#define EOFFSET_A4 28
#define EOFFSET_T1 32
#define EOFFSET_T2 36
#define EOFFSET_T3 40
#define EOFFSET_T4 44
#define EOFFSET_T5 48
#define EOFFSET_T6 52
#define EOFFSET_T7 56
#define EOFFSET_T8 60
#define EOFFSET_T9 64
#define EOFFSET_S0 68
#define EOFFSET_S1 72
#define EOFFSET_S2 76
#define EOFFSET_S3 80
#define EOFFSET_S4 84
#define EOFFSET_S5 88
#define EOFFSET_S6 92
#define EOFFSET_S7 96
#define EOFFSET_S8 100
#define EOFFSET_GP 104
#define EOFFSET_RA 108
#define EOFFSET_SP 112
#define EOFFSET_LO 116
#define EOFFSET_HI 120
#define EOFFSET_STATUS 124
#define REGISTER_SPACE 128
/*
* Put one item onto the stack to support get_stack_base().
*/
#define SP_DELTA (0+STACK_ITEM_SIZE)
#ifndef __ASM__
#ifndef __mips_TYPES_H_
# include <arch/types.h>
#endif
/*
* Only save registers that must be preserved across
* function calls.
*/
struct context {
__u32 sp;
__u32 pc;
__u32 s0;
__u32 s1;
__u32 s2;
__u32 s3;
__u32 s4;
__u32 s5;
__u32 s6;
__u32 s7;
__u32 s8;
__u32 gp;
__u32 pri;
};
#endif /* __ASM__ */
#endif

/SPARTAN/trunk/arch/mips/include/byteorder.h
0,0 → 1,35
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_BYTEORDER_H__
#define __mips_BYTEORDER_H__
/* MIPS is little-endian */
#define native_le2host(n) n
#endif

/SPARTAN/trunk/arch/mips/include/fmath.h
0,0 → 1,64
/*
* Copyright (C) 2005 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/types.h>
#define FMATH_EXPONENT_BIAS 1023
typedef unsigned char fmath_ld_descr_t[8];
typedef union { double bf; unsigned char ldd[8]; } fmath_ld_union_t;
/**returns exponent in binary encoding*/
signed short fmath_get_binary_exponent(double num);
/**returns exponent in decimal encoding*/
double fmath_get_decimal_exponent(double num);
/**returns mantisa in binary encoding */
__u64 fmath_get_binary_mantisa(double num) ;
/** Function for extract integer part from double
* @param num input value
* @param intp integer part of num
* @return non-integer part
*/
double fmath_fint(double num, double *intp);
/** count base^exponent from positive exponent
* @param base
* @param exponent - Must be > 0.0
* @return base^exponent or 0.0 (if exponent <=0.0)
*/
double fmath_dpow(double base, double exponent) ;
/** return 1, if num is NaN */
int fmath_is_nan(double num);
/** return 1, if fmath is a infinity */
int fmath_is_infinity(double num);

/SPARTAN/trunk/arch/mips/include/debug.h
0,0 → 1,45
/*
* Copyright (C) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_DEBUG_H__
#define __mips_DEBUG_H__
/** simulator enters the trace mode */
#define ___traceon() asm volatile ( "\t.word\t0x39\n");
/** simulator leaves the trace mode */
#define ___traceoff() asm volatile ( "\t.word\t0x3d\n");
/** register dump */
#define ___regview() asm volatile ( "\t.word\t0x37\n");
/** halt the simulator */
#define ___halt() asm volatile ( "\t.word\t0x28\n");
/** simulator enters interactive mode */
#define ___intmode() asm volatile ( "\t.word\t0x29\n");
#endif

/SPARTAN/trunk/arch/mips/include/atomic.h
0,0 → 1,96
/*
* Copyright (C) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __MIPS_ATOMIC_H__
#define __MIPS_ATOMIC_H__
#define atomic_inc(x) (a_add(x,1))
#define atomic_dec(x) (a_sub(x,1))
/*
* Atomic addition
*
* This case is harder, and we have to use the special LL and SC operations
* to achieve atomicity. The instructions are similar to LW (load) and SW
* (store), except that the LL (load-linked) instruction loads the address
* of the variable to a special register and if another process writes to
* the same location, the SC (store-conditional) instruction fails.
*/
static inline int a_add( volatile int *val, int i)
{
int tmp, tmp2;
asm volatile (
" .set push\n"
" .set noreorder\n"
" nop\n"
"1:\n"
" ll %0, %1\n"
" addu %0, %0, %3\n"
" move %2, %0\n"
" sc %0, %1\n"
" beq %0, 0x0, 1b\n"
" move %0, %2\n"
" .set pop\n"
: "=&r" (tmp), "=o" (*val), "=r" (tmp2)
: "r" (i)
);
return tmp;
}
/*
* Atomic subtraction
*
* Implemented in the same manner as a_add, except we substract the value.
*/
static inline int a_sub( volatile int *val, int i)
{
int tmp, tmp2;
asm volatile (
" .set push\n"
" .set noreorder\n"
" nop\n"
"1:\n"
" ll %0, %1\n"
" subu %0, %0, %3\n"
" move %2, %0\n"
" sc %0, %1\n"
" beq %0, 0x0, 1b\n"
" move %0, %2\n"
" .set pop\n"
: "=&r" (tmp), "=o" (*val), "=r" (tmp2)
: "r" (i)
);
return tmp;
}
#endif

/SPARTAN/trunk/arch/mips/include/arch.h
0,0 → 1,32
/*
* Copyright (C) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_ARCH_H__
#define __mips_ARCH_H__
#endif

/SPARTAN/trunk/arch/mips/include/cpu.h
0,0 → 1,37
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_CPU_H__
#define __mips_CPU_H__
struct cpu_arch {
int imp_num;
int rev_num;
};
#endif

/SPARTAN/trunk/arch/mips/include/barrier.h
0,0 → 1,42
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_BARRIER_H__
#define __mips_BARRIER_H__
/*
* TODO: implement true MIPS memory barriers for macros below.
*/
#define CS_ENTER_BARRIER() __asm__ volatile ("" ::: "memory")
#define CS_LEAVE_BARRIER() __asm__ volatile ("" ::: "memory")
#define memory_barrier()
#define read_barrier()
#define write_barrier()
#endif

/SPARTAN/trunk/arch/mips/include/exception.h
0,0 → 1,53
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __EXCEPTION_H__
#define __EXCEPTION_H__
#define EXC_Int 0
#define EXC_Mod 1
#define EXC_TLBL 2
#define EXC_TLBS 3
#define EXC_AdEL 4
#define EXC_AdES 5
#define EXC_IBE 6
#define EXC_DBE 7
#define EXC_Sys 8
#define EXC_Bp 9
#define EXC_RI 10
#define EXC_CpU 11
#define EXC_Ov 12
#define EXC_Tr 13
#define EXC_VCEI 14
#define EXC_FPE 15
#define EXC_WATCH 23
#define EXC_VCED 31
extern void exception(void);
#endif

/SPARTAN/trunk/arch/mips/include/fpu_context.h
0,0 → 1,41
/*
* Copyright (C) 2005 Jakub Vana
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_FPU_CONTEXT_H__
#define __mips_FPU_CONTEXT_H__
#include <arch/types.h>
struct fpu_context {
/* TODO: define MIPS FPU context */
};
#endif

/SPARTAN/trunk/arch/mips/include/faddr.h
0,0 → 1,36
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_FADDR_H__
#define __mips_FADDR_H__
#include <arch/types.h>
#define FADDR(fptr) ((__address) (fptr))
#endif

/SPARTAN/trunk/arch/mips/include/arg.h
0,0 → 1,34
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __mips_ARG_H__
#define __mips_ARG_H__
#include <stackarg.h>
#endif

/SPARTAN/trunk/arch/mips/include/types.h
0,0 → 1,47
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __TYPES_H__
#define __TYPES_H__
#define NULL 0
typedef signed char __s8;
typedef unsigned char __u8;
typedef unsigned short __u16;
typedef unsigned long __u32;
typedef long long __u64;
typedef __u32 __address;
typedef __u32 pri_t;
typedef __u32 __native;
#endif

/SPARTAN/trunk/arch/mips/include/interrupt.h
0,0 → 1,34
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __INTERRUPT_H__
#define __INTERRUPT_H__
extern void interrupt(void);
#endif

/SPARTAN/trunk/arch/mips/include/cache.h
0,0 → 1,34
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __CACHE_H__
#define __CACHE_H__
extern void cache_error(void);
#endif

/SPARTAN/trunk/arch/mips/Makefile.inc
0,0 → 1,37
MIPS_TARGET=mipsel-linux-gnu
MIPS_CC_DIR=/usr/local/mipsel/bin
MIPS_BINUTILS_DIR=/usr/local/mipsel/bin
CC=$(MIPS_CC_DIR)/$(MIPS_TARGET)-gcc
AS=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-as
LD=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-ld
OBJDUMP=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-objdump
OBJCOPY=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-objcopy
BFD_NAME=elf32-tradlittlemips
BFD_ARCH=mips
ASFLAGS=-mips3
DEFS=-DARCH=$(ARCH)
CPPFLAGS=$(DEFS) -mno-abicalls -nostdinc -I../include
CFLAGS=$(CPPFLAGS) -mips2 -G 0 -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O2 -msoft-float
LFLAGS=-mips2 -M -no-check-sections
arch_sources= \
arch/start.S \
arch/context.S \
arch/panic.S \
arch/mips.c \
arch/dummy.S \
arch/putchar.c \
arch/asm.S \
arch/exception.c \
arch/interrupt.c \
arch/cache.c \
arch/cpu/cpu.c \
arch/mm/frame.c \
arch/mm/page.c \
arch/mm/tlb.c \
arch/fpu_context.c \
arch/fmath.c

/SPARTAN/trunk/arch/mips/boot/boot.S
0,0 → 1,43
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
.text
.set noat
.set noreorder
.set nomacro
#include <arch/asm/boot.h>
.global start
start:
lui $ra, KERNEL_STARTUP_ADDRESS >> 16
ori $ra, KERNEL_STARTUP_ADDRESS & 0xffff
j $ra
nop

/SPARTAN/trunk/arch/mips/boot/Makefile
0,0 → 1,26
MIPS_BINUTILS_DIR=/usr/local/mipsel/bin
MIPS_TARGET=mipsel-linux-gnu
.PHONY: nothing build
nothing:
build: boot.bin
cp boot.bin ../../../src/load.bin
AS=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-as
CC=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-gcc
LD=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-ld
ASFLAGS=-mips2 -I../../../include
LFLAGS=--oformat=binary -mips2 -e start
.S.o:
$(CC) $(ASFLAGS) -c -o $@ $<
boot.bin: boot.o
$(LD) $(LFLAGS) $< -o $@
clean:
-rm *.o *.bin

/SPARTAN/trunk/arch/mips/_link.ld
0,0 → 1,46
/*
* MIPS linker script
*
* kernel text
* kernel data
*
*/
OUTPUT_FORMAT(binary)
ENTRY(kernel_image_start)
SECTIONS {
.image 0x80000000: AT (0x80000000) {
_gp = 0x00000000;
ktext_start = .;
*(.text);
ktext_end = .;
kdata_start = .;
*(.reginfo);
*(.rodata);
*(.rodata.*);
*(.rdata);
*(.data); /* initialized data */
*(.lit8);
*(.lit4);
*(.sdata);
*(.sbss);
hardcoded_ktext_size = .;
LONG(ktext_end - ktext_start);
hardcoded_kdata_size = .;
LONG(kdata_end - kdata_start);
hardcoded_load_address = .;
LONG(0x80000000);
*(.bss); /* uninitialized static variables */
*(.scommon);
*(COMMON); /* global variables */
symbol_table = .;
*(symtab.*); /* Symbol table, must be LAST symbol!*/
kdata_end = .;
} = 0x00000000
}