/SPARTAN/trunk/arch/ia64/src/cpu/cpu.c |
---|
1,6 → 1,7 |
#include <cpu.h> |
#include <print.h> |
#include <panic.h> |
#include <arch/types.h> |
extern int IVT; |
14,15 → 15,26 |
int *p=&IVT; |
volatile __u64 hlp,hlp2; |
__asm__ ( |
int psr = 0x2000; |
__asm__ volatile ( |
"mov r15 = %0;;" |
"mov cr2 = r15;;" |
"mov psr.l = %1;;" |
: |
: "r" (p) |
: "r" (p), "r" (psr) |
: "r15" |
); |
/*Switch register bank of regs r16 .. r31 to 1 It is automaticly cleared on exception*/ |
__asm__ volatile ("bsw.1;;"); |
} |