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Ignore whitespace Rev 470 → Rev 472

/SPARTAN/trunk/arch/ia64/include/interrupt.h
30,11 → 30,20
#define __ia64_INTERRUPT_H__
 
#include <arch/types.h>
#include <arch/register.h>
 
/** External interrupt vectors. */
/** External Interrupt vectors. */
#define INTERRUPT_TIMER 0
#define INTERRUPT_SPURIOUS 15
 
/** General Exception codes. */
#define GE_ILLEGALOP 0
#define GE_PRIVOP 1
#define GE_PRIVREG 2
#define GE_RESREGFLD 3
#define GE_DISBLDISTRAN 4
#define GE_ILLEGALDEP 8
 
#define EOI 0 /**< The actual value doesn't matter. */
 
struct exception_regdump {
45,7 → 54,7
__u64 ar_pfs;
__u64 ar_rsc;
__address cr_ifa;
__u64 cr_isr;
cr_isr_t cr_isr;
__address cr_iipa;
__u64 cr_ips;
__address cr_iip;
/SPARTAN/trunk/arch/ia64/include/asm.h
220,12 → 220,10
*/
static inline void interrupts_restore(ipl_t ipl)
{
__asm__ volatile (
"mov psr.l = %0\n"
";;\n"
"srlz.d\n"
: : "r" ((__u64) ipl)
);
if (ipl & PSR_I_MASK)
(void) interrupts_enable();
else
(void) interrupts_disable();
}
 
/** Return interrupt priority level.
/SPARTAN/trunk/arch/ia64/include/register.h
29,10 → 29,13
#ifndef __ia64_REGISTER_H__
#define __ia64_REGISTER_H__
 
#ifndef __ASM__
#include <arch/types.h>
#endif
 
#define CR_IVR_MASK 0xf
#define PSR_I_MASK 0x4000
#define PSR_IC_MASK 0x2000
 
/** Application registers. */
#define AR_KR0 0
108,6 → 111,7
#define CR_LRR1 81
/* CR82-CR127 reserved */
 
#ifndef __ASM__
/** External Interrupt Vector Register */
union cr_ivr {
__u8 vector;
143,4 → 147,37
 
typedef union cr_itv cr_itv_t;
 
/** Interruption Status Register */
union cr_isr {
struct {
union {
/** General Exception code field structuring. */
struct {
unsigned ge_na : 4;
unsigned ge_code : 4;
} __attribute__ ((packed));
__u16 code;
};
__u8 vector;
unsigned : 8;
unsigned x : 1; /**< Execute exception. */
unsigned w : 1; /**< Write exception. */
unsigned r : 1; /**< Read exception. */
unsigned na : 1; /**< Non-access exception. */
unsigned sp : 1; /**< Speculative load exception. */
unsigned rs : 1; /**< Register stack. */
unsigned ir : 1; /**< Incomplete Register frame. */
unsigned ni : 1; /**< Nested Interruption. */
unsigned so : 1; /**< IA-32 Supervisor Override. */
unsigned ei : 2; /**< Excepting Instruction. */
unsigned ed : 1; /**< Exception Deferral. */
unsigned : 20;
} __attribute__ ((packed));
__u64 value;
};
 
typedef union cr_isr cr_isr_t;
 
#endif /* !__ASM__ */
 
#endif