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Ignore whitespace Rev 120 → Rev 125

/SPARTAN/trunk/arch/ia32/boot/boot.ld
1,4 → 1,4
OUTPUT_FORMAT(binary)
SECTIONS {
.text 0x7c00 : AT (0x0) { *(.text) }
.text 0x7c00 : AT (0x0) { *(.text) }
}
/SPARTAN/trunk/arch/ia32/boot/boot.S
50,7 → 50,7
_start_0x7c00:
xorw %ax,%ax # reset, %al will be used below
movw %ax,%dx # fd0, %dh and %dl will be used below
movw %dx,%ds
movw %dx,%ds
 
movw %dx,%ss # initialize stack
movw $stack,%sp
58,7 → 58,7
int $0x13 # reset floppy
jc stop_trying
 
movw %dx,%ds
movw %dx,%ds
movw %dx,%ss
movw $0x7c00,%sp
movw $0xffe0,%si # after next increment, %si will become 0x0000
92,13 → 92,13
 
movw logical_sector,%ax
divb sectors
 
movb %ah,%cl
incb %cl # sector
incb %cl # sector
 
movb %al,%ch
shrb $1,%ch # track
 
movb %al,%dh
andb $1,%dh # head
 
126,11 → 126,11
push %bp
movw %sp,%bp
pusha
 
movb $0xe,%ah
movb $7,%bl
int $0x10
 
popa
pop %bp
ret
/SPARTAN/trunk/arch/ia32/include/cpu.h
42,10 → 42,10
#endif
 
struct cpu_arch {
int vendor;
int family;
int model;
int stepping;
int vendor;
int family;
int model;
int stepping;
struct tss *tss;
};
 
/SPARTAN/trunk/arch/ia32/src/ia32.c
55,7 → 55,7
if (config.cpu_active == 1) {
bios_init();
i8042_init(); /* a20 bit */
i8259_init(); /* PIC */
i8259_init(); /* PIC */
i8254_init(); /* hard clock */
 
trap_register(VECTOR_SYSCALL, syscall);
/SPARTAN/trunk/arch/ia32/src/fpu_context.c
78,6 → 78,6
void fpu_init(void)
{
asm(
"fninit;"
"fninit;"
);
}
/SPARTAN/trunk/arch/ia32/src/asm.s
95,12 → 95,12
 
push %ds
push %es
 
# we must fill the data segment registers
movw $16,%ax
movw %ax,%ds
movw %ax,%es
 
movl $(\i),%edi
pushl %ebp
addl $4,(%esp)
113,9 → 113,9
 
popa
pop %ebp
iret
 
iret
 
.if (\n-\i)-1
handler "(\i+1)",\n
.endif
179,11 → 179,11
push %ebp
movl %esp,%ebp
pusha
 
movl 8(%ebp),%edx
movl 12(%ebp),%eax
outb %al,%dx
 
popa
pop %ebp
ret
197,11 → 197,11
push %ebp
movl %esp,%ebp
pusha
 
movl 8(%ebp),%edx
movl 12(%ebp),%eax
outw %ax,%dx
 
popa
pop %ebp
ret
215,11 → 215,11
push %ebp
movl %esp,%ebp
pusha
 
movl 8(%ebp),%edx
movl 12(%ebp),%eax
outl %eax,%dx
 
popa
pop %ebp
ret
239,14 → 239,14
push %ebp
movl %esp,%ebp
pusha
 
cld
movl CNT(%ebp),%ecx
movl DST(%ebp),%edi
movl SRC(%ebp),%esi
movl SRC(%ebp),%esi
 
rep movsb %ds:(%esi),%es:(%edi)
 
popa
pop %ebp
ret
265,15 → 265,15
push %ebp
movl %esp,%ebp
pusha
 
cld
movl CNT(%ebp),%ecx
movl DST(%ebp),%edi
movl X(%ebp),%eax
 
rep stosb %al,%es:(%edi)
popa
 
popa
pop %ebp
ret
 
291,15 → 291,15
push %ebp
movl %esp,%ebp
pusha
 
cld
movl CNT(%ebp),%ecx
movl DST(%ebp),%edi
movl X(%ebp),%eax
 
rep stosw %ax,%es:(%edi)
popa
 
popa
pop %ebp
ret
 
320,12 → 320,12
movl %esp,%ebp
 
pusha
 
cld
movl CNT(%ebp),%ecx
movl DST(%ebp),%edi
movl SRC(%ebp),%esi
movl SRC(%ebp),%esi
 
repe cmpsb %es:(%edi),%ds:(%esi)
movl %ecx,(%ebp)
 
/SPARTAN/trunk/arch/ia32/src/context.s
42,7 → 42,7
 
movl 4(%esp),%eax # the caller's return %eip
movl 8(%esp),%ebx # address of the kernel_context variable to save context to
movl %eax,4(%ebx) # %eip -> ctx->pc
movl %eax,4(%ebx) # %eip -> ctx->pc
movl %esp,(%ebx) # %esp -> ctx->sp
 
movl %ebx,%eax
53,8 → 53,8
movl %edx,16(%eax)
movl %esi,20(%eax)
movl %edi,24(%eax)
movl %ebp,28(%eax)
movl %ebp,28(%eax)
 
xorl %eax,%eax # context_save returns 1
incl %eax
ret
64,7 → 64,7
#
# Restore CPU context from the kernel_context variable
# pointed by the 1st argument. Returns 0 in EAX.
#
#
context_restore:
movl 4(%esp),%eax # address of the kernel_context variable to restore context from
movl (%eax),%esp # ctx->sp -> %esp
79,5 → 79,5
 
movl 4(%eax),%eax
movl %eax,(%esp) # ctx->pc -> saver's return %eip
xorl %eax,%eax # context_restore returns 0
xorl %eax,%eax # context_restore returns 0
ret
/SPARTAN/trunk/arch/ia32/src/cpu/cpu.c
108,10 → 108,7
/*
* Check for AMD processor.
*/
if (info.cpuid_ebx==AMD_CPUID_EBX &&
info.cpuid_ecx==AMD_CPUID_ECX &&
info.cpuid_edx==AMD_CPUID_EDX) {
if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
CPU->arch.vendor = VendorAMD;
}
 
118,12 → 115,8
/*
* Check for Intel processor.
*/
if (info.cpuid_ebx==INTEL_CPUID_EBX &&
info.cpuid_ecx==INTEL_CPUID_ECX &&
info.cpuid_edx==INTEL_CPUID_EDX) {
 
if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
CPU->arch.vendor = VendorIntel;
 
}
cpuid(1, &info);
/SPARTAN/trunk/arch/ia32/src/pm.c
45,18 → 45,18
* whole memory. One is for code and one is for data.
*/
struct descriptor gdt[GDT_ITEMS] = {
/* NULL descriptor */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
/* KTEXT descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
/* KDATA descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
/* UTEXT descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
/* UDATA descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
/* TSS descriptor - set up will be completed later */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
/* NULL descriptor */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
/* KTEXT descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
/* KDATA descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
/* UTEXT descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
/* UDATA descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
/* TSS descriptor - set up will be completed later */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
};
 
static struct idescriptor idt[IDT_ITEMS];
71,16 → 71,15
 
void gdt_setbase(struct descriptor *d, __address base)
{
d->base_0_15 = base & 0xffff;
d->base_16_23 = ((base) >> 16) & 0xff;
d->base_24_31 = ((base) >> 24) & 0xff;
 
d->base_0_15 = base & 0xffff;
d->base_16_23 = ((base) >> 16) & 0xff;
d->base_24_31 = ((base) >> 24) & 0xff;
}
 
void gdt_setlimit(struct descriptor *d, __u32 limit)
{
d->limit_0_15 = limit & 0xffff;
d->limit_16_19 = (limit >> 16) & 0xf;
d->limit_0_15 = limit & 0xffff;
d->limit_16_19 = (limit >> 16) & 0xf;
}
 
void idt_setoffset(struct idescriptor *d, __address offset)
104,7 → 103,7
{
struct idescriptor *d;
int i;
 
for (i = 0; i < IDT_ITEMS; i++) {
d = &idt[i];
 
/SPARTAN/trunk/arch/ia32/src/smp/mps.c
243,9 → 243,9
l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
l_intr_entry_cnt++;
ct_l_intr_entry((struct __l_intr_entry *) cur);
cur += 8;
cur += 8;
break;
 
default:
/*
* Something is wrong. Fallback to UP mode.
/SPARTAN/trunk/arch/ia32/src/smp/apic.c
84,7 → 84,7
int pin;
if ((pin = mps_irq_to_pin(i)) != -1)
io_apic_change_ioredtbl(pin,0xf,IVT_IRQBASE+i,LOPRI);
io_apic_change_ioredtbl(pin,0xf,IVT_IRQBASE+i,LOPRI);
}
 
136,7 → 136,7
printf("Received Illegal Vector\n");
if ((esr>>7) & 1)
printf("Illegal Register Address\n");
 
return !esr;
}
 
/SPARTAN/trunk/arch/ia32/src/boot/boot.S
56,7 → 56,7
movw %ax,%gs
movw %ax,%fs
movw %ax,%ds # kernel data + stack
movw %ax,%ss
movw %ax,%ss
movl $0x7c00,%esp
 
lidt idtr
/SPARTAN/trunk/arch/ia32/src/proc/scheduler.c
34,5 → 34,5
void before_thread_runs_arch(void)
{
CPU->arch.tss->esp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-8];
CPU->arch.tss->ss0 = selector(KDATA_DES);
CPU->arch.tss->ss0 = selector(KDATA_DES);
}
/SPARTAN/trunk/arch/ia32/src/cpuid.s
83,7 → 83,7
movl %ebx,4(%esi)
movl %ecx,8(%esi)
movl %edx,12(%esi)
 
popa
popl %ebp
ret
/SPARTAN/trunk/arch/ia32/src/mm/frame.c
39,7 → 39,7
if (config.cpu_active == 1) {
frame_not_free(0x0);
 
frame_region_not_free(0xa0000,0xff000);
frame_region_not_free(0xfec00000,0xffffffff);
frame_region_not_free(0xa0000,0xff000);
frame_region_not_free(0xfec00000,0xffffffff);
}
}
/SPARTAN/trunk/arch/ia32/src/mm/page.c
56,7 → 56,7
if (config.cpu_active == 1) {
dba = frame_alloc(FRAME_KA | FRAME_PANIC);
memsetb(dba, PAGE_SIZE, 0);
 
bootstrap_dba = dba;
 
/*
/SPARTAN/trunk/arch/ia32/src/userspace.c
46,13 → 46,13
pri = cpu_priority_high();
 
__asm__ volatile (""
"pushl %0\n"
"pushl %1\n"
"pushl %2\n"
"pushl %3\n"
"pushl %4\n"
"iret"
: : "i" (selector(UDATA_DES) | PL_USER), "i" (USTACK_ADDRESS+(THREAD_STACK_SIZE-1)), "r" (pri), "i" (selector(UTEXT_DES) | PL_USER), "i" (UTEXT_ADDRESS));
"pushl %0\n"
"pushl %1\n"
"pushl %2\n"
"pushl %3\n"
"pushl %4\n"
"iret"
: : "i" (selector(UDATA_DES) | PL_USER), "i" (USTACK_ADDRESS+(THREAD_STACK_SIZE-1)), "r" (pri), "i" (selector(UTEXT_DES) | PL_USER), "i" (UTEXT_ADDRESS));
/* Unreachable */
for(;;);
/SPARTAN/trunk/arch/ia32/src/acpi/acpi.c
84,31 → 84,31
 
void acpi_init(void)
{
__u8 *addr[2] = { NULL, (__u8 *) 0xe0000 };
int i, j, length[2] = { 1024, 128*1024 };
__u8 *addr[2] = { NULL, (__u8 *) 0xe0000 };
int i, j, length[2] = { 1024, 128*1024 };
__u64 *sig = (__u64 *) RSDP_SIGNATURE;
 
/*
/*
* Find Root System Description Pointer
* 1. search first 1K of EBDA
* 2. search 128K starting at 0xe0000
*/
* 1. search first 1K of EBDA
* 2. search 128K starting at 0xe0000
*/
 
addr[0] = (__u8 *) ebda;
for (i = (ebda ? 0 : 1); i < 2; i++) {
for (j = 0; j < length[i]; j += 16) {
if (*((__u64 *) &addr[i][j]) == *sig && rsdp_check(&addr[i][j])) {
acpi_rsdp = (struct acpi_rsdp *) &addr[i][j];
goto rsdp_found;
}
}
}
for (j = 0; j < length[i]; j += 16) {
if (*((__u64 *) &addr[i][j]) == *sig && rsdp_check(&addr[i][j])) {
acpi_rsdp = (struct acpi_rsdp *) &addr[i][j];
goto rsdp_found;
}
}
}
 
return;
return;
 
rsdp_found:
printf("%L: ACPI Root System Description Pointer\n", acpi_rsdp);
printf("%L: ACPI Root System Description Pointer\n", acpi_rsdp);
 
acpi_rsdt = (struct acpi_rsdt *) acpi_rsdp->rsdt_address;
if (acpi_rsdp->revision) acpi_xsdt = (struct acpi_xsdt *) ((__address) acpi_rsdp->xsdt_address);
 
137,7 → 137,7
for (j=0; j<sizeof(signature_map)/sizeof(struct acpi_signature_map); j++) {
struct acpi_sdt_header *h = (struct acpi_sdt_header *) acpi_rsdt->entry[i];
map_sdt(h);
map_sdt(h);
if (*((__u32 *) &h->signature[0])==*((__u32 *) &signature_map[j].signature[0])) {
if (!acpi_sdt_check((__u8 *) h))
goto next;
/SPARTAN/trunk/arch/ia32/src/interrupt.c
97,13 → 97,12
void nm_fault(__u8 n, __u32 stack[])
{
reset_TS_flag();
if ((CPU->fpu_owner)!=NULL)
{
fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context));
if ((CPU->fpu_owner)!=NULL) {
fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context));
(CPU->fpu_owner)->fpu_context_engaged=0; /* don't prevent migration */
}
if(THREAD->fpu_context_exists) fpu_lazy_context_restore(&(THREAD->saved_fpu_context));
else {fpu_init();THREAD->fpu_context_exists=1;}
else {fpu_init();THREAD->fpu_context_exists=1;}
CPU->fpu_owner=THREAD;
}
 
/SPARTAN/trunk/arch/ia32/src/drivers/i8259.c
44,23 → 44,23
 
/* ICW2: IRQ 0 maps to INT IRQBASE */
outb(PIC_PIC0PORT2, IVT_IRQBASE);
 
/* ICW3: pic1 using IRQ IRQ_PIC1 */
outb(PIC_PIC0PORT2, 1 << IRQ_PIC1);
/* ICW4: i8086 mode */
 
/* ICW4: i8086 mode */
outb(PIC_PIC0PORT2, 1);
 
/* ICW1: ICW1, ICW4 to follow */
outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
 
/* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
/* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
outb(PIC_PIC1PORT2, IVT_IRQBASE + 8);
 
/* ICW3: pic1 is known as PIC_PIC1ID */
outb(PIC_PIC1PORT2, PIC_PIC1ID);
 
/* ICW4: i8086 mode */
/* ICW4: i8086 mode */
outb(PIC_PIC1PORT2, 1);
 
/*
75,7 → 75,7
enable_irqs_function = pic_enable_irqs;
disable_irqs_function = pic_disable_irqs;
eoi_function = pic_eoi;
 
pic_disable_irqs(0xffff); /* disable all irq's */
pic_enable_irqs(1<<IRQ_PIC1); /* but enable pic1 */
}
83,13 → 83,13
void pic_enable_irqs(__u16 irqmask)
{
__u8 x;
 
if (irqmask & 0xff) {
x = inb(PIC_PIC0PORT2);
x = inb(PIC_PIC0PORT2);
outb(PIC_PIC0PORT2, x & (~(irqmask & 0xff)));
}
if (irqmask >> 8) {
x = inb(PIC_PIC1PORT2);
x = inb(PIC_PIC1PORT2);
outb(PIC_PIC1PORT2, x & (~(irqmask >> 8)));
}
}
97,13 → 97,13
void pic_disable_irqs(__u16 irqmask)
{
__u8 x;
 
if (irqmask & 0xff) {
x = inb(PIC_PIC0PORT2);
x = inb(PIC_PIC0PORT2);
outb(PIC_PIC0PORT2, x | (irqmask & 0xff));
}
if (irqmask >> 8) {
x = inb(PIC_PIC1PORT2);
x = inb(PIC_PIC1PORT2);
outb(PIC_PIC1PORT2, x | (irqmask >> 8));
}
}
111,7 → 111,7
void pic_eoi(void)
{
outb(0x20,0x20);
outb(0xa0,0x20);
outb(0xa0,0x20);
}
 
void pic_spurious(__u8 n, __u32 stack[])
/SPARTAN/trunk/arch/ia32/src/drivers/i8254.c
83,7 → 83,7
outb(CLK_PORT1, 0xff);
 
do {
/* will read both status and count */
/* will read both status and count */
outb(CLK_PORT4, 0xc2);
not_ok = (inb(CLK_PORT1)>>6)&1;
t1 = inb(CLK_PORT1);
109,11 → 109,8
o2 = inb(CLK_PORT1);
o2 |= inb(CLK_PORT1) << 8;
 
CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0);
 
CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) +
(((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0);
 
clk1 = rdtsc();
delay(1<<SHIFT);
clk2 = rdtsc();
/SPARTAN/trunk/arch/ia32/src/drivers/ega.c
69,7 → 69,7
void ega_check_cursor(void)
{
if (ega_cursor < SCREEN)
return;
return;
 
memcopy(PA2KA(VIDEORAM) + ROW*2, PA2KA(VIDEORAM), (SCREEN - ROW)*2);
memsetw(PA2KA(VIDEORAM) + (SCREEN - ROW)*2, ROW, 0x0720);
85,19 → 85,19
 
switch (ch) {
case '\n':
ega_cursor = (ega_cursor + ROW) - ega_cursor % ROW;
break;
ega_cursor = (ega_cursor + ROW) - ega_cursor % ROW;
break;
case '\t':
ega_cursor = (ega_cursor + 8) - ega_cursor % 8;
break;
ega_cursor = (ega_cursor + 8) - ega_cursor % 8;
break;
default:
ega_display_char(ch);
ega_cursor++;
break;
ega_display_char(ch);
ega_cursor++;
break;
}
ega_check_cursor();
ega_move_cursor();
 
spinlock_unlock(&egalock);
cpu_priority_restore(pri);
}