30,11 → 30,7 |
#define __ia32_ASM_H__ |
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#include <arch/types.h> |
#include <typedefs.h> |
#include <config.h> |
#include <synch/spinlock.h> |
#include <arch/boot/memmap.h> |
#include <config.h> |
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extern __u32 interrupt_handler_size; |
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61,8 → 57,8 |
* |
* Halt the current CPU until interrupt event. |
*/ |
static inline void cpu_halt(void) { __asm__("hlt"); }; |
static inline void cpu_sleep(void) { __asm__("hlt"); }; |
static inline void cpu_halt(void) { __asm__("hlt\n"); }; |
static inline void cpu_sleep(void) { __asm__("hlt\n"); }; |
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/** Read CR2 |
* |
70,7 → 66,7 |
* |
* @return Value read. |
*/ |
static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0" : "=r" (v)); return v; } |
static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0\n" : "=r" (v)); return v; } |
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/** Write CR3 |
* |
86,7 → 82,7 |
* |
* @return Value read. |
*/ |
static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0" : "=r" (v)); return v; } |
static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0\n" : "=r" (v)); return v; } |
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/** Set priority level low |
* |
161,4 → 157,13 |
return v; |
} |
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static inline __u64 rdtsc(void) |
{ |
__u64 v; |
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__asm__ volatile("rdtsc\n" : "=A" (v)); |
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return v; |
} |
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#endif |