| /SPARTAN/trunk/arch/ia32/include/smp/apic.h |
|---|
| 98,6 → 98,13 |
| #define L_APIC_IDShift 24 |
| #define L_APIC_IDMask 0xf |
| /* Local APIC Version Register */ |
| #define LAVR (0x030/sizeof(__u32)) |
| #define LAVR_Mask 0xff |
| #define is_local_apic(x) (((x)&LAVR_Mask&0xf0)==0x1) |
| #define is_82489DX_apic(x) ((((x)&LAVR_Mask&0xf0)==0x0)) |
| #define is_local_xapic(x) (((x)&LAVR_Mask)==0x14) |
| /* IO APIC */ |
| #define IOREGSEL (0x00/sizeof(__u32)) |
| #define IOWIN (0x10/sizeof(__u32)) |
| /SPARTAN/trunk/arch/ia32/include/asm.h |
|---|
| 58,4 → 58,7 |
| extern void halt_cpu(void); |
| extern void cpu_sleep(void); |
| extern void write_dr0(__u32 v); |
| extern __u32 read_dr0(void); |
| #endif |
| /SPARTAN/trunk/arch/ia32/include/cpu.h |
|---|
| 34,7 → 34,7 |
| #include <arch/pm.h> |
| #ifdef __SMP__ |
| #define CPU_ID_ARCH ((config.cpu_active>1)?l_apic_id():0) |
| #define CPU_ID_ARCH (read_dr0()) |
| #else |
| #define CPU_ID_ARCH (0) |
| #endif |