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/SPARTAN/trunk/arch/ia32/src/smp/apic.c
0,0 → 1,535
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/types.h>
#include <arch/smp/apic.h>
#include <arch/smp/ap.h>
#include <arch/smp/mps.h>
#include <mm/page.h>
#include <time/delay.h>
#include <arch/interrupt.h>
#include <print.h>
#include <arch/asm.h>
#include <arch.h>
#ifdef CONFIG_SMP
/*
* Advanced Programmable Interrupt Controller for SMP systems.
* Tested on:
* Bochs 2.0.2 - Bochs 2.2 with 2-8 CPUs
* Simics 2.0.28 - Simics 2.2.19 2-15 CPUs
* VMware Workstation 5.5 with 2 CPUs
* ASUS P/I-P65UP5 + ASUS C-P55T2D REV. 1.41 with 2x 200Mhz Pentium CPUs
* ASUS PCH-DL with 2x 3000Mhz Pentium 4 Xeon (HT) CPUs
* MSI K7D Master-L with 2x 2100MHz Athlon MP CPUs
*/
/*
* These variables either stay configured as initilalized, or are changed by
* the MP configuration code.
*
* Pay special attention to the volatile keyword. Without it, gcc -O2 would
* optimize the code too much and accesses to l_apic and io_apic, that must
* always be 32-bit, would use byte oriented instructions.
*/
volatile __u32 *l_apic = (__u32 *) 0xfee00000;
volatile __u32 *io_apic = (__u32 *) 0xfec00000;
__u32 apic_id_mask = 0;
static int apic_poll_errors(void);
#ifdef LAPIC_VERBOSE
static char *delmod_str[] = {
"Fixed",
"Lowest Priority",
"SMI",
"Reserved",
"NMI",
"INIT",
"STARTUP",
"ExtInt"
};
static char *destmod_str[] = {
"Physical",
"Logical"
};
static char *trigmod_str[] = {
"Edge",
"Level"
};
static char *mask_str[] = {
"Unmasked",
"Masked"
};
static char *delivs_str[] = {
"Idle",
"Send Pending"
};
static char *tm_mode_str[] = {
"One-shot",
"Periodic"
};
static char *intpol_str[] = {
"Polarity High",
"Polarity Low"
};
#endif /* LAPIC_VERBOSE */
/** Initialize APIC on BSP. */
void apic_init(void)
{
io_apic_id_t idreg;
int i;
trap_register(VECTOR_APIC_SPUR, apic_spurious);
enable_irqs_function = io_apic_enable_irqs;
disable_irqs_function = io_apic_disable_irqs;
eoi_function = l_apic_eoi;
/*
* Configure interrupt routing.
* IRQ 0 remains masked as the time signal is generated by l_apic's themselves.
* Other interrupts will be forwarded to the lowest priority CPU.
*/
io_apic_disable_irqs(0xffff);
trap_register(VECTOR_CLK, l_apic_timer_interrupt);
for (i = 0; i < IRQ_COUNT; i++) {
int pin;
if ((pin = smp_irq_to_pin(i)) != -1) {
io_apic_change_ioredtbl(pin, DEST_ALL, IVT_IRQBASE+i, LOPRI);
}
}
/*
* Ensure that io_apic has unique ID.
*/
idreg.value = io_apic_read(IOAPICID);
if ((1<<idreg.apic_id) & apic_id_mask) { /* see if IO APIC ID is used already */
for (i = 0; i < APIC_ID_COUNT; i++) {
if (!((1<<i) & apic_id_mask)) {
idreg.apic_id = i;
io_apic_write(IOAPICID, idreg.value);
break;
}
}
}
/*
* Configure the BSP's lapic.
*/
l_apic_init();
l_apic_debug();
}
/** APIC spurious interrupt handler.
*
* @param n Interrupt vector.
* @param stack Interrupted stack.
*/
void apic_spurious(__u8 n, __native stack[])
{
printf("cpu%d: APIC spurious interrupt\n", CPU->id);
}
/** Poll for APIC errors.
*
* Examine Error Status Register and report all errors found.
*
* @return 0 on error, 1 on success.
*/
int apic_poll_errors(void)
{
esr_t esr;
esr.value = l_apic[ESR];
if (esr.send_checksum_error)
printf("Send Checksum Error\n");
if (esr.receive_checksum_error)
printf("Receive Checksum Error\n");
if (esr.send_accept_error)
printf("Send Accept Error\n");
if (esr.receive_accept_error)
printf("Receive Accept Error\n");
if (esr.send_illegal_vector)
printf("Send Illegal Vector\n");
if (esr.received_illegal_vector)
printf("Received Illegal Vector\n");
if (esr.illegal_register_address)
printf("Illegal Register Address\n");
return !esr.err_bitmap;
}
/** Send all CPUs excluding CPU IPI vector.
*
* @param vector Interrupt vector to be sent.
*
* @return 0 on failure, 1 on success.
*/
int l_apic_broadcast_custom_ipi(__u8 vector)
{
icr_t icr;
icr.lo = l_apic[ICRlo];
icr.delmod = DELMOD_FIXED;
icr.destmod = DESTMOD_LOGIC;
icr.level = LEVEL_ASSERT;
icr.shorthand = SHORTHAND_ALL_EXCL;
icr.trigger_mode = TRIGMOD_LEVEL;
icr.vector = vector;
l_apic[ICRlo] = icr.lo;
icr.lo = l_apic[ICRlo];
if (icr.delivs == DELIVS_PENDING)
printf("IPI is pending.\n");
return apic_poll_errors();
}
/** Universal Start-up Algorithm for bringing up the AP processors.
*
* @param apicid APIC ID of the processor to be brought up.
*
* @return 0 on failure, 1 on success.
*/
int l_apic_send_init_ipi(__u8 apicid)
{
icr_t icr;
int i;
/*
* Read the ICR register in and zero all non-reserved fields.
*/
icr.lo = l_apic[ICRlo];
icr.hi = l_apic[ICRhi];
icr.delmod = DELMOD_INIT;
icr.destmod = DESTMOD_PHYS;
icr.level = LEVEL_ASSERT;
icr.trigger_mode = TRIGMOD_LEVEL;
icr.shorthand = SHORTHAND_NONE;
icr.vector = 0;
icr.dest = apicid;
l_apic[ICRhi] = icr.hi;
l_apic[ICRlo] = icr.lo;
/*
* According to MP Specification, 20us should be enough to
* deliver the IPI.
*/
delay(20);
if (!apic_poll_errors()) return 0;
icr.lo = l_apic[ICRlo];
if (icr.delivs == DELIVS_PENDING)
printf("IPI is pending.\n");
icr.delmod = DELMOD_INIT;
icr.destmod = DESTMOD_PHYS;
icr.level = LEVEL_DEASSERT;
icr.shorthand = SHORTHAND_NONE;
icr.trigger_mode = TRIGMOD_LEVEL;
icr.vector = 0;
l_apic[ICRlo] = icr.lo;
/*
* Wait 10ms as MP Specification specifies.
*/
delay(10000);
if (!is_82489DX_apic(l_apic[LAVR])) {
/*
* If this is not 82489DX-based l_apic we must send two STARTUP IPI's.
*/
for (i = 0; i<2; i++) {
icr.lo = l_apic[ICRlo];
icr.vector = ((__address) ap_boot) / 4096; /* calculate the reset vector */
icr.delmod = DELMOD_STARTUP;
icr.destmod = DESTMOD_PHYS;
icr.level = LEVEL_ASSERT;
icr.shorthand = SHORTHAND_NONE;
icr.trigger_mode = TRIGMOD_LEVEL;
l_apic[ICRlo] = icr.lo;
delay(200);
}
}
return apic_poll_errors();
}
/** Initialize Local APIC. */
void l_apic_init(void)
{
lvt_error_t error;
lvt_lint_t lint;
svr_t svr;
icr_t icr;
tdcr_t tdcr;
lvt_tm_t tm;
__u32 t1, t2;
/* Initialize LVT Error register. */
error.value = l_apic[LVT_Err];
error.masked = true;
l_apic[LVT_Err] = error.value;
/* Initialize LVT LINT0 register. */
lint.value = l_apic[LVT_LINT0];
lint.masked = true;
l_apic[LVT_LINT0] = lint.value;
/* Initialize LVT LINT1 register. */
lint.value = l_apic[LVT_LINT1];
lint.masked = true;
l_apic[LVT_LINT1] = lint.value;
/* Spurious-Interrupt Vector Register initialization. */
svr.value = l_apic[SVR];
svr.vector = VECTOR_APIC_SPUR;
svr.lapic_enabled = true;
l_apic[SVR] = svr.value;
l_apic[TPR] &= TPRClear;
if (CPU->arch.family >= 6)
enable_l_apic_in_msr();
/* Interrupt Command Register initialization. */
icr.lo = l_apic[ICRlo];
icr.delmod = DELMOD_INIT;
icr.destmod = DESTMOD_PHYS;
icr.level = LEVEL_DEASSERT;
icr.shorthand = SHORTHAND_ALL_INCL;
icr.trigger_mode = TRIGMOD_LEVEL;
l_apic[ICRlo] = icr.lo;
/* Timer Divide Configuration Register initialization. */
tdcr.value = l_apic[TDCR];
tdcr.div_value = DIVIDE_1;
l_apic[TDCR] = tdcr.value;
/* Program local timer. */
tm.value = l_apic[LVT_Tm];
tm.vector = VECTOR_CLK;
tm.mode = TIMER_PERIODIC;
tm.masked = false;
l_apic[LVT_Tm] = tm.value;
/* Measure and configure the timer to generate timer interrupt each ms. */
t1 = l_apic[CCRT];
l_apic[ICRT] = 0xffffffff;
while (l_apic[CCRT] == t1)
;
t1 = l_apic[CCRT];
delay(1000);
t2 = l_apic[CCRT];
l_apic[ICRT] = t1-t2;
}
/** Local APIC End of Interrupt. */
void l_apic_eoi(void)
{
l_apic[EOI] = 0;
}
/** Dump content of Local APIC registers. */
void l_apic_debug(void)
{
#ifdef LAPIC_VERBOSE
lvt_tm_t tm;
lvt_lint_t lint;
lvt_error_t error;
printf("LVT on cpu%d, LAPIC ID: %d\n", CPU->id, l_apic_id());
tm.value = l_apic[LVT_Tm];
printf("LVT Tm: vector=%B, %s, %s, %s\n", tm.vector, delivs_str[tm.delivs], mask_str[tm.masked], tm_mode_str[tm.mode]);
lint.value = l_apic[LVT_LINT0];
printf("LVT LINT0: vector=%B, %s, %s, %s, irr=%d, %s, %s\n", tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], mask_str[lint.masked]);
lint.value = l_apic[LVT_LINT1];
printf("LVT LINT1: vector=%B, %s, %s, %s, irr=%d, %s, %s\n", tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], mask_str[lint.masked]);
error.value = l_apic[LVT_Err];
printf("LVT Err: vector=%B, %s, %s\n", error.vector, delivs_str[error.delivs], mask_str[error.masked]);
#endif
}
/** Local APIC Timer Interrupt.
*
* @param n Interrupt vector number.
* @param stack Interrupted stack.
*/
void l_apic_timer_interrupt(__u8 n, __native stack[])
{
l_apic_eoi();
clock();
}
/** Get Local APIC ID.
*
* @return Local APIC ID.
*/
__u8 l_apic_id(void)
{
l_apic_id_t idreg;
idreg.value = l_apic[L_APIC_ID];
return idreg.apic_id;
}
/** Read from IO APIC register.
*
* @param address IO APIC register address.
*
* @return Content of the addressed IO APIC register.
*/
__u32 io_apic_read(__u8 address)
{
io_regsel_t regsel;
regsel.value = io_apic[IOREGSEL];
regsel.reg_addr = address;
io_apic[IOREGSEL] = regsel.value;
return io_apic[IOWIN];
}
/** Write to IO APIC register.
*
* @param address IO APIC register address.
* @param Content to be written to the addressed IO APIC register.
*/
void io_apic_write(__u8 address, __u32 x)
{
io_regsel_t regsel;
regsel.value = io_apic[IOREGSEL];
regsel.reg_addr = address;
io_apic[IOREGSEL] = regsel.value;
io_apic[IOWIN] = x;
}
/** Change some attributes of one item in I/O Redirection Table.
*
* @param pin IO APIC pin number.
* @param dest Interrupt destination address.
* @param v Interrupt vector to trigger.
* @param flags Flags.
*/
void io_apic_change_ioredtbl(int pin, int dest, __u8 v, int flags)
{
io_redirection_reg_t reg;
int dlvr = DELMOD_FIXED;
if (flags & LOPRI)
dlvr = DELMOD_LOWPRI;
reg.lo = io_apic_read(IOREDTBL + pin*2);
reg.hi = io_apic_read(IOREDTBL + pin*2 + 1);
reg.dest = dest;
reg.destmod = DESTMOD_LOGIC;
reg.trigger_mode = TRIGMOD_EDGE;
reg.intpol = POLARITY_HIGH;
reg.delmod = dlvr;
reg.intvec = v;
io_apic_write(IOREDTBL + pin*2, reg.lo);
io_apic_write(IOREDTBL + pin*2 + 1, reg.hi);
}
/** Mask IRQs in IO APIC.
*
* @param irqmask Bitmask of IRQs to be masked (0 = do not mask, 1 = mask).
*/
void io_apic_disable_irqs(__u16 irqmask)
{
io_redirection_reg_t reg;
int i, pin;
for (i=0;i<16;i++) {
if (irqmask & (1<<i)) {
/*
* Mask the signal input in IO APIC if there is a
* mapping for the respective IRQ number.
*/
pin = smp_irq_to_pin(i);
if (pin != -1) {
reg.lo = io_apic_read(IOREDTBL + pin*2);
reg.masked = true;
io_apic_write(IOREDTBL + pin*2, reg.lo);
}
}
}
}
/** Unmask IRQs in IO APIC.
*
* @param irqmask Bitmask of IRQs to be unmasked (0 = do not unmask, 1 = unmask).
*/
void io_apic_enable_irqs(__u16 irqmask)
{
int i, pin;
io_redirection_reg_t reg;
for (i=0;i<16;i++) {
if (irqmask & (1<<i)) {
/*
* Unmask the signal input in IO APIC if there is a
* mapping for the respective IRQ number.
*/
pin = smp_irq_to_pin(i);
if (pin != -1) {
reg.lo = io_apic_read(IOREDTBL + pin*2);
reg.masked = false;
io_apic_write(IOREDTBL + pin*2, reg.lo);
}
}
}
}
#endif /* CONFIG_SMP */

/SPARTAN/trunk/arch/ia32/src/smp/mps.c
0,0 → 1,427
/*
* Copyright (C) 2001-2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifdef CONFIG_SMP
#include <config.h>
#include <print.h>
#include <debug.h>
#include <arch/smp/mps.h>
#include <arch/smp/apic.h>
#include <arch/smp/smp.h>
#include <func.h>
#include <arch/types.h>
#include <typedefs.h>
#include <cpu.h>
#include <arch/asm.h>
#include <arch/bios/bios.h>
#include <mm/frame.h>
/*
* MultiProcessor Specification detection code.
*/
#define FS_SIGNATURE 0x5f504d5f
#define CT_SIGNATURE 0x504d4350
int mps_fs_check(__u8 *base);
int mps_ct_check(void);
int configure_via_ct(void);
int configure_via_default(__u8 n);
int ct_processor_entry(struct __processor_entry *pr);
void ct_bus_entry(struct __bus_entry *bus);
void ct_io_apic_entry(struct __io_apic_entry *ioa);
void ct_io_intr_entry(struct __io_intr_entry *iointr);
void ct_l_intr_entry(struct __l_intr_entry *lintr);
void ct_extended_entries(void);
static struct mps_fs *fs;
static struct mps_ct *ct;
struct __processor_entry *processor_entries = NULL;
struct __bus_entry *bus_entries = NULL;
struct __io_apic_entry *io_apic_entries = NULL;
struct __io_intr_entry *io_intr_entries = NULL;
struct __l_intr_entry *l_intr_entries = NULL;
int processor_entry_cnt = 0;
int bus_entry_cnt = 0;
int io_apic_entry_cnt = 0;
int io_intr_entry_cnt = 0;
int l_intr_entry_cnt = 0;
waitq_t ap_completion_wq;
waitq_t kmp_completion_wq;
/*
* Implementation of IA-32 SMP configuration interface.
*/
static count_t get_cpu_count(void);
static bool is_cpu_enabled(index_t i);
static bool is_bsp(index_t i);
static __u8 get_cpu_apic_id(index_t i);
static int mps_irq_to_pin(int irq);
struct smp_config_operations mps_config_operations = {
.cpu_count = get_cpu_count,
.cpu_enabled = is_cpu_enabled,
.cpu_bootstrap = is_bsp,
.cpu_apic_id = get_cpu_apic_id,
.irq_to_pin = mps_irq_to_pin
};
count_t get_cpu_count(void)
{
return processor_entry_cnt;
}
bool is_cpu_enabled(index_t i)
{
ASSERT(i < processor_entry_cnt);
return processor_entries[i].cpu_flags & 0x1;
}
bool is_bsp(index_t i)
{
ASSERT(i < processor_entry_cnt);
return processor_entries[i].cpu_flags & 0x2;
}
__u8 get_cpu_apic_id(index_t i)
{
ASSERT(i < processor_entry_cnt);
return processor_entries[i].l_apic_id;
}
/*
* Used to check the integrity of the MP Floating Structure.
*/
int mps_fs_check(__u8 *base)
{
int i;
__u8 sum;
for (i = 0, sum = 0; i < 16; i++)
sum += base[i];
return !sum;
}
/*
* Used to check the integrity of the MP Configuration Table.
*/
int mps_ct_check(void)
{
__u8 *base = (__u8 *) ct;
__u8 *ext = base + ct->base_table_length;
__u8 sum;
int i;
/* count the checksum for the base table */
for (i=0,sum=0; i < ct->base_table_length; i++)
sum += base[i];
if (sum)
return 0;
/* count the checksum for the extended table */
for (i=0,sum=0; i < ct->ext_table_length; i++)
sum += ext[i];
return sum == ct->ext_table_checksum;
}
void mps_init(void)
{
__u8 *addr[2] = { NULL, (__u8 *) PA2KA(0xf0000) };
int i, j, length[2] = { 1024, 64*1024 };
/*
* Find MP Floating Pointer Structure
* 1a. search first 1K of EBDA
* 1b. if EBDA is undefined, search last 1K of base memory
* 2. search 64K starting at 0xf0000
*/
addr[0] = (__u8 *) PA2KA(ebda ? ebda : 639 * 1024);
for (i = 0; i < 2; i++) {
for (j = 0; j < length[i]; j += 16) {
if (*((__u32 *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
fs = (struct mps_fs *) &addr[i][j];
goto fs_found;
}
}
}
return;
fs_found:
printf("%P: MPS Floating Pointer Structure\n", fs);
if (fs->config_type == 0 && fs->configuration_table) {
if (fs->mpfib2 >> 7) {
printf("%s: PIC mode not supported\n", __FUNCTION__);
return;
}
ct = (struct mps_ct *)PA2KA((__address)fs->configuration_table);
config.cpu_count = configure_via_ct();
}
else
config.cpu_count = configure_via_default(fs->config_type);
return;
}
int configure_via_ct(void)
{
__u8 *cur;
int i, cnt;
if (ct->signature != CT_SIGNATURE) {
printf("%s: bad ct->signature\n", __FUNCTION__);
return 1;
}
if (!mps_ct_check()) {
printf("%s: bad ct checksum\n", __FUNCTION__);
return 1;
}
if (ct->oem_table) {
printf("%s: ct->oem_table not supported\n", __FUNCTION__);
return 1;
}
l_apic = (__u32 *)(__address)ct->l_apic;
cnt = 0;
cur = &ct->base_table[0];
for (i=0; i < ct->entry_count; i++) {
switch (*cur) {
/* Processor entry */
case 0:
processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
processor_entry_cnt++;
cnt += ct_processor_entry((struct __processor_entry *) cur);
cur += 20;
break;
/* Bus entry */
case 1:
bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
bus_entry_cnt++;
ct_bus_entry((struct __bus_entry *) cur);
cur += 8;
break;
/* I/O Apic */
case 2:
io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
io_apic_entry_cnt++;
ct_io_apic_entry((struct __io_apic_entry *) cur);
cur += 8;
break;
/* I/O Interrupt Assignment */
case 3:
io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
io_intr_entry_cnt++;
ct_io_intr_entry((struct __io_intr_entry *) cur);
cur += 8;
break;
/* Local Interrupt Assignment */
case 4:
l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
l_intr_entry_cnt++;
ct_l_intr_entry((struct __l_intr_entry *) cur);
cur += 8;
break;
default:
/*
* Something is wrong. Fallback to UP mode.
*/
printf("%s: ct badness\n", __FUNCTION__);
return 1;
}
}
/*
* Process extended entries.
*/
ct_extended_entries();
return cnt;
}
int configure_via_default(__u8 n)
{
/*
* Not yet implemented.
*/
printf("%s: not supported\n", __FUNCTION__);
return 1;
}
int ct_processor_entry(struct __processor_entry *pr)
{
/*
* Ignore processors which are not marked enabled.
*/
if ((pr->cpu_flags & (1<<0)) == 0)
return 0;
apic_id_mask |= (1<<pr->l_apic_id);
return 1;
}
void ct_bus_entry(struct __bus_entry *bus)
{
#ifdef MPSCT_VERBOSE
char buf[7];
memcpy((void *) buf, (void *) bus->bus_type, 6);
buf[6] = 0;
printf("bus%d: %s\n", bus->bus_id, buf);
#endif
}
void ct_io_apic_entry(struct __io_apic_entry *ioa)
{
static int io_apic_count = 0;
/* this ioapic is marked unusable */
if (ioa->io_apic_flags & 1 == 0)
return;
if (io_apic_count++ > 0) {
/*
* Multiple IO APIC's are currently not supported.
*/
return;
}
io_apic = (__u32 *)(__address)ioa->io_apic;
}
//#define MPSCT_VERBOSE
void ct_io_intr_entry(struct __io_intr_entry *iointr)
{
#ifdef MPSCT_VERBOSE
switch (iointr->intr_type) {
case 0: printf("INT"); break;
case 1: printf("NMI"); break;
case 2: printf("SMI"); break;
case 3: printf("ExtINT"); break;
}
putchar(',');
switch (iointr->poel&3) {
case 0: printf("bus-like"); break;
case 1: printf("active high"); break;
case 2: printf("reserved"); break;
case 3: printf("active low"); break;
}
putchar(',');
switch ((iointr->poel>>2)&3) {
case 0: printf("bus-like"); break;
case 1: printf("edge-triggered"); break;
case 2: printf("reserved"); break;
case 3: printf("level-triggered"); break;
}
putchar(',');
printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
putchar(',');
printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
putchar('\n');
#endif
}
void ct_l_intr_entry(struct __l_intr_entry *lintr)
{
#ifdef MPSCT_VERBOSE
switch (lintr->intr_type) {
case 0: printf("INT"); break;
case 1: printf("NMI"); break;
case 2: printf("SMI"); break;
case 3: printf("ExtINT"); break;
}
putchar(',');
switch (lintr->poel&3) {
case 0: printf("bus-like"); break;
case 1: printf("active high"); break;
case 2: printf("reserved"); break;
case 3: printf("active low"); break;
}
putchar(',');
switch ((lintr->poel>>2)&3) {
case 0: printf("bus-like"); break;
case 1: printf("edge-triggered"); break;
case 2: printf("reserved"); break;
case 3: printf("level-triggered"); break;
}
putchar(',');
printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
putchar(',');
printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
putchar('\n');
#endif
}
void ct_extended_entries(void)
{
__u8 *ext = (__u8 *) ct + ct->base_table_length;
__u8 *cur;
for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
switch (cur[CT_EXT_ENTRY_TYPE]) {
default:
printf("%P: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
break;
}
}
}
int mps_irq_to_pin(int irq)
{
int i;
for(i=0;i<io_intr_entry_cnt;i++) {
if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
return io_intr_entries[i].dst_io_apic_pin;
}
return -1;
}
#endif /* CONFIG_SMP */

/SPARTAN/trunk/arch/ia32/src/smp/smp.c
0,0 → 1,174
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <smp/smp.h>
#include <arch/smp/smp.h>
#include <arch/smp/mps.h>
#include <arch/smp/ap.h>
#include <genarch/acpi/acpi.h>
#include <genarch/acpi/madt.h>
#include <config.h>
#include <synch/waitq.h>
#include <synch/synch.h>
#include <arch/pm.h>
#include <func.h>
#include <panic.h>
#include <debug.h>
#include <arch/asm.h>
#include <mm/frame.h>
#include <mm/page.h>
#include <mm/heap.h>
#include <print.h>
#include <memstr.h>
#include <arch/i8259.h>
#ifdef CONFIG_SMP
static struct smp_config_operations *ops = NULL;
void smp_init(void)
{
if (acpi_madt) {
acpi_madt_parse();
ops = &madt_config_operations;
}
if (config.cpu_count == 1) {
mps_init();
ops = &mps_config_operations;
}
if (config.cpu_count > 1) {
page_mapping_insert((__address)l_apic, (__address)l_apic,
PAGE_NOT_CACHEABLE, 0);
page_mapping_insert((__address) io_apic,
(__address) io_apic,
PAGE_NOT_CACHEABLE, 0);
}
/*
* Must be initialized outside the kmp thread, since it is waited
* on before the kmp thread is created.
*/
waitq_initialize(&kmp_completion_wq);
}
/*
* Kernel thread for bringing up application processors. It becomes clear
* that we need an arrangement like this (AP's being initialized by a kernel
* thread), for a thread has its dedicated stack. (The stack used during the
* BSP initialization (prior the very first call to scheduler()) will be used
* as an initialization stack for each AP.)
*/
void kmp(void *arg)
{
__address src, dst;
int i;
ASSERT(ops != NULL);
waitq_initialize(&ap_completion_wq);
/*
* We need to access data in frame 0.
* We boldly make use of kernel address space mapping.
*/
/*
* Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
*/
*((__u16 *) (PA2KA(0x467+0))) = ((__address) ap_boot) >> 4; /* segment */
*((__u16 *) (PA2KA(0x467+2))) = 0; /* offset */
/*
* Save 0xa to address 0xf of the CMOS RAM.
* BIOS will not do the POST after the INIT signal.
*/
outb(0x70,0xf);
outb(0x71,0xa);
pic_disable_irqs(0xffff);
apic_init();
for (i = 0; i < ops->cpu_count(); i++) {
struct descriptor *gdt_new;
/*
* Skip processors marked unusable.
*/
if (!ops->cpu_enabled(i))
continue;
/*
* The bootstrap processor is already up.
*/
if (ops->cpu_bootstrap(i))
continue;
if (ops->cpu_apic_id(i) == l_apic_id()) {
printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i);
continue;
}
/*
* Prepare new GDT for CPU in question.
*/
if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor))))
panic("couldn't allocate memory for GDT\n");
memcpy(gdt_new, gdt, GDT_ITEMS*sizeof(struct descriptor));
memsetb((__address)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0);
real_bootstrap_gdtr.base = KA2PA((__address) gdt_new);
gdtr.base = (__address) gdt_new;
if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
/*
* There may be just one AP being initialized at
* the time. After it comes completely up, it is
* supposed to wake us up.
*/
if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_BLOCKING) == ESYNCH_TIMEOUT)
printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i));
} else
printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i));
}
/*
* Wakeup the kinit thread so that
* system initialization can go on.
*/
waitq_wakeup(&kmp_completion_wq, WAKEUP_FIRST);
}
int smp_irq_to_pin(int irq)
{
ASSERT(ops != NULL);
return ops->irq_to_pin(irq);
}
#endif /* CONFIG_SMP */

/SPARTAN/trunk/arch/ia32/src/smp/ap.S
0,0 → 1,76
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# Init code for application processors.
#
.section K_TEXT_START_2, "ax"
#ifdef CONFIG_SMP
.global ap_boot
KTEXT=8
KDATA=16
# This piece of code is real-mode and is meant to be alligned at 4K boundary.
# The requirement for such an alignment comes from MP Specification's STARTUP IPI
# requirements.
.align 4096
ap_boot:
.code16
cli
xorw %ax, %ax
movw %ax, %ds
lgdt real_bootstrap_gdtr_boot # initialize Global Descriptor Table register
movl %cr0, %eax
orl $1, %eax
movl %eax, %cr0 # switch to protected mode
jmpl $KTEXT, $jump_to_kernel
jump_to_kernel:
.code32
movw $KDATA, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
movl $(ctx-0x80000000), %eax # KA2PA((__address) &ctx)
movl (%eax), %esp
subl $0x80000000, %esp # KA2PA(ctx.sp)
call map_kernel # map kernel and turn paging on
addl $0x80000000, %esp # PA2KA(ctx.sp)
jmpl $KTEXT, $main_ap
#endif /* CONFIG_SMP */

/SPARTAN/trunk/arch/ia32/src/smp/ipi.c
0,0 → 1,39
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifdef CONFIG_SMP
#include <smp/ipi.h>
#include <arch/smp/apic.h>
void ipi_broadcast_arch(int ipi)
{
(void) l_apic_broadcast_custom_ipi((__u8) ipi);
}
#endif /* CONFIG_SMP */

/SPARTAN/trunk/arch/ia32/src/drivers/i8042.c
0,0 → 1,332
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/i8042.h>
#include <arch/i8259.h>
#include <arch/interrupt.h>
#include <cpu.h>
#include <arch/asm.h>
#include <arch.h>
#include <print.h>
#include <synch/spinlock.h>
#include <typedefs.h>
#include <console/chardev.h>
#include <console/console.h>
#include <macros.h>
/**
* i8042 processor driver.
* It takes care of low-level keyboard functions.
*/
#define i8042_DATA 0x60
#define i8042_STATUS 0x64
/** Keyboard commands. */
#define KBD_ENABLE 0xf4
#define KBD_DISABLE 0xf5
#define KBD_ACK 0xfa
#define SPECIAL '?'
#define KEY_RELEASE 0x80
static void key_released(__u8 sc);
static void key_pressed(__u8 sc);
#define PRESSED_SHIFT (1<<0)
#define PRESSED_CAPSLOCK (1<<1)
#define LOCKED_CAPSLOCK (1<<0)
static spinlock_t keylock; /**< keylock protects keyflags and lockflags. */
static volatile int keyflags; /**< Tracking of multiple keypresses. */
static volatile int lockflags; /**< Tracking of multiple keys lockings. */
static void i8042_suspend(void);
static void i8042_resume(void);
static chardev_t kbrd;
static chardev_operations_t ops = {
.suspend = i8042_suspend,
.resume = i8042_resume
};
/** Primary meaning of scancodes. */
static char sc_primary_map[] = {
SPECIAL, /* 0x00 */
SPECIAL, /* 0x01 - Esc */
'1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=',
SPECIAL, /* 0x0e - Backspace */
'\t', 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']', '\n',
SPECIAL, /* 0x1d - LCtrl */
'a', 's', 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', '\'',
'`',
SPECIAL, /* 0x2a - LShift */
'\\',
'z', 'x', 'c', 'v', 'b', 'n', 'm', ',', '.', '/',
SPECIAL, /* 0x36 - RShift */
'*',
SPECIAL, /* 0x38 - LAlt */
' ',
SPECIAL, /* 0x3a - CapsLock */
SPECIAL, /* 0x3b - F1 */
SPECIAL, /* 0x3c - F2 */
SPECIAL, /* 0x3d - F3 */
SPECIAL, /* 0x3e - F4 */
SPECIAL, /* 0x3f - F5 */
SPECIAL, /* 0x40 - F6 */
SPECIAL, /* 0x41 - F7 */
SPECIAL, /* 0x42 - F8 */
SPECIAL, /* 0x43 - F9 */
SPECIAL, /* 0x44 - F10 */
SPECIAL, /* 0x45 - NumLock */
SPECIAL, /* 0x46 - ScrollLock */
'7', '8', '9', '-',
'4', '5', '6', '+',
'1', '2', '3',
'0', '.',
SPECIAL, /* 0x54 - Alt-SysRq */
SPECIAL, /* 0x55 - F11/F12/PF1/FN */
SPECIAL, /* 0x56 - unlabelled key next to LAlt */
SPECIAL, /* 0x57 - F11 */
SPECIAL, /* 0x58 - F12 */
SPECIAL, /* 0x59 */
SPECIAL, /* 0x5a */
SPECIAL, /* 0x5b */
SPECIAL, /* 0x5c */
SPECIAL, /* 0x5d */
SPECIAL, /* 0x5e */
SPECIAL, /* 0x5f */
SPECIAL, /* 0x60 */
SPECIAL, /* 0x61 */
SPECIAL, /* 0x62 */
SPECIAL, /* 0x63 */
SPECIAL, /* 0x64 */
SPECIAL, /* 0x65 */
SPECIAL, /* 0x66 */
SPECIAL, /* 0x67 */
SPECIAL, /* 0x68 */
SPECIAL, /* 0x69 */
SPECIAL, /* 0x6a */
SPECIAL, /* 0x6b */
SPECIAL, /* 0x6c */
SPECIAL, /* 0x6d */
SPECIAL, /* 0x6e */
SPECIAL, /* 0x6f */
SPECIAL, /* 0x70 */
SPECIAL, /* 0x71 */
SPECIAL, /* 0x72 */
SPECIAL, /* 0x73 */
SPECIAL, /* 0x74 */
SPECIAL, /* 0x75 */
SPECIAL, /* 0x76 */
SPECIAL, /* 0x77 */
SPECIAL, /* 0x78 */
SPECIAL, /* 0x79 */
SPECIAL, /* 0x7a */
SPECIAL, /* 0x7b */
SPECIAL, /* 0x7c */
SPECIAL, /* 0x7d */
SPECIAL, /* 0x7e */
SPECIAL, /* 0x7f */
};
/** Secondary meaning of scancodes. */
static char sc_secondary_map[] = {
SPECIAL, /* 0x00 */
SPECIAL, /* 0x01 - Esc */
'!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+',
SPECIAL, /* 0x0e - Backspace */
'\t', 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}', '\n',
SPECIAL, /* 0x1d - LCtrl */
'A', 'S', 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"',
'~',
SPECIAL, /* 0x2a - LShift */
'|',
'Z', 'X', 'C', 'V', 'B', 'N', 'M', '<', '>', '?',
SPECIAL, /* 0x36 - RShift */
'*',
SPECIAL, /* 0x38 - LAlt */
' ',
SPECIAL, /* 0x3a - CapsLock */
SPECIAL, /* 0x3b - F1 */
SPECIAL, /* 0x3c - F2 */
SPECIAL, /* 0x3d - F3 */
SPECIAL, /* 0x3e - F4 */
SPECIAL, /* 0x3f - F5 */
SPECIAL, /* 0x40 - F6 */
SPECIAL, /* 0x41 - F7 */
SPECIAL, /* 0x42 - F8 */
SPECIAL, /* 0x43 - F9 */
SPECIAL, /* 0x44 - F10 */
SPECIAL, /* 0x45 - NumLock */
SPECIAL, /* 0x46 - ScrollLock */
'7', '8', '9', '-',
'4', '5', '6', '+',
'1', '2', '3',
'0', '.',
SPECIAL, /* 0x54 - Alt-SysRq */
SPECIAL, /* 0x55 - F11/F12/PF1/FN */
SPECIAL, /* 0x56 - unlabelled key next to LAlt */
SPECIAL, /* 0x57 - F11 */
SPECIAL, /* 0x58 - F12 */
SPECIAL, /* 0x59 */
SPECIAL, /* 0x5a */
SPECIAL, /* 0x5b */
SPECIAL, /* 0x5c */
SPECIAL, /* 0x5d */
SPECIAL, /* 0x5e */
SPECIAL, /* 0x5f */
SPECIAL, /* 0x60 */
SPECIAL, /* 0x61 */
SPECIAL, /* 0x62 */
SPECIAL, /* 0x63 */
SPECIAL, /* 0x64 */
SPECIAL, /* 0x65 */
SPECIAL, /* 0x66 */
SPECIAL, /* 0x67 */
SPECIAL, /* 0x68 */
SPECIAL, /* 0x69 */
SPECIAL, /* 0x6a */
SPECIAL, /* 0x6b */
SPECIAL, /* 0x6c */
SPECIAL, /* 0x6d */
SPECIAL, /* 0x6e */
SPECIAL, /* 0x6f */
SPECIAL, /* 0x70 */
SPECIAL, /* 0x71 */
SPECIAL, /* 0x72 */
SPECIAL, /* 0x73 */
SPECIAL, /* 0x74 */
SPECIAL, /* 0x75 */
SPECIAL, /* 0x76 */
SPECIAL, /* 0x77 */
SPECIAL, /* 0x78 */
SPECIAL, /* 0x79 */
SPECIAL, /* 0x7a */
SPECIAL, /* 0x7b */
SPECIAL, /* 0x7c */
SPECIAL, /* 0x7d */
SPECIAL, /* 0x7e */
SPECIAL, /* 0x7f */
};
/** Initialize i8042. */
void i8042_init(void)
{
trap_register(VECTOR_KBD, i8042_interrupt);
trap_virtual_enable_irqs(1<<IRQ_KBD);
spinlock_initialize(&keylock);
chardev_initialize(&kbrd, &ops);
stdin = &kbrd;
}
/** Process i8042 interrupt.
*
* @param n Interrupt vector.
* @param stack Interrupted stack.
*/
void i8042_interrupt(__u8 n, __native stack[])
{
__u8 x;
trap_virtual_eoi();
x = inb(i8042_DATA);
if (x & KEY_RELEASE)
key_released(x ^ KEY_RELEASE);
else
key_pressed(x);
}
/** Process release of key.
*
* @param sc Scancode of the key being released.
*/
void key_released(__u8 sc)
{
spinlock_lock(&keylock);
switch (sc) {
case SC_LSHIFT:
case SC_RSHIFT:
keyflags &= ~PRESSED_SHIFT;
break;
case SC_CAPSLOCK:
keyflags &= ~PRESSED_CAPSLOCK;
if (lockflags & LOCKED_CAPSLOCK)
lockflags &= ~LOCKED_CAPSLOCK;
else
lockflags |= LOCKED_CAPSLOCK;
break;
default:
break;
}
spinlock_unlock(&keylock);
}
/** Process keypress.
*
* @param sc Scancode of the key being pressed.
*/
void key_pressed(__u8 sc)
{
char *map = sc_primary_map;
char ascii = sc_primary_map[sc];
bool shift, capslock;
bool letter = false;
spinlock_lock(&keylock);
switch (sc) {
case SC_LSHIFT:
case SC_RSHIFT:
keyflags |= PRESSED_SHIFT;
break;
case SC_CAPSLOCK:
keyflags |= PRESSED_CAPSLOCK;
break;
default:
letter = is_lower(ascii);
capslock = (keyflags & PRESSED_CAPSLOCK) || (lockflags & LOCKED_CAPSLOCK);
shift = keyflags & PRESSED_SHIFT;
if (letter && capslock)
shift = !shift;
if (shift)
map = sc_secondary_map;
chardev_push_character(&kbrd, map[sc]);
break;
}
spinlock_unlock(&keylock);
}
/* Called from getc(). */
void i8042_resume(void)
{
}
/* Called from getc(). */
void i8042_suspend(void)
{
}

/SPARTAN/trunk/arch/ia32/src/drivers/i8254.c
0,0 → 1,129
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/types.h>
#include <time/clock.h>
#include <time/delay.h>
#include <arch/interrupt.h>
#include <arch/i8259.h>
#include <arch/i8254.h>
#include <cpu.h>
#include <config.h>
#include <arch/pm.h>
#include <arch/asm.h>
#include <arch/cpuid.h>
#include <arch.h>
#include <time/delay.h>
/*
* i8254 chip driver.
* Low level time functions.
*/
#define CLK_PORT1 0x40
#define CLK_PORT4 0x43
#define CLK_CONST 1193180
#define MAGIC_NUMBER 1194
void i8254_init(void)
{
i8254_normal_operation();
}
void i8254_normal_operation(void)
{
outb(CLK_PORT4, 0x36);
pic_disable_irqs(1<<IRQ_CLK);
outb(CLK_PORT1, (CLK_CONST/HZ) & 0xf);
outb(CLK_PORT1, (CLK_CONST/HZ) >> 8);
pic_enable_irqs(1<<IRQ_CLK);
trap_register(VECTOR_CLK, i8254_interrupt);
}
#define LOOPS 150000
#define SHIFT 11
void i8254_calibrate_delay_loop(void)
{
__u64 clk1, clk2;
__u32 t1, t2, o1, o2;
__u8 not_ok;
/*
* One-shot timer. Count-down from 0xffff at 1193180Hz
* MAGIC_NUMBER is the magic value for 1ms.
*/
outb(CLK_PORT4, 0x30);
outb(CLK_PORT1, 0xff);
outb(CLK_PORT1, 0xff);
do {
/* will read both status and count */
outb(CLK_PORT4, 0xc2);
not_ok = (inb(CLK_PORT1)>>6)&1;
t1 = inb(CLK_PORT1);
t1 |= inb(CLK_PORT1) << 8;
} while (not_ok);
asm_delay_loop(LOOPS);
outb(CLK_PORT4, 0xd2);
t2 = inb(CLK_PORT1);
t2 |= inb(CLK_PORT1) << 8;
/*
* We want to determine the overhead of the calibrating mechanism.
*/
outb(CLK_PORT4, 0xd2);
o1 = inb(CLK_PORT1);
o1 |= inb(CLK_PORT1) << 8;
asm_fake_loop(LOOPS);
outb(CLK_PORT4, 0xd2);
o2 = inb(CLK_PORT1);
o2 |= inb(CLK_PORT1) << 8;
CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0);
clk1 = rdtsc();
delay(1<<SHIFT);
clk2 = rdtsc();
CPU->frequency_mhz = (clk2-clk1)>>SHIFT;
return;
}
void i8254_interrupt(__u8 n, __native stack[])
{
trap_virtual_eoi();
clock();
}

/SPARTAN/trunk/arch/ia32/src/drivers/ega.c
0,0 → 1,118
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/ega.h>
#include <putchar.h>
#include <mm/page.h>
#include <arch/mm/page.h>
#include <synch/spinlock.h>
#include <arch/types.h>
#include <arch/asm.h>
#include <memstr.h>
/*
* The EGA driver.
* Simple and short. Function for displaying characters and "scrolling".
*/
static spinlock_t egalock;
static __u32 ega_cursor;
void ega_move_cursor(void);
void ega_init(void)
{
__u8 hi, lo;
page_mapping_insert(PA2KA(VIDEORAM), VIDEORAM, PAGE_NOT_CACHEABLE, 0);
outb(0x3d4,0xe);
hi = inb(0x3d5);
outb(0x3d4,0xf);
lo = inb(0x3d5);
ega_cursor = (hi<<8)|lo;
ega_putchar('\n');
}
static void ega_display_char(char ch)
{
__u8 *vram = (__u8 *) PA2KA(VIDEORAM);
vram[ega_cursor*2] = ch;
}
/*
* This function takes care of scrolling.
*/
static void ega_check_cursor(void)
{
if (ega_cursor < SCREEN)
return;
memcpy((void *)PA2KA(VIDEORAM), (void *)(PA2KA(VIDEORAM) + ROW*2), (SCREEN - ROW)*2);
memsetw(PA2KA(VIDEORAM) + (SCREEN - ROW)*2, ROW, 0x0720);
ega_cursor = ega_cursor - ROW;
}
void ega_putchar(const char ch)
{
ipl_t ipl;
ipl = interrupts_disable();
spinlock_lock(&egalock);
switch (ch) {
case '\n':
ega_cursor = (ega_cursor + ROW) - ega_cursor % ROW;
break;
case '\t':
ega_cursor = (ega_cursor + 8) - ega_cursor % 8;
break;
default:
ega_display_char(ch);
ega_cursor++;
break;
}
ega_check_cursor();
ega_move_cursor();
spinlock_unlock(&egalock);
interrupts_restore(ipl);
}
void ega_move_cursor(void)
{
outb(0x3d4,0xe);
outb(0x3d5,(ega_cursor>>8)&0xff);
outb(0x3d4,0xf);
outb(0x3d5,ega_cursor&0xff);
}
void putchar(const char ch)
{
ega_putchar(ch);
}

/SPARTAN/trunk/arch/ia32/src/drivers/i8259.c
0,0 → 1,121
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/i8259.h>
#include <cpu.h>
#include <arch/types.h>
#include <arch/asm.h>
#include <arch.h>
#include <print.h>
/*
* This is the PIC driver.
* Programmable Interrupt Controller for UP systems.
*/
void i8259_init(void)
{
/* ICW1: this is ICW1, ICW4 to follow */
outb(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);
/* ICW2: IRQ 0 maps to INT IRQBASE */
outb(PIC_PIC0PORT2, IVT_IRQBASE);
/* ICW3: pic1 using IRQ IRQ_PIC1 */
outb(PIC_PIC0PORT2, 1 << IRQ_PIC1);
/* ICW4: i8086 mode */
outb(PIC_PIC0PORT2, 1);
/* ICW1: ICW1, ICW4 to follow */
outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
/* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
outb(PIC_PIC1PORT2, IVT_IRQBASE + 8);
/* ICW3: pic1 is known as IRQ_PIC1 */
outb(PIC_PIC1PORT2, IRQ_PIC1);
/* ICW4: i8086 mode */
outb(PIC_PIC1PORT2, 1);
/*
* Register interrupt handler for the PIC spurious interrupt.
*/
trap_register(VECTOR_PIC_SPUR, pic_spurious);
/*
* Set the enable/disable IRQs handlers.
* Set the End-of-Interrupt handler.
*/
enable_irqs_function = pic_enable_irqs;
disable_irqs_function = pic_disable_irqs;
eoi_function = pic_eoi;
pic_disable_irqs(0xffff); /* disable all irq's */
pic_enable_irqs(1<<IRQ_PIC1); /* but enable pic1 */
}
void pic_enable_irqs(__u16 irqmask)
{
__u8 x;
if (irqmask & 0xff) {
x = inb(PIC_PIC0PORT2);
outb(PIC_PIC0PORT2, x & (~(irqmask & 0xff)));
}
if (irqmask >> 8) {
x = inb(PIC_PIC1PORT2);
outb(PIC_PIC1PORT2, x & (~(irqmask >> 8)));
}
}
void pic_disable_irqs(__u16 irqmask)
{
__u8 x;
if (irqmask & 0xff) {
x = inb(PIC_PIC0PORT2);
outb(PIC_PIC0PORT2, x | (irqmask & 0xff));
}
if (irqmask >> 8) {
x = inb(PIC_PIC1PORT2);
outb(PIC_PIC1PORT2, x | (irqmask >> 8));
}
}
void pic_eoi(void)
{
outb(0x20,0x20);
outb(0xa0,0x20);
}
void pic_spurious(__u8 n, __native stack[])
{
printf("cpu%d: PIC spurious interrupt\n", CPU->id);
}

/SPARTAN/trunk/arch/ia32/src/ia32.c
0,0 → 1,104
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch.h>
#include <arch/types.h>
#include <typedefs.h>
#include <arch/pm.h>
#include <arch/ega.h>
#include <arch/i8042.h>
#include <arch/i8254.h>
#include <arch/i8259.h>
#include <arch/context.h>
#include <config.h>
#include <arch/interrupt.h>
#include <arch/asm.h>
#include <genarch/acpi/acpi.h>
#include <arch/bios/bios.h>
#include <arch/mm/memory_init.h>
void arch_pre_mm_init(void)
{
pm_init();
if (config.cpu_active == 1) {
bios_init();
i8259_init(); /* PIC */
i8254_init(); /* hard clock */
trap_register(VECTOR_SYSCALL, syscall);
#ifdef CONFIG_SMP
trap_register(VECTOR_TLB_SHOOTDOWN_IPI, tlb_shootdown_ipi);
trap_register(VECTOR_WAKEUP_IPI, wakeup_ipi);
#endif /* CONFIG_SMP */
}
}
void arch_post_mm_init(void)
{
if (config.cpu_active == 1) {
ega_init(); /* video */
}
}
void arch_pre_smp_init(void)
{
if (config.cpu_active == 1) {
memory_print_map();
#ifdef CONFIG_SMP
acpi_init();
#endif /* CONFIG_SMP */
}
}
void arch_post_smp_init(void)
{
i8042_init(); /* keyboard controller */
}
void calibrate_delay_loop(void)
{
i8254_calibrate_delay_loop();
if (config.cpu_active == 1) {
/*
* This has to be done only on UP.
* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
*/
i8254_normal_operation();
}
}

/SPARTAN/trunk/arch/ia32/src/boot/boot.S
0,0 → 1,267
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#include <arch/boot/boot.h>
#include <arch/boot/memmap.h>
#include <arch/mm/page.h>
#include <arch/pm.h>
.section K_TEXT_START, "ax"
.global kernel_image_start
KTEXT=8
KDATA=16
.code16
#
# This is where we require any SPARTAN-kernel-compatible boot loader
# to pass control in real mode.
#
# Protected mode tables are statically initialised during compile
# time. So we can just load the respective table registers and
# switch to protected mode.
#
kernel_image_start:
cli
xorw %ax, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss # initialize stack segment register
movl $BOOTSTRAP_OFFSET - 0x400, %esp # initialize stack pointer
call memmap_arch_init
lgdt real_bootstrap_gdtr_boot # initialize Global Descriptor Table register
movl %cr0, %eax
orl $0x1, %eax
movl %eax, %cr0 # switch to protected mode
jmpl $KTEXT, $boot_image_start
.code32
.align 4
multiboot_header:
.long MULTIBOOT_HEADER_MAGIC
.long MULTIBOOT_HEADER_FLAGS
.long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) # checksum
.long multiboot_header + BOOT_OFFSET
.long unmapped_ktext_start + BOOT_OFFSET
.long 0
.long 0
.long multiboot_image_start + BOOT_OFFSET
boot_image_start:
movw $KDATA, %ax
movw %ax, %es
movw %ax, %gs
movw %ax, %fs
movw %ax, %ds # kernel data + stack
movw %ax, %ss
movb $0xd1, %al # enable A20 using i8042 controller
outb %al, $0x64
movb $0xdf, %al
outb %al, $0x60
movl $BOOTSTRAP_OFFSET, %esi
movl $BOOTSTRAP_OFFSET + BOOT_OFFSET, %edi
movl $_hardcoded_kernel_size, %ecx
cld
rep movsb
call map_kernel # map kernel and turn paging on
call main_bsp # never returns
cli
hlt
multiboot_image_start:
movl $BOOTSTRAP_OFFSET - 0x400, %esp # initialize stack pointer
lgdt protected_bootstrap_gdtr - 0x80000000 # initialize Global Descriptor Table register
movw $KDATA, %cx
movw %cx, %es
movw %cx, %gs
movw %cx, %fs
movw %cx, %ds # kernel data + stack
movw %cx, %ss
jmpl $KTEXT, $multiboot_meeting_point + BOOT_OFFSET
multiboot_meeting_point:
pushl %ebx # save parameters from GRUB
pushl %eax
movl $BOOTSTRAP_OFFSET + BOOT_OFFSET, %esi
movl $BOOTSTRAP_OFFSET, %edi
movl $_hardcoded_unmapped_size, %ecx
cld
rep movsb
call map_kernel # map kernel and turn paging on
popl %eax
popl %ebx
cmpl $MULTIBOOT_LOADER_MAGIC, %eax # compare GRUB signature
je valid_boot
xorl %ecx, %ecx # no memory size or map available
movl %ecx, e801memorysize
movl %ecx, e820counter
jmp invalid_boot
valid_boot:
movl (%ebx), %eax # ebx = physical address of struct multiboot_info
bt $0, %eax # mbi->flags[0] (mem_lower, mem_upper valid)
jc mem_valid
xorl %ecx, %ecx
jmp mem_invalid
mem_valid:
movl 4(%ebx), %ecx # mbi->mem_lower
addl 8(%ebx), %ecx # mbi->mem_upper
mem_invalid:
movl %ecx, e801memorysize
bt $3, %eax # mbi->flags[3] (mods_count, mods_addr valid)
jc mods_valid
xorl %ecx, %ecx
xorl %edx, %edx
jmp mods_invalid
mods_valid:
mods_invalid:
movl %ecx, init_addr
movl %edx, init_size
bt $6, %eax # mbi->flags[6] (mmap_length, mmap_addr valid)
jc mmap_valid
xorl %edx, %edx
jmp mmap_invalid
mmap_valid:
movl 44(%ebx), %ecx # mbi->mmap_length
movl 48(%ebx), %esi # mbi->mmap_addr
movl $e820table, %edi
xorl %edx, %edx
mmap_loop:
cmpl $0, %ecx
jle mmap_end
movl 4(%esi), %eax # mmap->base_addr_low
movl %eax, (%edi)
movl 8(%esi), %eax # mmap->base_addr_high
movl %eax, 4(%edi)
movl 12(%esi), %eax # mmap->length_low
movl %eax, 8(%edi)
movl 16(%esi), %eax # mmap->length_high
movl %eax, 12(%edi)
movl 20(%esi), %eax # mmap->type
movl %eax, 16(%edi)
movl (%esi), %eax # mmap->size
addl $0x4, %eax
addl %eax, %esi
subl %eax, %ecx
addl $MEMMAP_E820_RECORD_SIZE, %edi
incl %edx
jmp mmap_loop
mmap_end:
mmap_invalid:
movl %edx, e820counter
invalid_boot:
call main_bsp - BOOT_OFFSET # never returns
cli
hlt
.global map_kernel
map_kernel:
#
# Here we setup mapping for both the unmapped and mapped sections of the kernel.
# For simplicity, we map the entire 4G space.
#
movl %cr4, %ecx
orl $(1<<4), %ecx
movl %ecx, %cr4 # turn PSE on
movl $(page_directory+0), %esi
movl $(page_directory+2048), %edi
xorl %ecx, %ecx
xorl %ebx, %ebx
0:
movl $((1<<7)|(1<<0)), %eax
orl %ebx, %eax
movl %eax, (%esi,%ecx,4) # mapping 0x00000000+%ecx*4M => 0x00000000+%ecx*4M
movl %eax, (%edi,%ecx,4) # mapping 0x80000000+%ecx*4M => 0x00000000+%ecx*4M
addl $(4*1024*1024), %ebx
incl %ecx
cmpl $512, %ecx
jl 0b
movl %esi, %cr3
# turn paging on
movl %cr0, %ebx
orl $(1<<31), %ebx
movl %ebx, %cr0
ret
.section K_DATA_START, "aw", @progbits
.align 4096
page_directory:
.space 4096, 0
.global real_bootstrap_gdtr_boot
real_bootstrap_gdtr_boot:
.word selector(GDT_ITEMS)
.long KA2PA(gdt)-BOOT_OFFSET

/SPARTAN/trunk/arch/ia32/src/boot/memmap.S
0,0 → 1,115
/*
* Copyright (C) 2005 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/boot/memmap.h>
E820_SMAP = 0x534d4150
.global memmap_arch_init
.global e801memorysize
.code16
.section K_TEXT_START_2, "ax"
memmap_arch_init:
e820begin:
xorl %ebx,%ebx # during first call, ebx must be 0
movw $e820table_boot,%di
movb $MEMMAP_E820_MAX_RECORDS,e820counter_boot
e820loop:
movl $E820_SMAP,%edx # control sequence "SMAP"
movl $0x0000e820,%eax # service
movl $MEMMAP_E820_RECORD_SIZE,%ecx
int $0x15
jc e820err
cmpl $E820_SMAP,%eax # verifying BIOS
jne e820err
cmpl $MEMMAP_E820_RECORD_SIZE,%ecx
jne e820err # bad record size - bug in bios
movw %di,%ax # next record
addw $MEMMAP_E820_RECORD_SIZE,%ax
movw %ax,%di
decb e820counter_boot # buffer is full
jz e820end
testl %ebx,%ebx
jnz e820loop
e820end:
movb $MEMMAP_E820_MAX_RECORDS,%al
subb e820counter_boot,%al
movb %al,e820counter_boot # store # of valid entries in e820counter
jmp e801begin
e820err:
movb $0,e820counter_boot
# method e801 - get size of memory
e801begin:
xorw %dx,%dx
xorw %cx,%cx
xorw %bx,%bx
movw $0xe801,%ax
stc
int $0x15
jc e801end
# fix problem with some BIOSes which use ax:bx rather than cx:dx
testw %cx,%cx
jnz e801cxdx
testw %dx,%dx
jnz e801cxdx
movw %ax,%cx
movw %bx,%dx
e801cxdx:
andl $0xffff,%edx
shll $6,%edx
andl $0xffff,%ecx
addl %ecx,%edx
addl $0x0400,%edx # add lower 1 MB - it's not included by e801 method
movl %edx,e801memorysize
e801end:
ret
.section K_DATA_START, "aw", @progbits
#memory size in 1 kb chunks
e801memorysize:
.long 0

/SPARTAN/trunk/arch/ia32/src/mm/page.c
0,0 → 1,78
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/types.h>
#include <config.h>
#include <func.h>
#include <mm/frame.h>
#include <mm/page.h>
#include <arch/mm/page.h>
#include <arch/interrupt.h>
#include <arch/asm.h>
#include <synch/spinlock.h>
#include <debug.h>
#include <memstr.h>
#include <print.h>
__address bootstrap_dba;
void page_arch_init(void)
{
__address dba;
__u32 i;
if (config.cpu_active == 1) {
dba = frame_alloc(FRAME_KA | FRAME_PANIC);
memsetb(dba, PAGE_SIZE, 0);
bootstrap_dba = dba;
/*
* PA2KA(identity) mapping for all frames.
*/
for (i = 0; i < config.memory_size/PAGE_SIZE; i++)
page_mapping_insert(PA2KA(i * PAGE_SIZE), i * PAGE_SIZE, PAGE_CACHEABLE, KA2PA(dba));
trap_register(14, page_fault);
write_cr3(KA2PA(dba));
}
else {
/*
* Application processors need to create their own view of the
* virtual address space. Because of that, each AP copies
* already-initialized paging information from the bootstrap
* processor and adjusts it to fulfill its needs.
*/
dba = frame_alloc(FRAME_KA | FRAME_PANIC);
memcpy((void *)dba, (void *)bootstrap_dba , PAGE_SIZE);
write_cr3(KA2PA(dba));
}
paging_on();
}

/SPARTAN/trunk/arch/ia32/src/mm/tlb.c
0,0 → 1,42
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <mm/tlb.h>
#include <arch/mm/asid.h>
#include <arch/asm.h>
/** Invalidate all TLB entries
*
* Invalidate all TLB entries.
*
* @param asid This argument is ignored.
*/
void tlb_invalidate(asid_t asid)
{
write_cr3(read_cr3());
}

/SPARTAN/trunk/arch/ia32/src/mm/memory_init.c
0,0 → 1,70
/*
* Copyright (C) 2005 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/boot/memmap.h>
#include <arch/mm/memory_init.h>
#include <arch/mm/page.h>
#include <print.h>
__u8 e820counter __attribute__ ((section ("BOOT_DATA"))) = 0xff;
struct e820memmap_ e820table[MEMMAP_E820_MAX_RECORDS] __attribute__ ((section ("BOOT_DATA"))) ;
size_t get_memory_size(void)
{
return e801memorysize*1024;
}
void memory_print_map(void)
{
__u8 i;
for (i=0;i<e820counter;i++) {
printf("E820 base: %Q size: %Q type: ", e820table[i].base_address, e820table[i].size);
switch (e820table[i].type) {
case MEMMAP_MEMORY_AVAILABLE:
printf("available memory\n");
break;
case MEMMAP_MEMORY_RESERVED:
printf("reserved memory\n");
break;
case MEMMAP_MEMORY_ACPI:
printf("ACPI table\n");
break;
case MEMMAP_MEMORY_NVS:
printf("NVS\n");
break;
case MEMMAP_MEMORY_UNUSABLE:
printf("unusable memory\n");
break;
default:
printf("undefined memory type\n");
}
}
}

/SPARTAN/trunk/arch/ia32/src/mm/frame.c
0,0 → 1,61
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <mm/frame.h>
#include <arch/mm/frame.h>
#include <mm/vm.h>
#include <config.h>
#include <arch/boot/boot.h>
#include <arch/boot/memmap.h>
#include <panic.h>
size_t hardcoded_unmapped_ktext_size = 0;
size_t hardcoded_unmapped_kdata_size = 0;
void frame_arch_init(void)
{
zone_t *z;
__u8 i;
if (config.cpu_active == 1) {
for (i=0;i<e820counter;i++) {
if (e820table[i].type==MEMMAP_MEMORY_AVAILABLE) {
z = zone_create(e820table[i].base_address, e820table[i].size & ~(FRAME_SIZE-1), 0);
if (!z) {
panic("Cannot allocate zone (%dB).\n", e820table[i].size & ~(FRAME_SIZE-1));
}
zone_attach(z);
}
}
frame_not_free(0);
/* Reserve real mode bootstrap memory */
frame_region_not_free(BOOTSTRAP_OFFSET, BOOTSTRAP_OFFSET + hardcoded_unmapped_ktext_size + hardcoded_unmapped_kdata_size);
}
}

/SPARTAN/trunk/arch/ia32/src/interrupt.c
0,0 → 1,169
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/interrupt.h>
#include <print.h>
#include <debug.h>
#include <panic.h>
#include <arch/i8259.h>
#include <func.h>
#include <cpu.h>
#include <arch/asm.h>
#include <mm/tlb.h>
#include <arch.h>
#include <symtab.h>
#include <proc/thread.h>
/*
* Interrupt and exception dispatching.
*/
static iroutine ivt[IVT_ITEMS];
void (* disable_irqs_function)(__u16 irqmask) = NULL;
void (* enable_irqs_function)(__u16 irqmask) = NULL;
void (* eoi_function)(void) = NULL;
#define PRINT_INFO_ERRCODE(x) { \
char *symbol = get_symtab_entry(stack[1]); \
if (!symbol) \
symbol = ""; \
printf("----------------EXCEPTION OCCURED----------------\n"); \
printf("%%eip: %X (%s)\n",x[1],symbol); \
printf("ERROR_WORD=%X\n", x[0]); \
printf("%%cs=%X,flags=%X\n", x[2], x[3]); \
printf("%%eax=%X, %%ebx=%X, %%ecx=%X, %%edx=%X\n",\
x[-2],x[-5],x[-3],x[-4]); \
printf("%%esi=%X, %%edi=%X, %%ebp=%X, %%esp=%X\n",\
x[-8],x[-9],x[-1],x); \
printf("stack: %X, %X, %X, %X\n", x[4], x[5], x[6], x[7]); \
printf(" %X, %X, %X, %X\n", x[8], x[9], x[10], x[11]); \
}
iroutine trap_register(__u8 n, iroutine f)
{
ASSERT(n < IVT_ITEMS);
iroutine old;
old = ivt[n];
ivt[n] = f;
return old;
}
/*
* Called directly from the assembler code.
* CPU is interrupts_disable()'d.
*/
void trap_dispatcher(__u8 n, __native stack[])
{
ASSERT(n < IVT_ITEMS);
ivt[n](n, stack);
}
void null_interrupt(__u8 n, __native stack[])
{
printf("int %d: null_interrupt\n", n);
printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]);
panic("unserviced interrupt\n");
}
void gp_fault(__u8 n, __native stack[])
{
PRINT_INFO_ERRCODE(stack);
panic("general protection fault\n");
}
void ss_fault(__u8 n, __native stack[])
{
PRINT_INFO_ERRCODE(stack);
panic("stack fault\n");
}
void nm_fault(__u8 n, __native stack[])
{
#ifdef CONFIG_FPU_LAZY
scheduler_fpu_lazy_request();
#else
panic("fpu fault");
#endif
}
void page_fault(__u8 n, __native stack[])
{
PRINT_INFO_ERRCODE(stack);
printf("page fault address: %X\n", read_cr2());
panic("page fault\n");
}
void syscall(__u8 n, __native stack[])
{
printf("cpu%d: syscall\n", CPU->id);
thread_usleep(1000);
}
void tlb_shootdown_ipi(__u8 n, __native stack[])
{
trap_virtual_eoi();
tlb_shootdown_ipi_recv();
}
void wakeup_ipi(__u8 n, __native stack[])
{
trap_virtual_eoi();
}
void trap_virtual_enable_irqs(__u16 irqmask)
{
if (enable_irqs_function)
enable_irqs_function(irqmask);
else
panic("no enable_irqs_function\n");
}
void trap_virtual_disable_irqs(__u16 irqmask)
{
if (disable_irqs_function)
disable_irqs_function(irqmask);
else
panic("no disable_irqs_function\n");
}
void trap_virtual_eoi(void)
{
if (eoi_function)
eoi_function();
else
panic("no eoi_function\n");
}

/SPARTAN/trunk/arch/ia32/src/atomic.S
0,0 → 1,60
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
.text
#ifdef CONFIG_SMP
.global spinlock_arch
#
# This is a bus-and-hyperthreading-friendly implementation of spinlock
#
spinlock_arch:
pushl %eax
pushl %ebx
movl 12(%esp),%ebx
0:
#ifdef CONFIG_HT
pause # Pentium 4's with HT love this instruction
#endif
movl (%ebx),%eax
testl %eax,%eax
jnz 0b # lightweight looping while it is locked
incl %eax
xchgl %eax,(%ebx) # now use the atomic operation
testl %eax,%eax
jnz 0b
popl %ebx
popl %eax
ret
#endif

/SPARTAN/trunk/arch/ia32/src/cpu/cpu.c
0,0 → 1,134
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/cpu.h>
#include <arch/cpuid.h>
#include <arch/pm.h>
#include <arch.h>
#include <arch/types.h>
#include <print.h>
#include <typedefs.h>
#include <fpu_context.h>
#include <arch/smp/apic.h>
/*
* Identification of CPUs.
* Contains only non-MP-Specification specific SMP code.
*/
#define AMD_CPUID_EBX 0x68747541
#define AMD_CPUID_ECX 0x444d4163
#define AMD_CPUID_EDX 0x69746e65
#define INTEL_CPUID_EBX 0x756e6547
#define INTEL_CPUID_ECX 0x6c65746e
#define INTEL_CPUID_EDX 0x49656e69
enum vendor {
VendorUnknown=0,
VendorAMD,
VendorIntel
};
static char *vendor_str[] = {
"Unknown Vendor",
"AuthenticAMD",
"GenuineIntel"
};
void fpu_disable(void)
{
__asm__ volatile (
"mov %%cr0,%%eax;"
"or $8,%%eax;"
"mov %%eax,%%cr0;"
:
:
:"%eax"
);
}
void fpu_enable(void)
{
__asm__ volatile (
"mov %%cr0,%%eax;"
"and $0xffFFffF7,%%eax;"
"mov %%eax,%%cr0;"
:
:
:"%eax"
);
}
void cpu_arch_init(void)
{
CPU->arch.tss = tss_p;
CPU->fpu_owner=NULL;
}
void cpu_identify(void)
{
cpu_info_t info;
CPU->arch.vendor = VendorUnknown;
if (has_cpuid()) {
cpuid(0, &info);
/*
* Check for AMD processor.
*/
if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
CPU->arch.vendor = VendorAMD;
}
/*
* Check for Intel processor.
*/
if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
CPU->arch.vendor = VendorIntel;
}
cpuid(1, &info);
CPU->arch.family = (info.cpuid_eax>>8)&0xf;
CPU->arch.model = (info.cpuid_eax>>4)&0xf;
CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;
}
}
void cpu_print_report(cpu_t* m)
{
printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
m->frequency_mhz);
}

/SPARTAN/trunk/arch/ia32/src/context.s
0,0 → 1,72
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
.text
.global context_save_arch
.global context_restore_arch
## Save current CPU context
#
# Save CPU context to the context_t variable
# pointed by the 1st argument. Returns 1 in EAX.
#
context_save_arch:
movl 0(%esp),%eax # the caller's return %eip
movl 4(%esp),%edx # address of the kernel_context variable to save context to
movl %esp,0(%edx) # %esp -> ctx->sp
movl %eax,4(%edx) # %eip -> ctx->pc
movl %ebx,8(%edx) # %ebx -> ctx->ebx
movl %esi,12(%edx) # %esi -> ctx->esi
movl %edi,16(%edx) # %edi -> ctx->edi
movl %ebp,20(%edx) # %ebp -> ctx->ebp
xorl %eax,%eax # context_save returns 1
incl %eax
ret
## Restore saved CPU context
#
# Restore CPU context from context_t variable
# pointed by the 1st argument. Returns 0 in EAX.
#
context_restore_arch:
movl 4(%esp),%eax # address of the kernel_context variable to restore context from
movl 0(%eax),%esp # ctx->sp -> %esp
movl 4(%eax),%edx # ctx->pc -> %edx
movl 8(%eax),%ebx # ctx->ebx -> %ebx
movl 12(%eax),%esi # ctx->esi -> %esi
movl 16(%eax),%edi # ctx->edi -> %edi
movl 20(%eax),%ebp # ctx->ebp -> %ebp
movl %edx,0(%esp) # ctx->pc -> saver's return %eip
xorl %eax,%eax # context_restore returns 0
ret

/SPARTAN/trunk/arch/ia32/src/userspace.c
0,0 → 1,68
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <userspace.h>
#include <arch/pm.h>
#include <arch/types.h>
#include <arch.h>
#include <proc/thread.h>
#include <mm/vm.h>
/** Enter userspace
*
* Change CPU protection level to 3, enter userspace.
*
*/
void userspace(void)
{
ipl_t ipl;
ipl = interrupts_disable();
__asm__ volatile (
/* CLNT */
"pushfl;"
"pop %%eax;"
"and $0xFFFFBFFF,%%eax;"
"push %%eax;"
"popfl;"
"pushl %0\n"
"pushl %1\n"
"pushl %2\n"
"pushl %3\n"
"pushl %4\n"
"iret"
:
: "i" (selector(UDATA_DES) | PL_USER), "r" (USTACK_ADDRESS+(THREAD_STACK_SIZE)), "r" (ipl), "i" (selector(UTEXT_DES) | PL_USER), "i" (UTEXT_ADDRESS)
: "eax");
/* Unreachable */
for(;;);
}

/SPARTAN/trunk/arch/ia32/src/asm.S
0,0 → 1,173
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
## very low and hardware-level functions
# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
# and 1 means interrupt with error word
#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
.text
.global paging_on
.global enable_l_apic_in_msr
.global interrupt_handlers
## Turn paging on
#
# Enable paging and write-back caching in CR0.
#
paging_on:
movl %cr0,%edx
orl $(1<<31),%edx # paging on
andl $~((1<<30)|(1<<29)),%edx # clear Cache Disable and not Write Though
movl %edx,%cr0
jmp 0f
0:
ret
## Enable local APIC
#
# Enable local APIC in MSR.
#
enable_l_apic_in_msr:
push %eax
movl $0x1b, %ecx
rdmsr
orl $(1<<11),%eax
orl $(0xfee00000),%eax
wrmsr
pop %eax
ret
## Declare interrupt handlers
#
# Declare interrupt handlers for n interrupt
# vectors starting at vector i.
#
# The handlers setup data segment registers
# and call trap_dispatcher().
#
.macro handler i n
push %ebp
movl %esp,%ebp
pusha
push %ds
push %es
# we must fill the data segment registers
movw $16,%ax
movw %ax,%ds
movw %ax,%es
movl $(\i),%edi
pushl %ebp
addl $4,(%esp)
pushl %edi
call trap_dispatcher
addl $8,%esp
pop %es
pop %ds
# CLNT
pushfl
pop %eax
and $0xFFFFBFFF,%eax
push %eax
popfl
# Test if this is interrupt with error word or not
mov $\i,%cl
movl $1,%eax
test $0xe0,%cl
jnz 0f
and $0x1f,%cl
shl %cl,%eax
and $ERROR_WORD_INTERRUPT_LIST,%eax
jz 0f
# Return with error word
popa
pop %ebp
add $4,%esp # Skip error word
iret
0:
# Return with no error word
popa
pop %ebp
iret
.if (\n-\i)-1
handler "(\i+1)",\n
.endif
.endm
# keep in sync with pm.h !!!
IDT_ITEMS=64
interrupt_handlers:
h_start:
handler 0 64
# handler 64 128
# handler 128 192
# handler 192 256
h_end:
# THIS IS USERSPACE CODE
.global utext
utext:
xor %ax,%ax
mov %ax,%ds
mov %ax,%es
mov %ax,%fs
mov %ax,%gs
0:
int $48
jmp 0b
# not reached
utext_end:
.data
.global utext_size
utext_size:
.long utext_end - utext
.global interrupt_handler_size
interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS

/SPARTAN/trunk/arch/ia32/src/delay.s
0,0 → 1,50
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# Micro second delay loop functions.
#
.text
.global asm_delay_loop
.global asm_fake_loop
asm_delay_loop:
movl 4(%esp),%ecx # move argument to %ecx
0: lahf
dec %ecx
jnz 0b
ret
asm_fake_loop:
movl 4(%esp),%ecx # move argument to %ecx
0: lahf
dec %ecx
jz 0b
ret

/SPARTAN/trunk/arch/ia32/src/pm.c
0,0 → 1,214
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/pm.h>
#include <config.h>
#include <arch/types.h>
#include <typedefs.h>
#include <arch/interrupt.h>
#include <arch/asm.h>
#include <arch/context.h>
#include <panic.h>
#include <arch/mm/page.h>
#include <mm/heap.h>
#include <memstr.h>
#include <arch/boot/boot.h>
/*
* Early ia32 configuration functions and data structures.
*/
/*
* We have no use for segmentation so we set up flat mode. In this
* mode, we use, for each privilege level, two segments spanning the
* whole memory. One is for code and one is for data.
*/
struct descriptor gdt[GDT_ITEMS] = {
/* NULL descriptor */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
/* KTEXT descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
/* KDATA descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
/* UTEXT descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
/* UDATA descriptor */
{ 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
/* TSS descriptor - set up will be completed later */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
};
static struct idescriptor idt[IDT_ITEMS];
static struct tss tss;
struct tss *tss_p = NULL;
/* gdtr is changed by kmp before next CPU is initialized */
struct ptr_16_32 protected_bootstrap_gdtr = { .limit = sizeof(gdt), .base = KA2PA((__address) gdt) };
struct ptr_16_32 gdtr = { .limit = sizeof(gdt), .base = (__address) gdt };
void gdt_setbase(struct descriptor *d, __address base)
{
d->base_0_15 = base & 0xffff;
d->base_16_23 = ((base) >> 16) & 0xff;
d->base_24_31 = ((base) >> 24) & 0xff;
}
void gdt_setlimit(struct descriptor *d, __u32 limit)
{
d->limit_0_15 = limit & 0xffff;
d->limit_16_19 = (limit >> 16) & 0xf;
}
void idt_setoffset(struct idescriptor *d, __address offset)
{
/*
* Offset is a linear address.
*/
d->offset_0_15 = offset & 0xffff;
d->offset_16_31 = offset >> 16;
}
void tss_initialize(struct tss *t)
{
memsetb((__address) t, sizeof(struct tss), 0);
}
/*
* This function takes care of proper setup of IDT and IDTR.
*/
void idt_init(void)
{
struct idescriptor *d;
int i;
for (i = 0; i < IDT_ITEMS; i++) {
d = &idt[i];
d->unused = 0;
d->selector = selector(KTEXT_DES);
d->access = AR_PRESENT | AR_INTERRUPT; /* masking interrupt */
if (i == VECTOR_SYSCALL) {
/*
* The syscall interrupt gate must be calleable from userland.
*/
d->access |= DPL_USER;
}
idt_setoffset(d, ((__address) interrupt_handlers) + i*interrupt_handler_size);
trap_register(i, null_interrupt);
}
trap_register(13, gp_fault);
trap_register( 7, nm_fault);
trap_register(12, ss_fault);
}
/* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */
static void clean_IOPL_NT_flags(void)
{
asm
(
"pushfl;"
"pop %%eax;"
"and $0xffff8fff,%%eax;"
"push %%eax;"
"popfl;"
:
:
:"%eax"
);
}
/* Clean AM(18) flag in CR0 register */
static void clean_AM_flag(void)
{
asm
(
"mov %%cr0,%%eax;"
"and $0xFFFBFFFF,%%eax;"
"mov %%eax,%%cr0;"
:
:
:"%eax"
);
}
void pm_init(void)
{
struct descriptor *gdt_p = (struct descriptor *) gdtr.base;
struct ptr_16_32 idtr;
/*
* Update addresses in GDT and IDT to their virtual counterparts.
*/
idtr.limit = sizeof(idt);
idtr.base = (__address) idt;
__asm__ volatile ("lgdt %0\n" : : "m" (gdtr));
__asm__ volatile ("lidt %0\n" : : "m" (idtr));
/*
* Each CPU has its private GDT and TSS.
* All CPUs share one IDT.
*/
if (config.cpu_active == 1) {
idt_init();
/*
* NOTE: bootstrap CPU has statically allocated TSS, because
* the heap hasn't been initialized so far.
*/
tss_p = &tss;
}
else {
tss_p = (struct tss *) malloc(sizeof(struct tss));
if (!tss_p)
panic("could not allocate TSS\n");
}
tss_initialize(tss_p);
gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
gdt_p[TSS_DES].special = 1;
gdt_p[TSS_DES].granularity = 1;
gdt_setbase(&gdt_p[TSS_DES], (__address) tss_p);
gdt_setlimit(&gdt_p[TSS_DES], sizeof(struct tss) - 1);
/*
* As of this moment, the current CPU has its own GDT pointing
* to its own TSS. We just need to load the TR register.
*/
__asm__ volatile ("ltr %0" : : "r" ((__u16) selector(TSS_DES)));
clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels */
clean_AM_flag(); /* Disable alignment check */
}

/SPARTAN/trunk/arch/ia32/src/fpu_context.c
0,0 → 1,56
/*
* Copyright (C) 2005 Jakub Vana
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <fpu_context.h>
#include <arch.h>
#include <cpu.h>
void fpu_context_save(fpu_context_t *fctx)
{
__asm__ volatile (
"fnsave %0"
: "=m"(*fctx)
);
}
void fpu_context_restore(fpu_context_t *fctx)
{
__asm__ volatile (
"frstor %0"
: "=m"(*fctx)
);
}
void fpu_init(void)
{
__asm__ volatile (
"fninit;"
);
}

/SPARTAN/trunk/arch/ia32/src/fmath.c
0,0 → 1,146
/*
* Copyright (C) 2005 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/fmath.h>
#include <print.h>
#define FMATH_MANTISA_MASK ( 0x000fffffffffffffLL )
#define FMATH_NAN ( 0x0001000000000001LL )
signed short fmath_get_binary_exponent(double num)
{
fmath_ld_union_t fmath_ld_union;
fmath_ld_union.bf = num;
return (signed short)((((fmath_ld_union.ldd[7])&0x7f)<<4) + (((fmath_ld_union.ldd[6])&0xf0)>>4)) -FMATH_EXPONENT_BIAS; /* exponent is 11 bits lenght, so sevent bits is in 8th byte and 4 bits in 7th */
}
double fmath_get_decimal_exponent(double num)
{
double value;
/* log10(2)*log2(x) => log10(x) */
__asm__ __volatile__ ( \
"fldlg2 #load log10(2) \n\t" \
"fxch %%st(1) \n\t" \
"fyl2x #count st(0)*log2(st(1))->st(1); pop st(0) \n\t" \
: "=t" (value) : "0"(num) );
return value;
}
__u64 fmath_get_binary_mantisa(double num)
{
union { __u64 _u; double _d;} un = { _d : num };
un._u=un._u &(FMATH_MANTISA_MASK); /* mask 52 bits of mantisa*/
return un._u;
}
double fmath_fint(double num, double *intp)
{
fmath_ld_union_t fmath_ld_union_num;
fmath_ld_union_t fmath_ld_union_int;
signed short exp;
__u64 mask,mantisa;
int i;
exp=fmath_get_binary_exponent(num);
if (exp<0) {
*intp = 0.0;
return num;
}
if (exp>51) {
*intp=num;
num=0.0;
return num;
}
fmath_ld_union_num.bf = num;
mask = FMATH_MANTISA_MASK>>exp;
//mantisa = (fmath_get-binary_mantisa(num))&(~mask);
for (i=0;i<7;i++) {
/* Ugly construction for obtain sign, exponent and integer part from num */
fmath_ld_union_int.ldd[i]=fmath_ld_union_num.ldd[i]&(((~mask)>>(i*8))&0xff);
}
fmath_ld_union_int.ldd[6]|=((fmath_ld_union_num.ldd[6])&(0xf0));
fmath_ld_union_int.ldd[7]=fmath_ld_union_num.ldd[7];
*intp=fmath_ld_union_int.bf;
return fmath_ld_union_num.bf-fmath_ld_union_int.bf;
};
double fmath_dpow(double base, double exponent)
{
double value=1.0;
if (base<=0.0) return base;
//2^(x*log2(10)) = 2^y = 10^x
__asm__ __volatile__ ( \
"fyl2x # ST(1):=ST(1)*log2(ST(0)), pop st(0) \n\t " \
"fld %%st(0) \n\t" \
"frndint \n\t" \
"fxch %%st(1) \n\t" \
"fsub %%st(1),%%st(0) \n\t" \
"f2xm1 # ST := 2^ST -1\n\t" \
"fld1 \n\t" \
"faddp %%st(0),%%st(1) \n\t" \
"fscale #ST:=ST*2^(ST(1))\n\t" \
"fstp %%st(1) \n\t" \
"" : "=t" (value) : "0" (base), "u" (exponent) );
return value;
}
int fmath_is_nan(double num)
{
__u16 exp;
fmath_ld_union_t fmath_ld_union;
fmath_ld_union.bf = num;
exp=(((fmath_ld_union.ldd[7])&0x7f)<<4) + (((fmath_ld_union.ldd[6])&0xf0)>>4); /* exponent is 11 bits lenght, so sevent bits is in 8th byte and 4 bits in 7th */
if (exp!=0x07ff) return 0;
if (fmath_get_binary_mantisa(num)>=FMATH_NAN) return 1;
return 0;
}
int fmath_is_infinity(double num)
{
__u16 exp;
fmath_ld_union_t fmath_ld_union;
fmath_ld_union.bf = num;
exp=(((fmath_ld_union.ldd[7])&0x7f)<<4) + (((fmath_ld_union.ldd[6])&0xf0)>>4); /* exponent is 11 bits lenght, so sevent bits is in 8th byte and 4 bits in 7th */
if (exp!=0x07ff) return 0;
if (fmath_get_binary_mantisa(num)==0x0) return 1;
return 0;
}

/SPARTAN/trunk/arch/ia32/src/proc/scheduler.c
0,0 → 1,39
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <proc/scheduler.h>
#include <cpu.h>
#include <proc/thread.h>
#include <arch.h>
#include <arch/context.h> /* SP_DELTA */
void before_thread_runs_arch(void)
{
CPU->arch.tss->esp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
CPU->arch.tss->ss0 = selector(KDATA_DES);
}

/SPARTAN/trunk/arch/ia32/src/debug/panic.s
0,0 → 1,34
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
.text
.global panic_printf
panic_printf:
movl $halt,(%esp) # fake stack to make printf return to halt
jmp printf

/SPARTAN/trunk/arch/ia32/src/bios/bios.c
0,0 → 1,38
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/bios/bios.h>
#include <arch/types.h>
__address ebda = 0;
void bios_init(void)
{
/* Copy the EBDA address out from BIOS Data Area */
ebda = *((__u16 *) BIOS_EBDA_PTR) * 0x10;
}

/SPARTAN/trunk/arch/ia32/include/interrupt.h
0,0 → 1,87
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __INTERRUPT_H__
#define __INTERRUPT_H__
#include <arch/types.h>
#include <arch/pm.h>
#define IVT_ITEMS IDT_ITEMS
#define EXC_COUNT 32
#define IRQ_COUNT 16
#define IVT_EXCBASE 0
#define IVT_IRQBASE (IVT_EXCBASE+EXC_COUNT)
#define IVT_FREEBASE (IVT_IRQBASE+IRQ_COUNT)
#define IRQ_CLK 0
#define IRQ_KBD 1
#define IRQ_PIC1 2
#define IRQ_PIC_SPUR 7
/* this one must have four least significant bits set to ones */
#define VECTOR_APIC_SPUR (IVT_ITEMS-1)
#if (((VECTOR_APIC_SPUR + 1)%16) || VECTOR_APIC_SPUR >= IVT_ITEMS)
#error Wrong definition of VECTOR_APIC_SPUR
#endif
#define VECTOR_PIC_SPUR (IVT_IRQBASE+IRQ_PIC_SPUR)
#define VECTOR_CLK (IVT_IRQBASE+IRQ_CLK)
#define VECTOR_KBD (IVT_IRQBASE+IRQ_KBD)
#define VECTOR_SYSCALL (IVT_FREEBASE+0)
#define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE+1)
#define VECTOR_WAKEUP_IPI (IVT_FREEBASE+2)
typedef void (* iroutine)(__u8 n, __native stack[]);
extern void (* disable_irqs_function)(__u16 irqmask);
extern void (* enable_irqs_function)(__u16 irqmask);
extern void (* eoi_function)(void);
extern iroutine trap_register(__u8 n, iroutine f);
extern void trap_dispatcher(__u8 n, __native stack[]);
extern void null_interrupt(__u8 n, __native stack[]);
extern void gp_fault(__u8 n, __native stack[]);
extern void nm_fault(__u8 n, __native stack[]);
extern void ss_fault(__u8 n, __native stack[]);
extern void page_fault(__u8 n, __native stack[]);
extern void syscall(__u8 n, __native stack[]);
extern void tlb_shootdown_ipi(__u8 n, __native stack[]);
extern void wakeup_ipi(__u8 n, __native stack[]);
extern void trap_virtual_enable_irqs(__u16 irqmask);
extern void trap_virtual_disable_irqs(__u16 irqmask);
extern void trap_virtual_eoi(void);
#endif

/SPARTAN/trunk/arch/ia32/include/smp/apic.h
0,0 → 1,330
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __APIC_H__
#define __APIC_H__
#include <arch/types.h>
#include <cpu.h>
#define FIXED (0<<0)
#define LOPRI (1<<0)
#define APIC_ID_COUNT 16
/* local APIC macros */
#define IPI_INIT 0
#define IPI_STARTUP 0
/** Delivery modes. */
#define DELMOD_FIXED 0x0
#define DELMOD_LOWPRI 0x1
#define DELMOD_SMI 0x2
/* 0x3 reserved */
#define DELMOD_NMI 0x4
#define DELMOD_INIT 0x5
#define DELMOD_STARTUP 0x6
#define DELMOD_EXTINT 0x7
/** Destination modes. */
#define DESTMOD_PHYS 0x0
#define DESTMOD_LOGIC 0x1
/** Trigger Modes. */
#define TRIGMOD_EDGE 0x0
#define TRIGMOD_LEVEL 0x1
/** Levels. */
#define LEVEL_DEASSERT 0x0
#define LEVEL_ASSERT 0x1
/** Destination Shorthands. */
#define SHORTHAND_NONE 0x0
#define SHORTHAND_SELF 0x1
#define SHORTHAND_ALL_INCL 0x2
#define SHORTHAND_ALL_EXCL 0x3
/** Interrupt Input Pin Polarities. */
#define POLARITY_HIGH 0x0
#define POLARITY_LOW 0x1
/** Divide Values. (Bit 2 is always 0) */
#define DIVIDE_2 0x0
#define DIVIDE_4 0x1
#define DIVIDE_8 0x2
#define DIVIDE_16 0x3
#define DIVIDE_32 0x8
#define DIVIDE_64 0x9
#define DIVIDE_128 0xa
#define DIVIDE_1 0xb
/** Timer Modes. */
#define TIMER_ONESHOT 0x0
#define TIMER_PERIODIC 0x1
/** Delivery status. */
#define DELIVS_IDLE 0x0
#define DELIVS_PENDING 0x1
/** Destination masks. */
#define DEST_ALL 0xff
/** Interrupt Command Register. */
#define ICRlo (0x300/sizeof(__u32))
#define ICRhi (0x310/sizeof(__u32))
struct icr {
union {
__u32 lo;
struct {
__u8 vector; /**< Interrupt Vector. */
unsigned delmod : 3; /**< Delivery Mode. */
unsigned destmod : 1; /**< Destination Mode. */
unsigned delivs : 1; /**< Delivery status (RO). */
unsigned : 1; /**< Reserved. */
unsigned level : 1; /**< Level. */
unsigned trigger_mode : 1; /**< Trigger Mode. */
unsigned : 2; /**< Reserved. */
unsigned shorthand : 2; /**< Destination Shorthand. */
unsigned : 12; /**< Reserved. */
} __attribute__ ((packed));
};
union {
__u32 hi;
struct {
unsigned : 24; /**< Reserved. */
__u8 dest; /**< Destination field. */
} __attribute__ ((packed));
};
} __attribute__ ((packed));
typedef struct icr icr_t;
/* End Of Interrupt */
#define EOI (0x0b0/sizeof(__u32))
/** Error Status Register. */
#define ESR (0x280/sizeof(__u32))
union esr {
__u32 value;
__u8 err_bitmap;
struct {
unsigned send_checksum_error : 1;
unsigned receive_checksum_error : 1;
unsigned send_accept_error : 1;
unsigned receive_accept_error : 1;
unsigned : 1;
unsigned send_illegal_vector : 1;
unsigned received_illegal_vector : 1;
unsigned illegal_register_address : 1;
unsigned : 24;
} __attribute__ ((packed));
};
typedef union esr esr_t;
/* Task Priority Register */
#define TPR (0x080/sizeof(__u32))
#define TPRClear 0xffffff00
/** Spurious-Interrupt Vector Register. */
#define SVR (0x0f0/sizeof(__u32))
union svr {
__u32 value;
struct {
__u8 vector; /**< Spurious Vector */
unsigned lapic_enabled : 1; /**< APIC Software Enable/Disable */
unsigned focus_checking : 1; /**< Focus Processor Checking */
unsigned : 22; /**< Reserved. */
} __attribute__ ((packed));
};
typedef union svr svr_t;
/** Time Divide Configuration Register. */
#define TDCR (0x3e0/sizeof(__u32))
union tdcr {
__u32 value;
struct {
unsigned div_value : 4; /**< Divide Value, bit 2 is always 0. */
unsigned : 28; /**< Reserved. */
} __attribute__ ((packed));
};
typedef union tdcr tdcr_t;
/* Initial Count Register for Timer */
#define ICRT (0x380/sizeof(__u32))
/* Current Count Register for Timer */
#define CCRT (0x390/sizeof(__u32))
/** LVT Timer register. */
#define LVT_Tm (0x320/sizeof(__u32))
union lvt_tm {
__u32 value;
struct {
__u8 vector; /**< Local Timer Interrupt vector. */
unsigned : 4; /**< Reserved. */
unsigned delivs : 1; /**< Delivery status (RO). */
unsigned : 3; /**< Reserved. */
unsigned masked : 1; /**< Interrupt Mask. */
unsigned mode : 1; /**< Timer Mode. */
unsigned : 14; /**< Reserved. */
} __attribute__ ((packed));
};
typedef union lvt_tm lvt_tm_t;
/** LVT LINT registers. */
#define LVT_LINT0 (0x350/sizeof(__u32))
#define LVT_LINT1 (0x360/sizeof(__u32))
union lvt_lint {
__u32 value;
struct {
__u8 vector; /**< LINT Interrupt vector. */
unsigned delmod : 3; /**< Delivery Mode. */
unsigned : 1; /**< Reserved. */
unsigned delivs : 1; /**< Delivery status (RO). */
unsigned intpol : 1; /**< Interrupt Input Pin Polarity. */
unsigned irr : 1; /**< Remote IRR (RO). */
unsigned trigger_mode : 1; /**< Trigger Mode. */
unsigned masked : 1; /**< Interrupt Mask. */
unsigned : 15; /**< Reserved. */
} __attribute__ ((packed));
};
typedef union lvt_lint lvt_lint_t;
/** LVT Error register. */
#define LVT_Err (0x370/sizeof(__u32))
union lvt_error {
__u32 value;
struct {
__u8 vector; /**< Local Timer Interrupt vector. */
unsigned : 4; /**< Reserved. */
unsigned delivs : 1; /**< Delivery status (RO). */
unsigned : 3; /**< Reserved. */
unsigned masked : 1; /**< Interrupt Mask. */
unsigned : 15; /**< Reserved. */
} __attribute__ ((packed));
};
typedef union lvt_error lvt_error_t;
/** Local APIC ID Register. */
#define L_APIC_ID (0x020/sizeof(__u32))
union l_apic_id {
__u32 value;
struct {
unsigned : 24; /**< Reserved. */
__u8 apic_id; /**< Local APIC ID. */
} __attribute__ ((packed));
};
typedef union l_apic_id l_apic_id_t;
/* Local APIC Version Register */
#define LAVR (0x030/sizeof(__u32))
#define LAVR_Mask 0xff
#define is_local_apic(x) (((x)&LAVR_Mask&0xf0)==0x1)
#define is_82489DX_apic(x) ((((x)&LAVR_Mask&0xf0)==0x0))
#define is_local_xapic(x) (((x)&LAVR_Mask)==0x14)
/* IO APIC */
#define IOREGSEL (0x00/sizeof(__u32))
#define IOWIN (0x10/sizeof(__u32))
#define IOAPICID 0x00
#define IOAPICVER 0x01
#define IOAPICARB 0x02
#define IOREDTBL 0x10
/** I/O Register Select Register. */
union io_regsel {
__u32 value;
struct {
__u8 reg_addr; /**< APIC Register Address. */
unsigned : 24; /**< Reserved. */
} __attribute__ ((packed));
};
typedef union io_regsel io_regsel_t;
/** I/O Redirection Register. */
struct io_redirection_reg {
union {
__u32 lo;
struct {
__u8 intvec; /**< Interrupt Vector. */
unsigned delmod : 3; /**< Delivery Mode. */
unsigned destmod : 1; /**< Destination mode. */
unsigned delivs : 1; /**< Delivery status (RO). */
unsigned intpol : 1; /**< Interrupt Input Pin Polarity. */
unsigned irr : 1; /**< Remote IRR (RO). */
unsigned trigger_mode : 1; /**< Trigger Mode. */
unsigned masked : 1; /**< Interrupt Mask. */
unsigned : 15; /**< Reserved. */
} __attribute__ ((packed));
};
union {
__u32 hi;
struct {
unsigned : 24; /**< Reserved. */
__u8 dest : 8; /**< Destination Field. */
} __attribute__ ((packed));
};
} __attribute__ ((packed));
typedef struct io_redirection_reg io_redirection_reg_t;
/** IO APIC Identification Register. */
union io_apic_id {
__u32 value;
struct {
unsigned : 24; /**< Reserved. */
unsigned apic_id : 4; /**< IO APIC ID. */
unsigned : 4; /**< Reserved. */
} __attribute__ ((packed));
};
typedef union io_apic_id io_apic_id_t;
extern volatile __u32 *l_apic;
extern volatile __u32 *io_apic;
extern __u32 apic_id_mask;
extern void apic_init(void);
extern void apic_spurious(__u8 n, __native stack[]);
extern void l_apic_init(void);
extern void l_apic_eoi(void);
extern int l_apic_broadcast_custom_ipi(__u8 vector);
extern int l_apic_send_init_ipi(__u8 apicid);
extern void l_apic_debug(void);
extern void l_apic_timer_interrupt(__u8 n, __native stack[]);
extern __u8 l_apic_id(void);
extern __u32 io_apic_read(__u8 address);
extern void io_apic_write(__u8 address , __u32 x);
extern void io_apic_change_ioredtbl(int pin, int dest, __u8 v, int flags);
extern void io_apic_disable_irqs(__u16 irqmask);
extern void io_apic_enable_irqs(__u16 irqmask);
#endif

/SPARTAN/trunk/arch/ia32/include/smp/mps.h
0,0 → 1,126
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __MPS_H__
#define __MPS_H__
#include <arch/types.h>
#include <typedefs.h>
#include <synch/waitq.h>
#include <config.h>
#include <arch/smp/smp.h>
#define CT_EXT_ENTRY_TYPE 0
#define CT_EXT_ENTRY_LEN 1
struct mps_fs {
__u32 signature;
__u32 configuration_table;
__u8 length;
__u8 revision;
__u8 checksum;
__u8 config_type;
__u8 mpfib2;
__u8 mpfib3;
__u8 mpfib4;
__u8 mpfib5;
} __attribute__ ((packed));
struct mps_ct {
__u32 signature;
__u16 base_table_length;
__u8 revision;
__u8 checksum;
__u8 oem_id[8];
__u8 product_id[12];
__u32 oem_table;
__u16 oem_table_size;
__u16 entry_count;
__u32 l_apic;
__u16 ext_table_length;
__u8 ext_table_checksum;
__u8 xxx;
__u8 base_table[0];
} __attribute__ ((packed));
struct __processor_entry {
__u8 type;
__u8 l_apic_id;
__u8 l_apic_version;
__u8 cpu_flags;
__u8 cpu_signature[4];
__u32 feature_flags;
__u32 xxx[2];
} __attribute__ ((packed));
struct __bus_entry {
__u8 type;
__u8 bus_id;
__u8 bus_type[6];
} __attribute__ ((packed));
struct __io_apic_entry {
__u8 type;
__u8 io_apic_id;
__u8 io_apic_version;
__u8 io_apic_flags;
__u32 io_apic;
} __attribute__ ((packed));
struct __io_intr_entry {
__u8 type;
__u8 intr_type;
__u8 poel;
__u8 xxx;
__u8 src_bus_id;
__u8 src_bus_irq;
__u8 dst_io_apic_id;
__u8 dst_io_apic_pin;
} __attribute__ ((packed));
struct __l_intr_entry {
__u8 type;
__u8 intr_type;
__u8 poel;
__u8 xxx;
__u8 src_bus_id;
__u8 src_bus_irq;
__u8 dst_l_apic_id;
__u8 dst_l_apic_pin;
} __attribute__ ((packed));
extern waitq_t ap_completion_wq;
extern waitq_t kmp_completion_wq;
extern struct smp_config_operations mps_config_operations;
extern void mps_init(void);
extern void kmp(void *arg);
#endif

/SPARTAN/trunk/arch/ia32/include/smp/smp.h
0,0 → 1,46
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_SMP_H__
#define __ia32_SMP_H__
#include <arch/types.h>
#include <typedefs.h>
/** SMP config opertaions interface. */
struct smp_config_operations {
count_t (* cpu_count)(void); /**< Return number of detected processors. */
bool (* cpu_enabled)(index_t i); /**< Check whether the processor of index i is enabled. */
bool (*cpu_bootstrap)(index_t i); /**< Check whether the processor of index i is BSP. */
__u8 (*cpu_apic_id)(index_t i); /**< Return APIC ID of the processor of index i. */
int (*irq_to_pin)(int irq); /**< Return mapping between irq and APIC pin. */
};
extern int smp_irq_to_pin(int irq);
#endif

/SPARTAN/trunk/arch/ia32/include/smp/ap.h
0,0 → 1,34
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __AP_H__
#define __AP_H__
extern void ap_boot(void);
#endif

/SPARTAN/trunk/arch/ia32/include/i8042.h
0,0 → 1,44
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __I8042_H__
#define __I8042_H__
#include <arch/types.h>
/** Scancodes. */
#define SC_ESC 0x01
#define SC_BACKSPACE 0x0e
#define SC_LSHIFT 0x2a
#define SC_RSHIFT 0x36
#define SC_CAPSLOCK 0x3a
extern void i8042_init(void);
extern void i8042_interrupt(__u8 n, __native stack[]);
#endif

/SPARTAN/trunk/arch/ia32/include/boot/boot.h
0,0 → 1,40
/*
* Copyright (C) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_BOOT_H__
#define __ia32_BOOT_H__
#define BOOTSTRAP_OFFSET 0x8000
#define BOOT_OFFSET 0x100000
#define MULTIBOOT_HEADER_MAGIC 0x1BADB002
#define MULTIBOOT_HEADER_FLAGS 0x00010003
#define MULTIBOOT_LOADER_MAGIC 0x2BADB002
#endif

/SPARTAN/trunk/arch/ia32/include/boot/memmap.h
0,0 → 1,68
/*
* Copyright (C) 2005 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_MEMMAP_H__
#define __ia32_MEMMAP_H__
/* E820h memory range types - other values*/
/* Free memory */
#define MEMMAP_MEMORY_AVAILABLE 1
/* Not available for OS */
#define MEMMAP_MEMORY_RESERVED 2
/* OS may use it after reading ACPI table */
#define MEMMAP_MEMORY_ACPI 3
/* Unusable, required to be saved and restored across an NVS sleep */
#define MEMMAP_MEMORY_NVS 4
/* Corrupted memory */
#define MEMMAP_MEMORY_UNUSABLE 5
/* size of one entry */
#define MEMMAP_E820_RECORD_SIZE 20
/* maximum entries */
#define MEMMAP_E820_MAX_RECORDS 32
#ifndef __ASM__
#include <arch/types.h>
struct e820memmap_ {
__u64 base_address;
__u64 size;
__u32 type;
} __attribute__ ((packed));
extern struct e820memmap_ e820table[MEMMAP_E820_MAX_RECORDS];
extern __u8 e820counter;
extern __u32 e801memorysize; // size of memory in KB
#endif
#endif

/SPARTAN/trunk/arch/ia32/include/atomic.h
0,0 → 1,96
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_ATOMIC_H__
#define __ia32_ATOMIC_H__
#include <arch/types.h>
typedef volatile __u32 atomic_t;
static inline void atomic_inc(atomic_t *val) {
#ifdef CONFIG_SMP
__asm__ volatile ("lock incl %0\n" : "=m" (*val));
#else
__asm__ volatile ("incl %0\n" : "=m" (*val));
#endif /* CONFIG_SMP */
}
static inline void atomic_dec(atomic_t *val) {
#ifdef CONFIG_SMP
__asm__ volatile ("lock decl %0\n" : "=m" (*val));
#else
__asm__ volatile ("decl %0\n" : "=m" (*val));
#endif /* CONFIG_SMP */
}
static inline atomic_t atomic_inc_pre(atomic_t *val)
{
atomic_t r;
__asm__ volatile (
"movl $1,%0;"
"lock xaddl %0,%1;"
: "=r"(r), "=m" (*val)
);
return r;
}
static inline atomic_t atomic_dec_pre(atomic_t *val)
{
atomic_t r;
__asm__ volatile (
"movl $-1,%0;"
"lock xaddl %0,%1;"
: "=r"(r), "=m" (*val)
);
return r;
}
#define atomic_inc_post(val) (atomic_inc_pre(val)+1)
#define atomic_dec_post(val) (atomic_dec_pre(val)-1)
static inline int test_and_set(volatile int *val) {
int v;
__asm__ volatile (
"movl $1, %0\n"
"xchgl %0, %1\n"
: "=r" (v),"=m" (*val)
);
return v;
}
extern void spinlock_arch(volatile int *val);
#endif

/SPARTAN/trunk/arch/ia32/include/barrier.h
0,0 → 1,83
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_BARRIER_H__
#define __ia32_BARRIER_H__
#include <arch/types.h>
/*
* NOTE:
* No barriers for critical section (i.e. spinlock) on IA-32 are needed:
* - spinlock_lock() and spinlock_trylock() use serializing XCHG instruction
* - writes cannot pass reads on IA-32 => spinlock_unlock() needs no barriers
*/
/*
* Provisions are made to prevent compiler from reordering instructions itself.
*/
#define CS_ENTER_BARRIER() __asm__ volatile ("" ::: "memory")
#define CS_LEAVE_BARRIER() __asm__ volatile ("" ::: "memory")
static inline void cpuid_serialization(void)
{
__asm__ volatile (
"xorl %%eax, %%eax\n"
"cpuid\n"
::: "eax", "ebx", "ecx", "edx", "memory"
);
}
#ifdef CONFIG_FENCES_P4
# define memory_barrier() __asm__ volatile ("mfence\n" ::: "memory")
# define read_barrier() __asm__ volatile ("lfence\n" ::: "memory")
# ifdef CONFIG_WEAK_MEMORY
# define write_barrier() __asm__ volatile ("sfence\n" ::: "memory")
# else
# define write_barrier()
# endif
#elif CONFIG_FENCES_P3
# define memory_barrier() cpuid_serialization()
# define read_barrier() cpuid_serialization()
# ifdef CONFIG_WEAK_MEMORY
# define write_barrier() __asm__ volatile ("sfence\n" ::: "memory")
# else
# define write_barrier()
# endif
#else
# define memory_barrier() cpuid_serialization()
# define read_barrier() cpuid_serialization()
# ifdef CONFIG_WEAK_MEMORY
# define write_barrier() cpuid_serialization()
# else
# define write_barrier()
# endif
#endif
#endif

/SPARTAN/trunk/arch/ia32/include/ega.h
0,0 → 1,40
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __EGA_H__
#define __EGA_H__
#define VIDEORAM 0xb8000
#define ROW 80
#define ROWS 25
#define SCREEN (ROW*ROWS)
extern void ega_init(void);
extern void ega_putchar(const char ch);
#endif

/SPARTAN/trunk/arch/ia32/include/asm.h
0,0 → 1,226
/*
* Copyright (C) 2001-2004 Jakub Jermar
* Copyright (C) 2005 Sergey Bondari
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_ASM_H__
#define __ia32_ASM_H__
#include <arch/types.h>
#include <config.h>
extern __u32 interrupt_handler_size;
extern void paging_on(void);
extern void interrupt_handlers(void);
extern void enable_l_apic_in_msr(void);
void asm_delay_loop(__u32 t);
void asm_fake_loop(__u32 t);
/** Halt CPU
*
* Halt the current CPU until interrupt event.
*/
static inline void cpu_halt(void) { __asm__("hlt\n"); };
static inline void cpu_sleep(void) { __asm__("hlt\n"); };
/** Read CR2
*
* Return value in CR2
*
* @return Value read.
*/
static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0\n" : "=r" (v)); return v; }
/** Write CR3
*
* Write value to CR3.
*
* @param v Value to be written.
*/
static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
/** Read CR3
*
* Return value in CR3
*
* @return Value read.
*/
static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0\n" : "=r" (v)); return v; }
/** Byte to port
*
* Output byte to port
*
* @param port Port to write to
* @param val Value to write
*/
static inline void outb(__u16 port, __u8 val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
/** Word to port
*
* Output word to port
*
* @param port Port to write to
* @param val Value to write
*/
static inline void outw(__u16 port, __u16 val) { __asm__ volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) ); }
/** Double word to port
*
* Output double word to port
*
* @param port Port to write to
* @param val Value to write
*/
static inline void outl(__u16 port, __u32 val) { __asm__ volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) ); }
/** Byte from port
*
* Get byte from port
*
* @param port Port to read from
* @return Value read
*/
static inline __u8 inb(__u16 port) { __u8 val; __asm__ volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
/** Word from port
*
* Get word from port
*
* @param port Port to read from
* @return Value read
*/
static inline __u16 inw(__u16 port) { __u16 val; __asm__ volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) ); return val; }
/** Double word from port
*
* Get double word from port
*
* @param port Port to read from
* @return Value read
*/
static inline __u32 inl(__u16 port) { __u32 val; __asm__ volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; }
/** Enable interrupts.
*
* Enable interrupts and return previous
* value of EFLAGS.
*
* @return Old interrupt priority level.
*/
static inline ipl_t interrupts_enable(void)
{
ipl_t v;
__asm__ volatile (
"pushf\n\t"
"popl %0\n\t"
"sti\n"
: "=r" (v)
);
return v;
}
/** Disable interrupts.
*
* Disable interrupts and return previous
* value of EFLAGS.
*
* @return Old interrupt priority level.
*/
static inline ipl_t interrupts_disable(void)
{
ipl_t v;
__asm__ volatile (
"pushf\n\t"
"popl %0\n\t"
"cli\n"
: "=r" (v)
);
return v;
}
/** Restore interrupt priority level.
*
* Restore EFLAGS.
*
* @param ipl Saved interrupt priority level.
*/
static inline void interrupts_restore(ipl_t ipl)
{
__asm__ volatile (
"pushl %0\n\t"
"popf\n"
: : "r" (ipl)
);
}
/** Return interrupt priority level.
*
* @return EFLAFS.
*/
static inline ipl_t interrupts_read(void)
{
ipl_t v;
__asm__ volatile (
"pushf\n\t"
"popl %0\n"
: "=r" (v)
);
return v;
}
/** Return base address of current stack
*
* Return the base address of the current stack.
* The stack is assumed to be STACK_SIZE bytes long.
* The stack must start on page boundary.
*/
static inline __address get_stack_base(void)
{
__address v;
__asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
return v;
}
static inline __u64 rdtsc(void)
{
__u64 v;
__asm__ volatile("rdtsc\n" : "=A" (v));
return v;
}
#endif

/SPARTAN/trunk/arch/ia32/include/memstr.h
0,0 → 1,142
/*
* Copyright (C) 2005 Sergey Bondari
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_MEMSTR_H__
#define __ia32_MEMSTR_H__
/** Copy memory
*
* Copy a given number of bytes (3rd argument)
* from the memory location defined by 2nd argument
* to the memory location defined by 1st argument.
* The memory areas cannot overlap.
*
* @param dst Destination
* @param src Source
* @param cnt Number of bytes
* @return Destination
*/
static inline void * memcpy(void * dst, const void * src, size_t cnt)
{
__native d0, d1, d2;
__asm__ __volatile__(
/* copy all full dwords */
"rep movsl\n\t"
/* load count again */
"movl %4, %%ecx\n\t"
/* ecx = ecx mod 4 */
"andl $3, %%ecx\n\t"
/* are there last <=3 bytes? */
"jz 1f\n\t"
/* copy last <=3 bytes */
"rep movsb\n\t"
/* exit from asm block */
"1:\n"
: "=&c" (d0), "=&D" (d1), "=&S" (d2)
: "0" ((__native) (cnt / 4)), "g" ((__native) cnt), "1" ((__native) dst), "2" ((__native) src)
: "memory");
return dst;
}
/** Compare memory regions for equality
*
* Compare a given number of bytes (3rd argument)
* at memory locations defined by 1st and 2nd argument
* for equality. If bytes are equal function returns 0.
*
* @param src Region 1
* @param dst Region 2
* @param cnt Number of bytes
* @return Zero if bytes are equal, non-zero otherwise
*/
static inline int memcmp(const void * src, const void * dst, size_t cnt)
{
__u32 d0, d1, d2;
int ret;
__asm__ (
"repe cmpsb\n\t"
"je 1f\n\t"
"movl %3, %0\n\t"
"addl $1, %0\n\t"
"1:\n"
: "=a" (ret), "=%S" (d0), "=&D" (d1), "=&c" (d2)
: "0" (0), "1" ((__native) src), "2" ((__native) dst), "3" ((__native) cnt)
);
return ret;
}
/** Fill memory with words
* Fill a given number of words (2nd argument)
* at memory defined by 1st argument with the
* word value defined by 3rd argument.
*
* @param dst Destination
* @param cnt Number of words
* @param x Value to fill
*/
static inline void memsetw(__address dst, size_t cnt, __u16 x)
{
__u32 d0, d1;
__asm__ __volatile__ (
"rep stosw\n\t"
: "=&D" (d0), "=&c" (d1), "=a" (x)
: "0" (dst), "1" (cnt), "2" (x)
: "memory"
);
}
/** Fill memory with bytes
* Fill a given number of bytes (2nd argument)
* at memory defined by 1st argument with the
* word value defined by 3rd argument.
*
* @param dst Destination
* @param cnt Number of bytes
* @param x Value to fill
*/
static inline void memsetb(__address dst, size_t cnt, __u8 x)
{
__u32 d0, d1;
__asm__ __volatile__ (
"rep stosb\n\t"
: "=&D" (d0), "=&c" (d1), "=a" (x)
: "0" (dst), "1" (cnt), "2" (x)
: "memory"
);
}
#endif

/SPARTAN/trunk/arch/ia32/include/context.h
0,0 → 1,58
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_CONTEXT_H__
#define __ia32_CONTEXT_H__
#include <arch/types.h>
#define STACK_ITEM_SIZE 4
/*
* Both context_save() and context_restore() eat two doublewords from the stack.
* First for pop of the saved register, second during ret instruction.
*
* One item is put onto stack to support get_stack_base().
*/
#define SP_DELTA (8+STACK_ITEM_SIZE)
/*
* Only save registers that must be preserved across
* function calls.
*/
struct context {
__address sp;
__address pc;
__u32 ebx;
__u32 esi;
__u32 edi;
__u32 ebp;
ipl_t ipl;
} __attribute__ ((packed));
#endif

/SPARTAN/trunk/arch/ia32/include/types.h
0,0 → 1,49
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __TYPES_H__
#define __TYPES_H__
#define NULL 0
typedef signed char __s8;
typedef unsigned char __u8;
typedef unsigned short __u16;
typedef unsigned long __u32;
typedef long long __u64;
typedef __u32 __address;
typedef __u32 ipl_t;
typedef __u32 __native;
typedef struct page_specifier pte_t;
#endif

/SPARTAN/trunk/arch/ia32/include/cpuid.h
0,0 → 1,82
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __CPUID_H__
#define __CPUID_H__
#include <arch/types.h>
struct cpu_info {
__u32 cpuid_eax;
__u32 cpuid_ebx;
__u32 cpuid_ecx;
__u32 cpuid_edx;
} __attribute__ ((packed));
static inline __u32 has_cpuid(void)
{
__u32 val, ret;
__asm__ volatile (
"pushf\n" /* read flags */
"popl %0\n"
"movl %0, %1\n"
"btcl $21, %1\n" /* swap the ID bit */
"pushl %1\n" /* propagate the change into flags */
"popf\n"
"pushf\n"
"popl %1\n"
"andl $(1 << 21), %0\n" /* interrested only in ID bit */
"andl $(1 << 21), %1\n"
"xorl %1, %0\n"
: "=r" (ret), "=r" (val)
);
return ret;
}
static inline void cpuid(__u32 cmd, struct cpu_info *info)
{
__asm__ volatile (
"movl %4, %%eax\n"
"cpuid\n"
"movl %%eax, %0\n"
"movl %%ebx, %1\n"
"movl %%ecx, %2\n"
"movl %%edx, %3\n"
: "=m" (info->cpuid_eax), "=m" (info->cpuid_ebx), "=m" (info->cpuid_ecx), "=m" (info->cpuid_edx)
: "m" (cmd)
: "eax", "ebx", "ecx", "edx"
);
}
#endif

/SPARTAN/trunk/arch/ia32/include/mm/page.h
0,0 → 1,121
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_PAGE_H__
#define __ia32_PAGE_H__
#define PAGE_SIZE FRAME_SIZE
#ifndef __ASM__
# define KA2PA(x) (((__address) (x)) - 0x80000000)
# define PA2KA(x) (((__address) (x)) + 0x80000000)
#else
# define KA2PA(x) ((x) - 0x80000000)
# define PA2KA(x) ((x) + 0x80000000)
#endif
/*
* Implementation of generic 4-level page table interface.
* IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
*/
#define PTL0_INDEX_ARCH(vaddr) (((vaddr)>>22)&0x3ff)
#define PTL1_INDEX_ARCH(vaddr) 0
#define PTL2_INDEX_ARCH(vaddr) 0
#define PTL3_INDEX_ARCH(vaddr) (((vaddr)>>12)&0x3ff)
#define GET_PTL0_ADDRESS_ARCH() ((pte_t *) read_cr3())
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *)((((pte_t *)(ptl0))[(i)].frame_address)<<12))
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((__address)((((pte_t *)(ptl3))[(i)].frame_address)<<12))
#define SET_PTL0_ADDRESS_ARCH(ptl0) (write_cr3((__address) (ptl0)))
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *)(ptl0))[(i)].frame_address = (a)>>12)
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *)(ptl3))[(i)].frame_address = (a)>>12)
#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i))
#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT
#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT
#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i))
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
#ifndef __ASM__
#include <mm/page.h>
#include <arch/types.h>
#include <arch/mm/frame.h>
#include <typedefs.h>
struct page_specifier {
unsigned present : 1;
unsigned writeable : 1;
unsigned uaccessible : 1;
unsigned page_write_through : 1;
unsigned page_cache_disable : 1;
unsigned accessed : 1;
unsigned dirty : 1;
unsigned : 2;
unsigned avl : 3;
unsigned frame_address : 20;
} __attribute__ ((packed));
static inline int get_pt_flags(pte_t *pt, index_t i)
{
pte_t *p = &pt[i];
return (
(!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT |
(!p->present)<<PAGE_PRESENT_SHIFT |
p->uaccessible<<PAGE_USER_SHIFT |
1<<PAGE_READ_SHIFT |
p->writeable<<PAGE_WRITE_SHIFT |
1<<PAGE_EXEC_SHIFT
);
}
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
{
pte_t *p = &pt[i];
p->page_cache_disable = !(flags & PAGE_CACHEABLE);
p->present = !(flags & PAGE_NOT_PRESENT);
p->uaccessible = (flags & PAGE_USER) != 0;
p->writeable = (flags & PAGE_WRITE) != 0;
}
extern void page_arch_init(void);
#endif /* __ASM__ */
#endif

/SPARTAN/trunk/arch/ia32/include/mm/asid.h
0,0 → 1,36
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_ASID_H__
#define __ia32_ASID_H__
typedef int asid_t;
#define asid_get() 0
#endif

/SPARTAN/trunk/arch/ia32/include/mm/vm.h
0,0 → 1,45
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_VM_H__
#define __ia32_VM_H__
#include <arch/types.h>
#define KERNEL_ADDRESS_SPACE_START_ARCH ((__address) 0x80000000)
#define KERNEL_ADDRESS_SPACE_END_ARCH ((__address) 0xffffffff)
#define USER_ADDRESS_SPACE_START_ARCH ((__address) 0x00000000)
#define USER_ADDRESS_SPACE_END_ARCH ((__address) 0x7fffffff)
#define UTEXT_ADDRESS_ARCH 0x00001000
#define USTACK_ADDRESS_ARCH (USER_ADDRESS_SPACE_END_ARCH-(PAGE_SIZE-1))
#define UDATA_ADDRESS_ARCH 0x21000000
#define vm_install_arch(vm)
#endif

/SPARTAN/trunk/arch/ia32/include/mm/tlb.h
0,0 → 1,34
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_TLB_H__
#define __ia32_TLB_H__
#define tlb_init_arch()
#endif

/SPARTAN/trunk/arch/ia32/include/mm/memory_init.h
0,0 → 1,38
/*
* Copyright (C) 2005 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_MEMORY_INIT_H__
#define __ia32_MEMORY_INIT_H__
#include <typedefs.h>
size_t get_memory_size(void);
void memory_print_map(void);
#endif

/SPARTAN/trunk/arch/ia32/include/mm/frame.h
0,0 → 1,40
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_FRAME_H__
#define __ia32_FRAME_H__
#include <arch/types.h>
#define FRAME_SIZE 4096
extern __address bootstrap_dba;
extern void frame_arch_init(void);
#endif

/SPARTAN/trunk/arch/ia32/include/byteorder.h
0,0 → 1,36
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_BYTEORDER_H__
#define __ia32_BYTEORDER_H__
/* IA-32 is little-endian */
#define __native_le2host(n) (n)
#define __u64_le2host(n) (n)
#endif

/SPARTAN/trunk/arch/ia32/include/fpu_context.h
0,0 → 1,40
/*
* Copyright (C) 2005 Jakub Vana
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_FPU_CONTEXT_H__
#define __ia32_FPU_CONTEXT_H__
#include <arch/types.h>
struct fpu_context {
/* TODO: We need malloc that aligns structures on 16-byte boundary */
__u8 fpu[512+16]; /* FXSAVE & FXRSTOR storage area */
};
#endif

/SPARTAN/trunk/arch/ia32/include/cpu.h
0,0 → 1,44
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_CPU_H__
#define __ia32_CPU_H__
#include <typedefs.h>
#include <arch/pm.h>
#include <arch/asm.h>
struct cpu_arch {
int vendor;
int family;
int model;
int stepping;
struct tss *tss;
};
#endif

/SPARTAN/trunk/arch/ia32/include/i8259.h
0,0 → 1,49
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __I8259_H__
#define __I8259_H__
#include <arch/types.h>
#include <arch/interrupt.h>
#define PIC_PIC0PORT1 0x20
#define PIC_PIC0PORT2 0x21
#define PIC_PIC1PORT1 0xa0
#define PIC_PIC1PORT2 0xa1
#define PIC_NEEDICW4 (1<<0)
#define PIC_ICW1 (1<<4)
extern void i8259_init(void);
extern void pic_enable_irqs(__u16 irqmask);
extern void pic_disable_irqs(__u16 irqmask);
extern void pic_eoi(void);
extern void pic_spurious(__u8 n, __native stack[]);
#endif

/SPARTAN/trunk/arch/ia32/include/pm.h
0,0 → 1,152
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __PM_H__
#define __PM_H__
#define IDT_ITEMS 64
#define GDT_ITEMS 6
#define NULL_DES 0
#define KTEXT_DES 1
#define KDATA_DES 2
#define UTEXT_DES 3
#define UDATA_DES 4
#define TSS_DES 5
#define selector(des) ((des)<<3)
#define PL_KERNEL 0
#define PL_USER 3
#define AR_PRESENT (1<<7)
#define AR_DATA (2<<3)
#define AR_CODE (3<<3)
#define AR_WRITABLE (1<<1)
#define AR_INTERRUPT (0xe)
#define AR_TSS (0x9)
#define DPL_KERNEL (PL_KERNEL<<5)
#define DPL_USER (PL_USER<<5)
#define IO_MAP_BASE (104)
#ifndef __ASM__
#include <arch/types.h>
#include <typedefs.h>
#include <arch/context.h>
struct ptr_16_32 {
__u16 limit;
__u32 base;
} __attribute__ ((packed));
struct descriptor {
unsigned limit_0_15: 16;
unsigned base_0_15: 16;
unsigned base_16_23: 8;
unsigned access: 8;
unsigned limit_16_19: 4;
unsigned available: 1;
unsigned unused: 1;
unsigned special: 1;
unsigned granularity : 1;
unsigned base_24_31: 8;
} __attribute__ ((packed));
struct idescriptor {
unsigned offset_0_15: 16;
unsigned selector: 16;
unsigned unused: 8;
unsigned access: 8;
unsigned offset_16_31: 16;
} __attribute__ ((packed));
struct tss {
__u16 link;
unsigned : 16;
__u32 esp0;
__u16 ss0;
unsigned : 16;
__u32 esp1;
__u16 ss1;
unsigned : 16;
__u32 esp2;
__u16 ss2;
unsigned : 16;
__u32 cr3;
__u32 eip;
__u32 eflags;
__u32 eax;
__u32 ecx;
__u32 edx;
__u32 ebx;
__u32 esp;
__u32 ebp;
__u32 esi;
__u32 edi;
__u16 es;
unsigned : 16;
__u16 cs;
unsigned : 16;
__u16 ss;
unsigned : 16;
__u16 ds;
unsigned : 16;
__u16 fs;
unsigned : 16;
__u16 gs;
unsigned : 16;
__u16 ldtr;
unsigned : 16;
unsigned : 16;
__u16 io_map_base;
} __attribute__ ((packed));
extern struct ptr_16_32 gdtr;
extern struct ptr_16_32 real_bootstrap_gdtr;
extern struct ptr_16_32 protected_bootstrap_gdtr;
extern struct tss *tss_p;
extern struct descriptor gdt[];
extern void pm_init(void);
extern void gdt_setbase(struct descriptor *d, __address base);
extern void gdt_setlimit(struct descriptor *d, __u32 limit);
extern void idt_init(void);
extern void idt_setoffset(struct idescriptor *d, __address offset);
extern void tss_initialize(struct tss *t);
#endif /* __ASM__ */
#endif

/SPARTAN/trunk/arch/ia32/include/fmath.h
0,0 → 1,64
/*
* Copyright (C) 2005 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/types.h>
#define FMATH_EXPONENT_BIAS 1023
typedef unsigned char fmath_ld_descr_t[8];
typedef union { double bf; unsigned char ldd[8]; } fmath_ld_union_t;
/**returns exponent in binary encoding*/
signed short fmath_get_binary_exponent(double num);
/**returns exponent in decimal encoding*/
double fmath_get_decimal_exponent(double num);
/**returns mantisa in binary encoding */
__u64 fmath_get_binary_mantisa(double num) ;
/** Function for extract integer part from double
* @param num input value
* @param intp integer part of num
* @return non-integer part
*/
double fmath_fint(double num, double *intp);
/** count base^exponent from positive exponent
* @param base
* @param exponent - Must be > 0.0
* @return base^exponent or 0.0 (if exponent <=0.0)
*/
double fmath_dpow(double base, double exponent) ;
/** return 1, if num is NaN */
int fmath_is_nan(double num);
/** return 1, if fmath is a infinity */
int fmath_is_infinity(double num);

/SPARTAN/trunk/arch/ia32/include/arch.h
0,0 → 1,32
/*
* Copyright (C) 2005 Martin Decky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_ARCH_H__
#define __ia32_ARCH_H__
#endif

/SPARTAN/trunk/arch/ia32/include/i8254.h
0,0 → 1,39
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __I8254_H__
#define __I8254_H__
#include <arch/types.h>
extern void i8254_init(void);
extern void i8254_interrupt(__u8 n, __native stack[]);
extern void i8254_calibrate_delay_loop(void);
extern void i8254_normal_operation(void);
#endif

/SPARTAN/trunk/arch/ia32/include/faddr.h
0,0 → 1,36
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_FADDR_H__
#define __ia32_FADDR_H__
#include <arch/types.h>
#define FADDR(fptr) ((__address) (fptr))
#endif

/SPARTAN/trunk/arch/ia32/include/arg.h
0,0 → 1,34
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_ARG_H__
#define __ia32_ARG_H__
#include <stackarg.h>
#endif

/SPARTAN/trunk/arch/ia32/include/bios/bios.h
0,0 → 1,40
/*
* Copyright (C) 2005 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __BIOS_H__
#define __BIOS_H__
#include <arch/types.h>
#define BIOS_EBDA_PTR 0x40e
extern __address ebda;
extern void bios_init(void);
#endif /* __BIOS_H__ */

/SPARTAN/trunk/arch/ia32/include/thread.h
0,0 → 1,34
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ia32_THREAD_H__
#define __ia32_THREAD_H__
#define ARCH_THREAD_DATA
#endif

/SPARTAN/trunk/arch/ia32/Makefile.inc
0,0 → 1,122
#
# Copyright (C) 2005 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
## Toolchain configuration
#
BFD_NAME = elf32-i386
BFD_ARCH = i386
BFD = binary
TARGET = i686-pc-linux-gnu
TOOLCHAIN_DIR = /usr/local/i686/bin
## Make some default assumptions
#
ifndef CPU
CPU = pentium4
endif
DEFS += -D_CPU=${CPU}
## Accepted CPUs
#
ifeq ($(CPU),athlon-xp)
CFLAGS += -march=athlon-xp -mmmx -msse -m3dnow
DEFS += -DCONFIG_FENCES_P3
CONFIG_SMP = n
CONFIG_HT = n
endif
ifeq ($(CPU),athlon-mp)
CFLAGS += -march=athlon-mp -mmmx -msse -m3dnow
DEFS += -DCONFIG_FENCES_P3
CONFIG_HT = n
endif
ifeq ($(CPU),pentium3)
CFLAGS += -march=pentium3 -mmmx -msse
DEFS += -DCONFIG_FENCES_P3
CONFIG_HT = n
endif
ifeq ($(CPU),prescott)
CFLAGS += -march=pentium4 -mfpmath=sse -mmmx -msse -msse2 -msse3
DEFS += -DCONFIG_FENCES_P4
endif
ifeq ($(CPU),pentium4)
CFLAGS += -march=pentium4 -mfpmath=sse -mmmx -msse -msse2
DEFS += -DCONFIG_FENCES_P4
endif
## Own configuration directives
#
CONFIG_ACPI = y
## Accepted configuration directives
#
ifeq ($(CONFIG_SMP),y)
DEFS += -DCONFIG_SMP
endif
ifeq ($(CONFIG_HT),y)
DEFS += -DCONFIG_HT
endif
ifeq ($(CONFIG_FPU_LAZY),y)
DEFS += -DCONFIG_FPU_LAZY
endif
ARCH_SOURCES = \
arch/$(ARCH)/src/context.s \
arch/$(ARCH)/src/debug/panic.s \
arch/$(ARCH)/src/delay.s \
arch/$(ARCH)/src/asm.S \
arch/$(ARCH)/src/proc/scheduler.c \
arch/$(ARCH)/src/bios/bios.c \
arch/$(ARCH)/src/smp/ap.S \
arch/$(ARCH)/src/smp/apic.c \
arch/$(ARCH)/src/smp/mps.c \
arch/$(ARCH)/src/smp/smp.c \
arch/$(ARCH)/src/atomic.S \
arch/$(ARCH)/src/smp/ipi.c \
arch/$(ARCH)/src/ia32.c \
arch/$(ARCH)/src/interrupt.c \
arch/$(ARCH)/src/pm.c \
arch/$(ARCH)/src/userspace.c \
arch/$(ARCH)/src/cpu/cpu.c \
arch/$(ARCH)/src/mm/frame.c \
arch/$(ARCH)/src/mm/memory_init.c \
arch/$(ARCH)/src/mm/page.c \
arch/$(ARCH)/src/mm/tlb.c \
arch/$(ARCH)/src/drivers/i8042.c \
arch/$(ARCH)/src/drivers/i8254.c \
arch/$(ARCH)/src/drivers/i8259.c \
arch/$(ARCH)/src/drivers/ega.c \
arch/$(ARCH)/src/boot/boot.S \
arch/$(ARCH)/src/boot/memmap.S \
arch/$(ARCH)/src/fpu_context.c\
arch/$(ARCH)/src/fmath.c

/SPARTAN/trunk/arch/ia32/_link.ld.in
0,0 → 1,68
/** IA-32 linker script
*
* umapped section:
* kernel text
* kernel data
* mapped section:
* kernel text
* kernel data
*/
#define __ASM__
#include <arch/boot/boot.h>
#include <arch/mm/page.h>
ENTRY(kernel_image_start)
SECTIONS {
.unmapped BOOTSTRAP_OFFSET: AT (BOOTSTRAP_OFFSET) {
unmapped_ktext_start = .;
*(K_TEXT_START);
*(K_TEXT_START_2);
unmapped_ktext_end = .;
unmapped_kdata_start = .;
*(K_DATA_START);
unmapped_kdata_end = .;
}
.mapped (PA2KA(BOOT_OFFSET+BOOTSTRAP_OFFSET)+SIZEOF(.unmapped)): AT (BOOTSTRAP_OFFSET+SIZEOF(.unmapped)) {
ktext_start = .;
*(BOOT_DATA);
*(.text);
ktext_end = .;
kdata_start = .;
*(.data); /* initialized data */
*(.rodata*); /* string literals */
*(COMMON); /* global variables */
hardcoded_load_address = .;
LONG(PA2KA(BOOT_OFFSET+BOOTSTRAP_OFFSET));
hardcoded_ktext_size = .;
LONG((ktext_end - ktext_start) + (unmapped_ktext_end - unmapped_ktext_start));
hardcoded_kdata_size = .;
LONG((kdata_end - kdata_start) + (unmapped_kdata_end - unmapped_kdata_start));
hardcoded_unmapped_ktext_size = .;
LONG(unmapped_ktext_end - unmapped_ktext_start);
hardcoded_unmapped_kdata_size = .;
LONG(unmapped_kdata_end - unmapped_kdata_start);
*(.bss); /* uninitialized static variables */
symbol_table = .;
*(symtab.*); /* Symbol table, must be LAST symbol! */
kdata_end = .;
}
/DISCARD/ : {
*(.note.GNU-stack);
*(.comment);
}
_hardcoded_kernel_size = (ktext_end - ktext_start) + (unmapped_ktext_end - unmapped_ktext_start) + (kdata_end - kdata_start) + (unmapped_kdata_end - unmapped_kdata_start);
_hardcoded_unmapped_size = (unmapped_ktext_end - unmapped_ktext_start) + (unmapped_kdata_end - unmapped_kdata_start);
e820table_boot = KA2PA(e820table) - BOOT_OFFSET;
e820counter_boot = KA2PA(e820counter) - BOOT_OFFSET;
real_bootstrap_gdtr = PA2KA(real_bootstrap_gdtr_boot);
}

/SPARTAN/trunk/arch/ia32/boot/Makefile
0,0 → 1,17
.PHONY: build clean
build: boot.bin
dd if=boot.bin of=../../../image.bin bs=512 conv=sync
-cat ../../../kernel.bin >> ../../../image.bin
dd if=/dev/zero of=../../../image.bin bs=1 seek=1474559 count=1
boot.bin: boot.o
$(LD) -T boot.ld -entry _start_0x7c00 --oformat binary boot.o -o $@
boot.o: boot.S
$(CC) -E -DKERNEL_SIZE=$(KERNEL_SIZE) boot.S > boot.s
$(AS) boot.s -o $@
rm boot.s
clean:
-rm -f boot.o boot.bin ../../../image.bin

/SPARTAN/trunk/arch/ia32/boot/boot.S
0,0 → 1,151
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# This is a very primitive boot.s
# It assumes that the first sector of the kernel image is found
# on head 0, track 0, sector 2 of the first floppy drive (1440K).
# Next kernel sectors follow on disk sector 3, 4, ...
#
# KERNEL_SIZE is passed from the outside to the preprocessor
#if (KERNEL_SIZE%512>0)
#define TAIL 1
#else
#define TAIL 0
#endif
#define SECTORS (KERNEL_SIZE/512+TAIL)
.text
.global _start_0x7c00
.code16
_start_0x7c00:
xorw %ax,%ax # reset, %al will be used below
movw %ax,%dx # fd0, %dh and %dl will be used below
movw %dx,%ds
movw %dx,%ss # initialize stack
movw $stack,%sp
int $0x13 # reset floppy
jc stop_trying
movw %dx,%ds
movw %dx,%ss
movw $0x7c00,%sp
movw $0xffe0,%si # after next increment, %si will become 0x0000
movw %si,%es
movw $0x8000,%bx # at %es:%bx
movl $(SECTORS),%edi
read_next:
test %edi,%edi
jnz read_sectors
movb $12,%al
movw $0x3f2,%dx
outb %al,%dx
movb $('$'),%al
call echo_mark
jmpl $0,$0x8000
read_sectors:
movb $('.'),%al
call echo_mark
decl %edi
incw logical_sector
movw %es,%si
addw $0x20,%si
movw %si,%es
movw logical_sector,%ax
divb sectors
movb %ah,%cl
incb %cl # sector
movb %al,%ch
shrb $1,%ch # track
movb %al,%dh
andb $1,%dh # head
movw $0x0201,%ax
int $0x13
jnc read_next
movb $('R'),%al
call echo_mark
xorw %ax,%ax # try to reset
movw %ax,%dx # fd0
int $0x13
jnc read_next
stop_trying:
movb $('F'),%al
call echo_mark
cli
hlt
CH=4
echo_mark:
push %bp
movw %sp,%bp
pusha
movb $0xe,%ah
movb $7,%bl
int $0x10
popa
pop %bp
ret
# current logical sector from the beginning of the disk
logical_sector:
.word 0
# number of sectors per track on 1440 floppy
sectors:
.byte 18
# boot floppy signature
.org 0x1fe
boot_floppy_signature:
.byte 0x55
.byte 0xaa
stack:

/SPARTAN/trunk/arch/ia32/boot/boot.ld
0,0 → 1,4
OUTPUT_FORMAT(binary)
SECTIONS {
.text 0x7c00 : AT (0x0) { *(.text) }
}