/SPARTAN/trunk/arch/ia32/src/smp/apic.c |
---|
114,7 → 114,7 |
void apic_spurious(__u8 n, __u32 stack[]) |
{ |
printf("cpu%d: APIC spurious interrupt\n", the->cpu->id); |
printf("cpu%d: APIC spurious interrupt\n", CPU->id); |
} |
int apic_poll_errors(void) |
142,7 → 142,7 |
} |
/* |
* Send all CPUs excluding the->cpu IPI vector. |
* Send all CPUs excluding CPU IPI vector. |
*/ |
int l_apic_broadcast_custom_ipi(__u8 vector) |
{ |
232,7 → 232,7 |
l_apic[TPR] &= TPRClear; |
if (the->cpu->arch.family >= 6) |
if (CPU->arch.family >= 6) |
enable_l_apic_in_msr(); |
tmp = l_apic[ICRlo] & ICRloClear; |
270,7 → 270,7 |
#ifdef LAPIC_VERBOSE |
int i, lint; |
printf("LVT on cpu%d, LAPIC ID: %d\n", the->cpu->id, (l_apic[L_APIC_ID] >> 24)&0xf); |
printf("LVT on cpu%d, LAPIC ID: %d\n", CPU->id, (l_apic[L_APIC_ID] >> 24)&0xf); |
printf("LVT_Tm: "); |
if (l_apic[LVT_Tm] & (1<<17)) printf("periodic"); else printf("one-shot"); putchar(','); |
304,7 → 304,7 |
/* |
* This register is supported only on P6 and higher. |
*/ |
if (the->cpu->family > 5) { |
if (CPU->family > 5) { |
printf("LVT_PCINT: "); |
if (l_apic[LVT_PCINT] & (1<<16)) printf("masked"); else printf("not masked"); putchar(','); |
if (l_apic[LVT_PCINT] & (1<<12)) printf("send pending"); else printf("idle"); putchar(','); |
/SPARTAN/trunk/arch/ia32/src/cpu/cpu.c |
---|
61,7 → 61,7 |
void cpu_arch_init(void) |
{ |
the->cpu->arch.tss = tss_p; |
CPU->arch.tss = tss_p; |
} |
70,7 → 70,7 |
cpu_info_t info; |
int i; |
the->cpu->arch.vendor = VendorUnknown; |
CPU->arch.vendor = VendorUnknown; |
if (has_cpuid()) { |
cpuid(0, &info); |
81,7 → 81,7 |
info.cpuid_ecx==AMD_CPUID_ECX && |
info.cpuid_edx==AMD_CPUID_EDX) { |
the->cpu->arch.vendor = VendorAMD; |
CPU->arch.vendor = VendorAMD; |
} |
/* |
91,14 → 91,14 |
info.cpuid_ecx==INTEL_CPUID_ECX && |
info.cpuid_edx==INTEL_CPUID_EDX) { |
the->cpu->arch.vendor = VendorIntel; |
CPU->arch.vendor = VendorIntel; |
} |
cpuid(1, &info); |
the->cpu->arch.family = (info.cpuid_eax>>8)&0xf; |
the->cpu->arch.model = (info.cpuid_eax>>4)&0xf; |
the->cpu->arch.stepping = (info.cpuid_eax>>0)&0xf; |
CPU->arch.family = (info.cpuid_eax>>8)&0xf; |
CPU->arch.model = (info.cpuid_eax>>4)&0xf; |
CPU->arch.stepping = (info.cpuid_eax>>0)&0xf; |
} |
} |
/SPARTAN/trunk/arch/ia32/src/userspace.c |
---|
42,8 → 42,8 |
/* |
* Prepare TSS stack selector and pointers for next syscall. |
*/ |
the->cpu->arch.tss->esp0 = (__address) &the->thread->kstack[THREAD_STACK_SIZE-8]; |
the->cpu->arch.tss->ss0 = selector(KDATA_DES); |
CPU->arch.tss->esp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-8]; |
CPU->arch.tss->ss0 = selector(KDATA_DES); |
__asm__ volatile ("" |
"pushl %0\n" |
/SPARTAN/trunk/arch/ia32/src/drivers/i8259.c |
---|
116,5 → 116,5 |
void pic_spurious(__u8 n, __u32 stack[]) |
{ |
printf("cpu%d: PIC spurious interrupt\n", the->cpu->id); |
printf("cpu%d: PIC spurious interrupt\n", CPU->id); |
} |
/SPARTAN/trunk/arch/ia32/src/drivers/i8042.c |
---|
54,5 → 54,5 |
trap_virtual_eoi(); |
x = inb(0x60); |
printf("%d", the->cpu->id);; |
printf("%d", CPU->id);; |
} |
/SPARTAN/trunk/arch/ia32/src/drivers/i8254.c |
---|
110,7 → 110,7 |
o2 |= inb(CLK_PORT1) << 8; |
the->cpu->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + |
CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + |
(((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0); |
118,7 → 118,7 |
delay(1<<SHIFT); |
clk2 = rdtsc(); |
the->cpu->frequency_mhz = (clk2-clk1)>>SHIFT; |
CPU->frequency_mhz = (clk2-clk1)>>SHIFT; |
return; |
} |