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/SPARTAN/trunk/arch/amd64/src/dummy.s
0,0 → 1,96
#
# Copyright (C) 2005 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.text
 
.global userspace
.global before_thread_runs_arch
.global panic_printf
.global cpu_identify
.global cpu_arch_init
.global cpu_sleep
.global cpu_print_report
.global get_memory_size
.global arch_late_init
.global calibrate_delay_loop
.global cpu_halt
.global page_arch_init
.global frame_arch_init
.global dummy
.global trap_register
.global trap_virtual_eoi
.global trap_virtual_enable_irqs
.global rdtsc
.global trap_virtual_disable_irqs
.global enable_irqs_function
.global disable_irqs_function
.global eoi_function
.global syscall
.global null_interrupt
.global interrupt_handler_size
.global gp_fault
.global nm_fault
.global ss_fault
.global interrupt_handlers
.global memcpy
 
null_interrupt:
interrupt_handler_size:
interrupt_handlers:
gp_fault:
nm_fault:
ss_fault:
eoi_function:
syscall:
enable_irqs_function:
disable_irqs_function:
rdtsc:
trap_virtual_eoi:
trap_virtual_enable_irqs:
trap_virtual_disable_irqs:
trap_register:
before_thread_runs_arch:
userspace:
calibrate_delay_loop:
panic_printf:
cpu_identify:
cpu_arch_init:
cpu_sleep:
cpu_print_report:
get_memory_size:
arch_late_init:
calibrate_delay_loop:
cpu_halt:
page_arch_init:
frame_arch_init:
memcpy:
 
dummy:
0:
ret
/SPARTAN/trunk/arch/amd64/src/pm.c
0,0 → 1,259
/*
* Copyright (C) 2001-2004 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#include <arch/pm.h>
#include <arch/mm/page.h>
#include <arch/types.h>
#include <arch/interrupt.h>
#include <arch/asm.h>
 
#include <config.h>
 
#include <memstr.h>
#include <mm/heap.h>
#include <debug.h>
 
/*
* There is no segmentation in long mode so we set up flat mode. In this
* mode, we use, for each privilege level, two segments spanning the
* whole memory. One is for code and one is for data.
*/
 
struct descriptor gdt[GDT_ITEMS] = {
/* NULL descriptor */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
/* KTEXT descriptor */
{ .limit_0_15 = 0xffff,
.base_0_15 = 0,
.base_16_23 = 0,
.access = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE ,
.limit_16_19 = 0xf,
.available = 0,
.longmode = 1,
.special = 0,
.granularity = 1,
.base_24_31 = 0 },
/* KDATA descriptor */
{ .limit_0_15 = 0xffff,
.base_0_15 = 0,
.base_16_23 = 0,
.access = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL,
.limit_16_19 = 0xf,
.available = 0,
.longmode = 0,
.special = 0,
.granularity = 1,
.base_24_31 = 0 },
/* UTEXT descriptor */
{ .limit_0_15 = 0xffff,
.base_0_15 = 0,
.base_16_23 = 0,
.access = AR_PRESENT | AR_CODE | DPL_USER,
.limit_16_19 = 0xf,
.available = 0,
.longmode = 1,
.special = 0,
.granularity = 1,
.base_24_31 = 0 },
/* UDATA descriptor */
{ .limit_0_15 = 0xffff,
.base_0_15 = 0,
.base_16_23 = 0,
.access = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER,
.limit_16_19 = 0xf,
.available = 0,
.longmode = 0,
.special = 1,
.granularity = 1,
.base_24_31 = 0 },
/* KTEXT 16-bit protected */
{ .limit_0_15 = 0xffff,
.base_0_15 = 0,
.base_16_23 = 0,
.access = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE,
.limit_16_19 = 0xf,
.available = 0,
.longmode = 0,
.special = 0,
.granularity = 1,
.base_24_31 = 0 },
/* TSS descriptor - set up will be completed later,
* on AMD64 it is 64-bit - 2 items in table */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
};
 
struct ptr_16_64 gdtr = {.limit = sizeof(gdtr), .base= (__u64)KA2PA(&gdt) };
 
struct idescriptor idt[IDT_ITEMS];
 
static struct tss tss;
struct tss *tss_p = NULL;
 
/* TODO: Does not compile correctly if it does not exist ???? */
int __attribute__ ((section ("K_DATA_START"))) __fake;
 
void gdt_tss_setbase(struct descriptor *d, __address base)
{
struct tss_descriptor *td = (struct tss_descriptor *) d;
 
td->base_0_15 = base & 0xffff;
td->base_16_23 = ((base) >> 16) & 0xff;
td->base_24_31 = ((base) >> 24) & 0xff;
td->base_32_63 = ((base) >> 32);
}
 
void gdt_tss_setlimit(struct descriptor *d, __u32 limit)
{
struct tss_descriptor *td = (struct tss_descriptor *) d;
 
td->limit_0_15 = limit & 0xffff;
td->limit_16_19 = (limit >> 16) & 0xf;
}
 
void idt_setoffset(struct idescriptor *d, __address offset)
{
/*
* Offset is a linear address.
*/
d->offset_0_15 = offset & 0xffff;
d->offset_16_31 = offset >> 16 & 0xffff;
d->offset_32_63 = offset >> 32;
}
 
void tss_initialize(struct tss *t)
{
memsetb((__address) t, sizeof(struct tss), 0);
}
 
/*
* This function takes care of proper setup of IDT and IDTR.
*/
void idt_init(void)
{
struct idescriptor *d;
int i;
 
for (i = 0; i < IDT_ITEMS; i++) {
d = &idt[i];
 
d->unused = 0;
d->selector = idtselector(KTEXT_DES);
 
d->present = 1;
d->type = AR_INTERRUPT; /* masking interrupt */
 
if (i == VECTOR_SYSCALL) {
/*
* The syscall interrupt gate must be calleable from userland.
*/
d->dpl |= PL_USER;
}
idt_setoffset(d, ((__address) interrupt_handlers) + i*interrupt_handler_size);
trap_register(i, null_interrupt);
}
trap_register(13, gp_fault);
trap_register( 7, nm_fault);
trap_register(12, ss_fault);
}
 
 
/* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */
static void clean_IOPL_NT_flags(void)
{
asm
(
"pushfq;"
"pop %%rax;"
"and $~(0x7000),%%rax;"
"pushq %%rax;"
"popfq;"
:
:
:"%rax"
);
}
 
/* Clean AM(18) flag in CR0 register */
static void clean_AM_flag(void)
{
asm
(
"mov %%cr0,%%rax;"
"and $~(0x40000),%%rax;"
"mov %%rax,%%cr0;"
:
:
:"%rax"
);
}
 
void pm_init(void)
{
struct descriptor *gdt_p = (struct descriptor *) PA2KA(gdtr.base);
struct tss_descriptor *tss_desc;
 
/*
* Each CPU has its private GDT and TSS.
* All CPUs share one IDT.
*/
 
if (config.cpu_active == 1) {
idt_init();
/*
* NOTE: bootstrap CPU has statically allocated TSS, because
* the heap hasn't been initialized so far.
*/
tss_p = &tss;
}
else {
tss_p = (struct tss *) malloc(sizeof(struct tss));
if (!tss_p)
panic("could not allocate TSS\n");
}
 
tss_initialize(tss_p);
 
tss_desc = (struct tss_descriptor *) (&gdt_p[TSS_DES]);
tss_desc->present = 1;
tss_desc->type = AR_TSS;
tss_desc->dpl = PL_KERNEL;
gdt_tss_setbase(&gdt_p[TSS_DES], (__address) tss_p);
gdt_tss_setlimit(&gdt_p[TSS_DES], sizeof(struct tss) - 1);
 
/*
* As of this moment, the current CPU has its own GDT pointing
* to its own TSS. We just need to load the TR register.
*/
__asm__("ltr %0" : : "r" ((__u16) gdtselector(TSS_DES)));
clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels */
clean_AM_flag(); /* Disable alignment check */
}
/SPARTAN/trunk/arch/amd64/src/delay.S
0,0 → 1,48
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#
# Micro second delay loop functions.
#
 
.text
 
.global asm_delay_loop
.global asm_fake_loop
 
asm_delay_loop:
0: lahf
dec %edi
jnz 0b
ret
 
asm_fake_loop:
0: lahf
dec %edi
jz 0b
ret
/SPARTAN/trunk/arch/amd64/src/boot/boot.S
0,0 → 1,163
#
# Copyright (C) 2001-2004 Ondrej Palkovsky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#define __ASM__
 
#include <arch/mm/page.h>
#include <arch/mm/ptl.h>
#include <arch/pm.h>
 
#define START_STACK 0x7c00
#define START_STACK_64 $0xffffffff80007c00
#
# This is where we require any SPARTAN-kernel-compatible boot loader
# to pass control in real mode.
#
# Protected mode tables are statically initialised during compile
# time. So we can just load the respective table registers and
# switch to protected mode.
#
.section K_TEXT_START
.code16
.global kernel_image_start
kernel_image_start:
cli
xorw %ax,%ax
movw %ax,%ds
movw %ax,%ss # initialize stack segment register
movl START_STACK,%esp # initialize stack pointer
# call memmap_arch_init
movl $0x80000000, %eax
cpuid
cmp $0x80000000, %eax # any function > 80000000h?
jbe no_long_mode
movl $0x80000001, %eax # Extended function code 80000001
cpuid
bt $29, %edx # Test if long mode is supported.
jnc no_long_mode
 
# Load gdtr, idtr
lgdt gdtr_inst
# Load idtr, but it contains mess - we should not get interrupt
# anyway
lidt idtr_inst
movl %cr0,%eax
orl $0x1,%eax
movl %eax,%cr0 # switch to protected mode
 
jmpl $gdtselector(KTEXT32_DES), $now_in_prot
 
no_long_mode:
1:
jmp 1b
 
# Protected 16-bit. We want to reuse the code-seg descriptor,
# the Default operand size must not be 1 when entering long mode
now_in_prot:
# Set up stack & data descriptors
movw $gdtselector(KDATA_DES), %ax
movw %ax, %ds
movw %ax, %fs
movw %ax, %gs
movw %ax, %ss
 
# Enable 64-bit page transaltion entries - CR4.PAE = 1.
# Paging is not enabled until after long mode is enabled
movl %cr4, %eax
btsl $5, %eax
movl %eax, %cr4
 
# Set up paging tables
leal ptl_0, %eax
movl %eax, %cr3
# Enable long mode
movl $0xc0000080, %ecx # EFER MSR number
rdmsr # Read EFER
btsl $8, %eax # Set LME=1
wrmsr # Write EFER
# Enable paging to activate long mode (set CR0.PG=1)
movl %cr0, %eax
btsl $31, %eax
movl %eax, %cr0
# At this point we are in compatibility mode
jmpl $gdtselector(KTEXT_DES), $start64
 
.code64
start64:
movq START_STACK_64, %rsp
call main_bsp # never returns
1:
jmp 1b
.section K_DATA_START
.align 4096
 
# Identical mapping of first 16MB and the same of -2GB -> 0
.global ptl_2
ptl_2:
.quad 0x0 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
.quad 0x200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
.quad 0x400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
.quad 0x600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
.quad 0x800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
.quad 0xa00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
.quad 0xc00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
.quad 0xe00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
.align 4096
.global ptl_1
ptl_1:
.quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
.fill 509,8,0
.quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
.fill 2,8,0
.align 4096
.global ptl_0
ptl_0:
.quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
.fill 510,8,0
.quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
 
.global gdtr_inst
gdtr_inst:
.word gdtselector(GDT_ITEMS)
.long KA2PA(gdt)
 
.global idtr_inst
idtr_inst:
.word idtselector(IDT_ITEMS)
.long KA2PA(idt)
/SPARTAN/trunk/arch/amd64/src/boot/memmap.S
0,0 → 1,125
/*
* Copyright (C) 2005 Josef Cejka
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
 
#include <arch/boot/memmapasm.h>
 
E820_RECORD_SIZE = MEMMAP_E820_RECORD_SIZE
E820_MAX_RECORDS = MEMMAP_E820_MAX_RECORDS
E820_SMAP = 0x534d4150
 
.global memmap_arch_init
.global e820counter
.global e820table
.global e801memorysize
 
.code16
.section K_TEXT_START_2
 
memmap_arch_init:
 
e820begin:
xorl %ebx,%ebx # during first call, ebx must be 0
movw %bx,%ds
movw %bx,%es
movw $e820table,%di
movb $E820_MAX_RECORDS,e820counter
e820loop:
movl $E820_SMAP,%edx # control sequence "SMAP"
 
movl $0x0000e820,%eax # service
movl $E820_RECORD_SIZE,%ecx
int $0x15
jc e820err
cmpl $E820_SMAP,%eax # verifying BIOS
jne e820err
 
cmpl $E820_RECORD_SIZE,%ecx
jne e820err # bad record size - bug in bios
movw %di,%ax # next record
addw $E820_RECORD_SIZE,%ax
movw %ax,%di
decb e820counter # buffer is full
jz e820end
cmpl $0,%ebx
jne e820loop
e820end:
movb $E820_MAX_RECORDS,%al
subb e820counter,%al
movb %al,e820counter # store # of valid entries in e820counter
 
jmp e801begin
 
e820err:
movb $0,e820counter
 
# method e801 - get size of memory
 
e801begin:
xorw %dx,%dx
xorw %cx,%cx
xorw %bx,%bx
movw $0xe801,%ax
stc
int $0x15
jc e801end
# fix problem with some BIOSes which use ax:bx rather than cx:dx
testw %cx,%cx
jnz e801cxdx
testw %dx,%dx
jnz e801cxdx
 
movw %ax,%cx
movw %bx,%dx
e801cxdx:
andl $0xffff,%edx
shll $6,%edx
andl $0xffff,%ecx
addl %ecx,%edx
addl $0x0400,%edx # add lower 1 MB - it's not included by e801 method
movl %edx,e801memorysize
e801end:
ret
 
#memory size in 1 kb chunks
e801memorysize:
.long 0
 
e820counter:
.byte 0xff
 
e820table:
.space (32*E820_RECORD_SIZE),0xff # space for 32 records, each E820_RECORD_SIZE bytes long
/SPARTAN/trunk/arch/amd64/src/amd64.c
0,0 → 1,66
/*
* Copyright (C) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#include <arch.h>
 
#include <arch/types.h>
 
#include <config.h>
 
#include <arch/ega.h>
#include <arch/i8042.h>
#include <arch/i8254.h>
#include <arch/i8259.h>
 
#include <arch/bios/bios.h>
 
void arch_pre_mm_init(void)
{
pm_init();
 
if (config.cpu_active == 1) {
bios_init();
i8042_init(); /* a20 bit */
i8259_init(); /* PIC */
i8254_init(); /* hard clock */
 
trap_register(VECTOR_SYSCALL, syscall);
#ifdef __SMP__
trap_register(VECTOR_TLB_SHOOTDOWN_IPI, tlb_shootdown_ipi);
trap_register(VECTOR_WAKEUP_IPI, wakeup_ipi);
#endif /* __SMP__ */
}
}
 
void arch_post_mm_init(void)
{
if (config.cpu_active == 1) {
ega_init(); /* video */
}
}
/SPARTAN/trunk/arch/amd64/src/supplib.c
0,0 → 1,42
/*
* Copyright (C) 2005 Ondrej Palkovsky
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
#include <memstr.h>
 
/* TODO: Rewrite to assembler */
 
void memsetw(__address dst, size_t cnt, __u16 x)
{
_memsetw(dst, cnt, x);
}
 
void memsetb(__address dst, size_t cnt, __u8 x)
{
_memsetb(dst, cnt, x);
}
 
/SPARTAN/trunk/arch/amd64/src/gencontext.c
0,0 → 1,36
#include <stdio.h>
 
 
typedef long long __u64;
typedef __u64 pri_t;
 
#define __amd64_TYPES_H__
#include "../include/context.h"
 
#define FILENAME "context_offset.h"
 
int main(void)
{
FILE *f;
struct context ctx;
struct context *pctx = &ctx;
 
f = fopen(FILENAME,"w");
if (!f) {
perror(FILENAME);
return 1;
}
 
fprintf(f,"#define OFFSET_SP 0x%x\n",((int)&pctx->sp) - (int )pctx);
fprintf(f,"#define OFFSET_PC 0x%x\n",((int)&pctx->pc) - (int )pctx);
fprintf(f,"#define OFFSET_RBX 0x%x\n",((int)&pctx->rbx) - (int )pctx);
fprintf(f,"#define OFFSET_RBP 0x%x\n",((int)&pctx->rbp) - (int )pctx);
fprintf(f,"#define OFFSET_R12 0x%x\n",((int)&pctx->r12) - (int )pctx);
fprintf(f,"#define OFFSET_R13 0x%x\n",((int)&pctx->r13) - (int )pctx);
fprintf(f,"#define OFFSET_R14 0x%x\n",((int)&pctx->r14) - (int )pctx);
fprintf(f,"#define OFFSET_R15 0x%x\n",((int)&pctx->r15) - (int )pctx);
fprintf(f,"#define OFFSET_PRI 0x%x\n",((int)&pctx->pri) - (int )pctx);
fclose(f);
return 0;
}
/SPARTAN/trunk/arch/amd64/src/context.S
0,0 → 1,78
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.text
 
.global context_save
.global context_restore
 
#include "context_offset.h"
 
## Save current CPU context
#
# Save CPU context to the kernel_context variable
# pointed by the 1st argument. Returns 1 in EAX.
#
context_save:
movq (%rsp), %rdx # the caller's return %eip
# In %edi is passed 1st argument
movq %rdx, OFFSET_PC(%rdi)
movq %rsp, OFFSET_SP(%rdi)
movq %rbx, OFFSET_RBX(%rdi)
movq %rbp, OFFSET_RBP(%rdi)
movq %r12, OFFSET_R12(%rdi)
movq %r13, OFFSET_R13(%rdi)
movq %r14, OFFSET_R14(%rdi)
movq %r15, OFFSET_R15(%rdi)
xorq %rax,%rax # context_save returns 1
incq %rax
ret
 
 
## Restore current CPU context
#
# Restore CPU context from the kernel_context variable
# pointed by the 1st argument. Returns 0 in EAX.
#
context_restore:
movq OFFSET_R15(%rdi), %r15
movq OFFSET_R14(%rdi), %r14
movq OFFSET_R13(%rdi), %r13
movq OFFSET_R12(%rdi), %r12
movq OFFSET_RBP(%rdi), %rbp
movq OFFSET_RBX(%rdi), %rbx
movq OFFSET_SP(%rdi), %rsp # ctx->sp -> %rsp
movq OFFSET_PC(%rdi), %rdx
movq %rdx,(%rsp)
 
xorq %rax,%rax # context_restore returns 0
ret
/SPARTAN/trunk/arch/amd64/src/fpu_context.c
0,0 → 1,49
/*
* Copyright (C) 2005 Jakub Vana
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
 
#include <fpu_context.h>
 
void fpu_context_save(fpu_context_t *fctx)
{
}
 
 
void fpu_context_restore(fpu_context_t *fctx)
{
}
 
 
void fpu_lazy_context_save(fpu_context_t *fctx)
{
}
 
void fpu_lazy_context_restore(fpu_context_t *fctx)
{
 
}